reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

   21 cl::opt<uint32_t> Port("port",

   46 cl::opt<uint32_t> Port("port",

  961   static const uint32_t OpInfo0[] = {
 6348   static const uint32_t OpInfo1[] = {
13307     printImm8OptLsl<uint32_t>(MI, 2, STI, O);

 1958   static const uint32_t OpInfo0[] = {
 7345   static const uint32_t OpInfo1[] = {
14145     printImm8OptLsl<uint32_t>(MI, 2, STI, O);

115737       uint32_t enc = AArch64_AM::getFP16Imm(InVal);
115745       uint32_t enc = AArch64_AM::getFP32Imm(InVal);
115760       uint32_t enc = AArch64_AM::getFP64Imm(InVal);
115768       uint32_t enc = AArch64_AM::encodeAdvSIMDModImmType10(N->getValueAPF()

   37 const uint32_t CCRegBankCoverageData[] = {
   48 const uint32_t FPRRegBankCoverageData[] = {
   89 const uint32_t GPRRegBankCoverageData[] = {

 5042   ArrayRef<const uint32_t *> getRegMasks() const override;
 5413 static const uint32_t FPR8SubClassMask[] = {
 5427 static const uint32_t FPR16SubClassMask[] = {
 5441 static const uint32_t PPRSubClassMask[] = {
 5445 static const uint32_t PPR_3bSubClassMask[] = {
 5449 static const uint32_t GPR32allSubClassMask[] = {
 5457 static const uint32_t FPR32SubClassMask[] = {
 5471 static const uint32_t GPR32SubClassMask[] = {
 5479 static const uint32_t GPR32spSubClassMask[] = {
 5487 static const uint32_t GPR32commonSubClassMask[] = {
 5495 static const uint32_t GPR32argSubClassMask[] = {
 5503 static const uint32_t CCRSubClassMask[] = {
 5507 static const uint32_t GPR32sponlySubClassMask[] = {
 5512 static const uint32_t WSeqPairsClassSubClassMask[] = {
 5517 static const uint32_t WSeqPairsClass_with_subo32_in_GPR32commonSubClassMask[] = {
 5522 static const uint32_t WSeqPairsClass_with_sube32_in_GPR32argSubClassMask[] = {
 5527 static const uint32_t GPR64allSubClassMask[] = {
 5533 static const uint32_t FPR64SubClassMask[] = {
 5548 static const uint32_t GPR64SubClassMask[] = {
 5554 static const uint32_t GPR64spSubClassMask[] = {
 5560 static const uint32_t GPR64commonSubClassMask[] = {
 5566 static const uint32_t GPR64noipSubClassMask[] = {
 5572 static const uint32_t GPR64common_and_GPR64noipSubClassMask[] = {
 5578 static const uint32_t tcGPR64SubClassMask[] = {
 5584 static const uint32_t GPR64noip_and_tcGPR64SubClassMask[] = {
 5590 static const uint32_t GPR64argSubClassMask[] = {
 5596 static const uint32_t rtcGPR64SubClassMask[] = {
 5602 static const uint32_t GPR64sponlySubClassMask[] = {
 5606 static const uint32_t DDSubClassMask[] = {
 5619 static const uint32_t XSeqPairsClassSubClassMask[] = {
 5623 static const uint32_t XSeqPairsClass_with_subo64_in_GPR64commonSubClassMask[] = {
 5627 static const uint32_t XSeqPairsClass_with_subo64_in_GPR64noipSubClassMask[] = {
 5631 static const uint32_t XSeqPairsClass_with_sube64_in_GPR64noipSubClassMask[] = {
 5635 static const uint32_t XSeqPairsClass_with_sube64_in_tcGPR64SubClassMask[] = {
 5639 static const uint32_t XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64SubClassMask[] = {
 5643 static const uint32_t XSeqPairsClass_with_subo64_in_tcGPR64SubClassMask[] = {
 5647 static const uint32_t XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64SubClassMask[] = {
 5651 static const uint32_t XSeqPairsClass_with_sub_32_in_GPR32argSubClassMask[] = {
 5655 static const uint32_t XSeqPairsClass_with_sube64_in_rtcGPR64SubClassMask[] = {
 5659 static const uint32_t FPR128SubClassMask[] = {
 5671 static const uint32_t ZPRSubClassMask[] = {
 5679 static const uint32_t FPR128_loSubClassMask[] = {
 5691 static const uint32_t ZPR_4bSubClassMask[] = {
 5699 static const uint32_t ZPR_3bSubClassMask[] = {
 5707 static const uint32_t DDDSubClassMask[] = {
 5717 static const uint32_t DDDDSubClassMask[] = {
 5723 static const uint32_t QQSubClassMask[] = {
 5733 static const uint32_t ZPR2SubClassMask[] = {
 5740 static const uint32_t QQ_with_qsub0_in_FPR128_loSubClassMask[] = {
 5750 static const uint32_t QQ_with_qsub1_in_FPR128_loSubClassMask[] = {
 5760 static const uint32_t ZPR2_with_zsub1_in_ZPR_4bSubClassMask[] = {
 5767 static const uint32_t ZPR2_with_zsub_in_FPR128_loSubClassMask[] = {
 5774 static const uint32_t QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_loSubClassMask[] = {
 5784 static const uint32_t ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPR_4bSubClassMask[] = {
 5791 static const uint32_t ZPR2_with_zsub0_in_ZPR_3bSubClassMask[] = {
 5798 static const uint32_t ZPR2_with_zsub1_in_ZPR_3bSubClassMask[] = {
 5805 static const uint32_t ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPR_3bSubClassMask[] = {
 5812 static const uint32_t QQQSubClassMask[] = {
 5820 static const uint32_t ZPR3SubClassMask[] = {
 5826 static const uint32_t QQQ_with_qsub0_in_FPR128_loSubClassMask[] = {
 5834 static const uint32_t QQQ_with_qsub1_in_FPR128_loSubClassMask[] = {
 5842 static const uint32_t QQQ_with_qsub2_in_FPR128_loSubClassMask[] = {
 5850 static const uint32_t ZPR3_with_zsub1_in_ZPR_4bSubClassMask[] = {
 5856 static const uint32_t ZPR3_with_zsub2_in_ZPR_4bSubClassMask[] = {
 5862 static const uint32_t ZPR3_with_zsub_in_FPR128_loSubClassMask[] = {
 5868 static const uint32_t QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_loSubClassMask[] = {
 5876 static const uint32_t QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loSubClassMask[] = {
 5884 static const uint32_t ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bSubClassMask[] = {
 5890 static const uint32_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPR_4bSubClassMask[] = {
 5896 static const uint32_t QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loSubClassMask[] = {
 5904 static const uint32_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPR_4bSubClassMask[] = {
 5910 static const uint32_t ZPR3_with_zsub0_in_ZPR_3bSubClassMask[] = {
 5916 static const uint32_t ZPR3_with_zsub1_in_ZPR_3bSubClassMask[] = {
 5922 static const uint32_t ZPR3_with_zsub2_in_ZPR_3bSubClassMask[] = {
 5928 static const uint32_t ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3bSubClassMask[] = {
 5934 static const uint32_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPR_3bSubClassMask[] = {
 5940 static const uint32_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPR_3bSubClassMask[] = {
 5946 static const uint32_t QQQQSubClassMask[] = {
 5951 static const uint32_t ZPR4SubClassMask[] = {
 5955 static const uint32_t QQQQ_with_qsub0_in_FPR128_loSubClassMask[] = {
 5960 static const uint32_t QQQQ_with_qsub1_in_FPR128_loSubClassMask[] = {
 5965 static const uint32_t QQQQ_with_qsub2_in_FPR128_loSubClassMask[] = {
 5970 static const uint32_t QQQQ_with_qsub3_in_FPR128_loSubClassMask[] = {
 5975 static const uint32_t ZPR4_with_zsub1_in_ZPR_4bSubClassMask[] = {
 5979 static const uint32_t ZPR4_with_zsub2_in_ZPR_4bSubClassMask[] = {
 5983 static const uint32_t ZPR4_with_zsub3_in_ZPR_4bSubClassMask[] = {
 5987 static const uint32_t ZPR4_with_zsub_in_FPR128_loSubClassMask[] = {
 5991 static const uint32_t QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_loSubClassMask[] = {
 5996 static const uint32_t QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loSubClassMask[] = {
 6001 static const uint32_t QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loSubClassMask[] = {
 6006 static const uint32_t ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bSubClassMask[] = {
 6010 static const uint32_t ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bSubClassMask[] = {
 6014 static const uint32_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPR_4bSubClassMask[] = {
 6018 static const uint32_t QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loSubClassMask[] = {
 6023 static const uint32_t QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loSubClassMask[] = {
 6028 static const uint32_t ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bSubClassMask[] = {
 6032 static const uint32_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPR_4bSubClassMask[] = {
 6036 static const uint32_t QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loSubClassMask[] = {
 6041 static const uint32_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPR_4bSubClassMask[] = {
 6045 static const uint32_t ZPR4_with_zsub0_in_ZPR_3bSubClassMask[] = {
 6049 static const uint32_t ZPR4_with_zsub1_in_ZPR_3bSubClassMask[] = {
 6053 static const uint32_t ZPR4_with_zsub2_in_ZPR_3bSubClassMask[] = {
 6057 static const uint32_t ZPR4_with_zsub3_in_ZPR_3bSubClassMask[] = {
 6061 static const uint32_t ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3bSubClassMask[] = {
 6065 static const uint32_t ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bSubClassMask[] = {
 6069 static const uint32_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPR_3bSubClassMask[] = {
 6073 static const uint32_t ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bSubClassMask[] = {
 6077 static const uint32_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPR_3bSubClassMask[] = {
 6081 static const uint32_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPR_3bSubClassMask[] = {
20409 static const uint32_t CSR_AArch64_AAPCS_RegMask[] = { 0x01fe000c, 0x01fe0000, 0x01fe0000, 0x00000000, 0x00000000, 0x000001fe, 0x00fff000, 0x001ff800, 0x00000000, 0xe0000000, 0xe000000f, 0xe0000003, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x001e005f, 0x00000000, 0x00000000, 0x00000000, };
20411 static const uint32_t CSR_AArch64_AAPCS_SCS_RegMask[] = { 0x01fe000c, 0x01fe0000, 0x01fe0000, 0x00000000, 0x00000000, 0x000001fe, 0x00fff800, 0x001ffc00, 0x00000000, 0xe0000000, 0xe000000f, 0xe0000003, 0x00000007, 0x00000000, 0x00000000, 0x80000000, 0x001f005f, 0x00000000, 0x00000000, 0x00000000, };
20413 static const uint32_t CSR_AArch64_AAPCS_SwiftError_RegMask[] = { 0x01fe000c, 0x01fe0000, 0x01fe0000, 0x00000000, 0x00000000, 0x000001fe, 0x00ffb000, 0x001fd800, 0x00000000, 0xe0000000, 0xe000000f, 0xe0000003, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x001c005e, 0x00000000, 0x00000000, 0x00000000, };
20415 static const uint32_t CSR_AArch64_AAPCS_SwiftError_SCS_RegMask[] = { 0x01fe000c, 0x01fe0000, 0x01fe0000, 0x00000000, 0x00000000, 0x000001fe, 0x00ffb800, 0x001fdc00, 0x00000000, 0xe0000000, 0xe000000f, 0xe0000003, 0x00000007, 0x00000000, 0x00000000, 0x80000000, 0x001d005e, 0x00000000, 0x00000000, 0x00000000, };
20417 static const uint32_t CSR_AArch64_AAPCS_ThisReturn_RegMask[] = { 0x01fe000c, 0x01fe0000, 0x01fe0000, 0x00000000, 0x00000000, 0x020001fe, 0x01fff000, 0x001ff800, 0x00000000, 0xe0000000, 0xe000000f, 0xe0000003, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x001e005f, 0x00000000, 0x00000000, 0x00000000, };
20419 static const uint32_t CSR_AArch64_AAVPCS_RegMask[] = { 0xfffe000c, 0xfffe0001, 0xfffe0001, 0x00000001, 0x0001fffe, 0x0001fffe, 0x00fff000, 0x001ff800, 0x00000000, 0xe0000000, 0xe0000fff, 0xe00003ff, 0xe00007ff, 0xe0000fff, 0xe00003ff, 0x000007ff, 0x001e005f, 0x00000000, 0x00000000, 0x00000000, };
20421 static const uint32_t CSR_AArch64_AAVPCS_SCS_RegMask[] = { 0xfffe000c, 0xfffe0001, 0xfffe0001, 0x00000001, 0x0001fffe, 0x0001fffe, 0x00fff800, 0x001ffc00, 0x00000000, 0xe0000000, 0xe0000fff, 0xe00003ff, 0xe00007ff, 0xe0000fff, 0xe00003ff, 0x800007ff, 0x001f005f, 0x00000000, 0x00000000, 0x00000000, };
20423 static const uint32_t CSR_AArch64_AllRegs_RegMask[] = { 0xfffffe6c, 0xffffffff, 0xffffffff, 0xfe0001ff, 0xffffffff, 0xffffffff, 0xffffffff, 0x001fffff, 0x00000000, 0xffe00000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffdfffff, 0x001fffdf, 0x00000000, 0x00000000, 0x00000000, };
20425 static const uint32_t CSR_AArch64_AllRegs_SCS_RegMask[] = { 0xfffffe6c, 0xffffffff, 0xffffffff, 0xfe0001ff, 0xffffffff, 0xffffffff, 0xffffffff, 0x001fffff, 0x00000000, 0xffe00000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffdfffff, 0x001fffdf, 0x00000000, 0x00000000, 0x00000000, };
20427 static const uint32_t CSR_AArch64_CXX_TLS_Darwin_RegMask[] = { 0xfffffe0c, 0xffffffff, 0xffffffff, 0x000001ff, 0xfe000000, 0xfdffffff, 0xfefff0ff, 0x001ff87f, 0x00000000, 0xffe00000, 0xffffffff, 0xffffffff, 0x001fffff, 0x00000000, 0x00000000, 0x1f800000, 0x001e3f5f, 0x00000000, 0x00000000, 0x00000000, };
20429 static const uint32_t CSR_AArch64_CXX_TLS_Darwin_PE_RegMask[] = { 0x0000000c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00c00000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
20431 static const uint32_t CSR_AArch64_CXX_TLS_Darwin_SCS_RegMask[] = { 0xfffffe0c, 0xffffffff, 0xffffffff, 0x000001ff, 0xfe000000, 0xfdffffff, 0xfefff8ff, 0x001ffc7f, 0x00000000, 0xffe00000, 0xffffffff, 0xffffffff, 0x001fffff, 0x00000000, 0x00000000, 0x9f800000, 0x001f3f5f, 0x00000000, 0x00000000, 0x00000000, };
20433 static const uint32_t CSR_AArch64_CXX_TLS_Darwin_ViaCopy_RegMask[] = { 0xfffffe00, 0xffffffff, 0xffffffff, 0x000001ff, 0xfe000000, 0xfdffffff, 0xfe3ff0ff, 0x001ff87f, 0x00000000, 0xffe00000, 0xffffffff, 0xffffffff, 0x001fffff, 0x00000000, 0x00000000, 0x1f800000, 0x001e3f0f, 0x00000000, 0x00000000, 0x00000000, };
20435 static const uint32_t CSR_AArch64_NoRegs_RegMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
20437 static const uint32_t CSR_AArch64_NoRegs_SCS_RegMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000800, 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
20439 static const uint32_t CSR_AArch64_RT_MostRegs_RegMask[] = { 0x01fe000c, 0x01fe0000, 0x01fe0000, 0x00000000, 0x00000000, 0x000001fe, 0x00fff1fc, 0x001ff8fe, 0x00000000, 0xe0000000, 0xe000000f, 0xe0000003, 0x00000007, 0x00000000, 0x00000000, 0x38000000, 0x001e705f, 0x00000000, 0x00000000, 0x00000000, };
20441 static const uint32_t CSR_AArch64_RT_MostRegs_SCS_RegMask[] = { 0x01fe000c, 0x01fe0000, 0x01fe0000, 0x00000000, 0x00000000, 0x000001fe, 0x00fff9fc, 0x001ffcfe, 0x00000000, 0xe0000000, 0xe000000f, 0xe0000003, 0x00000007, 0x00000000, 0x00000000, 0xb8000000, 0x001f705f, 0x00000000, 0x00000000, 0x00000000, };
20443 static const uint32_t CSR_AArch64_SVE_AAPCS_RegMask[] = { 0xfffe000c, 0xfffe0001, 0xfffe0001, 0x01ffe001, 0x0001fffe, 0x0001fffe, 0x00fff000, 0xe01ff800, 0xe0001fff, 0xe0001fff, 0xe0000fff, 0xe00003ff, 0xe00007ff, 0xe0000fff, 0xe00003ff, 0x000007ff, 0xe01e005f, 0xe0000fff, 0xe00003ff, 0x000007ff, };
20445 static const uint32_t CSR_AArch64_StackProbe_Windows_RegMask[] = { 0xfffffe64, 0xffffffff, 0xffffffff, 0xfe0001ff, 0xffffffff, 0xffffffff, 0xff7ff9ff, 0x001ffcff, 0x00000000, 0xffe00000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xbfdfffff, 0x001f7fdf, 0x00000000, 0x00000000, 0x00000000, };
20447 static const uint32_t CSR_AArch64_TLS_Darwin_RegMask[] = { 0xfffffe04, 0xffffffff, 0xffffffff, 0xfe0001ff, 0xffffffff, 0xfdffffff, 0xfe7ff9ff, 0x001ffcff, 0x00000000, 0xffe00000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xbf9fffff, 0x001f7f5f, 0x00000000, 0x00000000, 0x00000000, };
20449 static const uint32_t CSR_AArch64_TLS_ELF_RegMask[] = { 0xfffffe04, 0xffffffff, 0xffffffff, 0xfe0001ff, 0xffffffff, 0xfdffffff, 0xfe7fffff, 0x001fffff, 0x00000000, 0xffe00000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff9fffff, 0x001fff5f, 0x00000000, 0x00000000, 0x00000000, };
20451 static const uint32_t CSR_Darwin_AArch64_AAPCS_RegMask[] = { 0x01fe000c, 0x01fe0000, 0x01fe0000, 0x00000000, 0x00000000, 0x000001fe, 0x00fff000, 0x001ff800, 0x00000000, 0xe0000000, 0xe000000f, 0xe0000003, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x001e005f, 0x00000000, 0x00000000, 0x00000000, };
20453 static const uint32_t CSR_Win_AArch64_AAPCS_RegMask[] = { 0x01fe000c, 0x01fe0000, 0x01fe0000, 0x00000000, 0x00000000, 0x000001fe, 0x00fff000, 0x001ff800, 0x00000000, 0xe0000000, 0xe000000f, 0xe0000003, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x001e005f, 0x00000000, 0x00000000, 0x00000000, };
20455 static const uint32_t CSR_Win_AArch64_CFGuard_Check_RegMask[] = { 0x01fffe0c, 0x01fffe00, 0x01fffe00, 0xfe000000, 0xfe000001, 0xfe0001ff, 0xfffff003, 0x001ff801, 0x00000000, 0xffe00000, 0xffe0000f, 0xffe00003, 0x0fe00007, 0x03e00000, 0x07e00000, 0x03c00000, 0x001e07df, 0x00000000, 0x00000000, 0x00000000, };
20458 ArrayRef<const uint32_t *> AArch64GenRegisterInfo::getRegMasks() const {
20459   static const uint32_t *const Masks[] = {

24131     uint32_t OperandMask;

 1921   static const uint32_t OpInfo0[] = {
17187   static const uint32_t OpInfo1[] = {

   38 const uint32_t SCCRegBankCoverageData[] = {
   57 const uint32_t SGPRRegBankCoverageData[] = {
  160 const uint32_t VCCRegBankCoverageData[] = {
  190 const uint32_t VGPRRegBankCoverageData[] = {

17315   ArrayRef<const uint32_t *> getRegMasks() const override;
17802 static const uint32_t SCC_CLASSSubClassMask[] = {
17806 static const uint32_t SReg_1SubClassMask[] = {
17859 static const uint32_t SReg_1_XEXECSubClassMask[] = {
17912 static const uint32_t SReg_1_with_sub0SubClassMask[] = {
17933 static const uint32_t SReg_1_XEXEC_with_sub0SubClassMask[] = {
17954 static const uint32_t SReg_1_with_sub0_with_sub0_in_SGPR_32SubClassMask[] = {
17975 static const uint32_t SReg_1_with_sub0_with_sub0_in_TTMP_32SubClassMask[] = {
17987 static const uint32_t VReg_1SubClassMask[] = {
17991 static const uint32_t AV_32SubClassMask[] = {
18027 static const uint32_t VS_32SubClassMask[] = {
18063 static const uint32_t VRegOrLds_32SubClassMask[] = {
18099 static const uint32_t AGPR_32SubClassMask[] = {
18135 static const uint32_t VGPR_32SubClassMask[] = {
18171 static const uint32_t SRegOrLds_32SubClassMask[] = {
18207 static const uint32_t SReg_32SubClassMask[] = {
18243 static const uint32_t SReg_32_XEXEC_HISubClassMask[] = {
18279 static const uint32_t SReg_32_XM0SubClassMask[] = {
18315 static const uint32_t SRegOrLds_32_and_SReg_1SubClassMask[] = {
18351 static const uint32_t SReg_32_XM0_XEXECSubClassMask[] = {
18387 static const uint32_t SGPR_32SubClassMask[] = {
18423 static const uint32_t TTMP_32SubClassMask[] = {
18443 static const uint32_t Pseudo_SReg_32SubClassMask[] = {
18447 static const uint32_t LDS_DIRECT_CLASSSubClassMask[] = {
18451 static const uint32_t M0_CLASSSubClassMask[] = {
18455 static const uint32_t AV_64SubClassMask[] = {
18490 static const uint32_t VS_64SubClassMask[] = {
18525 static const uint32_t AReg_64SubClassMask[] = {
18560 static const uint32_t VReg_64SubClassMask[] = {
18595 static const uint32_t SReg_64SubClassMask[] = {
18616 static const uint32_t SReg_64_XEXECSubClassMask[] = {
18637 static const uint32_t SGPR_64SubClassMask[] = {
18658 static const uint32_t CCR_SGPR_64SubClassMask[] = {
18679 static const uint32_t TTMP_64SubClassMask[] = {
18691 static const uint32_t VReg_96SubClassMask[] = {
18725 static const uint32_t SGPR_96SubClassMask[] = {
18759 static const uint32_t SReg_96SubClassMask[] = {
18793 static const uint32_t SGPR_96_with_sub0_sub1SubClassMask[] = {
18812 static const uint32_t SGPR_96_with_sub1_sub2SubClassMask[] = {
18831 static const uint32_t SGPR_96_with_sub0_sub1_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
18849 static const uint32_t SGPR_96_with_sub1_sub2_with_sub1_sub2_in_CCR_SGPR_64SubClassMask[] = {
18866 static const uint32_t AReg_128SubClassMask[] = {
18899 static const uint32_t VReg_128SubClassMask[] = {
18932 static const uint32_t SReg_128SubClassMask[] = {
18944 static const uint32_t SGPR_128SubClassMask[] = {
18956 static const uint32_t SGPR_128_with_sub0_sub1_sub2SubClassMask[] = {
18968 static const uint32_t SGPR_128_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
18980 static const uint32_t SGPR_128_with_sub1_sub2_sub3SubClassMask[] = {
18992 static const uint32_t TTMP_128SubClassMask[] = {
19000 static const uint32_t SGPR_128_with_sub0_sub1_sub2_and_SGPR_128_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19011 static const uint32_t SGPR_128_with_sub1_sub2_sub3_and_SGPR_128_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19021 static const uint32_t Pseudo_SReg_128SubClassMask[] = {
19025 static const uint32_t VReg_160SubClassMask[] = {
19057 static const uint32_t SGPR_160SubClassMask[] = {
19068 static const uint32_t SReg_160SubClassMask[] = {
19079 static const uint32_t SGPR_160_with_sub0_sub1_sub2SubClassMask[] = {
19090 static const uint32_t SGPR_160_with_sub2_sub3_sub4SubClassMask[] = {
19101 static const uint32_t SGPR_160_with_sub0_sub1_sub2_sub3_in_SGPR_128_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19112 static const uint32_t SGPR_160_with_sub1_sub2_sub3SubClassMask[] = {
19123 static const uint32_t SGPR_160_with_sub0_sub1_sub2_and_SGPR_160_with_sub0_sub1_sub2_sub3_in_SGPR_128_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19134 static const uint32_t SGPR_160_with_sub2_sub3_sub4_and_SGPR_160_with_sub0_sub1_sub2_sub3_in_SGPR_128_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19145 static const uint32_t SGPR_160_with_sub1_sub2_sub3_and_SGPR_160_with_sub0_sub1_sub2_sub3_in_SGPR_128_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19155 static const uint32_t VReg_256SubClassMask[] = {
19184 static const uint32_t SReg_256SubClassMask[] = {
19195 static const uint32_t SGPR_256SubClassMask[] = {
19206 static const uint32_t SGPR_256_with_sub0_sub1_sub2SubClassMask[] = {
19217 static const uint32_t SGPR_256_with_sub0_sub1_sub2_sub3_in_SGPR_128_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19228 static const uint32_t SGPR_256_with_sub1_sub2_sub3SubClassMask[] = {
19239 static const uint32_t SGPR_256_with_sub2_sub3_sub4SubClassMask[] = {
19250 static const uint32_t SGPR_256_with_sub4_sub5_sub6_sub7_in_SGPR_128_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19261 static const uint32_t SGPR_256_with_sub0_sub1_sub2_and_SGPR_256_with_sub0_sub1_sub2_sub3_in_SGPR_128_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19272 static const uint32_t SGPR_256_with_sub2_sub3_sub4_and_SGPR_256_with_sub0_sub1_sub2_sub3_in_SGPR_128_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19283 static const uint32_t TTMP_256SubClassMask[] = {
19290 static const uint32_t SGPR_256_with_sub1_sub2_sub3_and_SGPR_256_with_sub0_sub1_sub2_sub3_in_SGPR_128_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19300 static const uint32_t SGPR_256_with_sub2_sub3_sub4_and_SGPR_256_with_sub4_sub5_sub6_sub7_in_SGPR_128_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19309 static const uint32_t AReg_512SubClassMask[] = {
19330 static const uint32_t VReg_512SubClassMask[] = {
19351 static const uint32_t SReg_512SubClassMask[] = {
19360 static const uint32_t SGPR_512SubClassMask[] = {
19369 static const uint32_t SGPR_512_with_sub0_sub1_sub2SubClassMask[] = {
19378 static const uint32_t SGPR_512_with_sub0_sub1_sub2_sub3_in_SGPR_128_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19387 static const uint32_t SGPR_512_with_sub2_sub3_sub4SubClassMask[] = {
19396 static const uint32_t SGPR_512_with_sub1_sub2_sub3SubClassMask[] = {
19405 static const uint32_t SGPR_512_with_sub4_sub5_sub6_sub7_in_SGPR_128_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19414 static const uint32_t SGPR_512_with_sub8_sub9_sub10_sub11_in_SGPR_128_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19423 static const uint32_t SGPR_512_with_sub12_sub13_sub14_sub15_in_SGPR_128_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19432 static const uint32_t SGPR_512_with_sub0_sub1_sub2_and_SGPR_512_with_sub0_sub1_sub2_sub3_in_SGPR_128_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19441 static const uint32_t SGPR_512_with_sub2_sub3_sub4_and_SGPR_512_with_sub0_sub1_sub2_sub3_in_SGPR_128_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19450 static const uint32_t SGPR_512_with_sub0_sub1_sub2_and_SGPR_512_with_sub8_sub9_sub10_sub11_in_SGPR_128_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19458 static const uint32_t SGPR_512_with_sub1_sub2_sub3_and_SGPR_512_with_sub0_sub1_sub2_sub3_in_SGPR_128_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19467 static const uint32_t SGPR_512_with_sub2_sub3_sub4_and_SGPR_512_with_sub4_sub5_sub6_sub7_in_SGPR_128_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19476 static const uint32_t SGPR_512_with_sub1_sub2_sub3_and_SGPR_512_with_sub12_sub13_sub14_sub15_in_SGPR_128_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19483 static const uint32_t TTMP_512SubClassMask[] = {
19487 static const uint32_t AReg_1024SubClassMask[] = {
19491 static const uint32_t VReg_1024SubClassMask[] = {
19495 static const uint32_t SGPR_1024SubClassMask[] = {
19499 static const uint32_t SReg_1024SubClassMask[] = {
19503 static const uint32_t SGPR_1024_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19507 static const uint32_t SGPR_1024_with_sub0_sub1_sub2SubClassMask[] = {
19511 static const uint32_t SGPR_1024_with_sub4_sub5_in_CCR_SGPR_64SubClassMask[] = {
19515 static const uint32_t SGPR_1024_with_sub1_sub2_sub3SubClassMask[] = {
19519 static const uint32_t SGPR_1024_with_sub2_sub3_sub4SubClassMask[] = {
19523 static const uint32_t SGPR_1024_with_sub8_sub9_in_CCR_SGPR_64SubClassMask[] = {
19527 static const uint32_t SGPR_1024_with_sub12_sub13_in_CCR_SGPR_64SubClassMask[] = {
19531 static const uint32_t SGPR_1024_with_sub16_sub17_in_CCR_SGPR_64SubClassMask[] = {
19535 static const uint32_t SGPR_1024_with_sub0_sub1_sub2_and_SGPR_1024_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19539 static const uint32_t SGPR_1024_with_sub20_sub21_in_CCR_SGPR_64SubClassMask[] = {
19543 static const uint32_t SGPR_1024_with_sub2_sub3_sub4_and_SGPR_1024_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19547 static const uint32_t SGPR_1024_with_sub0_sub1_sub2_and_SGPR_1024_with_sub8_sub9_in_CCR_SGPR_64SubClassMask[] = {
19551 static const uint32_t SGPR_1024_with_sub1_sub2_sub3_and_SGPR_1024_with_sub0_sub1_in_CCR_SGPR_64SubClassMask[] = {
19555 static const uint32_t SGPR_1024_with_sub24_sub25_in_CCR_SGPR_64SubClassMask[] = {
19559 static const uint32_t SGPR_1024_with_sub2_sub3_sub4_and_SGPR_1024_with_sub4_sub5_in_CCR_SGPR_64SubClassMask[] = {
19563 static const uint32_t SGPR_1024_with_sub1_sub2_sub3_and_SGPR_1024_with_sub12_sub13_in_CCR_SGPR_64SubClassMask[] = {
19567 static const uint32_t SGPR_1024_with_sub28_sub29_in_CCR_SGPR_64SubClassMask[] = {
19571 static const uint32_t SGPR_1024_with_sub2_sub3_sub4_and_SGPR_1024_with_sub16_sub17_in_CCR_SGPR_64SubClassMask[] = {
48770 static const uint32_t CSR_AMDGPU_AllAllocatableSRegs_RegMask[] = { 0x00000000, 0x00000030, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xffffffff, 0xffffffff, 0x000fffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffc0000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
48772 static const uint32_t CSR_AMDGPU_AllVGPRs_RegMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffff0, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0000000f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffe0000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0003ffff, };
48774 static const uint32_t CSR_AMDGPU_HighRegs_RegMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xffffffff, 0x000fffff, 0x00000000, 0xfffffff0, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0000000f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfc000000, 0x7fffe01f, 0x01ffff80, 0xfc03fffe, 0xfe0001ff, 0x3fffffff, 0xfffffe00, 0x00000001, 0xfffe0000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0003ffff, 0xfffc0000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x00007fff, 0xffff8000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000007ff, 0xfffff800, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0000000f, 0xfffffff0, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x001fffff, 0xffe00000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000fffff, 0xfff00000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0003ffff, };
48776 static const uint32_t CSR_AMDGPU_SGPRs_32_105_RegMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xffffffff, 0x000fffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfc000000, 0x7fffe01f, 0x01ffff80, 0xfc03fffe, 0xfe0001ff, 0x3fffffff, 0xfffffe00, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
48778 static const uint32_t CSR_AMDGPU_VGPRs_24_255_RegMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf0000000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0000000f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0003ffff, 0xfffffc00, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x00007fff, 0xffffff80, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000007ff, 0xfffffff8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xf000000f, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x001fffff, 0xffffe000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000fffff, 0xfffff000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0003ffff, };
48780 static const uint32_t CSR_AMDGPU_VGPRs_32_255_RegMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffff0, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0000000f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffe0000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0003ffff, 0xfffc0000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x00007fff, 0xffff8000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000007ff, 0xfffff800, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0000000f, 0xfffffff0, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x001fffff, 0xffe00000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000fffff, 0xfff00000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0003ffff, };
48783 ArrayRef<const uint32_t *> AMDGPUGenRegisterInfo::getRegMasks() const {
48784   static const uint32_t *const Masks[] = {

  273   static const uint32_t OpInfo0[] = {
  793   uint32_t Bits = 0;

 8802   ArrayRef<const uint32_t *> getRegMasks() const override;
 8943 static const uint32_t R600_Reg32SubClassMask[] = {
 8951 static const uint32_t R600_TReg32SubClassMask[] = {
 8959 static const uint32_t R600_TReg32_XSubClassMask[] = {
 8967 static const uint32_t R600_AddrSubClassMask[] = {
 8971 static const uint32_t R600_KC0SubClassMask[] = {
 8975 static const uint32_t R600_KC1SubClassMask[] = {
 8979 static const uint32_t R600_TReg32_WSubClassMask[] = {
 8987 static const uint32_t R600_TReg32_YSubClassMask[] = {
 8995 static const uint32_t R600_TReg32_ZSubClassMask[] = {
 9003 static const uint32_t R600_ArrayBaseSubClassMask[] = {
 9007 static const uint32_t R600_KC0_WSubClassMask[] = {
 9011 static const uint32_t R600_KC0_XSubClassMask[] = {
 9015 static const uint32_t R600_KC0_YSubClassMask[] = {
 9019 static const uint32_t R600_KC0_ZSubClassMask[] = {
 9023 static const uint32_t R600_KC1_WSubClassMask[] = {
 9027 static const uint32_t R600_KC1_XSubClassMask[] = {
 9031 static const uint32_t R600_KC1_YSubClassMask[] = {
 9035 static const uint32_t R600_KC1_ZSubClassMask[] = {
 9039 static const uint32_t R600_LDS_SRC_REGSubClassMask[] = {
 9043 static const uint32_t R600_PredicateSubClassMask[] = {
 9047 static const uint32_t R600_Addr_WSubClassMask[] = {
 9051 static const uint32_t R600_Addr_YSubClassMask[] = {
 9055 static const uint32_t R600_Addr_ZSubClassMask[] = {
 9059 static const uint32_t R600_LDS_SRC_REG_and_R600_Reg32SubClassMask[] = {
 9063 static const uint32_t R600_Predicate_BitSubClassMask[] = {
 9067 static const uint32_t R600_Reg64SubClassMask[] = {
 9071 static const uint32_t R600_Reg64VerticalSubClassMask[] = {
 9075 static const uint32_t R600_Reg64Vertical_with_sub0_in_R600_TReg32_WSubClassMask[] = {
 9079 static const uint32_t R600_Reg64Vertical_with_sub0_in_R600_TReg32_XSubClassMask[] = {
 9083 static const uint32_t R600_Reg64Vertical_with_sub0_in_R600_TReg32_YSubClassMask[] = {
 9087 static const uint32_t R600_Reg64Vertical_with_sub0_in_R600_TReg32_ZSubClassMask[] = {
 9091 static const uint32_t R600_Reg128SubClassMask[] = {
 9095 static const uint32_t R600_Reg128VerticalSubClassMask[] = {
 9099 static const uint32_t R600_Reg128Vertical_with_sub0_in_R600_TReg32_WSubClassMask[] = {
 9103 static const uint32_t R600_Reg128Vertical_with_sub0_in_R600_TReg32_XSubClassMask[] = {
 9107 static const uint32_t R600_Reg128Vertical_with_sub0_in_R600_TReg32_YSubClassMask[] = {
 9111 static const uint32_t R600_Reg128Vertical_with_sub0_in_R600_TReg32_ZSubClassMask[] = {
12374 ArrayRef<const uint32_t *> R600GenRegisterInfo::getRegMasks() const {

  210   static const uint32_t OpInfo0[] = {
  757   uint32_t Bits = 0;

  521   ArrayRef<const uint32_t *> getRegMasks() const override;
  577 static const uint32_t SREGSubClassMask[] = {
  581 static const uint32_t GPR_SSubClassMask[] = {
  585 static const uint32_t GPR32SubClassMask[] = {
  589 static const uint32_t GPR32_and_GPR_SSubClassMask[] = {
  846 static const uint32_t CSR_ARC_RegMask[] = { 0xfff8000c, 0x00000000, };
  849 ArrayRef<const uint32_t *> ARCGenRegisterInfo::getRegMasks() const {
  850   static const uint32_t *const Masks[] = {

  704   static const uint32_t OpInfo0[] = {
 4920   static const uint32_t OpInfo1[] = {

54124   uint32_t Val = -N->getZExtValue();
55194       uint32_t enc = ARM_AM::getFP64Imm(InVal);
55202       uint32_t enc = ARM_AM::getFP32Imm(InVal);
55210       uint32_t enc = ARM_AM::getFP16Imm(InVal);

   36 const uint32_t FPRRegBankCoverageData[] = {
   59 const uint32_t GPRRegBankCoverageData[] = {

 3594   ArrayRef<const uint32_t *> getRegMasks() const override;
 3952 static const uint32_t HPRSubClassMask[] = {
 3972 static const uint32_t FPWithVPRSubClassMask[] = {
 4000 static const uint32_t SPRSubClassMask[] = {
 4020 static const uint32_t FPWithVPR_with_ssub_0SubClassMask[] = {
 4032 static const uint32_t GPRSubClassMask[] = {
 4038 static const uint32_t GPRwithAPSRSubClassMask[] = {
 4044 static const uint32_t GPRwithZRSubClassMask[] = {
 4050 static const uint32_t SPR_8SubClassMask[] = {
 4070 static const uint32_t GPRnopcSubClassMask[] = {
 4076 static const uint32_t GPRwithAPSRnospSubClassMask[] = {
 4082 static const uint32_t GPRwithZRnospSubClassMask[] = {
 4088 static const uint32_t rGPRSubClassMask[] = {
 4094 static const uint32_t tGPRwithpcSubClassMask[] = {
 4100 static const uint32_t FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8SubClassMask[] = {
 4112 static const uint32_t hGPRSubClassMask[] = {
 4118 static const uint32_t tGPRSubClassMask[] = {
 4124 static const uint32_t tGPREvenSubClassMask[] = {
 4129 static const uint32_t GPRnopc_and_hGPRSubClassMask[] = {
 4135 static const uint32_t GPRwithAPSRnosp_and_hGPRSubClassMask[] = {
 4141 static const uint32_t tGPROddSubClassMask[] = {
 4146 static const uint32_t tcGPRSubClassMask[] = {
 4152 static const uint32_t hGPR_and_tGPREvenSubClassMask[] = {
 4157 static const uint32_t tGPR_and_tGPREvenSubClassMask[] = {
 4162 static const uint32_t tGPR_and_tGPROddSubClassMask[] = {
 4167 static const uint32_t tGPR_and_tcGPRSubClassMask[] = {
 4173 static const uint32_t tGPREven_and_tcGPRSubClassMask[] = {
 4178 static const uint32_t hGPR_and_tGPROddSubClassMask[] = {
 4183 static const uint32_t tGPREven_and_tGPR_and_tcGPRSubClassMask[] = {
 4188 static const uint32_t tGPROdd_and_tcGPRSubClassMask[] = {
 4193 static const uint32_t CCRSubClassMask[] = {
 4197 static const uint32_t GPRlrSubClassMask[] = {
 4201 static const uint32_t GPRspSubClassMask[] = {
 4206 static const uint32_t VCCRSubClassMask[] = {
 4210 static const uint32_t cl_FPSCR_NZCVSubClassMask[] = {
 4214 static const uint32_t hGPR_and_tGPRwithpcSubClassMask[] = {
 4218 static const uint32_t hGPR_and_tcGPRSubClassMask[] = {
 4223 static const uint32_t DPRSubClassMask[] = {
 4235 static const uint32_t DPR_VFP2SubClassMask[] = {
 4247 static const uint32_t DPR_8SubClassMask[] = {
 4259 static const uint32_t GPRPairSubClassMask[] = {
 4263 static const uint32_t GPRPairnospSubClassMask[] = {
 4267 static const uint32_t GPRPair_with_gsub_0_in_tGPRSubClassMask[] = {
 4271 static const uint32_t GPRPair_with_gsub_0_in_hGPRSubClassMask[] = {
 4275 static const uint32_t GPRPair_with_gsub_0_in_tcGPRSubClassMask[] = {
 4279 static const uint32_t GPRPair_with_gsub_1_in_tcGPRSubClassMask[] = {
 4283 static const uint32_t GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRSubClassMask[] = {
 4287 static const uint32_t GPRPair_with_gsub_1_in_GPRspSubClassMask[] = {
 4291 static const uint32_t DPairSpcSubClassMask[] = {
 4301 static const uint32_t DPairSpc_with_ssub_0SubClassMask[] = {
 4311 static const uint32_t DPairSpc_with_ssub_4SubClassMask[] = {
 4321 static const uint32_t DPairSpc_with_dsub_0_in_DPR_8SubClassMask[] = {
 4331 static const uint32_t DPairSpc_with_dsub_2_in_DPR_8SubClassMask[] = {
 4341 static const uint32_t DPairSubClassMask[] = {
 4352 static const uint32_t DPair_with_ssub_0SubClassMask[] = {
 4363 static const uint32_t QPRSubClassMask[] = {
 4372 static const uint32_t DPair_with_ssub_2SubClassMask[] = {
 4383 static const uint32_t DPair_with_dsub_0_in_DPR_8SubClassMask[] = {
 4394 static const uint32_t MQPRSubClassMask[] = {
 4403 static const uint32_t QPR_VFP2SubClassMask[] = {
 4412 static const uint32_t DPair_with_dsub_1_in_DPR_8SubClassMask[] = {
 4423 static const uint32_t QPR_8SubClassMask[] = {
 4432 static const uint32_t DTripleSubClassMask[] = {
 4442 static const uint32_t DTripleSpcSubClassMask[] = {
 4450 static const uint32_t DTripleSpc_with_ssub_0SubClassMask[] = {
 4458 static const uint32_t DTriple_with_ssub_0SubClassMask[] = {
 4468 static const uint32_t DTriple_with_qsub_0_in_QPRSubClassMask[] = {
 4476 static const uint32_t DTriple_with_ssub_2SubClassMask[] = {
 4486 static const uint32_t DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask[] = {
 4494 static const uint32_t DTripleSpc_with_ssub_4SubClassMask[] = {
 4502 static const uint32_t DTriple_with_ssub_4SubClassMask[] = {
 4512 static const uint32_t DTripleSpc_with_ssub_8SubClassMask[] = {
 4520 static const uint32_t DTripleSpc_with_dsub_0_in_DPR_8SubClassMask[] = {
 4528 static const uint32_t DTriple_with_dsub_0_in_DPR_8SubClassMask[] = {
 4538 static const uint32_t DTriple_with_qsub_0_in_MQPRSubClassMask[] = {
 4546 static const uint32_t DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask[] = {
 4554 static const uint32_t DTriple_with_dsub_1_in_DPR_8SubClassMask[] = {
 4564 static const uint32_t DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask[] = {
 4572 static const uint32_t DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRSubClassMask[] = {
 4580 static const uint32_t DTripleSpc_with_dsub_2_in_DPR_8SubClassMask[] = {
 4588 static const uint32_t DTriple_with_dsub_2_in_DPR_8SubClassMask[] = {
 4598 static const uint32_t DTripleSpc_with_dsub_4_in_DPR_8SubClassMask[] = {
 4606 static const uint32_t DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask[] = {
 4614 static const uint32_t DTriple_with_qsub_0_in_QPR_8SubClassMask[] = {
 4622 static const uint32_t DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRSubClassMask[] = {
 4630 static const uint32_t DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8SubClassMask[] = {
 4638 static const uint32_t DQuadSpcSubClassMask[] = {
 4646 static const uint32_t DQuadSpc_with_ssub_0SubClassMask[] = {
 4654 static const uint32_t DQuadSpc_with_ssub_4SubClassMask[] = {
 4662 static const uint32_t DQuadSpc_with_ssub_8SubClassMask[] = {
 4670 static const uint32_t DQuadSpc_with_dsub_0_in_DPR_8SubClassMask[] = {
 4678 static const uint32_t DQuadSpc_with_dsub_2_in_DPR_8SubClassMask[] = {
 4686 static const uint32_t DQuadSpc_with_dsub_4_in_DPR_8SubClassMask[] = {
 4694 static const uint32_t DQuadSubClassMask[] = {
 4703 static const uint32_t DQuad_with_ssub_0SubClassMask[] = {
 4712 static const uint32_t DQuad_with_ssub_2SubClassMask[] = {
 4721 static const uint32_t QQPRSubClassMask[] = {
 4728 static const uint32_t DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask[] = {
 4734 static const uint32_t DQuad_with_ssub_4SubClassMask[] = {
 4743 static const uint32_t DQuad_with_ssub_6SubClassMask[] = {
 4752 static const uint32_t DQuad_with_dsub_0_in_DPR_8SubClassMask[] = {
 4761 static const uint32_t DQuad_with_qsub_0_in_MQPRSubClassMask[] = {
 4768 static const uint32_t DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask[] = {
 4774 static const uint32_t DQuad_with_dsub_1_in_DPR_8SubClassMask[] = {
 4783 static const uint32_t DQuad_with_qsub_1_in_MQPRSubClassMask[] = {
 4790 static const uint32_t DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask[] = {
 4796 static const uint32_t DQuad_with_dsub_2_in_DPR_8SubClassMask[] = {
 4805 static const uint32_t DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask[] = {
 4811 static const uint32_t DQuad_with_dsub_3_in_DPR_8SubClassMask[] = {
 4820 static const uint32_t DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask[] = {
 4826 static const uint32_t DQuad_with_qsub_0_in_QPR_8SubClassMask[] = {
 4833 static const uint32_t DQuad_with_qsub_1_in_QPR_8SubClassMask[] = {
 4840 static const uint32_t DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8SubClassMask[] = {
 4846 static const uint32_t DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask[] = {
 4852 static const uint32_t QQQQPRSubClassMask[] = {
 4856 static const uint32_t QQQQPR_with_ssub_0SubClassMask[] = {
 4860 static const uint32_t QQQQPR_with_ssub_4SubClassMask[] = {
 4864 static const uint32_t QQQQPR_with_ssub_8SubClassMask[] = {
 4868 static const uint32_t QQQQPR_with_ssub_12SubClassMask[] = {
 4872 static const uint32_t QQQQPR_with_dsub_0_in_DPR_8SubClassMask[] = {
 4876 static const uint32_t QQQQPR_with_dsub_2_in_DPR_8SubClassMask[] = {
 4880 static const uint32_t QQQQPR_with_dsub_4_in_DPR_8SubClassMask[] = {
 4884 static const uint32_t QQQQPR_with_dsub_6_in_DPR_8SubClassMask[] = {
16004 static const uint32_t CSR_AAPCS_RegMask[] = { 0xf8002000, 0xf0000007, 0x000ff000, 0xe01fffe0, 0x03800007, 0xc01e0040, 0xf000000f, 0x03000000, 0x6001c000, 0x00000000, };
16006 static const uint32_t CSR_AAPCS_SplitPush_RegMask[] = { 0xf8002000, 0xf0000007, 0x000ff000, 0xe01fffe0, 0x03800007, 0xc01e0040, 0xf000000f, 0x03000000, 0x6001c000, 0x00000000, };
16008 static const uint32_t CSR_AAPCS_SplitPush_SwiftError_RegMask[] = { 0xf8002000, 0xf0000007, 0x000ef000, 0xe01fffe0, 0x03800007, 0xc0160040, 0xf000000f, 0x03000000, 0x6001c000, 0x00000000, };
16010 static const uint32_t CSR_AAPCS_SwiftError_RegMask[] = { 0xf8002000, 0xf0000007, 0x000ef000, 0xe01fffe0, 0x03800007, 0xc0160040, 0xf000000f, 0x03000000, 0x6001c000, 0x00000000, };
16012 static const uint32_t CSR_AAPCS_ThisReturn_RegMask[] = { 0xf8002000, 0xf0000007, 0x000ff100, 0xe01fffe0, 0x03800007, 0xc01e0040, 0xf000000f, 0x03000000, 0x6001c000, 0x00000000, };
16014 static const uint32_t CSR_FIQ_RegMask[] = { 0x00002000, 0x00000000, 0x0008ff00, 0x00000000, 0x00000000, 0x00078000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
16016 static const uint32_t CSR_FPRegs_RegMask[] = { 0xfff80000, 0xff07ffff, 0xffe000ff, 0xffffffff, 0xffffffff, 0xffc07fff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0000007f, };
16018 static const uint32_t CSR_GenericInt_RegMask[] = { 0x00002000, 0x00000000, 0x001fff00, 0x00000000, 0x00000000, 0x001f8000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
16020 static const uint32_t CSR_NoRegs_RegMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
16022 static const uint32_t CSR_Win_AAPCS_CFGuard_Check_RegMask[] = { 0xfff82000, 0xff000007, 0xffeff000, 0xffffffff, 0x03f80007, 0xffde007c, 0xfff0000f, 0x03ff0000, 0x7e01fc00, 0x00000000, };
16024 static const uint32_t CSR_iOS_RegMask[] = { 0xf8002000, 0xf0000007, 0x000df000, 0xe01fffe0, 0x03800007, 0xc0160040, 0xf000000f, 0x03000000, 0x6001c000, 0x00000000, };
16026 static const uint32_t CSR_iOS_CXX_TLS_RegMask[] = { 0xfff82000, 0xff07ffff, 0xfffffeff, 0xffffffff, 0xffffffff, 0xffdf7fff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0000007f, };
16028 static const uint32_t CSR_iOS_CXX_TLS_PE_RegMask[] = { 0x00002000, 0x00000000, 0x0018b000, 0x00000000, 0x00000000, 0x00020000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
16030 static const uint32_t CSR_iOS_CXX_TLS_ViaCopy_RegMask[] = { 0xfff80000, 0xff07ffff, 0xffe74eff, 0xffffffff, 0xffffffff, 0xffc97fff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0000007f, };
16032 static const uint32_t CSR_iOS_SwiftError_RegMask[] = { 0xf8002000, 0xf0000007, 0x000cf000, 0xe01fffe0, 0x03800007, 0xc0160040, 0xf000000f, 0x03000000, 0x6001c000, 0x00000000, };
16034 static const uint32_t CSR_iOS_TLSCall_RegMask[] = { 0xfff8a000, 0xff07ffff, 0xffedfeff, 0xffffffff, 0xffffffff, 0xffd77fff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0000007f, };
16036 static const uint32_t CSR_iOS_ThisReturn_RegMask[] = { 0xf8002000, 0xf0000007, 0x000df100, 0xe01fffe0, 0x03800007, 0xc0160040, 0xf000000f, 0x03000000, 0x6001c000, 0x00000000, };
16039 ArrayRef<const uint32_t *> ARMGenRegisterInfo::getRegMasks() const {
16040   static const uint32_t *const Masks[] = {

  852   uint32_t Bits = 0;

  869   ArrayRef<const uint32_t *> getRegMasks() const override;
  956 static const uint32_t GPR8SubClassMask[] = {
  962 static const uint32_t GPR8loSubClassMask[] = {
  968 static const uint32_t LD8SubClassMask[] = {
  974 static const uint32_t LD8loSubClassMask[] = {
  980 static const uint32_t CCRSubClassMask[] = {
  984 static const uint32_t DREGSSubClassMask[] = {
  988 static const uint32_t DREGS_WITHOUT_YZ_WORKAROUNDSubClassMask[] = {
  992 static const uint32_t DLDREGSSubClassMask[] = {
  996 static const uint32_t DREGS_with_sub_hi_in_GPR8loSubClassMask[] = {
 1000 static const uint32_t DLDREGS_and_DREGS_WITHOUT_YZ_WORKAROUNDSubClassMask[] = {
 1004 static const uint32_t DLDREGS_with_sub_hi_in_LD8loSubClassMask[] = {
 1008 static const uint32_t IWREGSSubClassMask[] = {
 1012 static const uint32_t PTRREGSSubClassMask[] = {
 1016 static const uint32_t DREGS_WITHOUT_YZ_WORKAROUND_and_IWREGSSubClassMask[] = {
 1020 static const uint32_t PTRDISPREGSSubClassMask[] = {
 1024 static const uint32_t DREGS_WITHOUT_YZ_WORKAROUND_and_PTRREGSSubClassMask[] = {
 1028 static const uint32_t GPRSPSubClassMask[] = {
 1032 static const uint32_t ZREGSubClassMask[] = {
 1746 static const uint32_t CSR_Interrupts_RegMask[] = { 0xffffffe0, 0x001fffff, };
 1748 static const uint32_t CSR_Normal_RegMask[] = { 0x007fff80, 0x00083fc6, };
 1751 ArrayRef<const uint32_t *> AVRGenRegisterInfo::getRegMasks() const {
 1752   static const uint32_t *const Masks[] = {

  673   uint32_t Bits = 0;

  399   ArrayRef<const uint32_t *> getRegMasks() const override;
  453 static const uint32_t GPR32SubClassMask[] = {
  458 static const uint32_t GPRSubClassMask[] = {
  732 static const uint32_t CSR_RegMask[] = { 0x00f80f80, };
  735 ArrayRef<const uint32_t *> BPFGenRegisterInfo::getRegMasks() const {
  736   static const uint32_t *const Masks[] = {

  127   static const uint32_t OpInfo0[] = {

72450   uint32_t NV = ~N->getZExtValue();
72459   uint32_t V = N->getZExtValue();
72994   uint32_t NV = ~N->getZExtValue();
73015   uint32_t V = N->getZExtValue();
73065   uint32_t V = N->getZExtValue();
73080   uint32_t V = N->getZExtValue();
73165   uint32_t V = N->getZExtValue();
73167   uint32_t S = V << 24 | V << 16 | V << 8 | V;
73174   uint32_t V = N->getZExtValue();

 2284   ArrayRef<const uint32_t *> getRegMasks() const override;
 2453 static const uint32_t UsrBitsSubClassMask[] = {
 2458 static const uint32_t GuestRegsSubClassMask[] = {
 2464 static const uint32_t IntRegsSubClassMask[] = {
 2470 static const uint32_t CtrRegsSubClassMask[] = {
 2476 static const uint32_t GeneralSubRegsSubClassMask[] = {
 2482 static const uint32_t V62RegsSubClassMask[] = {
 2488 static const uint32_t IntRegsLow8SubClassMask[] = {
 2494 static const uint32_t CtrRegs_and_V62RegsSubClassMask[] = {
 2500 static const uint32_t PredRegsSubClassMask[] = {
 2504 static const uint32_t V62Regs_with_isub_hiSubClassMask[] = {
 2508 static const uint32_t ModRegsSubClassMask[] = {
 2514 static const uint32_t CtrRegs_with_subreg_overflowSubClassMask[] = {
 2518 static const uint32_t V65RegsSubClassMask[] = {
 2522 static const uint32_t DoubleRegsSubClassMask[] = {
 2526 static const uint32_t GuestRegs64SubClassMask[] = {
 2530 static const uint32_t CtrRegs64SubClassMask[] = {
 2534 static const uint32_t GeneralDoubleLow8RegsSubClassMask[] = {
 2538 static const uint32_t DoubleRegs_with_isub_hi_in_IntRegsLow8SubClassMask[] = {
 2542 static const uint32_t CtrRegs64_and_V62RegsSubClassMask[] = {
 2546 static const uint32_t CtrRegs64_with_isub_hi_in_ModRegsSubClassMask[] = {
 2550 static const uint32_t HvxVRSubClassMask[] = {
 2558 static const uint32_t HvxQRSubClassMask[] = {
 2562 static const uint32_t HvxVR_and_V65RegsSubClassMask[] = {
 2566 static const uint32_t HvxWRSubClassMask[] = {
 2572 static const uint32_t HvxVQRSubClassMask[] = {
 3709 static const uint32_t HexagonCSR_RegMask[] = { 0x00000000, 0x000003f0, 0x00000000, 0x00007ff8, 0x00000000, 0x00000000, 0x00000000, };
 3712 ArrayRef<const uint32_t *> HexagonGenRegisterInfo::getRegMasks() const {
 3713   static const uint32_t *const Masks[] = {

  637   uint32_t Bits = 0;

  580   ArrayRef<const uint32_t *> getRegMasks() const override;
  635 static const uint32_t GPRSubClassMask[] = {
  640 static const uint32_t GPR_with_sub_32SubClassMask[] = {
  644 static const uint32_t CCRSubClassMask[] = {
  958 static const uint32_t CSR_RegMask[] = { 0x00000000, 0x00000000, };
  961 ArrayRef<const uint32_t *> LanaiGenRegisterInfo::getRegMasks() const {
  962   static const uint32_t *const Masks[] = {

  598   uint32_t Bits = 0;

  324   ArrayRef<const uint32_t *> getRegMasks() const override;
  378 static const uint32_t GR8SubClassMask[] = {
  383 static const uint32_t GR16SubClassMask[] = {
  625 ArrayRef<const uint32_t *> MSP430GenRegisterInfo::getRegMasks() const {

 1238   static const uint32_t OpInfo0[] = {

   36 const uint32_t FPRBRegBankCoverageData[] = {
   53 const uint32_t GPRBRegBankCoverageData[] = {

 3822   ArrayRef<const uint32_t *> getRegMasks() const override;
 4031 static const uint32_t MSA128F16SubClassMask[] = {
 4035 static const uint32_t CCRSubClassMask[] = {
 4039 static const uint32_t COP0SubClassMask[] = {
 4043 static const uint32_t COP2SubClassMask[] = {
 4047 static const uint32_t COP3SubClassMask[] = {
 4051 static const uint32_t DSPRSubClassMask[] = {
 4056 static const uint32_t FGR32SubClassMask[] = {
 4062 static const uint32_t FGRCCSubClassMask[] = {
 4068 static const uint32_t GPR32SubClassMask[] = {
 4073 static const uint32_t HWRegsSubClassMask[] = {
 4077 static const uint32_t MSACtrlSubClassMask[] = {
 4081 static const uint32_t GPR32NONZEROSubClassMask[] = {
 4086 static const uint32_t CPU16RegsPlusSPSubClassMask[] = {
 4091 static const uint32_t CPU16RegsSubClassMask[] = {
 4096 static const uint32_t FCCSubClassMask[] = {
 4100 static const uint32_t GPRMM16SubClassMask[] = {
 4105 static const uint32_t GPRMM16MovePSubClassMask[] = {
 4110 static const uint32_t GPRMM16ZeroSubClassMask[] = {
 4115 static const uint32_t CPU16Regs_and_GPRMM16ZeroSubClassMask[] = {
 4120 static const uint32_t GPR32NONZERO_and_GPRMM16MovePSubClassMask[] = {
 4125 static const uint32_t GPRMM16MovePPairSecondSubClassMask[] = {
 4130 static const uint32_t CPU16Regs_and_GPRMM16MovePSubClassMask[] = {
 4135 static const uint32_t GPRMM16MoveP_and_GPRMM16ZeroSubClassMask[] = {
 4140 static const uint32_t HI32DSPSubClassMask[] = {
 4147 static const uint32_t LO32DSPSubClassMask[] = {
 4153 static const uint32_t CPU16Regs_and_GPRMM16MovePPairSecondSubClassMask[] = {
 4158 static const uint32_t GPRMM16MovePPairFirstSubClassMask[] = {
 4163 static const uint32_t GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroSubClassMask[] = {
 4168 static const uint32_t GPRMM16MovePPairFirst_and_GPRMM16MovePPairSecondSubClassMask[] = {
 4173 static const uint32_t CPURARegSubClassMask[] = {
 4178 static const uint32_t CPUSPRegSubClassMask[] = {
 4183 static const uint32_t DSPCCSubClassMask[] = {
 4187 static const uint32_t GP32SubClassMask[] = {
 4192 static const uint32_t GPR32ZEROSubClassMask[] = {
 4197 static const uint32_t HI32SubClassMask[] = {
 4204 static const uint32_t LO32SubClassMask[] = {
 4210 static const uint32_t SP32SubClassMask[] = {
 4215 static const uint32_t FGR64SubClassMask[] = {
 4220 static const uint32_t GPR64SubClassMask[] = {
 4224 static const uint32_t GPR64_with_sub_32_in_GPR32NONZEROSubClassMask[] = {
 4228 static const uint32_t AFGR64SubClassMask[] = {
 4232 static const uint32_t GPR64_with_sub_32_in_CPU16RegsPlusSPSubClassMask[] = {
 4236 static const uint32_t GPR64_with_sub_32_in_CPU16RegsSubClassMask[] = {
 4240 static const uint32_t GPR64_with_sub_32_in_GPRMM16MovePSubClassMask[] = {
 4244 static const uint32_t GPR64_with_sub_32_in_GPRMM16ZeroSubClassMask[] = {
 4248 static const uint32_t GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16ZeroSubClassMask[] = {
 4252 static const uint32_t GPR64_with_sub_32_in_GPR32NONZERO_and_GPRMM16MovePSubClassMask[] = {
 4256 static const uint32_t GPR64_with_sub_32_in_GPRMM16MovePPairSecondSubClassMask[] = {
 4260 static const uint32_t ACC64DSPSubClassMask[] = {
 4265 static const uint32_t GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16MovePSubClassMask[] = {
 4269 static const uint32_t GPR64_with_sub_32_in_GPRMM16MoveP_and_GPRMM16ZeroSubClassMask[] = {
 4273 static const uint32_t GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16MovePPairSecondSubClassMask[] = {
 4277 static const uint32_t GPR64_with_sub_32_in_GPRMM16MovePPairFirstSubClassMask[] = {
 4281 static const uint32_t GPR64_with_sub_32_in_GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroSubClassMask[] = {
 4285 static const uint32_t OCTEON_MPLSubClassMask[] = {
 4289 static const uint32_t OCTEON_PSubClassMask[] = {
 4293 static const uint32_t GPR64_with_sub_32_in_GPRMM16MovePPairFirst_and_GPRMM16MovePPairSecondSubClassMask[] = {
 4297 static const uint32_t ACC64SubClassMask[] = {
 4302 static const uint32_t GP64SubClassMask[] = {
 4306 static const uint32_t GPR64_with_sub_32_in_CPURARegSubClassMask[] = {
 4310 static const uint32_t GPR64_with_sub_32_in_GPR32ZEROSubClassMask[] = {
 4314 static const uint32_t HI64SubClassMask[] = {
 4319 static const uint32_t LO64SubClassMask[] = {
 4324 static const uint32_t SP64SubClassMask[] = {
 4328 static const uint32_t MSA128BSubClassMask[] = {
 4332 static const uint32_t MSA128DSubClassMask[] = {
 4336 static const uint32_t MSA128HSubClassMask[] = {
 4340 static const uint32_t MSA128WSubClassMask[] = {
 4344 static const uint32_t MSA128WEvensSubClassMask[] = {
 4348 static const uint32_t ACC128SubClassMask[] = {
 7401 static const uint32_t CSR_Interrupt_32_RegMask[] = { 0x07c80302, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000000, 0x00000008, 0x07ffbfc0, 0x00000000, 0x00000000, 0x00000000, };
 7403 static const uint32_t CSR_Interrupt_32R6_RegMask[] = { 0x03c80302, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x07ffbfc0, 0x00000000, 0x00000000, 0x00000000, };
 7405 static const uint32_t CSR_Interrupt_64_RegMask[] = { 0x47c80302, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x30000000, 0x00000000, 0x00000008, 0x07ffbfe0, 0xf0000000, 0x00000001, 0x03ffffe4, };
 7407 static const uint32_t CSR_Interrupt_64R6_RegMask[] = { 0x43c80302, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x10000000, 0x00000000, 0x00000000, 0x07ffbfe0, 0xf0000000, 0x00000000, 0x03ffffc0, };
 7409 static const uint32_t CSR_Mips16RetHelper_RegMask[] = { 0x03c00100, 0x00000000, 0x00000000, 0x00000000, 0x00007e00, 0x0007ff80, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x06003fc0, 0x00000000, 0x00000000, 0x00000000, };
 7411 static const uint32_t CSR_N32_RegMask[] = { 0x00080300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0002aa80, 0x08000000, 0x15550000, 0x00000000, 0x00000000, 0x00003fe0, 0x00000000, 0xaaa00000, 0x00003fc0, };
 7413 static const uint32_t CSR_N64_RegMask[] = { 0x00080300, 0x00000000, 0x00000000, 0x00000000, 0x00007800, 0x0007f800, 0x08000000, 0x1ff00000, 0x00000000, 0x00000000, 0x00003fe0, 0x00000000, 0xfe000000, 0x00003fc1, };
 7415 static const uint32_t CSR_O32_RegMask[] = { 0x00080100, 0x00000000, 0x00000000, 0x00000000, 0x00007e00, 0x0007ff80, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00003fc0, 0x00000000, 0x00000000, 0x00000000, };
 7417 static const uint32_t CSR_O32_FP64_RegMask[] = { 0x00080100, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0002aa80, 0x00000000, 0x05550000, 0x00000000, 0x00000000, 0x00003fc0, 0x00000000, 0xaaa00000, 0x00000000, };
 7419 static const uint32_t CSR_O32_FPXX_RegMask[] = { 0x00080100, 0x00000000, 0x00000000, 0x00000000, 0x00007e00, 0x0007ff80, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00003fc0, 0x00000000, 0x00000000, 0x00000000, };
 7421 static const uint32_t CSR_SingleFloatOnly_RegMask[] = { 0x00080100, 0x00000000, 0x00000000, 0x00000000, 0x00007e00, 0x0007ff80, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00003fc0, 0x00000000, 0x00000000, 0x00000000, };
 7424 ArrayRef<const uint32_t *> MipsGenRegisterInfo::getRegMasks() const {
 7425   static const uint32_t *const Masks[] = {

 1102   static const uint32_t OpInfo0[] = {
 6966   static const uint32_t OpInfo1[] = {

  767   ArrayRef<const uint32_t *> getRegMasks() const override;
  848 static const uint32_t Int1RegsSubClassMask[] = {
  852 static const uint32_t Float16RegsSubClassMask[] = {
  856 static const uint32_t Int16RegsSubClassMask[] = {
  860 static const uint32_t SpecialRegsSubClassMask[] = {
  864 static const uint32_t Float16x2RegsSubClassMask[] = {
  868 static const uint32_t Float32ArgRegsSubClassMask[] = {
  872 static const uint32_t Float32RegsSubClassMask[] = {
  876 static const uint32_t Int32ArgRegsSubClassMask[] = {
  880 static const uint32_t Int32RegsSubClassMask[] = {
  884 static const uint32_t Float64ArgRegsSubClassMask[] = {
  888 static const uint32_t Float64RegsSubClassMask[] = {
  892 static const uint32_t Int64ArgRegsSubClassMask[] = {
  896 static const uint32_t Int64RegsSubClassMask[] = {
 1326 ArrayRef<const uint32_t *> NVPTXGenRegisterInfo::getRegMasks() const {

 1623   static const uint32_t OpInfo0[] = {

 3856   ArrayRef<const uint32_t *> getRegMasks() const override;
 3987 static const uint32_t VSSRCSubClassMask[] = {
 3992 static const uint32_t GPRCSubClassMask[] = {
 3997 static const uint32_t GPRC_NOR0SubClassMask[] = {
 4002 static const uint32_t GPRC_and_GPRC_NOR0SubClassMask[] = {
 4007 static const uint32_t CRBITRCSubClassMask[] = {
 4015 static const uint32_t F4RCSubClassMask[] = {
 4020 static const uint32_t CRRCSubClassMask[] = {
 4024 static const uint32_t CARRYRCSubClassMask[] = {
 4028 static const uint32_t CTRRCSubClassMask[] = {
 4032 static const uint32_t VRSAVERCSubClassMask[] = {
 4036 static const uint32_t SPILLTOVSRRCSubClassMask[] = {
 4041 static const uint32_t VSFRCSubClassMask[] = {
 4046 static const uint32_t G8RCSubClassMask[] = {
 4050 static const uint32_t G8RC_NOX0SubClassMask[] = {
 4054 static const uint32_t SPILLTOVSRRC_and_VSFRCSubClassMask[] = {
 4059 static const uint32_t G8RC_and_G8RC_NOX0SubClassMask[] = {
 4063 static const uint32_t F8RCSubClassMask[] = {
 4068 static const uint32_t SPERCSubClassMask[] = {
 4072 static const uint32_t VFRCSubClassMask[] = {
 4077 static const uint32_t SPERC_with_sub_32_in_GPRC_NOR0SubClassMask[] = {
 4081 static const uint32_t SPILLTOVSRRC_and_VFRCSubClassMask[] = {
 4086 static const uint32_t SPILLTOVSRRC_and_F4RCSubClassMask[] = {
 4091 static const uint32_t CTRRC8SubClassMask[] = {
 4095 static const uint32_t VSRCSubClassMask[] = {
 4099 static const uint32_t VSRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
 4103 static const uint32_t QSRCSubClassMask[] = {
 4107 static const uint32_t VRRCSubClassMask[] = {
 4111 static const uint32_t VSLRCSubClassMask[] = {
 4115 static const uint32_t VRRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
 4119 static const uint32_t QSRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
 4123 static const uint32_t VSLRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
 4127 static const uint32_t QBRCSubClassMask[] = {
 4131 static const uint32_t QFRCSubClassMask[] = {
 4135 static const uint32_t QBRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
 5739 static const uint32_t CSR_64_AllRegs_RegMask[] = { 0xffeff000, 0x001fffff, 0xfc800000, 0x007fffe3, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfc800000, 0xff7fffe3, 0x00ffffff, };
 5741 static const uint32_t CSR_64_AllRegs_Altivec_RegMask[] = { 0xffeff000, 0x001fffff, 0xfc800000, 0x007fffe3, 0xff800000, 0xffffffff, 0x007fffff, 0x00000000, 0xfc800000, 0xff7fffe3, 0x00ffffff, };
 5743 static const uint32_t CSR_64_AllRegs_VSX_RegMask[] = { 0xffeff000, 0x001fffff, 0xfc800000, 0x007fffe3, 0xff800000, 0xffffffff, 0xffffffff, 0x007fffff, 0xfc800000, 0xff7fffe3, 0x00ffffff, };
 5745 static const uint32_t CSR_AIX32_RegMask[] = { 0x0001c000, 0x001ffff8, 0x00000000, 0x007ffff0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x1c000000, 0x001c1c1c, };
 5747 static const uint32_t CSR_AIX64_RegMask[] = { 0x0001c000, 0x001ffff8, 0x00000000, 0x007fffe0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x1c7fffe0, 0x001c1c1c, };
 5749 static const uint32_t CSR_Altivec_RegMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x007ff800, 0x007ff800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
 5751 static const uint32_t CSR_Darwin32_RegMask[] = { 0x0001c000, 0x001ffff8, 0x00000000, 0x007ffff0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x1c000000, 0x001c1c1c, };
 5753 static const uint32_t CSR_Darwin32_Altivec_RegMask[] = { 0x0001c000, 0x001ffff8, 0x00000000, 0x007ffff0, 0x00000000, 0x007ff800, 0x007ff800, 0x00000000, 0x00000000, 0x1c000000, 0x001c1c1c, };
 5755 static const uint32_t CSR_Darwin64_RegMask[] = { 0x0001c000, 0x001ffff8, 0x00000000, 0x007ffff0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x1c7ffff0, 0x001c1c1c, };
 5757 static const uint32_t CSR_Darwin64_Altivec_RegMask[] = { 0x0001c000, 0x001ffff8, 0x00000000, 0x007ffff0, 0x00000000, 0x007ff800, 0x007ff800, 0x00000000, 0x00000000, 0x1c7ffff0, 0x001c1c1c, };
 5759 static const uint32_t CSR_NoRegs_RegMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
 5761 static const uint32_t CSR_SPE_RegMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x007fffe0, 0x007fffe0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
 5763 static const uint32_t CSR_SRV464_TLS_PE_RegMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
 5765 static const uint32_t CSR_SVR32_ColdCC_RegMask[] = { 0xffaff000, 0x001fffff, 0xf8000000, 0x007fffe3, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff000000, 0x00ffffff, };
 5767 static const uint32_t CSR_SVR32_ColdCC_Altivec_RegMask[] = { 0xffaff000, 0x001fffff, 0xf8000000, 0x007fffe3, 0xfd800000, 0xfdffffff, 0x007fffff, 0x00000000, 0x00000000, 0xff000000, 0x00ffffff, };
 5769 static const uint32_t CSR_SVR32_ColdCC_Common_RegMask[] = { 0x000ff000, 0x00000000, 0xf8000000, 0x007fffe3, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff000000, 0x00ffffff, };
 5771 static const uint32_t CSR_SVR32_ColdCC_SPE_RegMask[] = { 0x000ff000, 0x00000000, 0xf8000000, 0xf87fffe3, 0x007fffe3, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff000000, 0x00ffffff, };
 5773 static const uint32_t CSR_SVR432_RegMask[] = { 0x0001c000, 0x001ffff8, 0x00000000, 0x007fffe0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x1c000000, 0x001c1c1c, };
 5775 static const uint32_t CSR_SVR432_Altivec_RegMask[] = { 0x0001c000, 0x001ffff8, 0x00000000, 0x007fffe0, 0x00000000, 0x007ff800, 0x007ff800, 0x00000000, 0x00000000, 0x1c000000, 0x001c1c1c, };
 5777 static const uint32_t CSR_SVR432_COMM_RegMask[] = { 0x0001c000, 0x00000000, 0x00000000, 0x007fffe0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x1c000000, 0x001c1c1c, };
 5779 static const uint32_t CSR_SVR432_SPE_RegMask[] = { 0x0001c000, 0x00000000, 0x00000000, 0x007fffe0, 0x007fffe0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x1c000000, 0x001c1c1c, };
 5781 static const uint32_t CSR_SVR464_RegMask[] = { 0x0001c000, 0x001ffff8, 0x00000000, 0x007fffe0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x1c7fffe0, 0x001c1c1c, };
 5783 static const uint32_t CSR_SVR464_Altivec_RegMask[] = { 0x0001c000, 0x001ffff8, 0x00000000, 0x007fffe0, 0x00000000, 0x007ff800, 0x007ff800, 0x00000000, 0x00000000, 0x1c7fffe0, 0x001c1c1c, };
 5785 static const uint32_t CSR_SVR464_Altivec_ViaCopy_RegMask[] = { 0x0001c000, 0x001ffff8, 0x00000000, 0x007fffe0, 0x00000000, 0x007ff800, 0x007ff800, 0x00000000, 0x00000000, 0x1c7fffe0, 0x001c1c1c, };
 5787 static const uint32_t CSR_SVR464_R2_RegMask[] = { 0x0001c000, 0x001ffff8, 0x02000000, 0x007fffe0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x1c7fffe0, 0x001c1c1c, };
 5789 static const uint32_t CSR_SVR464_R2_Altivec_RegMask[] = { 0x0001c000, 0x001ffff8, 0x02000000, 0x007fffe0, 0x00000000, 0x007ff800, 0x007ff800, 0x00000000, 0x02000000, 0x1c7fffe0, 0x001c1c1c, };
 5791 static const uint32_t CSR_SVR464_R2_Altivec_ViaCopy_RegMask[] = { 0x0001c000, 0x001ffff8, 0x02000000, 0x007fffe0, 0x00000000, 0x007ff800, 0x007ff800, 0x00000000, 0x02000000, 0x1c7fffe0, 0x001c1c1c, };
 5793 static const uint32_t CSR_SVR464_R2_ViaCopy_RegMask[] = { 0x0001c000, 0x001ffff8, 0x02000000, 0x007fffe0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x1c7fffe0, 0x001c1c1c, };
 5795 static const uint32_t CSR_SVR464_ViaCopy_RegMask[] = { 0x0001c000, 0x001ffff8, 0x00000000, 0x007fffe0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x1c7fffe0, 0x001c1c1c, };
 5797 static const uint32_t CSR_SVR64_ColdCC_RegMask[] = { 0xffaff000, 0x001fffff, 0xf8000000, 0x007fffe3, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf8000000, 0xff7fffe3, 0x00ffffff, };
 5799 static const uint32_t CSR_SVR64_ColdCC_Altivec_RegMask[] = { 0xffaff000, 0x001fffff, 0xf8000000, 0x007fffe3, 0xfd800000, 0xfdffffff, 0x007fffff, 0x00000000, 0xf8000000, 0xff7fffe3, 0x00ffffff, };
 5801 static const uint32_t CSR_SVR64_ColdCC_R2_RegMask[] = { 0xffaff000, 0x001fffff, 0xfa000000, 0x007fffe3, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfa000000, 0xff7fffe3, 0x00ffffff, };
 5803 static const uint32_t CSR_SVR64_ColdCC_R2_Altivec_RegMask[] = { 0xffaff000, 0x001fffff, 0xfa000000, 0x007fffe3, 0xfd800000, 0xfdffffff, 0x007fffff, 0x00000000, 0xfa000000, 0xff7fffe3, 0x00ffffff, };
 5806 ArrayRef<const uint32_t *> PPCGenRegisterInfo::getRegMasks() const {
 5807   static const uint32_t *const Masks[] = {

 1302   uint32_t Bits = 0;

   35 const uint32_t GPRRegBankCoverageData[] = {

 1127   ArrayRef<const uint32_t *> getRegMasks() const override;
 1229 static const uint32_t FPR32SubClassMask[] = {
 1234 static const uint32_t GPRSubClassMask[] = {
 1238 static const uint32_t GPRNoX0SubClassMask[] = {
 1242 static const uint32_t GPRNoX0X2SubClassMask[] = {
 1246 static const uint32_t GPRTCSubClassMask[] = {
 1250 static const uint32_t FPR32CSubClassMask[] = {
 1255 static const uint32_t GPRCSubClassMask[] = {
 1259 static const uint32_t GPRC_and_GPRTCSubClassMask[] = {
 1263 static const uint32_t GPRX0SubClassMask[] = {
 1267 static const uint32_t SPSubClassMask[] = {
 1271 static const uint32_t FPR64SubClassMask[] = {
 1275 static const uint32_t FPR64CSubClassMask[] = {
 1861 static const uint32_t CSR_ILP32D_LP64D_RegMask[] = { 0x1ff80634, 0x1ff80600, 0x1ff80600, 0x00000000, };
 1863 static const uint32_t CSR_ILP32F_LP64F_RegMask[] = { 0x1ff80634, 0x00000000, 0x1ff80600, 0x00000000, };
 1865 static const uint32_t CSR_ILP32_LP64_RegMask[] = { 0x1ff80634, 0x00000000, 0x00000000, 0x00000000, };
 1867 static const uint32_t CSR_Interrupt_RegMask[] = { 0xfffffff4, 0x00000001, 0x00000000, 0x00000000, };
 1869 static const uint32_t CSR_NoRegs_RegMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
 1871 static const uint32_t CSR_XLEN_F32_Interrupt_RegMask[] = { 0xfffffff4, 0x00000001, 0xfffffffe, 0x00000001, };
 1873 static const uint32_t CSR_XLEN_F64_Interrupt_RegMask[] = { 0xfffffff4, 0xffffffff, 0xffffffff, 0x00000001, };
 1876 ArrayRef<const uint32_t *> RISCVGenRegisterInfo::getRegMasks() const {
 1877   static const uint32_t *const Masks[] = {

  362   static const uint32_t OpInfo0[] = {
 1072   uint32_t Bits = 0;

 1900   ArrayRef<const uint32_t *> getRegMasks() const override;
 1986 static const uint32_t FCCRegsSubClassMask[] = {
 1990 static const uint32_t ASRRegsSubClassMask[] = {
 1994 static const uint32_t CoprocRegsSubClassMask[] = {
 2000 static const uint32_t FPRegsSubClassMask[] = {
 2008 static const uint32_t IntRegsSubClassMask[] = {
 2014 static const uint32_t DFPRegsSubClassMask[] = {
 2020 static const uint32_t I64RegsSubClassMask[] = {
 2026 static const uint32_t CoprocPairSubClassMask[] = {
 2030 static const uint32_t IntPairSubClassMask[] = {
 2034 static const uint32_t LowDFPRegsSubClassMask[] = {
 2040 static const uint32_t PRRegsSubClassMask[] = {
 2044 static const uint32_t QFPRegsSubClassMask[] = {
 2048 static const uint32_t LowQFPRegsSubClassMask[] = {
 2826 static const uint32_t CSR_RegMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000ffff0, 0x00000000, 0x000000ff, };
 2828 static const uint32_t RTCSR_RegMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000c00, 0x00000000, 0x00000008, };
 2831 ArrayRef<const uint32_t *> SparcGenRegisterInfo::getRegMasks() const {
 2832   static const uint32_t *const Masks[] = {

 2345   static const uint32_t OpInfo0[] = {

 1794   ArrayRef<const uint32_t *> getRegMasks() const override;
 1900 static const uint32_t GRX32BitSubClassMask[] = {
 1908 static const uint32_t VR32BitSubClassMask[] = {
 1914 static const uint32_t AR32BitSubClassMask[] = {
 1918 static const uint32_t FP32BitSubClassMask[] = {
 1924 static const uint32_t GR32BitSubClassMask[] = {
 1930 static const uint32_t GRH32BitSubClassMask[] = {
 1936 static const uint32_t ADDR32BitSubClassMask[] = {
 1942 static const uint32_t CCRSubClassMask[] = {
 1946 static const uint32_t FPCRegsSubClassMask[] = {
 1950 static const uint32_t AnyRegBitSubClassMask[] = {
 1956 static const uint32_t AnyRegBit_with_subreg_h32_in_FP32BitSubClassMask[] = {
 1962 static const uint32_t VR64BitSubClassMask[] = {
 1968 static const uint32_t AnyRegBit_with_subreg_h64SubClassMask[] = {
 1972 static const uint32_t CR64BitSubClassMask[] = {
 1976 static const uint32_t FP64BitSubClassMask[] = {
 1982 static const uint32_t GR64BitSubClassMask[] = {
 1988 static const uint32_t ADDR64BitSubClassMask[] = {
 1994 static const uint32_t VR128BitSubClassMask[] = {
 1998 static const uint32_t VF128BitSubClassMask[] = {
 2002 static const uint32_t FP128BitSubClassMask[] = {
 2006 static const uint32_t GR128BitSubClassMask[] = {
 2010 static const uint32_t ADDR128BitSubClassMask[] = {
 2992 static const uint32_t CSR_SystemZ_RegMask[] = { 0x00000000, 0x00000000, 0x0007f800, 0x07f80780, 0x07fe0000, 0xc7fe07fe, 0x00000007, };
 2994 static const uint32_t CSR_SystemZ_AllRegs_RegMask[] = { 0x00000000, 0x00000000, 0x0007fff8, 0x07fffff8, 0xe7ffe000, 0xf7ffe7ff, 0x00000007, };
 2996 static const uint32_t CSR_SystemZ_AllRegs_Vector_RegMask[] = { 0x00000000, 0xfffffff8, 0xffffffff, 0xffffffff, 0xe7ffe7ff, 0xf7ffe7ff, 0x00000007, };
 2998 static const uint32_t CSR_SystemZ_SwiftError_RegMask[] = { 0x00000000, 0x00000000, 0x0007f800, 0x07f80780, 0x07ee0000, 0x47ee07ee, 0x00000007, };
 3001 ArrayRef<const uint32_t *> SystemZGenRegisterInfo::getRegMasks() const {
 3002   static const uint32_t *const Masks[] = {

  770   static const uint32_t OpInfo0[] = {
 2092   uint32_t Bits = 0;

  266   ArrayRef<const uint32_t *> getRegMasks() const override;
  331 static const uint32_t EXNREFSubClassMask[] = {
  335 static const uint32_t I32SubClassMask[] = {
  339 static const uint32_t F32SubClassMask[] = {
  343 static const uint32_t I64SubClassMask[] = {
  347 static const uint32_t F64SubClassMask[] = {
  351 static const uint32_t V128SubClassMask[] = {
  579 ArrayRef<const uint32_t *> WebAssemblyGenRegisterInfo::getRegMasks() const {

 1666   static const uint32_t OpInfo0[] = {

 1375   static const uint32_t OpInfo0[] = {
16623   static const uint32_t OpInfo1[] = {

   36 const uint32_t GPRRegBankCoverageData[] = {
  116 const uint32_t VECRRegBankCoverageData[] = {

 4324   ArrayRef<const uint32_t *> getRegMasks() const override;
 4637 static const uint32_t GR8SubClassMask[] = {
 4643 static const uint32_t GRH8SubClassMask[] = {
 4647 static const uint32_t GR8_NOREXSubClassMask[] = {
 4653 static const uint32_t GR8_ABCD_HSubClassMask[] = {
 4658 static const uint32_t GR8_ABCD_LSubClassMask[] = {
 4663 static const uint32_t GRH16SubClassMask[] = {
 4667 static const uint32_t GR16SubClassMask[] = {
 4672 static const uint32_t GR16_NOREXSubClassMask[] = {
 4677 static const uint32_t VK1SubClassMask[] = {
 4683 static const uint32_t VK16SubClassMask[] = {
 4689 static const uint32_t VK2SubClassMask[] = {
 4695 static const uint32_t VK4SubClassMask[] = {
 4701 static const uint32_t VK8SubClassMask[] = {
 4707 static const uint32_t VK16WMSubClassMask[] = {
 4713 static const uint32_t VK1WMSubClassMask[] = {
 4719 static const uint32_t VK2WMSubClassMask[] = {
 4725 static const uint32_t VK4WMSubClassMask[] = {
 4731 static const uint32_t VK8WMSubClassMask[] = {
 4737 static const uint32_t SEGMENT_REGSubClassMask[] = {
 4741 static const uint32_t GR16_ABCDSubClassMask[] = {
 4746 static const uint32_t FPCCRSubClassMask[] = {
 4750 static const uint32_t VK16PAIRSubClassMask[] = {
 4754 static const uint32_t VK1PAIRSubClassMask[] = {
 4758 static const uint32_t VK2PAIRSubClassMask[] = {
 4762 static const uint32_t VK4PAIRSubClassMask[] = {
 4766 static const uint32_t VK8PAIRSubClassMask[] = {
 4770 static const uint32_t VK16PAIR_with_sub_mask_0_in_VK16WMSubClassMask[] = {
 4774 static const uint32_t FR32XSubClassMask[] = {
 4779 static const uint32_t LOW32_ADDR_ACCESS_RBPSubClassMask[] = {
 4784 static const uint32_t LOW32_ADDR_ACCESSSubClassMask[] = {
 4789 static const uint32_t LOW32_ADDR_ACCESS_RBP_with_sub_8bitSubClassMask[] = {
 4794 static const uint32_t DEBUG_REGSubClassMask[] = {
 4798 static const uint32_t FR32SubClassMask[] = {
 4803 static const uint32_t GR32SubClassMask[] = {
 4808 static const uint32_t GR32_NOSPSubClassMask[] = {
 4813 static const uint32_t LOW32_ADDR_ACCESS_RBP_with_sub_16bit_in_GR16_NOREXSubClassMask[] = {
 4818 static const uint32_t GR32_NOREXSubClassMask[] = {
 4823 static const uint32_t VK32SubClassMask[] = {
 4829 static const uint32_t GR32_NOREX_NOSPSubClassMask[] = {
 4834 static const uint32_t RFP32SubClassMask[] = {
 4838 static const uint32_t VK32WMSubClassMask[] = {
 4844 static const uint32_t GR32_ABCDSubClassMask[] = {
 4849 static const uint32_t GR32_TCSubClassMask[] = {
 4854 static const uint32_t GR32_ABCD_and_GR32_TCSubClassMask[] = {
 4859 static const uint32_t GR32_ADSubClassMask[] = {
 4864 static const uint32_t GR32_BPSPSubClassMask[] = {
 4869 static const uint32_t GR32_BSISubClassMask[] = {
 4874 static const uint32_t GR32_CBSubClassMask[] = {
 4879 static const uint32_t GR32_DCSubClassMask[] = {
 4884 static const uint32_t GR32_DIBPSubClassMask[] = {
 4889 static const uint32_t GR32_SIDISubClassMask[] = {
 4894 static const uint32_t LOW32_ADDR_ACCESS_RBP_with_sub_32bitSubClassMask[] = {
 4898 static const uint32_t CCRSubClassMask[] = {
 4902 static const uint32_t DFCCRSubClassMask[] = {
 4906 static const uint32_t GR32_ABCD_and_GR32_BSISubClassMask[] = {
 4911 static const uint32_t GR32_AD_and_GR32_DCSubClassMask[] = {
 4916 static const uint32_t GR32_BPSP_and_GR32_DIBPSubClassMask[] = {
 4921 static const uint32_t GR32_BPSP_and_GR32_TCSubClassMask[] = {
 4926 static const uint32_t GR32_BSI_and_GR32_SIDISubClassMask[] = {
 4931 static const uint32_t GR32_CB_and_GR32_DCSubClassMask[] = {
 4936 static const uint32_t GR32_DIBP_and_GR32_SIDISubClassMask[] = {
 4941 static const uint32_t LOW32_ADDR_ACCESS_RBP_with_sub_8bit_with_sub_32bitSubClassMask[] = {
 4945 static const uint32_t LOW32_ADDR_ACCESS_with_sub_32bitSubClassMask[] = {
 4949 static const uint32_t RFP64SubClassMask[] = {
 4953 static const uint32_t FR64XSubClassMask[] = {
 4958 static const uint32_t GR64SubClassMask[] = {
 4962 static const uint32_t CONTROL_REGSubClassMask[] = {
 4966 static const uint32_t FR64SubClassMask[] = {
 4971 static const uint32_t GR64_with_sub_8bitSubClassMask[] = {
 4975 static const uint32_t GR64_NOSPSubClassMask[] = {
 4979 static const uint32_t GR64_TCSubClassMask[] = {
 4983 static const uint32_t GR64_NOREXSubClassMask[] = {
 4987 static const uint32_t GR64_TCW64SubClassMask[] = {
 4991 static const uint32_t GR64_TC_with_sub_8bitSubClassMask[] = {
 4995 static const uint32_t GR64_NOSP_and_GR64_TCSubClassMask[] = {
 4999 static const uint32_t GR64_TCW64_with_sub_8bitSubClassMask[] = {
 5003 static const uint32_t GR64_TC_and_GR64_TCW64SubClassMask[] = {
 5007 static const uint32_t GR64_with_sub_16bit_in_GR16_NOREXSubClassMask[] = {
 5011 static const uint32_t VK64SubClassMask[] = {
 5017 static const uint32_t VR64SubClassMask[] = {
 5021 static const uint32_t GR64_NOREX_NOSPSubClassMask[] = {
 5025 static const uint32_t GR64_NOREX_and_GR64_TCSubClassMask[] = {
 5029 static const uint32_t GR64_NOSP_and_GR64_TCW64SubClassMask[] = {
 5033 static const uint32_t GR64_TCW64_and_GR64_TC_with_sub_8bitSubClassMask[] = {
 5037 static const uint32_t VK64WMSubClassMask[] = {
 5043 static const uint32_t GR64_TC_and_GR64_NOSP_and_GR64_TCW64SubClassMask[] = {
 5047 static const uint32_t GR64_TC_and_GR64_with_sub_16bit_in_GR16_NOREXSubClassMask[] = {
 5051 static const uint32_t GR64_NOREX_NOSP_and_GR64_TCSubClassMask[] = {
 5055 static const uint32_t GR64_NOREX_and_GR64_TCW64SubClassMask[] = {
 5059 static const uint32_t GR64_ABCDSubClassMask[] = {
 5063 static const uint32_t GR64_with_sub_32bit_in_GR32_TCSubClassMask[] = {
 5067 static const uint32_t GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_TCSubClassMask[] = {
 5071 static const uint32_t GR64_ADSubClassMask[] = {
 5075 static const uint32_t GR64_and_LOW32_ADDR_ACCESS_RBPSubClassMask[] = {
 5079 static const uint32_t GR64_with_sub_32bit_in_GR32_BPSPSubClassMask[] = {
 5083 static const uint32_t GR64_with_sub_32bit_in_GR32_BSISubClassMask[] = {
 5087 static const uint32_t GR64_with_sub_32bit_in_GR32_CBSubClassMask[] = {
 5091 static const uint32_t GR64_with_sub_32bit_in_GR32_DCSubClassMask[] = {
 5095 static const uint32_t GR64_with_sub_32bit_in_GR32_DIBPSubClassMask[] = {
 5099 static const uint32_t GR64_with_sub_32bit_in_GR32_SIDISubClassMask[] = {
 5103 static const uint32_t GR64_and_LOW32_ADDR_ACCESSSubClassMask[] = {
 5107 static const uint32_t GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_BSISubClassMask[] = {
 5111 static const uint32_t GR64_with_sub_32bit_in_GR32_AD_and_GR32_DCSubClassMask[] = {
 5115 static const uint32_t GR64_with_sub_32bit_in_GR32_BPSP_and_GR32_DIBPSubClassMask[] = {
 5119 static const uint32_t GR64_with_sub_32bit_in_GR32_BPSP_and_GR32_TCSubClassMask[] = {
 5123 static const uint32_t GR64_with_sub_32bit_in_GR32_BSI_and_GR32_SIDISubClassMask[] = {
 5127 static const uint32_t GR64_with_sub_32bit_in_GR32_CB_and_GR32_DCSubClassMask[] = {
 5131 static const uint32_t GR64_with_sub_32bit_in_GR32_DIBP_and_GR32_SIDISubClassMask[] = {
 5135 static const uint32_t RSTSubClassMask[] = {
 5139 static const uint32_t RFP80SubClassMask[] = {
 5143 static const uint32_t RFP80_7SubClassMask[] = {
 5147 static const uint32_t VR128XSubClassMask[] = {
 5152 static const uint32_t VR128SubClassMask[] = {
 5157 static const uint32_t BNDRSubClassMask[] = {
 5161 static const uint32_t VR256XSubClassMask[] = {
 5166 static const uint32_t VR256SubClassMask[] = {
 5171 static const uint32_t VR512SubClassMask[] = {
 5175 static const uint32_t VR512_0_15SubClassMask[] = {
 9999 static const uint32_t CSR_32_RegMask[] = { 0x058703f0, 0x1c002581, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
10001 static const uint32_t CSR_32EHRet_RegMask[] = { 0x0def83fe, 0x1c002dc1, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
10003 static const uint32_t CSR_32_AllRegs_RegMask[] = { 0x0fefaffe, 0x1c002fc1, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
10005 static const uint32_t CSR_32_AllRegs_AVX_RegMask[] = { 0x0fefaffe, 0x1c002fc1, 0x00000000, 0x00000000, 0x003fc000, 0x003fc000, 0x00000000, 0x00000000, 0x00000000, };
10007 static const uint32_t CSR_32_AllRegs_AVX512_RegMask[] = { 0x0fefaffe, 0x1c002fc1, 0x00000000, 0x003fc000, 0x003fc000, 0x003fc000, 0x003fc000, 0x00000000, 0x03c00000, };
10009 static const uint32_t CSR_32_AllRegs_SSE_RegMask[] = { 0x0fefaffe, 0x1c002fc1, 0x00000000, 0x00000000, 0x003fc000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
10011 static const uint32_t CSR_32_RegCall_RegMask[] = { 0x058703f0, 0xfc006583, 0x00000000, 0x00000000, 0x003c0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
10013 static const uint32_t CSR_32_RegCall_NoSSE_RegMask[] = { 0x058703f0, 0xfc006583, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
10015 static const uint32_t CSR_64_RegMask[] = { 0x018003f0, 0x00060180, 0x00000000, 0x00000000, 0x0000003c, 0x00000000, 0x00000000, 0x3c3c0000, 0x003c3c3c, };
10017 static const uint32_t CSR_64EHRet_RegMask[] = { 0x09e883fe, 0x002709c0, 0x00000000, 0x00000000, 0x0000003c, 0x00000000, 0x00000000, 0x3c3c0000, 0x003c3c3c, };
10019 static const uint32_t CSR_64_AllRegs_RegMask[] = { 0x0fefaffe, 0x1d3f2fc1, 0x00000000, 0xc0000000, 0x3fffc03f, 0x00000000, 0x00000000, 0xffffc000, 0x003fffff, };
10021 static const uint32_t CSR_64_AllRegs_AVX_RegMask[] = { 0x0fefaffe, 0x1d3f2fc1, 0x00000000, 0xc0000000, 0x3fffc03f, 0x3fffc000, 0x00000000, 0xffffc000, 0x003fffff, };
10023 static const uint32_t CSR_64_AllRegs_AVX512_RegMask[] = { 0x0fefaffe, 0x1d3f2fc1, 0x00000000, 0xc03fc000, 0xffffc03f, 0xffffffff, 0xffffffff, 0xffffffff, 0x03ffffff, };
10025 static const uint32_t CSR_64_AllRegs_NoSSE_RegMask[] = { 0x0fefaffe, 0x1d3f2fc1, 0x00000000, 0xc0000000, 0x0000003f, 0x00000000, 0x00000000, 0xffffc000, 0x003fffff, };
10027 static const uint32_t CSR_64_CXX_TLS_Darwin_PE_RegMask[] = { 0x008001c0, 0x00020080, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
10029 static const uint32_t CSR_64_CXX_TLS_Darwin_ViaCopy_RegMask[] = { 0x0b28ae30, 0x1d2c2b01, 0x00000000, 0xc0000000, 0x0000003f, 0x00000000, 0x00000000, 0xffffc000, 0x003fffff, };
10031 static const uint32_t CSR_64_HHVM_RegMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000004, 0x00000000, 0x00000000, 0x04040000, 0x00040404, };
10033 static const uint32_t CSR_64_Intel_OCL_BI_RegMask[] = { 0x018003f0, 0x00060180, 0x00000000, 0x00000000, 0x3fc0003c, 0x00000000, 0x00000000, 0x3c3c0000, 0x003c3c3c, };
10035 static const uint32_t CSR_64_Intel_OCL_BI_AVX_RegMask[] = { 0x018003f0, 0x00060180, 0x00000000, 0x00000000, 0x3fc0003c, 0x3fc00000, 0x00000000, 0x3c3c0000, 0x003c3c3c, };
10037 static const uint32_t CSR_64_Intel_OCL_BI_AVX512_RegMask[] = { 0x05070230, 0x1d142501, 0x00000000, 0x003c0000, 0xc0000030, 0xc0003fff, 0xc0003fff, 0x30303fff, 0x03303030, };
10039 static const uint32_t CSR_64_MostRegs_RegMask[] = { 0x0fafaff0, 0x1d3e2f81, 0x00000000, 0xc0000000, 0x3fffc03f, 0x00000000, 0x00000000, 0xffffc000, 0x003fffff, };
10041 static const uint32_t CSR_64_RT_AllRegs_RegMask[] = { 0x0fefaffe, 0xff3f6fc3, 0x00000000, 0xc0000000, 0x3fffc03d, 0x00000000, 0x00000000, 0xfdfdc000, 0x003dfdfd, };
10043 static const uint32_t CSR_64_RT_AllRegs_AVX_RegMask[] = { 0x0fefaffe, 0xff3f6fc3, 0x00000000, 0xc0000000, 0x3fffc03d, 0x3fffc000, 0x00000000, 0xfdfdc000, 0x003dfdfd, };
10045 static const uint32_t CSR_64_RT_MostRegs_RegMask[] = { 0x0fefaffe, 0xff3f6fc3, 0x00000000, 0xc0000000, 0x0000003d, 0x00000000, 0x00000000, 0xfdfdc000, 0x003dfdfd, };
10047 static const uint32_t CSR_64_SwiftError_RegMask[] = { 0x018003f0, 0x00060180, 0x00000000, 0x00000000, 0x00000038, 0x00000000, 0x00000000, 0x38380000, 0x00383838, };
10049 static const uint32_t CSR_64_TLS_Darwin_RegMask[] = { 0x0ba8aff0, 0x1d2e2b81, 0x00000000, 0xc0000000, 0x0000003f, 0x00000000, 0x00000000, 0xffffc000, 0x003fffff, };
10051 static const uint32_t CSR_NoRegs_RegMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
10053 static const uint32_t CSR_SysV64_RegCall_RegMask[] = { 0x018003f0, 0xe2064182, 0x00000000, 0x00000000, 0x3fc0003c, 0x00000000, 0x00000000, 0x3c3c0000, 0x003c3c3c, };
10055 static const uint32_t CSR_SysV64_RegCall_NoSSE_RegMask[] = { 0x018003f0, 0xe2064182, 0x00000000, 0x00000000, 0x0000003c, 0x00000000, 0x00000000, 0x3c3c0000, 0x003c3c3c, };
10057 static const uint32_t CSR_Win32_CFGuard_Check_RegMask[] = { 0x07872ff0, 0xfc006783, 0x00000000, 0x00000000, 0x003c0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
10059 static const uint32_t CSR_Win32_CFGuard_Check_NoSSE_RegMask[] = { 0x07872ff0, 0xfc006783, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
10061 static const uint32_t CSR_Win64_RegMask[] = { 0x058703f0, 0x1d162581, 0x00000000, 0x00000000, 0x3ff0003c, 0x00000000, 0x00000000, 0x3c3c0000, 0x003c3c3c, };
10063 static const uint32_t CSR_Win64_Intel_OCL_BI_AVX_RegMask[] = { 0x058703f0, 0x1d162581, 0x00000000, 0x00000000, 0x3ff0003c, 0x3ff00000, 0x00000000, 0x3c3c0000, 0x003c3c3c, };
10065 static const uint32_t CSR_Win64_Intel_OCL_BI_AVX512_RegMask[] = { 0x058703f0, 0x1d162581, 0x00000000, 0x003c0000, 0xfff0003c, 0xfff0000f, 0xfff0000f, 0x3c3c000f, 0x033c3c3c, };
10067 static const uint32_t CSR_Win64_NoSSE_RegMask[] = { 0x058703f0, 0x1d162581, 0x00000000, 0x00000000, 0x0000003c, 0x00000000, 0x00000000, 0x3c3c0000, 0x003c3c3c, };
10069 static const uint32_t CSR_Win64_RegCall_RegMask[] = { 0x018003f0, 0xe2064182, 0x00000000, 0x00000000, 0x3fc0003f, 0x00000000, 0x00000000, 0x3f3f0000, 0x003f3f3f, };
10071 static const uint32_t CSR_Win64_RegCall_NoSSE_RegMask[] = { 0x018003f0, 0xe2064182, 0x00000000, 0x00000000, 0x0000003f, 0x00000000, 0x00000000, 0x3f3f0000, 0x003f3f3f, };
10073 static const uint32_t CSR_Win64_SwiftError_RegMask[] = { 0x058703f0, 0x1d162581, 0x00000000, 0x00000000, 0x3ff00038, 0x00000000, 0x00000000, 0x38380000, 0x00383838, };
10076 ArrayRef<const uint32_t *> X86GenRegisterInfo::getRegMasks() const {
10077   static const uint32_t *const Masks[] = {

  168   static const uint32_t OpInfo0[] = {
  573   uint32_t Bits = 0;

 2284   uint32_t value = (uint32_t)N->getZExtValue();
 2301   uint32_t value = (uint32_t)N->getZExtValue();
 2394   uint32_t value = (uint32_t)N->getZExtValue();
 2406   uint32_t value = (uint32_t)N->getZExtValue();
 2485   uint32_t value = N->getZExtValue();
 2493   uint32_t value = N->getZExtValue();
 2502   uint32_t value = N->getZExtValue();

  342   ArrayRef<const uint32_t *> getRegMasks() const override;
  394 static const uint32_t RRegsSubClassMask[] = {
  398 static const uint32_t GRRegsSubClassMask[] = {
  605 ArrayRef<const uint32_t *> XCoreGenRegisterInfo::getRegMasks() const {

  268   uint32_t  Param0;
  287   uint32_t  Param0;

  634 	auto V0 = PC.read<uint32_t>();
  643 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
  647 bool emitConstUint32(uint32_t, const SourceInfo &);
  650 bool ByteCodeEmitter::emitConstUint32(uint32_t A0,const SourceInfo &L) {
  651 	return emitOp<uint32_t>(OP_ConstUint32, A0, L);
  655 bool EvalEmitter::emitConstUint32(uint32_t A0,const SourceInfo &L) {
  730 	auto V0 = PC.read<uint32_t>();
  739 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
  743 bool emitDestroy(uint32_t, const SourceInfo &);
  746 bool ByteCodeEmitter::emitDestroy(uint32_t A0,const SourceInfo &L) {
  747 	return emitOp<uint32_t>(OP_Destroy, A0, L);
 1747 	auto V0 = PC.read<uint32_t>();
 1753 	auto V0 = PC.read<uint32_t>();
 1759 	auto V0 = PC.read<uint32_t>();
 1765 	auto V0 = PC.read<uint32_t>();
 1771 	auto V0 = PC.read<uint32_t>();
 1777 	auto V0 = PC.read<uint32_t>();
 1783 	auto V0 = PC.read<uint32_t>();
 1789 	auto V0 = PC.read<uint32_t>();
 1795 	auto V0 = PC.read<uint32_t>();
 1801 	auto V0 = PC.read<uint32_t>();
 1810 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 1814 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 1818 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 1822 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 1826 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 1830 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 1834 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 1838 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 1842 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 1846 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 1850 bool emitGetFieldSint8(uint32_t, const SourceInfo &);
 1851 bool emitGetFieldUint8(uint32_t, const SourceInfo &);
 1852 bool emitGetFieldSint16(uint32_t, const SourceInfo &);
 1853 bool emitGetFieldUint16(uint32_t, const SourceInfo &);
 1854 bool emitGetFieldSint32(uint32_t, const SourceInfo &);
 1855 bool emitGetFieldUint32(uint32_t, const SourceInfo &);
 1856 bool emitGetFieldSint64(uint32_t, const SourceInfo &);
 1857 bool emitGetFieldUint64(uint32_t, const SourceInfo &);
 1858 bool emitGetFieldBool(uint32_t, const SourceInfo &);
 1859 bool emitGetFieldPtr(uint32_t, const SourceInfo &);
 1862 bool emitGetField(PrimType, uint32_t, const SourceInfo &I);
 1871 ::emitGetField(PrimType T0, uint32_t A0, const SourceInfo &I) {
 1898 bool ByteCodeEmitter::emitGetFieldSint8(uint32_t A0,const SourceInfo &L) {
 1899 	return emitOp<uint32_t>(OP_GetFieldSint8, A0, L);
 1901 bool ByteCodeEmitter::emitGetFieldUint8(uint32_t A0,const SourceInfo &L) {
 1902 	return emitOp<uint32_t>(OP_GetFieldUint8, A0, L);
 1904 bool ByteCodeEmitter::emitGetFieldSint16(uint32_t A0,const SourceInfo &L) {
 1905 	return emitOp<uint32_t>(OP_GetFieldSint16, A0, L);
 1907 bool ByteCodeEmitter::emitGetFieldUint16(uint32_t A0,const SourceInfo &L) {
 1908 	return emitOp<uint32_t>(OP_GetFieldUint16, A0, L);
 1910 bool ByteCodeEmitter::emitGetFieldSint32(uint32_t A0,const SourceInfo &L) {
 1911 	return emitOp<uint32_t>(OP_GetFieldSint32, A0, L);
 1913 bool ByteCodeEmitter::emitGetFieldUint32(uint32_t A0,const SourceInfo &L) {
 1914 	return emitOp<uint32_t>(OP_GetFieldUint32, A0, L);
 1916 bool ByteCodeEmitter::emitGetFieldSint64(uint32_t A0,const SourceInfo &L) {
 1917 	return emitOp<uint32_t>(OP_GetFieldSint64, A0, L);
 1919 bool ByteCodeEmitter::emitGetFieldUint64(uint32_t A0,const SourceInfo &L) {
 1920 	return emitOp<uint32_t>(OP_GetFieldUint64, A0, L);
 1922 bool ByteCodeEmitter::emitGetFieldBool(uint32_t A0,const SourceInfo &L) {
 1923 	return emitOp<uint32_t>(OP_GetFieldBool, A0, L);
 1925 bool ByteCodeEmitter::emitGetFieldPtr(uint32_t A0,const SourceInfo &L) {
 1926 	return emitOp<uint32_t>(OP_GetFieldPtr, A0, L);
 1930 bool EvalEmitter::emitGetFieldSint8(uint32_t A0,const SourceInfo &L) {
 1935 bool EvalEmitter::emitGetFieldUint8(uint32_t A0,const SourceInfo &L) {
 1940 bool EvalEmitter::emitGetFieldSint16(uint32_t A0,const SourceInfo &L) {
 1945 bool EvalEmitter::emitGetFieldUint16(uint32_t A0,const SourceInfo &L) {
 1950 bool EvalEmitter::emitGetFieldSint32(uint32_t A0,const SourceInfo &L) {
 1955 bool EvalEmitter::emitGetFieldUint32(uint32_t A0,const SourceInfo &L) {
 1960 bool EvalEmitter::emitGetFieldSint64(uint32_t A0,const SourceInfo &L) {
 1965 bool EvalEmitter::emitGetFieldUint64(uint32_t A0,const SourceInfo &L) {
 1970 bool EvalEmitter::emitGetFieldBool(uint32_t A0,const SourceInfo &L) {
 1975 bool EvalEmitter::emitGetFieldPtr(uint32_t A0,const SourceInfo &L) {
 1995 	auto V0 = PC.read<uint32_t>();
 2001 	auto V0 = PC.read<uint32_t>();
 2007 	auto V0 = PC.read<uint32_t>();
 2013 	auto V0 = PC.read<uint32_t>();
 2019 	auto V0 = PC.read<uint32_t>();
 2025 	auto V0 = PC.read<uint32_t>();
 2031 	auto V0 = PC.read<uint32_t>();
 2037 	auto V0 = PC.read<uint32_t>();
 2043 	auto V0 = PC.read<uint32_t>();
 2049 	auto V0 = PC.read<uint32_t>();
 2058 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2062 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2066 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2070 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2074 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2078 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2082 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2086 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2090 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2094 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2098 bool emitGetFieldPopSint8(uint32_t, const SourceInfo &);
 2099 bool emitGetFieldPopUint8(uint32_t, const SourceInfo &);
 2100 bool emitGetFieldPopSint16(uint32_t, const SourceInfo &);
 2101 bool emitGetFieldPopUint16(uint32_t, const SourceInfo &);
 2102 bool emitGetFieldPopSint32(uint32_t, const SourceInfo &);
 2103 bool emitGetFieldPopUint32(uint32_t, const SourceInfo &);
 2104 bool emitGetFieldPopSint64(uint32_t, const SourceInfo &);
 2105 bool emitGetFieldPopUint64(uint32_t, const SourceInfo &);
 2106 bool emitGetFieldPopBool(uint32_t, const SourceInfo &);
 2107 bool emitGetFieldPopPtr(uint32_t, const SourceInfo &);
 2110 bool emitGetFieldPop(PrimType, uint32_t, const SourceInfo &I);
 2119 ::emitGetFieldPop(PrimType T0, uint32_t A0, const SourceInfo &I) {
 2146 bool ByteCodeEmitter::emitGetFieldPopSint8(uint32_t A0,const SourceInfo &L) {
 2147 	return emitOp<uint32_t>(OP_GetFieldPopSint8, A0, L);
 2149 bool ByteCodeEmitter::emitGetFieldPopUint8(uint32_t A0,const SourceInfo &L) {
 2150 	return emitOp<uint32_t>(OP_GetFieldPopUint8, A0, L);
 2152 bool ByteCodeEmitter::emitGetFieldPopSint16(uint32_t A0,const SourceInfo &L) {
 2153 	return emitOp<uint32_t>(OP_GetFieldPopSint16, A0, L);
 2155 bool ByteCodeEmitter::emitGetFieldPopUint16(uint32_t A0,const SourceInfo &L) {
 2156 	return emitOp<uint32_t>(OP_GetFieldPopUint16, A0, L);
 2158 bool ByteCodeEmitter::emitGetFieldPopSint32(uint32_t A0,const SourceInfo &L) {
 2159 	return emitOp<uint32_t>(OP_GetFieldPopSint32, A0, L);
 2161 bool ByteCodeEmitter::emitGetFieldPopUint32(uint32_t A0,const SourceInfo &L) {
 2162 	return emitOp<uint32_t>(OP_GetFieldPopUint32, A0, L);
 2164 bool ByteCodeEmitter::emitGetFieldPopSint64(uint32_t A0,const SourceInfo &L) {
 2165 	return emitOp<uint32_t>(OP_GetFieldPopSint64, A0, L);
 2167 bool ByteCodeEmitter::emitGetFieldPopUint64(uint32_t A0,const SourceInfo &L) {
 2168 	return emitOp<uint32_t>(OP_GetFieldPopUint64, A0, L);
 2170 bool ByteCodeEmitter::emitGetFieldPopBool(uint32_t A0,const SourceInfo &L) {
 2171 	return emitOp<uint32_t>(OP_GetFieldPopBool, A0, L);
 2173 bool ByteCodeEmitter::emitGetFieldPopPtr(uint32_t A0,const SourceInfo &L) {
 2174 	return emitOp<uint32_t>(OP_GetFieldPopPtr, A0, L);
 2178 bool EvalEmitter::emitGetFieldPopSint8(uint32_t A0,const SourceInfo &L) {
 2183 bool EvalEmitter::emitGetFieldPopUint8(uint32_t A0,const SourceInfo &L) {
 2188 bool EvalEmitter::emitGetFieldPopSint16(uint32_t A0,const SourceInfo &L) {
 2193 bool EvalEmitter::emitGetFieldPopUint16(uint32_t A0,const SourceInfo &L) {
 2198 bool EvalEmitter::emitGetFieldPopSint32(uint32_t A0,const SourceInfo &L) {
 2203 bool EvalEmitter::emitGetFieldPopUint32(uint32_t A0,const SourceInfo &L) {
 2208 bool EvalEmitter::emitGetFieldPopSint64(uint32_t A0,const SourceInfo &L) {
 2213 bool EvalEmitter::emitGetFieldPopUint64(uint32_t A0,const SourceInfo &L) {
 2218 bool EvalEmitter::emitGetFieldPopBool(uint32_t A0,const SourceInfo &L) {
 2223 bool EvalEmitter::emitGetFieldPopPtr(uint32_t A0,const SourceInfo &L) {
 2243 	auto V0 = PC.read<uint32_t>();
 2249 	auto V0 = PC.read<uint32_t>();
 2255 	auto V0 = PC.read<uint32_t>();
 2261 	auto V0 = PC.read<uint32_t>();
 2267 	auto V0 = PC.read<uint32_t>();
 2273 	auto V0 = PC.read<uint32_t>();
 2279 	auto V0 = PC.read<uint32_t>();
 2285 	auto V0 = PC.read<uint32_t>();
 2291 	auto V0 = PC.read<uint32_t>();
 2297 	auto V0 = PC.read<uint32_t>();
 2306 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2310 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2314 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2318 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2322 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2326 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2330 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2334 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2338 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2342 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2346 bool emitGetGlobalSint8(uint32_t, const SourceInfo &);
 2347 bool emitGetGlobalUint8(uint32_t, const SourceInfo &);
 2348 bool emitGetGlobalSint16(uint32_t, const SourceInfo &);
 2349 bool emitGetGlobalUint16(uint32_t, const SourceInfo &);
 2350 bool emitGetGlobalSint32(uint32_t, const SourceInfo &);
 2351 bool emitGetGlobalUint32(uint32_t, const SourceInfo &);
 2352 bool emitGetGlobalSint64(uint32_t, const SourceInfo &);
 2353 bool emitGetGlobalUint64(uint32_t, const SourceInfo &);
 2354 bool emitGetGlobalBool(uint32_t, const SourceInfo &);
 2355 bool emitGetGlobalPtr(uint32_t, const SourceInfo &);
 2358 bool emitGetGlobal(PrimType, uint32_t, const SourceInfo &I);
 2367 ::emitGetGlobal(PrimType T0, uint32_t A0, const SourceInfo &I) {
 2394 bool ByteCodeEmitter::emitGetGlobalSint8(uint32_t A0,const SourceInfo &L) {
 2395 	return emitOp<uint32_t>(OP_GetGlobalSint8, A0, L);
 2397 bool ByteCodeEmitter::emitGetGlobalUint8(uint32_t A0,const SourceInfo &L) {
 2398 	return emitOp<uint32_t>(OP_GetGlobalUint8, A0, L);
 2400 bool ByteCodeEmitter::emitGetGlobalSint16(uint32_t A0,const SourceInfo &L) {
 2401 	return emitOp<uint32_t>(OP_GetGlobalSint16, A0, L);
 2403 bool ByteCodeEmitter::emitGetGlobalUint16(uint32_t A0,const SourceInfo &L) {
 2404 	return emitOp<uint32_t>(OP_GetGlobalUint16, A0, L);
 2406 bool ByteCodeEmitter::emitGetGlobalSint32(uint32_t A0,const SourceInfo &L) {
 2407 	return emitOp<uint32_t>(OP_GetGlobalSint32, A0, L);
 2409 bool ByteCodeEmitter::emitGetGlobalUint32(uint32_t A0,const SourceInfo &L) {
 2410 	return emitOp<uint32_t>(OP_GetGlobalUint32, A0, L);
 2412 bool ByteCodeEmitter::emitGetGlobalSint64(uint32_t A0,const SourceInfo &L) {
 2413 	return emitOp<uint32_t>(OP_GetGlobalSint64, A0, L);
 2415 bool ByteCodeEmitter::emitGetGlobalUint64(uint32_t A0,const SourceInfo &L) {
 2416 	return emitOp<uint32_t>(OP_GetGlobalUint64, A0, L);
 2418 bool ByteCodeEmitter::emitGetGlobalBool(uint32_t A0,const SourceInfo &L) {
 2419 	return emitOp<uint32_t>(OP_GetGlobalBool, A0, L);
 2421 bool ByteCodeEmitter::emitGetGlobalPtr(uint32_t A0,const SourceInfo &L) {
 2422 	return emitOp<uint32_t>(OP_GetGlobalPtr, A0, L);
 2426 bool EvalEmitter::emitGetGlobalSint8(uint32_t A0,const SourceInfo &L) {
 2431 bool EvalEmitter::emitGetGlobalUint8(uint32_t A0,const SourceInfo &L) {
 2436 bool EvalEmitter::emitGetGlobalSint16(uint32_t A0,const SourceInfo &L) {
 2441 bool EvalEmitter::emitGetGlobalUint16(uint32_t A0,const SourceInfo &L) {
 2446 bool EvalEmitter::emitGetGlobalSint32(uint32_t A0,const SourceInfo &L) {
 2451 bool EvalEmitter::emitGetGlobalUint32(uint32_t A0,const SourceInfo &L) {
 2456 bool EvalEmitter::emitGetGlobalSint64(uint32_t A0,const SourceInfo &L) {
 2461 bool EvalEmitter::emitGetGlobalUint64(uint32_t A0,const SourceInfo &L) {
 2466 bool EvalEmitter::emitGetGlobalBool(uint32_t A0,const SourceInfo &L) {
 2471 bool EvalEmitter::emitGetGlobalPtr(uint32_t A0,const SourceInfo &L) {
 2491 	auto V0 = PC.read<uint32_t>();
 2497 	auto V0 = PC.read<uint32_t>();
 2503 	auto V0 = PC.read<uint32_t>();
 2509 	auto V0 = PC.read<uint32_t>();
 2515 	auto V0 = PC.read<uint32_t>();
 2521 	auto V0 = PC.read<uint32_t>();
 2527 	auto V0 = PC.read<uint32_t>();
 2533 	auto V0 = PC.read<uint32_t>();
 2539 	auto V0 = PC.read<uint32_t>();
 2545 	auto V0 = PC.read<uint32_t>();
 2554 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2558 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2562 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2566 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2570 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2574 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2578 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2582 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2586 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2590 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2594 bool emitGetLocalSint8(uint32_t, const SourceInfo &);
 2595 bool emitGetLocalUint8(uint32_t, const SourceInfo &);
 2596 bool emitGetLocalSint16(uint32_t, const SourceInfo &);
 2597 bool emitGetLocalUint16(uint32_t, const SourceInfo &);
 2598 bool emitGetLocalSint32(uint32_t, const SourceInfo &);
 2599 bool emitGetLocalUint32(uint32_t, const SourceInfo &);
 2600 bool emitGetLocalSint64(uint32_t, const SourceInfo &);
 2601 bool emitGetLocalUint64(uint32_t, const SourceInfo &);
 2602 bool emitGetLocalBool(uint32_t, const SourceInfo &);
 2603 bool emitGetLocalPtr(uint32_t, const SourceInfo &);
 2606 bool emitGetLocal(uint32_t, const SourceInfo &);
 2610 bool emitGetLocal(PrimType, uint32_t, const SourceInfo &I);
 2619 ::emitGetLocal(PrimType T0, uint32_t A0, const SourceInfo &I) {
 2696 bool ByteCodeEmitter::emitGetLocalSint8(uint32_t A0,const SourceInfo &L) {
 2697 	return emitOp<uint32_t>(OP_GetLocalSint8, A0, L);
 2699 bool ByteCodeEmitter::emitGetLocalUint8(uint32_t A0,const SourceInfo &L) {
 2700 	return emitOp<uint32_t>(OP_GetLocalUint8, A0, L);
 2702 bool ByteCodeEmitter::emitGetLocalSint16(uint32_t A0,const SourceInfo &L) {
 2703 	return emitOp<uint32_t>(OP_GetLocalSint16, A0, L);
 2705 bool ByteCodeEmitter::emitGetLocalUint16(uint32_t A0,const SourceInfo &L) {
 2706 	return emitOp<uint32_t>(OP_GetLocalUint16, A0, L);
 2708 bool ByteCodeEmitter::emitGetLocalSint32(uint32_t A0,const SourceInfo &L) {
 2709 	return emitOp<uint32_t>(OP_GetLocalSint32, A0, L);
 2711 bool ByteCodeEmitter::emitGetLocalUint32(uint32_t A0,const SourceInfo &L) {
 2712 	return emitOp<uint32_t>(OP_GetLocalUint32, A0, L);
 2714 bool ByteCodeEmitter::emitGetLocalSint64(uint32_t A0,const SourceInfo &L) {
 2715 	return emitOp<uint32_t>(OP_GetLocalSint64, A0, L);
 2717 bool ByteCodeEmitter::emitGetLocalUint64(uint32_t A0,const SourceInfo &L) {
 2718 	return emitOp<uint32_t>(OP_GetLocalUint64, A0, L);
 2720 bool ByteCodeEmitter::emitGetLocalBool(uint32_t A0,const SourceInfo &L) {
 2721 	return emitOp<uint32_t>(OP_GetLocalBool, A0, L);
 2723 bool ByteCodeEmitter::emitGetLocalPtr(uint32_t A0,const SourceInfo &L) {
 2724 	return emitOp<uint32_t>(OP_GetLocalPtr, A0, L);
 2741 	auto V0 = PC.read<uint32_t>();
 2747 	auto V0 = PC.read<uint32_t>();
 2753 	auto V0 = PC.read<uint32_t>();
 2759 	auto V0 = PC.read<uint32_t>();
 2765 	auto V0 = PC.read<uint32_t>();
 2771 	auto V0 = PC.read<uint32_t>();
 2777 	auto V0 = PC.read<uint32_t>();
 2783 	auto V0 = PC.read<uint32_t>();
 2789 	auto V0 = PC.read<uint32_t>();
 2795 	auto V0 = PC.read<uint32_t>();
 2804 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2808 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2812 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2816 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2820 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2824 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2828 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2832 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2836 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2840 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2844 bool emitGetParamSint8(uint32_t, const SourceInfo &);
 2845 bool emitGetParamUint8(uint32_t, const SourceInfo &);
 2846 bool emitGetParamSint16(uint32_t, const SourceInfo &);
 2847 bool emitGetParamUint16(uint32_t, const SourceInfo &);
 2848 bool emitGetParamSint32(uint32_t, const SourceInfo &);
 2849 bool emitGetParamUint32(uint32_t, const SourceInfo &);
 2850 bool emitGetParamSint64(uint32_t, const SourceInfo &);
 2851 bool emitGetParamUint64(uint32_t, const SourceInfo &);
 2852 bool emitGetParamBool(uint32_t, const SourceInfo &);
 2853 bool emitGetParamPtr(uint32_t, const SourceInfo &);
 2856 bool emitGetParam(PrimType, uint32_t, const SourceInfo &I);
 2865 ::emitGetParam(PrimType T0, uint32_t A0, const SourceInfo &I) {
 2892 bool ByteCodeEmitter::emitGetParamSint8(uint32_t A0,const SourceInfo &L) {
 2893 	return emitOp<uint32_t>(OP_GetParamSint8, A0, L);
 2895 bool ByteCodeEmitter::emitGetParamUint8(uint32_t A0,const SourceInfo &L) {
 2896 	return emitOp<uint32_t>(OP_GetParamUint8, A0, L);
 2898 bool ByteCodeEmitter::emitGetParamSint16(uint32_t A0,const SourceInfo &L) {
 2899 	return emitOp<uint32_t>(OP_GetParamSint16, A0, L);
 2901 bool ByteCodeEmitter::emitGetParamUint16(uint32_t A0,const SourceInfo &L) {
 2902 	return emitOp<uint32_t>(OP_GetParamUint16, A0, L);
 2904 bool ByteCodeEmitter::emitGetParamSint32(uint32_t A0,const SourceInfo &L) {
 2905 	return emitOp<uint32_t>(OP_GetParamSint32, A0, L);
 2907 bool ByteCodeEmitter::emitGetParamUint32(uint32_t A0,const SourceInfo &L) {
 2908 	return emitOp<uint32_t>(OP_GetParamUint32, A0, L);
 2910 bool ByteCodeEmitter::emitGetParamSint64(uint32_t A0,const SourceInfo &L) {
 2911 	return emitOp<uint32_t>(OP_GetParamSint64, A0, L);
 2913 bool ByteCodeEmitter::emitGetParamUint64(uint32_t A0,const SourceInfo &L) {
 2914 	return emitOp<uint32_t>(OP_GetParamUint64, A0, L);
 2916 bool ByteCodeEmitter::emitGetParamBool(uint32_t A0,const SourceInfo &L) {
 2917 	return emitOp<uint32_t>(OP_GetParamBool, A0, L);
 2919 bool ByteCodeEmitter::emitGetParamPtr(uint32_t A0,const SourceInfo &L) {
 2920 	return emitOp<uint32_t>(OP_GetParamPtr, A0, L);
 2924 bool EvalEmitter::emitGetParamSint8(uint32_t A0,const SourceInfo &L) {
 2929 bool EvalEmitter::emitGetParamUint8(uint32_t A0,const SourceInfo &L) {
 2934 bool EvalEmitter::emitGetParamSint16(uint32_t A0,const SourceInfo &L) {
 2939 bool EvalEmitter::emitGetParamUint16(uint32_t A0,const SourceInfo &L) {
 2944 bool EvalEmitter::emitGetParamSint32(uint32_t A0,const SourceInfo &L) {
 2949 bool EvalEmitter::emitGetParamUint32(uint32_t A0,const SourceInfo &L) {
 2954 bool EvalEmitter::emitGetParamSint64(uint32_t A0,const SourceInfo &L) {
 2959 bool EvalEmitter::emitGetParamUint64(uint32_t A0,const SourceInfo &L) {
 2964 bool EvalEmitter::emitGetParamBool(uint32_t A0,const SourceInfo &L) {
 2969 bool EvalEmitter::emitGetParamPtr(uint32_t A0,const SourceInfo &L) {
 2980 	auto V0 = PC.read<uint32_t>();
 2989 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 2993 bool emitGetPtrActiveField(uint32_t, const SourceInfo &);
 2996 bool ByteCodeEmitter::emitGetPtrActiveField(uint32_t A0,const SourceInfo &L) {
 2997 	return emitOp<uint32_t>(OP_GetPtrActiveField, A0, L);
 3001 bool EvalEmitter::emitGetPtrActiveField(uint32_t A0,const SourceInfo &L) {
 3012 	auto V0 = PC.read<uint32_t>();
 3021 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3025 bool emitGetPtrActiveThisField(uint32_t, const SourceInfo &);
 3028 bool ByteCodeEmitter::emitGetPtrActiveThisField(uint32_t A0,const SourceInfo &L) {
 3029 	return emitOp<uint32_t>(OP_GetPtrActiveThisField, A0, L);
 3033 bool EvalEmitter::emitGetPtrActiveThisField(uint32_t A0,const SourceInfo &L) {
 3044 	auto V0 = PC.read<uint32_t>();
 3053 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3057 bool emitGetPtrBase(uint32_t, const SourceInfo &);
 3060 bool ByteCodeEmitter::emitGetPtrBase(uint32_t A0,const SourceInfo &L) {
 3061 	return emitOp<uint32_t>(OP_GetPtrBase, A0, L);
 3065 bool EvalEmitter::emitGetPtrBase(uint32_t A0,const SourceInfo &L) {
 3076 	auto V0 = PC.read<uint32_t>();
 3085 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3089 bool emitGetPtrField(uint32_t, const SourceInfo &);
 3092 bool ByteCodeEmitter::emitGetPtrField(uint32_t A0,const SourceInfo &L) {
 3093 	return emitOp<uint32_t>(OP_GetPtrField, A0, L);
 3097 bool EvalEmitter::emitGetPtrField(uint32_t A0,const SourceInfo &L) {
 3108 	auto V0 = PC.read<uint32_t>();
 3117 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3121 bool emitGetPtrGlobal(uint32_t, const SourceInfo &);
 3124 bool ByteCodeEmitter::emitGetPtrGlobal(uint32_t A0,const SourceInfo &L) {
 3125 	return emitOp<uint32_t>(OP_GetPtrGlobal, A0, L);
 3129 bool EvalEmitter::emitGetPtrGlobal(uint32_t A0,const SourceInfo &L) {
 3140 	auto V0 = PC.read<uint32_t>();
 3149 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3153 bool emitGetPtrLocal(uint32_t, const SourceInfo &);
 3156 bool ByteCodeEmitter::emitGetPtrLocal(uint32_t A0,const SourceInfo &L) {
 3157 	return emitOp<uint32_t>(OP_GetPtrLocal, A0, L);
 3165 	auto V0 = PC.read<uint32_t>();
 3174 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3178 bool emitGetPtrParam(uint32_t, const SourceInfo &);
 3181 bool ByteCodeEmitter::emitGetPtrParam(uint32_t A0,const SourceInfo &L) {
 3182 	return emitOp<uint32_t>(OP_GetPtrParam, A0, L);
 3186 bool EvalEmitter::emitGetPtrParam(uint32_t A0,const SourceInfo &L) {
 3197 	auto V0 = PC.read<uint32_t>();
 3206 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3210 bool emitGetPtrThisBase(uint32_t, const SourceInfo &);
 3213 bool ByteCodeEmitter::emitGetPtrThisBase(uint32_t A0,const SourceInfo &L) {
 3214 	return emitOp<uint32_t>(OP_GetPtrThisBase, A0, L);
 3218 bool EvalEmitter::emitGetPtrThisBase(uint32_t A0,const SourceInfo &L) {
 3229 	auto V0 = PC.read<uint32_t>();
 3238 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3242 bool emitGetPtrThisField(uint32_t, const SourceInfo &);
 3245 bool ByteCodeEmitter::emitGetPtrThisField(uint32_t A0,const SourceInfo &L) {
 3246 	return emitOp<uint32_t>(OP_GetPtrThisField, A0, L);
 3250 bool EvalEmitter::emitGetPtrThisField(uint32_t A0,const SourceInfo &L) {
 3334 	auto V0 = PC.read<uint32_t>();
 3340 	auto V0 = PC.read<uint32_t>();
 3346 	auto V0 = PC.read<uint32_t>();
 3352 	auto V0 = PC.read<uint32_t>();
 3358 	auto V0 = PC.read<uint32_t>();
 3364 	auto V0 = PC.read<uint32_t>();
 3370 	auto V0 = PC.read<uint32_t>();
 3376 	auto V0 = PC.read<uint32_t>();
 3382 	auto V0 = PC.read<uint32_t>();
 3388 	auto V0 = PC.read<uint32_t>();
 3397 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3401 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3405 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3409 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3413 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3417 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3421 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3425 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3429 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3433 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3437 bool emitGetThisFieldSint8(uint32_t, const SourceInfo &);
 3438 bool emitGetThisFieldUint8(uint32_t, const SourceInfo &);
 3439 bool emitGetThisFieldSint16(uint32_t, const SourceInfo &);
 3440 bool emitGetThisFieldUint16(uint32_t, const SourceInfo &);
 3441 bool emitGetThisFieldSint32(uint32_t, const SourceInfo &);
 3442 bool emitGetThisFieldUint32(uint32_t, const SourceInfo &);
 3443 bool emitGetThisFieldSint64(uint32_t, const SourceInfo &);
 3444 bool emitGetThisFieldUint64(uint32_t, const SourceInfo &);
 3445 bool emitGetThisFieldBool(uint32_t, const SourceInfo &);
 3446 bool emitGetThisFieldPtr(uint32_t, const SourceInfo &);
 3449 bool emitGetThisField(PrimType, uint32_t, const SourceInfo &I);
 3458 ::emitGetThisField(PrimType T0, uint32_t A0, const SourceInfo &I) {
 3485 bool ByteCodeEmitter::emitGetThisFieldSint8(uint32_t A0,const SourceInfo &L) {
 3486 	return emitOp<uint32_t>(OP_GetThisFieldSint8, A0, L);
 3488 bool ByteCodeEmitter::emitGetThisFieldUint8(uint32_t A0,const SourceInfo &L) {
 3489 	return emitOp<uint32_t>(OP_GetThisFieldUint8, A0, L);
 3491 bool ByteCodeEmitter::emitGetThisFieldSint16(uint32_t A0,const SourceInfo &L) {
 3492 	return emitOp<uint32_t>(OP_GetThisFieldSint16, A0, L);
 3494 bool ByteCodeEmitter::emitGetThisFieldUint16(uint32_t A0,const SourceInfo &L) {
 3495 	return emitOp<uint32_t>(OP_GetThisFieldUint16, A0, L);
 3497 bool ByteCodeEmitter::emitGetThisFieldSint32(uint32_t A0,const SourceInfo &L) {
 3498 	return emitOp<uint32_t>(OP_GetThisFieldSint32, A0, L);
 3500 bool ByteCodeEmitter::emitGetThisFieldUint32(uint32_t A0,const SourceInfo &L) {
 3501 	return emitOp<uint32_t>(OP_GetThisFieldUint32, A0, L);
 3503 bool ByteCodeEmitter::emitGetThisFieldSint64(uint32_t A0,const SourceInfo &L) {
 3504 	return emitOp<uint32_t>(OP_GetThisFieldSint64, A0, L);
 3506 bool ByteCodeEmitter::emitGetThisFieldUint64(uint32_t A0,const SourceInfo &L) {
 3507 	return emitOp<uint32_t>(OP_GetThisFieldUint64, A0, L);
 3509 bool ByteCodeEmitter::emitGetThisFieldBool(uint32_t A0,const SourceInfo &L) {
 3510 	return emitOp<uint32_t>(OP_GetThisFieldBool, A0, L);
 3512 bool ByteCodeEmitter::emitGetThisFieldPtr(uint32_t A0,const SourceInfo &L) {
 3513 	return emitOp<uint32_t>(OP_GetThisFieldPtr, A0, L);
 3517 bool EvalEmitter::emitGetThisFieldSint8(uint32_t A0,const SourceInfo &L) {
 3522 bool EvalEmitter::emitGetThisFieldUint8(uint32_t A0,const SourceInfo &L) {
 3527 bool EvalEmitter::emitGetThisFieldSint16(uint32_t A0,const SourceInfo &L) {
 3532 bool EvalEmitter::emitGetThisFieldUint16(uint32_t A0,const SourceInfo &L) {
 3537 bool EvalEmitter::emitGetThisFieldSint32(uint32_t A0,const SourceInfo &L) {
 3542 bool EvalEmitter::emitGetThisFieldUint32(uint32_t A0,const SourceInfo &L) {
 3547 bool EvalEmitter::emitGetThisFieldSint64(uint32_t A0,const SourceInfo &L) {
 3552 bool EvalEmitter::emitGetThisFieldUint64(uint32_t A0,const SourceInfo &L) {
 3557 bool EvalEmitter::emitGetThisFieldBool(uint32_t A0,const SourceInfo &L) {
 3562 bool EvalEmitter::emitGetThisFieldPtr(uint32_t A0,const SourceInfo &L) {
 3809 	auto V0 = PC.read<uint32_t>();
 3815 	auto V0 = PC.read<uint32_t>();
 3821 	auto V0 = PC.read<uint32_t>();
 3827 	auto V0 = PC.read<uint32_t>();
 3833 	auto V0 = PC.read<uint32_t>();
 3839 	auto V0 = PC.read<uint32_t>();
 3845 	auto V0 = PC.read<uint32_t>();
 3851 	auto V0 = PC.read<uint32_t>();
 3857 	auto V0 = PC.read<uint32_t>();
 3863 	auto V0 = PC.read<uint32_t>();
 3872 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3876 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3880 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3884 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3888 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3892 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3896 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3900 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3904 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3908 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 3912 bool emitInitElemSint8(uint32_t, const SourceInfo &);
 3913 bool emitInitElemUint8(uint32_t, const SourceInfo &);
 3914 bool emitInitElemSint16(uint32_t, const SourceInfo &);
 3915 bool emitInitElemUint16(uint32_t, const SourceInfo &);
 3916 bool emitInitElemSint32(uint32_t, const SourceInfo &);
 3917 bool emitInitElemUint32(uint32_t, const SourceInfo &);
 3918 bool emitInitElemSint64(uint32_t, const SourceInfo &);
 3919 bool emitInitElemUint64(uint32_t, const SourceInfo &);
 3920 bool emitInitElemBool(uint32_t, const SourceInfo &);
 3921 bool emitInitElemPtr(uint32_t, const SourceInfo &);
 3924 bool emitInitElem(PrimType, uint32_t, const SourceInfo &I);
 3933 ::emitInitElem(PrimType T0, uint32_t A0, const SourceInfo &I) {
 3960 bool ByteCodeEmitter::emitInitElemSint8(uint32_t A0,const SourceInfo &L) {
 3961 	return emitOp<uint32_t>(OP_InitElemSint8, A0, L);
 3963 bool ByteCodeEmitter::emitInitElemUint8(uint32_t A0,const SourceInfo &L) {
 3964 	return emitOp<uint32_t>(OP_InitElemUint8, A0, L);
 3966 bool ByteCodeEmitter::emitInitElemSint16(uint32_t A0,const SourceInfo &L) {
 3967 	return emitOp<uint32_t>(OP_InitElemSint16, A0, L);
 3969 bool ByteCodeEmitter::emitInitElemUint16(uint32_t A0,const SourceInfo &L) {
 3970 	return emitOp<uint32_t>(OP_InitElemUint16, A0, L);
 3972 bool ByteCodeEmitter::emitInitElemSint32(uint32_t A0,const SourceInfo &L) {
 3973 	return emitOp<uint32_t>(OP_InitElemSint32, A0, L);
 3975 bool ByteCodeEmitter::emitInitElemUint32(uint32_t A0,const SourceInfo &L) {
 3976 	return emitOp<uint32_t>(OP_InitElemUint32, A0, L);
 3978 bool ByteCodeEmitter::emitInitElemSint64(uint32_t A0,const SourceInfo &L) {
 3979 	return emitOp<uint32_t>(OP_InitElemSint64, A0, L);
 3981 bool ByteCodeEmitter::emitInitElemUint64(uint32_t A0,const SourceInfo &L) {
 3982 	return emitOp<uint32_t>(OP_InitElemUint64, A0, L);
 3984 bool ByteCodeEmitter::emitInitElemBool(uint32_t A0,const SourceInfo &L) {
 3985 	return emitOp<uint32_t>(OP_InitElemBool, A0, L);
 3987 bool ByteCodeEmitter::emitInitElemPtr(uint32_t A0,const SourceInfo &L) {
 3988 	return emitOp<uint32_t>(OP_InitElemPtr, A0, L);
 3992 bool EvalEmitter::emitInitElemSint8(uint32_t A0,const SourceInfo &L) {
 3997 bool EvalEmitter::emitInitElemUint8(uint32_t A0,const SourceInfo &L) {
 4002 bool EvalEmitter::emitInitElemSint16(uint32_t A0,const SourceInfo &L) {
 4007 bool EvalEmitter::emitInitElemUint16(uint32_t A0,const SourceInfo &L) {
 4012 bool EvalEmitter::emitInitElemSint32(uint32_t A0,const SourceInfo &L) {
 4017 bool EvalEmitter::emitInitElemUint32(uint32_t A0,const SourceInfo &L) {
 4022 bool EvalEmitter::emitInitElemSint64(uint32_t A0,const SourceInfo &L) {
 4027 bool EvalEmitter::emitInitElemUint64(uint32_t A0,const SourceInfo &L) {
 4032 bool EvalEmitter::emitInitElemBool(uint32_t A0,const SourceInfo &L) {
 4037 bool EvalEmitter::emitInitElemPtr(uint32_t A0,const SourceInfo &L) {
 4057 	auto V0 = PC.read<uint32_t>();
 4063 	auto V0 = PC.read<uint32_t>();
 4069 	auto V0 = PC.read<uint32_t>();
 4075 	auto V0 = PC.read<uint32_t>();
 4081 	auto V0 = PC.read<uint32_t>();
 4087 	auto V0 = PC.read<uint32_t>();
 4093 	auto V0 = PC.read<uint32_t>();
 4099 	auto V0 = PC.read<uint32_t>();
 4105 	auto V0 = PC.read<uint32_t>();
 4111 	auto V0 = PC.read<uint32_t>();
 4120 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4124 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4128 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4132 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4136 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4140 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4144 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4148 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4152 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4156 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4160 bool emitInitElemPopSint8(uint32_t, const SourceInfo &);
 4161 bool emitInitElemPopUint8(uint32_t, const SourceInfo &);
 4162 bool emitInitElemPopSint16(uint32_t, const SourceInfo &);
 4163 bool emitInitElemPopUint16(uint32_t, const SourceInfo &);
 4164 bool emitInitElemPopSint32(uint32_t, const SourceInfo &);
 4165 bool emitInitElemPopUint32(uint32_t, const SourceInfo &);
 4166 bool emitInitElemPopSint64(uint32_t, const SourceInfo &);
 4167 bool emitInitElemPopUint64(uint32_t, const SourceInfo &);
 4168 bool emitInitElemPopBool(uint32_t, const SourceInfo &);
 4169 bool emitInitElemPopPtr(uint32_t, const SourceInfo &);
 4172 bool emitInitElemPop(PrimType, uint32_t, const SourceInfo &I);
 4181 ::emitInitElemPop(PrimType T0, uint32_t A0, const SourceInfo &I) {
 4208 bool ByteCodeEmitter::emitInitElemPopSint8(uint32_t A0,const SourceInfo &L) {
 4209 	return emitOp<uint32_t>(OP_InitElemPopSint8, A0, L);
 4211 bool ByteCodeEmitter::emitInitElemPopUint8(uint32_t A0,const SourceInfo &L) {
 4212 	return emitOp<uint32_t>(OP_InitElemPopUint8, A0, L);
 4214 bool ByteCodeEmitter::emitInitElemPopSint16(uint32_t A0,const SourceInfo &L) {
 4215 	return emitOp<uint32_t>(OP_InitElemPopSint16, A0, L);
 4217 bool ByteCodeEmitter::emitInitElemPopUint16(uint32_t A0,const SourceInfo &L) {
 4218 	return emitOp<uint32_t>(OP_InitElemPopUint16, A0, L);
 4220 bool ByteCodeEmitter::emitInitElemPopSint32(uint32_t A0,const SourceInfo &L) {
 4221 	return emitOp<uint32_t>(OP_InitElemPopSint32, A0, L);
 4223 bool ByteCodeEmitter::emitInitElemPopUint32(uint32_t A0,const SourceInfo &L) {
 4224 	return emitOp<uint32_t>(OP_InitElemPopUint32, A0, L);
 4226 bool ByteCodeEmitter::emitInitElemPopSint64(uint32_t A0,const SourceInfo &L) {
 4227 	return emitOp<uint32_t>(OP_InitElemPopSint64, A0, L);
 4229 bool ByteCodeEmitter::emitInitElemPopUint64(uint32_t A0,const SourceInfo &L) {
 4230 	return emitOp<uint32_t>(OP_InitElemPopUint64, A0, L);
 4232 bool ByteCodeEmitter::emitInitElemPopBool(uint32_t A0,const SourceInfo &L) {
 4233 	return emitOp<uint32_t>(OP_InitElemPopBool, A0, L);
 4235 bool ByteCodeEmitter::emitInitElemPopPtr(uint32_t A0,const SourceInfo &L) {
 4236 	return emitOp<uint32_t>(OP_InitElemPopPtr, A0, L);
 4240 bool EvalEmitter::emitInitElemPopSint8(uint32_t A0,const SourceInfo &L) {
 4245 bool EvalEmitter::emitInitElemPopUint8(uint32_t A0,const SourceInfo &L) {
 4250 bool EvalEmitter::emitInitElemPopSint16(uint32_t A0,const SourceInfo &L) {
 4255 bool EvalEmitter::emitInitElemPopUint16(uint32_t A0,const SourceInfo &L) {
 4260 bool EvalEmitter::emitInitElemPopSint32(uint32_t A0,const SourceInfo &L) {
 4265 bool EvalEmitter::emitInitElemPopUint32(uint32_t A0,const SourceInfo &L) {
 4270 bool EvalEmitter::emitInitElemPopSint64(uint32_t A0,const SourceInfo &L) {
 4275 bool EvalEmitter::emitInitElemPopUint64(uint32_t A0,const SourceInfo &L) {
 4280 bool EvalEmitter::emitInitElemPopBool(uint32_t A0,const SourceInfo &L) {
 4285 bool EvalEmitter::emitInitElemPopPtr(uint32_t A0,const SourceInfo &L) {
 4305 	auto V0 = PC.read<uint32_t>();
 4311 	auto V0 = PC.read<uint32_t>();
 4317 	auto V0 = PC.read<uint32_t>();
 4323 	auto V0 = PC.read<uint32_t>();
 4329 	auto V0 = PC.read<uint32_t>();
 4335 	auto V0 = PC.read<uint32_t>();
 4341 	auto V0 = PC.read<uint32_t>();
 4347 	auto V0 = PC.read<uint32_t>();
 4353 	auto V0 = PC.read<uint32_t>();
 4359 	auto V0 = PC.read<uint32_t>();
 4368 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4372 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4376 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4380 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4384 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4388 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4392 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4396 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4400 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4404 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4408 bool emitInitFieldSint8(uint32_t, const SourceInfo &);
 4409 bool emitInitFieldUint8(uint32_t, const SourceInfo &);
 4410 bool emitInitFieldSint16(uint32_t, const SourceInfo &);
 4411 bool emitInitFieldUint16(uint32_t, const SourceInfo &);
 4412 bool emitInitFieldSint32(uint32_t, const SourceInfo &);
 4413 bool emitInitFieldUint32(uint32_t, const SourceInfo &);
 4414 bool emitInitFieldSint64(uint32_t, const SourceInfo &);
 4415 bool emitInitFieldUint64(uint32_t, const SourceInfo &);
 4416 bool emitInitFieldBool(uint32_t, const SourceInfo &);
 4417 bool emitInitFieldPtr(uint32_t, const SourceInfo &);
 4420 bool emitInitField(PrimType, uint32_t, const SourceInfo &I);
 4429 ::emitInitField(PrimType T0, uint32_t A0, const SourceInfo &I) {
 4456 bool ByteCodeEmitter::emitInitFieldSint8(uint32_t A0,const SourceInfo &L) {
 4457 	return emitOp<uint32_t>(OP_InitFieldSint8, A0, L);
 4459 bool ByteCodeEmitter::emitInitFieldUint8(uint32_t A0,const SourceInfo &L) {
 4460 	return emitOp<uint32_t>(OP_InitFieldUint8, A0, L);
 4462 bool ByteCodeEmitter::emitInitFieldSint16(uint32_t A0,const SourceInfo &L) {
 4463 	return emitOp<uint32_t>(OP_InitFieldSint16, A0, L);
 4465 bool ByteCodeEmitter::emitInitFieldUint16(uint32_t A0,const SourceInfo &L) {
 4466 	return emitOp<uint32_t>(OP_InitFieldUint16, A0, L);
 4468 bool ByteCodeEmitter::emitInitFieldSint32(uint32_t A0,const SourceInfo &L) {
 4469 	return emitOp<uint32_t>(OP_InitFieldSint32, A0, L);
 4471 bool ByteCodeEmitter::emitInitFieldUint32(uint32_t A0,const SourceInfo &L) {
 4472 	return emitOp<uint32_t>(OP_InitFieldUint32, A0, L);
 4474 bool ByteCodeEmitter::emitInitFieldSint64(uint32_t A0,const SourceInfo &L) {
 4475 	return emitOp<uint32_t>(OP_InitFieldSint64, A0, L);
 4477 bool ByteCodeEmitter::emitInitFieldUint64(uint32_t A0,const SourceInfo &L) {
 4478 	return emitOp<uint32_t>(OP_InitFieldUint64, A0, L);
 4480 bool ByteCodeEmitter::emitInitFieldBool(uint32_t A0,const SourceInfo &L) {
 4481 	return emitOp<uint32_t>(OP_InitFieldBool, A0, L);
 4483 bool ByteCodeEmitter::emitInitFieldPtr(uint32_t A0,const SourceInfo &L) {
 4484 	return emitOp<uint32_t>(OP_InitFieldPtr, A0, L);
 4488 bool EvalEmitter::emitInitFieldSint8(uint32_t A0,const SourceInfo &L) {
 4493 bool EvalEmitter::emitInitFieldUint8(uint32_t A0,const SourceInfo &L) {
 4498 bool EvalEmitter::emitInitFieldSint16(uint32_t A0,const SourceInfo &L) {
 4503 bool EvalEmitter::emitInitFieldUint16(uint32_t A0,const SourceInfo &L) {
 4508 bool EvalEmitter::emitInitFieldSint32(uint32_t A0,const SourceInfo &L) {
 4513 bool EvalEmitter::emitInitFieldUint32(uint32_t A0,const SourceInfo &L) {
 4518 bool EvalEmitter::emitInitFieldSint64(uint32_t A0,const SourceInfo &L) {
 4523 bool EvalEmitter::emitInitFieldUint64(uint32_t A0,const SourceInfo &L) {
 4528 bool EvalEmitter::emitInitFieldBool(uint32_t A0,const SourceInfo &L) {
 4533 bool EvalEmitter::emitInitFieldPtr(uint32_t A0,const SourceInfo &L) {
 4553 	auto V0 = PC.read<uint32_t>();
 4559 	auto V0 = PC.read<uint32_t>();
 4565 	auto V0 = PC.read<uint32_t>();
 4571 	auto V0 = PC.read<uint32_t>();
 4577 	auto V0 = PC.read<uint32_t>();
 4583 	auto V0 = PC.read<uint32_t>();
 4589 	auto V0 = PC.read<uint32_t>();
 4595 	auto V0 = PC.read<uint32_t>();
 4601 	auto V0 = PC.read<uint32_t>();
 4607 	auto V0 = PC.read<uint32_t>();
 4616 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4620 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4624 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4628 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4632 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4636 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4640 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4644 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4648 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4652 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4656 bool emitInitFieldActiveSint8(uint32_t, const SourceInfo &);
 4657 bool emitInitFieldActiveUint8(uint32_t, const SourceInfo &);
 4658 bool emitInitFieldActiveSint16(uint32_t, const SourceInfo &);
 4659 bool emitInitFieldActiveUint16(uint32_t, const SourceInfo &);
 4660 bool emitInitFieldActiveSint32(uint32_t, const SourceInfo &);
 4661 bool emitInitFieldActiveUint32(uint32_t, const SourceInfo &);
 4662 bool emitInitFieldActiveSint64(uint32_t, const SourceInfo &);
 4663 bool emitInitFieldActiveUint64(uint32_t, const SourceInfo &);
 4664 bool emitInitFieldActiveBool(uint32_t, const SourceInfo &);
 4665 bool emitInitFieldActivePtr(uint32_t, const SourceInfo &);
 4668 bool emitInitFieldActive(PrimType, uint32_t, const SourceInfo &I);
 4677 ::emitInitFieldActive(PrimType T0, uint32_t A0, const SourceInfo &I) {
 4704 bool ByteCodeEmitter::emitInitFieldActiveSint8(uint32_t A0,const SourceInfo &L) {
 4705 	return emitOp<uint32_t>(OP_InitFieldActiveSint8, A0, L);
 4707 bool ByteCodeEmitter::emitInitFieldActiveUint8(uint32_t A0,const SourceInfo &L) {
 4708 	return emitOp<uint32_t>(OP_InitFieldActiveUint8, A0, L);
 4710 bool ByteCodeEmitter::emitInitFieldActiveSint16(uint32_t A0,const SourceInfo &L) {
 4711 	return emitOp<uint32_t>(OP_InitFieldActiveSint16, A0, L);
 4713 bool ByteCodeEmitter::emitInitFieldActiveUint16(uint32_t A0,const SourceInfo &L) {
 4714 	return emitOp<uint32_t>(OP_InitFieldActiveUint16, A0, L);
 4716 bool ByteCodeEmitter::emitInitFieldActiveSint32(uint32_t A0,const SourceInfo &L) {
 4717 	return emitOp<uint32_t>(OP_InitFieldActiveSint32, A0, L);
 4719 bool ByteCodeEmitter::emitInitFieldActiveUint32(uint32_t A0,const SourceInfo &L) {
 4720 	return emitOp<uint32_t>(OP_InitFieldActiveUint32, A0, L);
 4722 bool ByteCodeEmitter::emitInitFieldActiveSint64(uint32_t A0,const SourceInfo &L) {
 4723 	return emitOp<uint32_t>(OP_InitFieldActiveSint64, A0, L);
 4725 bool ByteCodeEmitter::emitInitFieldActiveUint64(uint32_t A0,const SourceInfo &L) {
 4726 	return emitOp<uint32_t>(OP_InitFieldActiveUint64, A0, L);
 4728 bool ByteCodeEmitter::emitInitFieldActiveBool(uint32_t A0,const SourceInfo &L) {
 4729 	return emitOp<uint32_t>(OP_InitFieldActiveBool, A0, L);
 4731 bool ByteCodeEmitter::emitInitFieldActivePtr(uint32_t A0,const SourceInfo &L) {
 4732 	return emitOp<uint32_t>(OP_InitFieldActivePtr, A0, L);
 4736 bool EvalEmitter::emitInitFieldActiveSint8(uint32_t A0,const SourceInfo &L) {
 4741 bool EvalEmitter::emitInitFieldActiveUint8(uint32_t A0,const SourceInfo &L) {
 4746 bool EvalEmitter::emitInitFieldActiveSint16(uint32_t A0,const SourceInfo &L) {
 4751 bool EvalEmitter::emitInitFieldActiveUint16(uint32_t A0,const SourceInfo &L) {
 4756 bool EvalEmitter::emitInitFieldActiveSint32(uint32_t A0,const SourceInfo &L) {
 4761 bool EvalEmitter::emitInitFieldActiveUint32(uint32_t A0,const SourceInfo &L) {
 4766 bool EvalEmitter::emitInitFieldActiveSint64(uint32_t A0,const SourceInfo &L) {
 4771 bool EvalEmitter::emitInitFieldActiveUint64(uint32_t A0,const SourceInfo &L) {
 4776 bool EvalEmitter::emitInitFieldActiveBool(uint32_t A0,const SourceInfo &L) {
 4781 bool EvalEmitter::emitInitFieldActivePtr(uint32_t A0,const SourceInfo &L) {
 4801 	auto V0 = PC.read<uint32_t>();
 4807 	auto V0 = PC.read<uint32_t>();
 4813 	auto V0 = PC.read<uint32_t>();
 4819 	auto V0 = PC.read<uint32_t>();
 4825 	auto V0 = PC.read<uint32_t>();
 4831 	auto V0 = PC.read<uint32_t>();
 4837 	auto V0 = PC.read<uint32_t>();
 4843 	auto V0 = PC.read<uint32_t>();
 4849 	auto V0 = PC.read<uint32_t>();
 4855 	auto V0 = PC.read<uint32_t>();
 4864 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4868 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4872 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4876 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4880 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4884 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4888 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4892 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4896 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4900 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 4904 bool emitInitGlobalSint8(uint32_t, const SourceInfo &);
 4905 bool emitInitGlobalUint8(uint32_t, const SourceInfo &);
 4906 bool emitInitGlobalSint16(uint32_t, const SourceInfo &);
 4907 bool emitInitGlobalUint16(uint32_t, const SourceInfo &);
 4908 bool emitInitGlobalSint32(uint32_t, const SourceInfo &);
 4909 bool emitInitGlobalUint32(uint32_t, const SourceInfo &);
 4910 bool emitInitGlobalSint64(uint32_t, const SourceInfo &);
 4911 bool emitInitGlobalUint64(uint32_t, const SourceInfo &);
 4912 bool emitInitGlobalBool(uint32_t, const SourceInfo &);
 4913 bool emitInitGlobalPtr(uint32_t, const SourceInfo &);
 4916 bool emitInitGlobal(PrimType, uint32_t, const SourceInfo &I);
 4925 ::emitInitGlobal(PrimType T0, uint32_t A0, const SourceInfo &I) {
 4952 bool ByteCodeEmitter::emitInitGlobalSint8(uint32_t A0,const SourceInfo &L) {
 4953 	return emitOp<uint32_t>(OP_InitGlobalSint8, A0, L);
 4955 bool ByteCodeEmitter::emitInitGlobalUint8(uint32_t A0,const SourceInfo &L) {
 4956 	return emitOp<uint32_t>(OP_InitGlobalUint8, A0, L);
 4958 bool ByteCodeEmitter::emitInitGlobalSint16(uint32_t A0,const SourceInfo &L) {
 4959 	return emitOp<uint32_t>(OP_InitGlobalSint16, A0, L);
 4961 bool ByteCodeEmitter::emitInitGlobalUint16(uint32_t A0,const SourceInfo &L) {
 4962 	return emitOp<uint32_t>(OP_InitGlobalUint16, A0, L);
 4964 bool ByteCodeEmitter::emitInitGlobalSint32(uint32_t A0,const SourceInfo &L) {
 4965 	return emitOp<uint32_t>(OP_InitGlobalSint32, A0, L);
 4967 bool ByteCodeEmitter::emitInitGlobalUint32(uint32_t A0,const SourceInfo &L) {
 4968 	return emitOp<uint32_t>(OP_InitGlobalUint32, A0, L);
 4970 bool ByteCodeEmitter::emitInitGlobalSint64(uint32_t A0,const SourceInfo &L) {
 4971 	return emitOp<uint32_t>(OP_InitGlobalSint64, A0, L);
 4973 bool ByteCodeEmitter::emitInitGlobalUint64(uint32_t A0,const SourceInfo &L) {
 4974 	return emitOp<uint32_t>(OP_InitGlobalUint64, A0, L);
 4976 bool ByteCodeEmitter::emitInitGlobalBool(uint32_t A0,const SourceInfo &L) {
 4977 	return emitOp<uint32_t>(OP_InitGlobalBool, A0, L);
 4979 bool ByteCodeEmitter::emitInitGlobalPtr(uint32_t A0,const SourceInfo &L) {
 4980 	return emitOp<uint32_t>(OP_InitGlobalPtr, A0, L);
 4984 bool EvalEmitter::emitInitGlobalSint8(uint32_t A0,const SourceInfo &L) {
 4989 bool EvalEmitter::emitInitGlobalUint8(uint32_t A0,const SourceInfo &L) {
 4994 bool EvalEmitter::emitInitGlobalSint16(uint32_t A0,const SourceInfo &L) {
 4999 bool EvalEmitter::emitInitGlobalUint16(uint32_t A0,const SourceInfo &L) {
 5004 bool EvalEmitter::emitInitGlobalSint32(uint32_t A0,const SourceInfo &L) {
 5009 bool EvalEmitter::emitInitGlobalUint32(uint32_t A0,const SourceInfo &L) {
 5014 bool EvalEmitter::emitInitGlobalSint64(uint32_t A0,const SourceInfo &L) {
 5019 bool EvalEmitter::emitInitGlobalUint64(uint32_t A0,const SourceInfo &L) {
 5024 bool EvalEmitter::emitInitGlobalBool(uint32_t A0,const SourceInfo &L) {
 5029 bool EvalEmitter::emitInitGlobalPtr(uint32_t A0,const SourceInfo &L) {
 5514 	auto V0 = PC.read<uint32_t>();
 5520 	auto V0 = PC.read<uint32_t>();
 5526 	auto V0 = PC.read<uint32_t>();
 5532 	auto V0 = PC.read<uint32_t>();
 5538 	auto V0 = PC.read<uint32_t>();
 5544 	auto V0 = PC.read<uint32_t>();
 5550 	auto V0 = PC.read<uint32_t>();
 5556 	auto V0 = PC.read<uint32_t>();
 5562 	auto V0 = PC.read<uint32_t>();
 5568 	auto V0 = PC.read<uint32_t>();
 5577 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 5581 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 5585 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 5589 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 5593 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 5597 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 5601 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 5605 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 5609 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 5613 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 5617 bool emitInitThisFieldSint8(uint32_t, const SourceInfo &);
 5618 bool emitInitThisFieldUint8(uint32_t, const SourceInfo &);
 5619 bool emitInitThisFieldSint16(uint32_t, const SourceInfo &);
 5620 bool emitInitThisFieldUint16(uint32_t, const SourceInfo &);
 5621 bool emitInitThisFieldSint32(uint32_t, const SourceInfo &);
 5622 bool emitInitThisFieldUint32(uint32_t, const SourceInfo &);
 5623 bool emitInitThisFieldSint64(uint32_t, const SourceInfo &);
 5624 bool emitInitThisFieldUint64(uint32_t, const SourceInfo &);
 5625 bool emitInitThisFieldBool(uint32_t, const SourceInfo &);
 5626 bool emitInitThisFieldPtr(uint32_t, const SourceInfo &);
 5629 bool emitInitThisField(PrimType, uint32_t, const SourceInfo &I);
 5638 ::emitInitThisField(PrimType T0, uint32_t A0, const SourceInfo &I) {
 5665 bool ByteCodeEmitter::emitInitThisFieldSint8(uint32_t A0,const SourceInfo &L) {
 5666 	return emitOp<uint32_t>(OP_InitThisFieldSint8, A0, L);
 5668 bool ByteCodeEmitter::emitInitThisFieldUint8(uint32_t A0,const SourceInfo &L) {
 5669 	return emitOp<uint32_t>(OP_InitThisFieldUint8, A0, L);
 5671 bool ByteCodeEmitter::emitInitThisFieldSint16(uint32_t A0,const SourceInfo &L) {
 5672 	return emitOp<uint32_t>(OP_InitThisFieldSint16, A0, L);
 5674 bool ByteCodeEmitter::emitInitThisFieldUint16(uint32_t A0,const SourceInfo &L) {
 5675 	return emitOp<uint32_t>(OP_InitThisFieldUint16, A0, L);
 5677 bool ByteCodeEmitter::emitInitThisFieldSint32(uint32_t A0,const SourceInfo &L) {
 5678 	return emitOp<uint32_t>(OP_InitThisFieldSint32, A0, L);
 5680 bool ByteCodeEmitter::emitInitThisFieldUint32(uint32_t A0,const SourceInfo &L) {
 5681 	return emitOp<uint32_t>(OP_InitThisFieldUint32, A0, L);
 5683 bool ByteCodeEmitter::emitInitThisFieldSint64(uint32_t A0,const SourceInfo &L) {
 5684 	return emitOp<uint32_t>(OP_InitThisFieldSint64, A0, L);
 5686 bool ByteCodeEmitter::emitInitThisFieldUint64(uint32_t A0,const SourceInfo &L) {
 5687 	return emitOp<uint32_t>(OP_InitThisFieldUint64, A0, L);
 5689 bool ByteCodeEmitter::emitInitThisFieldBool(uint32_t A0,const SourceInfo &L) {
 5690 	return emitOp<uint32_t>(OP_InitThisFieldBool, A0, L);
 5692 bool ByteCodeEmitter::emitInitThisFieldPtr(uint32_t A0,const SourceInfo &L) {
 5693 	return emitOp<uint32_t>(OP_InitThisFieldPtr, A0, L);
 5697 bool EvalEmitter::emitInitThisFieldSint8(uint32_t A0,const SourceInfo &L) {
 5702 bool EvalEmitter::emitInitThisFieldUint8(uint32_t A0,const SourceInfo &L) {
 5707 bool EvalEmitter::emitInitThisFieldSint16(uint32_t A0,const SourceInfo &L) {
 5712 bool EvalEmitter::emitInitThisFieldUint16(uint32_t A0,const SourceInfo &L) {
 5717 bool EvalEmitter::emitInitThisFieldSint32(uint32_t A0,const SourceInfo &L) {
 5722 bool EvalEmitter::emitInitThisFieldUint32(uint32_t A0,const SourceInfo &L) {
 5727 bool EvalEmitter::emitInitThisFieldSint64(uint32_t A0,const SourceInfo &L) {
 5732 bool EvalEmitter::emitInitThisFieldUint64(uint32_t A0,const SourceInfo &L) {
 5737 bool EvalEmitter::emitInitThisFieldBool(uint32_t A0,const SourceInfo &L) {
 5742 bool EvalEmitter::emitInitThisFieldPtr(uint32_t A0,const SourceInfo &L) {
 5762 	auto V0 = PC.read<uint32_t>();
 5768 	auto V0 = PC.read<uint32_t>();
 5774 	auto V0 = PC.read<uint32_t>();
 5780 	auto V0 = PC.read<uint32_t>();
 5786 	auto V0 = PC.read<uint32_t>();
 5792 	auto V0 = PC.read<uint32_t>();
 5798 	auto V0 = PC.read<uint32_t>();
 5804 	auto V0 = PC.read<uint32_t>();
 5810 	auto V0 = PC.read<uint32_t>();
 5816 	auto V0 = PC.read<uint32_t>();
 5825 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 5829 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 5833 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 5837 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 5841 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 5845 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 5849 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 5853 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 5857 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 5861 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 5865 bool emitInitThisFieldActiveSint8(uint32_t, const SourceInfo &);
 5866 bool emitInitThisFieldActiveUint8(uint32_t, const SourceInfo &);
 5867 bool emitInitThisFieldActiveSint16(uint32_t, const SourceInfo &);
 5868 bool emitInitThisFieldActiveUint16(uint32_t, const SourceInfo &);
 5869 bool emitInitThisFieldActiveSint32(uint32_t, const SourceInfo &);
 5870 bool emitInitThisFieldActiveUint32(uint32_t, const SourceInfo &);
 5871 bool emitInitThisFieldActiveSint64(uint32_t, const SourceInfo &);
 5872 bool emitInitThisFieldActiveUint64(uint32_t, const SourceInfo &);
 5873 bool emitInitThisFieldActiveBool(uint32_t, const SourceInfo &);
 5874 bool emitInitThisFieldActivePtr(uint32_t, const SourceInfo &);
 5877 bool emitInitThisFieldActive(PrimType, uint32_t, const SourceInfo &I);
 5886 ::emitInitThisFieldActive(PrimType T0, uint32_t A0, const SourceInfo &I) {
 5913 bool ByteCodeEmitter::emitInitThisFieldActiveSint8(uint32_t A0,const SourceInfo &L) {
 5914 	return emitOp<uint32_t>(OP_InitThisFieldActiveSint8, A0, L);
 5916 bool ByteCodeEmitter::emitInitThisFieldActiveUint8(uint32_t A0,const SourceInfo &L) {
 5917 	return emitOp<uint32_t>(OP_InitThisFieldActiveUint8, A0, L);
 5919 bool ByteCodeEmitter::emitInitThisFieldActiveSint16(uint32_t A0,const SourceInfo &L) {
 5920 	return emitOp<uint32_t>(OP_InitThisFieldActiveSint16, A0, L);
 5922 bool ByteCodeEmitter::emitInitThisFieldActiveUint16(uint32_t A0,const SourceInfo &L) {
 5923 	return emitOp<uint32_t>(OP_InitThisFieldActiveUint16, A0, L);
 5925 bool ByteCodeEmitter::emitInitThisFieldActiveSint32(uint32_t A0,const SourceInfo &L) {
 5926 	return emitOp<uint32_t>(OP_InitThisFieldActiveSint32, A0, L);
 5928 bool ByteCodeEmitter::emitInitThisFieldActiveUint32(uint32_t A0,const SourceInfo &L) {
 5929 	return emitOp<uint32_t>(OP_InitThisFieldActiveUint32, A0, L);
 5931 bool ByteCodeEmitter::emitInitThisFieldActiveSint64(uint32_t A0,const SourceInfo &L) {
 5932 	return emitOp<uint32_t>(OP_InitThisFieldActiveSint64, A0, L);
 5934 bool ByteCodeEmitter::emitInitThisFieldActiveUint64(uint32_t A0,const SourceInfo &L) {
 5935 	return emitOp<uint32_t>(OP_InitThisFieldActiveUint64, A0, L);
 5937 bool ByteCodeEmitter::emitInitThisFieldActiveBool(uint32_t A0,const SourceInfo &L) {
 5938 	return emitOp<uint32_t>(OP_InitThisFieldActiveBool, A0, L);
 5940 bool ByteCodeEmitter::emitInitThisFieldActivePtr(uint32_t A0,const SourceInfo &L) {
 5941 	return emitOp<uint32_t>(OP_InitThisFieldActivePtr, A0, L);
 5945 bool EvalEmitter::emitInitThisFieldActiveSint8(uint32_t A0,const SourceInfo &L) {
 5950 bool EvalEmitter::emitInitThisFieldActiveUint8(uint32_t A0,const SourceInfo &L) {
 5955 bool EvalEmitter::emitInitThisFieldActiveSint16(uint32_t A0,const SourceInfo &L) {
 5960 bool EvalEmitter::emitInitThisFieldActiveUint16(uint32_t A0,const SourceInfo &L) {
 5965 bool EvalEmitter::emitInitThisFieldActiveSint32(uint32_t A0,const SourceInfo &L) {
 5970 bool EvalEmitter::emitInitThisFieldActiveUint32(uint32_t A0,const SourceInfo &L) {
 5975 bool EvalEmitter::emitInitThisFieldActiveSint64(uint32_t A0,const SourceInfo &L) {
 5980 bool EvalEmitter::emitInitThisFieldActiveUint64(uint32_t A0,const SourceInfo &L) {
 5985 bool EvalEmitter::emitInitThisFieldActiveBool(uint32_t A0,const SourceInfo &L) {
 5990 bool EvalEmitter::emitInitThisFieldActivePtr(uint32_t A0,const SourceInfo &L) {
 8136 	auto V0 = PC.read<uint32_t>();
 8142 	auto V0 = PC.read<uint32_t>();
 8148 	auto V0 = PC.read<uint32_t>();
 8154 	auto V0 = PC.read<uint32_t>();
 8160 	auto V0 = PC.read<uint32_t>();
 8166 	auto V0 = PC.read<uint32_t>();
 8172 	auto V0 = PC.read<uint32_t>();
 8178 	auto V0 = PC.read<uint32_t>();
 8184 	auto V0 = PC.read<uint32_t>();
 8190 	auto V0 = PC.read<uint32_t>();
 8199 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8203 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8207 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8211 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8215 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8219 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8223 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8227 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8231 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8235 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8239 bool emitSetFieldSint8(uint32_t, const SourceInfo &);
 8240 bool emitSetFieldUint8(uint32_t, const SourceInfo &);
 8241 bool emitSetFieldSint16(uint32_t, const SourceInfo &);
 8242 bool emitSetFieldUint16(uint32_t, const SourceInfo &);
 8243 bool emitSetFieldSint32(uint32_t, const SourceInfo &);
 8244 bool emitSetFieldUint32(uint32_t, const SourceInfo &);
 8245 bool emitSetFieldSint64(uint32_t, const SourceInfo &);
 8246 bool emitSetFieldUint64(uint32_t, const SourceInfo &);
 8247 bool emitSetFieldBool(uint32_t, const SourceInfo &);
 8248 bool emitSetFieldPtr(uint32_t, const SourceInfo &);
 8251 bool emitSetField(PrimType, uint32_t, const SourceInfo &I);
 8260 ::emitSetField(PrimType T0, uint32_t A0, const SourceInfo &I) {
 8287 bool ByteCodeEmitter::emitSetFieldSint8(uint32_t A0,const SourceInfo &L) {
 8288 	return emitOp<uint32_t>(OP_SetFieldSint8, A0, L);
 8290 bool ByteCodeEmitter::emitSetFieldUint8(uint32_t A0,const SourceInfo &L) {
 8291 	return emitOp<uint32_t>(OP_SetFieldUint8, A0, L);
 8293 bool ByteCodeEmitter::emitSetFieldSint16(uint32_t A0,const SourceInfo &L) {
 8294 	return emitOp<uint32_t>(OP_SetFieldSint16, A0, L);
 8296 bool ByteCodeEmitter::emitSetFieldUint16(uint32_t A0,const SourceInfo &L) {
 8297 	return emitOp<uint32_t>(OP_SetFieldUint16, A0, L);
 8299 bool ByteCodeEmitter::emitSetFieldSint32(uint32_t A0,const SourceInfo &L) {
 8300 	return emitOp<uint32_t>(OP_SetFieldSint32, A0, L);
 8302 bool ByteCodeEmitter::emitSetFieldUint32(uint32_t A0,const SourceInfo &L) {
 8303 	return emitOp<uint32_t>(OP_SetFieldUint32, A0, L);
 8305 bool ByteCodeEmitter::emitSetFieldSint64(uint32_t A0,const SourceInfo &L) {
 8306 	return emitOp<uint32_t>(OP_SetFieldSint64, A0, L);
 8308 bool ByteCodeEmitter::emitSetFieldUint64(uint32_t A0,const SourceInfo &L) {
 8309 	return emitOp<uint32_t>(OP_SetFieldUint64, A0, L);
 8311 bool ByteCodeEmitter::emitSetFieldBool(uint32_t A0,const SourceInfo &L) {
 8312 	return emitOp<uint32_t>(OP_SetFieldBool, A0, L);
 8314 bool ByteCodeEmitter::emitSetFieldPtr(uint32_t A0,const SourceInfo &L) {
 8315 	return emitOp<uint32_t>(OP_SetFieldPtr, A0, L);
 8319 bool EvalEmitter::emitSetFieldSint8(uint32_t A0,const SourceInfo &L) {
 8324 bool EvalEmitter::emitSetFieldUint8(uint32_t A0,const SourceInfo &L) {
 8329 bool EvalEmitter::emitSetFieldSint16(uint32_t A0,const SourceInfo &L) {
 8334 bool EvalEmitter::emitSetFieldUint16(uint32_t A0,const SourceInfo &L) {
 8339 bool EvalEmitter::emitSetFieldSint32(uint32_t A0,const SourceInfo &L) {
 8344 bool EvalEmitter::emitSetFieldUint32(uint32_t A0,const SourceInfo &L) {
 8349 bool EvalEmitter::emitSetFieldSint64(uint32_t A0,const SourceInfo &L) {
 8354 bool EvalEmitter::emitSetFieldUint64(uint32_t A0,const SourceInfo &L) {
 8359 bool EvalEmitter::emitSetFieldBool(uint32_t A0,const SourceInfo &L) {
 8364 bool EvalEmitter::emitSetFieldPtr(uint32_t A0,const SourceInfo &L) {
 8384 	auto V0 = PC.read<uint32_t>();
 8390 	auto V0 = PC.read<uint32_t>();
 8396 	auto V0 = PC.read<uint32_t>();
 8402 	auto V0 = PC.read<uint32_t>();
 8408 	auto V0 = PC.read<uint32_t>();
 8414 	auto V0 = PC.read<uint32_t>();
 8420 	auto V0 = PC.read<uint32_t>();
 8426 	auto V0 = PC.read<uint32_t>();
 8432 	auto V0 = PC.read<uint32_t>();
 8438 	auto V0 = PC.read<uint32_t>();
 8447 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8451 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8455 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8459 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8463 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8467 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8471 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8475 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8479 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8483 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8487 bool emitSetGlobalSint8(uint32_t, const SourceInfo &);
 8488 bool emitSetGlobalUint8(uint32_t, const SourceInfo &);
 8489 bool emitSetGlobalSint16(uint32_t, const SourceInfo &);
 8490 bool emitSetGlobalUint16(uint32_t, const SourceInfo &);
 8491 bool emitSetGlobalSint32(uint32_t, const SourceInfo &);
 8492 bool emitSetGlobalUint32(uint32_t, const SourceInfo &);
 8493 bool emitSetGlobalSint64(uint32_t, const SourceInfo &);
 8494 bool emitSetGlobalUint64(uint32_t, const SourceInfo &);
 8495 bool emitSetGlobalBool(uint32_t, const SourceInfo &);
 8496 bool emitSetGlobalPtr(uint32_t, const SourceInfo &);
 8499 bool emitSetGlobal(PrimType, uint32_t, const SourceInfo &I);
 8508 ::emitSetGlobal(PrimType T0, uint32_t A0, const SourceInfo &I) {
 8535 bool ByteCodeEmitter::emitSetGlobalSint8(uint32_t A0,const SourceInfo &L) {
 8536 	return emitOp<uint32_t>(OP_SetGlobalSint8, A0, L);
 8538 bool ByteCodeEmitter::emitSetGlobalUint8(uint32_t A0,const SourceInfo &L) {
 8539 	return emitOp<uint32_t>(OP_SetGlobalUint8, A0, L);
 8541 bool ByteCodeEmitter::emitSetGlobalSint16(uint32_t A0,const SourceInfo &L) {
 8542 	return emitOp<uint32_t>(OP_SetGlobalSint16, A0, L);
 8544 bool ByteCodeEmitter::emitSetGlobalUint16(uint32_t A0,const SourceInfo &L) {
 8545 	return emitOp<uint32_t>(OP_SetGlobalUint16, A0, L);
 8547 bool ByteCodeEmitter::emitSetGlobalSint32(uint32_t A0,const SourceInfo &L) {
 8548 	return emitOp<uint32_t>(OP_SetGlobalSint32, A0, L);
 8550 bool ByteCodeEmitter::emitSetGlobalUint32(uint32_t A0,const SourceInfo &L) {
 8551 	return emitOp<uint32_t>(OP_SetGlobalUint32, A0, L);
 8553 bool ByteCodeEmitter::emitSetGlobalSint64(uint32_t A0,const SourceInfo &L) {
 8554 	return emitOp<uint32_t>(OP_SetGlobalSint64, A0, L);
 8556 bool ByteCodeEmitter::emitSetGlobalUint64(uint32_t A0,const SourceInfo &L) {
 8557 	return emitOp<uint32_t>(OP_SetGlobalUint64, A0, L);
 8559 bool ByteCodeEmitter::emitSetGlobalBool(uint32_t A0,const SourceInfo &L) {
 8560 	return emitOp<uint32_t>(OP_SetGlobalBool, A0, L);
 8562 bool ByteCodeEmitter::emitSetGlobalPtr(uint32_t A0,const SourceInfo &L) {
 8563 	return emitOp<uint32_t>(OP_SetGlobalPtr, A0, L);
 8567 bool EvalEmitter::emitSetGlobalSint8(uint32_t A0,const SourceInfo &L) {
 8572 bool EvalEmitter::emitSetGlobalUint8(uint32_t A0,const SourceInfo &L) {
 8577 bool EvalEmitter::emitSetGlobalSint16(uint32_t A0,const SourceInfo &L) {
 8582 bool EvalEmitter::emitSetGlobalUint16(uint32_t A0,const SourceInfo &L) {
 8587 bool EvalEmitter::emitSetGlobalSint32(uint32_t A0,const SourceInfo &L) {
 8592 bool EvalEmitter::emitSetGlobalUint32(uint32_t A0,const SourceInfo &L) {
 8597 bool EvalEmitter::emitSetGlobalSint64(uint32_t A0,const SourceInfo &L) {
 8602 bool EvalEmitter::emitSetGlobalUint64(uint32_t A0,const SourceInfo &L) {
 8607 bool EvalEmitter::emitSetGlobalBool(uint32_t A0,const SourceInfo &L) {
 8612 bool EvalEmitter::emitSetGlobalPtr(uint32_t A0,const SourceInfo &L) {
 8632 	auto V0 = PC.read<uint32_t>();
 8638 	auto V0 = PC.read<uint32_t>();
 8644 	auto V0 = PC.read<uint32_t>();
 8650 	auto V0 = PC.read<uint32_t>();
 8656 	auto V0 = PC.read<uint32_t>();
 8662 	auto V0 = PC.read<uint32_t>();
 8668 	auto V0 = PC.read<uint32_t>();
 8674 	auto V0 = PC.read<uint32_t>();
 8680 	auto V0 = PC.read<uint32_t>();
 8686 	auto V0 = PC.read<uint32_t>();
 8695 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8699 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8703 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8707 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8711 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8715 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8719 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8723 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8727 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8731 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8735 bool emitSetLocalSint8(uint32_t, const SourceInfo &);
 8736 bool emitSetLocalUint8(uint32_t, const SourceInfo &);
 8737 bool emitSetLocalSint16(uint32_t, const SourceInfo &);
 8738 bool emitSetLocalUint16(uint32_t, const SourceInfo &);
 8739 bool emitSetLocalSint32(uint32_t, const SourceInfo &);
 8740 bool emitSetLocalUint32(uint32_t, const SourceInfo &);
 8741 bool emitSetLocalSint64(uint32_t, const SourceInfo &);
 8742 bool emitSetLocalUint64(uint32_t, const SourceInfo &);
 8743 bool emitSetLocalBool(uint32_t, const SourceInfo &);
 8744 bool emitSetLocalPtr(uint32_t, const SourceInfo &);
 8747 bool emitSetLocal(uint32_t, const SourceInfo &);
 8751 bool emitSetLocal(PrimType, uint32_t, const SourceInfo &I);
 8760 ::emitSetLocal(PrimType T0, uint32_t A0, const SourceInfo &I) {
 8837 bool ByteCodeEmitter::emitSetLocalSint8(uint32_t A0,const SourceInfo &L) {
 8838 	return emitOp<uint32_t>(OP_SetLocalSint8, A0, L);
 8840 bool ByteCodeEmitter::emitSetLocalUint8(uint32_t A0,const SourceInfo &L) {
 8841 	return emitOp<uint32_t>(OP_SetLocalUint8, A0, L);
 8843 bool ByteCodeEmitter::emitSetLocalSint16(uint32_t A0,const SourceInfo &L) {
 8844 	return emitOp<uint32_t>(OP_SetLocalSint16, A0, L);
 8846 bool ByteCodeEmitter::emitSetLocalUint16(uint32_t A0,const SourceInfo &L) {
 8847 	return emitOp<uint32_t>(OP_SetLocalUint16, A0, L);
 8849 bool ByteCodeEmitter::emitSetLocalSint32(uint32_t A0,const SourceInfo &L) {
 8850 	return emitOp<uint32_t>(OP_SetLocalSint32, A0, L);
 8852 bool ByteCodeEmitter::emitSetLocalUint32(uint32_t A0,const SourceInfo &L) {
 8853 	return emitOp<uint32_t>(OP_SetLocalUint32, A0, L);
 8855 bool ByteCodeEmitter::emitSetLocalSint64(uint32_t A0,const SourceInfo &L) {
 8856 	return emitOp<uint32_t>(OP_SetLocalSint64, A0, L);
 8858 bool ByteCodeEmitter::emitSetLocalUint64(uint32_t A0,const SourceInfo &L) {
 8859 	return emitOp<uint32_t>(OP_SetLocalUint64, A0, L);
 8861 bool ByteCodeEmitter::emitSetLocalBool(uint32_t A0,const SourceInfo &L) {
 8862 	return emitOp<uint32_t>(OP_SetLocalBool, A0, L);
 8864 bool ByteCodeEmitter::emitSetLocalPtr(uint32_t A0,const SourceInfo &L) {
 8865 	return emitOp<uint32_t>(OP_SetLocalPtr, A0, L);
 8882 	auto V0 = PC.read<uint32_t>();
 8888 	auto V0 = PC.read<uint32_t>();
 8894 	auto V0 = PC.read<uint32_t>();
 8900 	auto V0 = PC.read<uint32_t>();
 8906 	auto V0 = PC.read<uint32_t>();
 8912 	auto V0 = PC.read<uint32_t>();
 8918 	auto V0 = PC.read<uint32_t>();
 8924 	auto V0 = PC.read<uint32_t>();
 8930 	auto V0 = PC.read<uint32_t>();
 8936 	auto V0 = PC.read<uint32_t>();
 8945 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8949 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8953 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8957 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8961 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8965 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8969 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8973 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8977 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8981 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 8985 bool emitSetParamSint8(uint32_t, const SourceInfo &);
 8986 bool emitSetParamUint8(uint32_t, const SourceInfo &);
 8987 bool emitSetParamSint16(uint32_t, const SourceInfo &);
 8988 bool emitSetParamUint16(uint32_t, const SourceInfo &);
 8989 bool emitSetParamSint32(uint32_t, const SourceInfo &);
 8990 bool emitSetParamUint32(uint32_t, const SourceInfo &);
 8991 bool emitSetParamSint64(uint32_t, const SourceInfo &);
 8992 bool emitSetParamUint64(uint32_t, const SourceInfo &);
 8993 bool emitSetParamBool(uint32_t, const SourceInfo &);
 8994 bool emitSetParamPtr(uint32_t, const SourceInfo &);
 8997 bool emitSetParam(PrimType, uint32_t, const SourceInfo &I);
 9006 ::emitSetParam(PrimType T0, uint32_t A0, const SourceInfo &I) {
 9033 bool ByteCodeEmitter::emitSetParamSint8(uint32_t A0,const SourceInfo &L) {
 9034 	return emitOp<uint32_t>(OP_SetParamSint8, A0, L);
 9036 bool ByteCodeEmitter::emitSetParamUint8(uint32_t A0,const SourceInfo &L) {
 9037 	return emitOp<uint32_t>(OP_SetParamUint8, A0, L);
 9039 bool ByteCodeEmitter::emitSetParamSint16(uint32_t A0,const SourceInfo &L) {
 9040 	return emitOp<uint32_t>(OP_SetParamSint16, A0, L);
 9042 bool ByteCodeEmitter::emitSetParamUint16(uint32_t A0,const SourceInfo &L) {
 9043 	return emitOp<uint32_t>(OP_SetParamUint16, A0, L);
 9045 bool ByteCodeEmitter::emitSetParamSint32(uint32_t A0,const SourceInfo &L) {
 9046 	return emitOp<uint32_t>(OP_SetParamSint32, A0, L);
 9048 bool ByteCodeEmitter::emitSetParamUint32(uint32_t A0,const SourceInfo &L) {
 9049 	return emitOp<uint32_t>(OP_SetParamUint32, A0, L);
 9051 bool ByteCodeEmitter::emitSetParamSint64(uint32_t A0,const SourceInfo &L) {
 9052 	return emitOp<uint32_t>(OP_SetParamSint64, A0, L);
 9054 bool ByteCodeEmitter::emitSetParamUint64(uint32_t A0,const SourceInfo &L) {
 9055 	return emitOp<uint32_t>(OP_SetParamUint64, A0, L);
 9057 bool ByteCodeEmitter::emitSetParamBool(uint32_t A0,const SourceInfo &L) {
 9058 	return emitOp<uint32_t>(OP_SetParamBool, A0, L);
 9060 bool ByteCodeEmitter::emitSetParamPtr(uint32_t A0,const SourceInfo &L) {
 9061 	return emitOp<uint32_t>(OP_SetParamPtr, A0, L);
 9065 bool EvalEmitter::emitSetParamSint8(uint32_t A0,const SourceInfo &L) {
 9070 bool EvalEmitter::emitSetParamUint8(uint32_t A0,const SourceInfo &L) {
 9075 bool EvalEmitter::emitSetParamSint16(uint32_t A0,const SourceInfo &L) {
 9080 bool EvalEmitter::emitSetParamUint16(uint32_t A0,const SourceInfo &L) {
 9085 bool EvalEmitter::emitSetParamSint32(uint32_t A0,const SourceInfo &L) {
 9090 bool EvalEmitter::emitSetParamUint32(uint32_t A0,const SourceInfo &L) {
 9095 bool EvalEmitter::emitSetParamSint64(uint32_t A0,const SourceInfo &L) {
 9100 bool EvalEmitter::emitSetParamUint64(uint32_t A0,const SourceInfo &L) {
 9105 bool EvalEmitter::emitSetParamBool(uint32_t A0,const SourceInfo &L) {
 9110 bool EvalEmitter::emitSetParamPtr(uint32_t A0,const SourceInfo &L) {
 9130 	auto V0 = PC.read<uint32_t>();
 9136 	auto V0 = PC.read<uint32_t>();
 9142 	auto V0 = PC.read<uint32_t>();
 9148 	auto V0 = PC.read<uint32_t>();
 9154 	auto V0 = PC.read<uint32_t>();
 9160 	auto V0 = PC.read<uint32_t>();
 9166 	auto V0 = PC.read<uint32_t>();
 9172 	auto V0 = PC.read<uint32_t>();
 9178 	auto V0 = PC.read<uint32_t>();
 9184 	auto V0 = PC.read<uint32_t>();
 9193 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 9197 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 9201 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 9205 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 9209 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 9213 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 9217 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 9221 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 9225 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 9229 	OS << "\t" << PC.read<uint32_t>() << " "<< "\n";
 9233 bool emitSetThisFieldSint8(uint32_t, const SourceInfo &);
 9234 bool emitSetThisFieldUint8(uint32_t, const SourceInfo &);
 9235 bool emitSetThisFieldSint16(uint32_t, const SourceInfo &);
 9236 bool emitSetThisFieldUint16(uint32_t, const SourceInfo &);
 9237 bool emitSetThisFieldSint32(uint32_t, const SourceInfo &);
 9238 bool emitSetThisFieldUint32(uint32_t, const SourceInfo &);
 9239 bool emitSetThisFieldSint64(uint32_t, const SourceInfo &);
 9240 bool emitSetThisFieldUint64(uint32_t, const SourceInfo &);
 9241 bool emitSetThisFieldBool(uint32_t, const SourceInfo &);
 9242 bool emitSetThisFieldPtr(uint32_t, const SourceInfo &);
 9245 bool emitSetThisField(PrimType, uint32_t, const SourceInfo &I);
 9254 ::emitSetThisField(PrimType T0, uint32_t A0, const SourceInfo &I) {
 9281 bool ByteCodeEmitter::emitSetThisFieldSint8(uint32_t A0,const SourceInfo &L) {
 9282 	return emitOp<uint32_t>(OP_SetThisFieldSint8, A0, L);
 9284 bool ByteCodeEmitter::emitSetThisFieldUint8(uint32_t A0,const SourceInfo &L) {
 9285 	return emitOp<uint32_t>(OP_SetThisFieldUint8, A0, L);
 9287 bool ByteCodeEmitter::emitSetThisFieldSint16(uint32_t A0,const SourceInfo &L) {
 9288 	return emitOp<uint32_t>(OP_SetThisFieldSint16, A0, L);
 9290 bool ByteCodeEmitter::emitSetThisFieldUint16(uint32_t A0,const SourceInfo &L) {
 9291 	return emitOp<uint32_t>(OP_SetThisFieldUint16, A0, L);
 9293 bool ByteCodeEmitter::emitSetThisFieldSint32(uint32_t A0,const SourceInfo &L) {
 9294 	return emitOp<uint32_t>(OP_SetThisFieldSint32, A0, L);
 9296 bool ByteCodeEmitter::emitSetThisFieldUint32(uint32_t A0,const SourceInfo &L) {
 9297 	return emitOp<uint32_t>(OP_SetThisFieldUint32, A0, L);
 9299 bool ByteCodeEmitter::emitSetThisFieldSint64(uint32_t A0,const SourceInfo &L) {
 9300 	return emitOp<uint32_t>(OP_SetThisFieldSint64, A0, L);
 9302 bool ByteCodeEmitter::emitSetThisFieldUint64(uint32_t A0,const SourceInfo &L) {
 9303 	return emitOp<uint32_t>(OP_SetThisFieldUint64, A0, L);
 9305 bool ByteCodeEmitter::emitSetThisFieldBool(uint32_t A0,const SourceInfo &L) {
 9306 	return emitOp<uint32_t>(OP_SetThisFieldBool, A0, L);
 9308 bool ByteCodeEmitter::emitSetThisFieldPtr(uint32_t A0,const SourceInfo &L) {
 9309 	return emitOp<uint32_t>(OP_SetThisFieldPtr, A0, L);
 9313 bool EvalEmitter::emitSetThisFieldSint8(uint32_t A0,const SourceInfo &L) {
 9318 bool EvalEmitter::emitSetThisFieldUint8(uint32_t A0,const SourceInfo &L) {
 9323 bool EvalEmitter::emitSetThisFieldSint16(uint32_t A0,const SourceInfo &L) {
 9328 bool EvalEmitter::emitSetThisFieldUint16(uint32_t A0,const SourceInfo &L) {
 9333 bool EvalEmitter::emitSetThisFieldSint32(uint32_t A0,const SourceInfo &L) {
 9338 bool EvalEmitter::emitSetThisFieldUint32(uint32_t A0,const SourceInfo &L) {
 9343 bool EvalEmitter::emitSetThisFieldSint64(uint32_t A0,const SourceInfo &L) {
 9348 bool EvalEmitter::emitSetThisFieldUint64(uint32_t A0,const SourceInfo &L) {
 9353 bool EvalEmitter::emitSetThisFieldBool(uint32_t A0,const SourceInfo &L) {
 9358 bool EvalEmitter::emitSetThisFieldPtr(uint32_t A0,const SourceInfo &L) {

 3407 template <> uint32_t PyLongAsT<uint32_t>(PyObject *obj) {
 3407 template <> uint32_t PyLongAsT<uint32_t>(PyObject *obj) {
 5269   uint32_t arg2 ;
 6137   uint32_t result;
 6160   uint32_t arg2 ;
 6260   uint32_t result;
 6286   uint32_t result;
 6361   uint32_t arg2 ;
 6395   uint32_t arg2 ;
 6432   uint32_t result;
 6458   uint32_t result;
 6533   uint32_t arg2 ;
 6567   uint32_t arg2 ;
 7019   uint32_t result;
 7045   uint32_t result;
 7175   uint32_t result;
 7198   uint32_t arg2 ;
 7233   uint32_t arg2 ;
 7275   uint32_t result;
 7997   uint32_t arg2 ;
 8181   uint32_t result;
 8204   uint32_t arg2 ;
 8241   uint32_t result;
 8452   uint32_t arg2 ;
 8489   uint32_t result;
 9359   uint32_t arg2 ;
 9400   uint32_t result;
10069   uint32_t result;
10095   uint32_t result;
10118   uint32_t arg2 ;
10593   uint32_t arg2 ;
10630   uint32_t result;
11395   uint32_t arg2 ;
11432   uint32_t result;
11643   uint32_t arg2 ;
11680   uint32_t result;
12611   uint32_t arg2 ;
12654   uint32_t arg2 ;
12884   uint32_t arg3 ;
12930   uint32_t arg3 ;
12940   uint32_t result;
13002   uint32_t arg2 ;
13038   uint32_t arg3 ;
14847   uint32_t arg3 ;
14924   uint32_t arg3 ;
17198   uint32_t arg4 ;
17624   uint32_t result;
17647   uint32_t arg2 ;
17682   uint32_t arg2 ;
17683   uint32_t arg3 ;
17697   uint32_t result;
17735   uint32_t arg2 ;
17736   uint32_t arg3 ;
17754   uint32_t result;
17877   uint32_t arg2 ;
17915   uint32_t result;
17938   uint32_t arg2 ;
17953   uint32_t result;
17994   uint32_t arg2 ;
18890   uint32_t result;
19448   uint32_t arg2 ;
19495   uint32_t arg2 ;
19567   uint32_t arg2 ;
19568   uint32_t *arg3 = (uint32_t *) 0 ;
19596       arg3 = (uint32_t *) malloc(size * sizeof(uint32_t));
19639   uint32_t arg2 ;
19711   uint32_t arg2 ;
19783   uint32_t arg2 ;
19956   uint32_t *arg2 = (uint32_t *) 0 ;
19976       arg2 = (uint32_t *) malloc(size * sizeof(uint32_t));
22037   uint32_t arg2 ;
22079   uint32_t result;
22203   uint32_t result;
22355   uint32_t result;
22378   uint32_t arg2 ;
22416   uint32_t result;
22439   uint32_t arg2 ;
23349   uint32_t result;
23372   uint32_t arg2 ;
23843   uint32_t result;
23866   uint32_t arg2 ;
24475   uint32_t result;
24501   uint32_t result;
24604   uint32_t arg2 ;
24638   uint32_t arg2 ;
24987   uint32_t result;
25036   uint32_t arg2 ;
25654   uint32_t arg1 ;
25656   uint32_t arg3 ;
25868   uint32_t result;
27083   uint32_t result;
27106   uint32_t arg2 ;
27214   uint32_t result;
27237   uint32_t arg2 ;
28936   uint32_t result;
29757   uint32_t result;
29918   uint32_t arg2 ;
29933   uint32_t result;
29974   uint32_t arg2 ;
30213   uint32_t result;
30401   uint32_t arg2 ;
32682   uint32_t arg2 ;
32720   uint32_t result;
33966   uint32_t arg3 ;
34311   uint32_t arg2 ;
34894   uint32_t result;
34920   uint32_t result;
34995   uint32_t arg2 ;
35029   uint32_t arg2 ;
35206   uint32_t result;
35229   uint32_t arg2 ;
35334   uint32_t result;
35357   uint32_t arg2 ;
35550   uint32_t result;
35573   uint32_t arg2 ;
35796   uint32_t result;
35819   uint32_t arg2 ;
36442   uint32_t result;
36468   uint32_t result;
36571   uint32_t arg2 ;
36605   uint32_t arg2 ;
37002   uint32_t arg4 ;
37016   uint32_t result;
37061   uint32_t arg4 ;
37075   uint32_t result;
37119   uint32_t arg3 ;
37129   uint32_t result;
37166   uint32_t arg3 ;
37212   uint32_t arg2 ;
37259   uint32_t arg2 ;
37318   uint32_t arg2 ;
37320   uint32_t arg4 ;
37475   uint32_t arg3 ;
37622   uint32_t arg3 ;
38286   uint32_t result;
38309   uint32_t arg2 ;
39115   uint32_t arg3 ;
39202   uint32_t result;
39225   uint32_t arg2 ;
39699   uint32_t arg3 ;
39983   uint32_t arg2 ;
40092   uint32_t arg4 ;
40228   uint32_t result;
40277   uint32_t *arg2 = (uint32_t *) 0 ;
40278   uint32_t arg3 ;
40282   uint32_t result;
40285     arg2 = (uint32_t*)malloc(sizeof(uint32_t) * 50);
40303     uint32_t count = result;
40307     for (uint32_t j = 0; j < count; j++)
42197   uint32_t result;
42220   uint32_t arg2 ;
42806   uint32_t result;
42832   uint32_t result;
42858   uint32_t result;
43143   uint32_t arg3 ;
43289   uint32_t result;
43320   uint32_t arg3 ;
44181   uint32_t arg8 ;
44348   uint32_t result;
44446   uint32_t arg2 ;
44634   uint32_t arg2 ;
44672   uint32_t result;
44695   uint32_t arg2 ;
44837   uint32_t result;
44863   uint32_t result;
45084   uint32_t result;
45115   uint32_t result;
45432   uint32_t arg3 ;
45875   uint32_t result;
45917   uint32_t result;
45975   uint32_t result;
46030   uint32_t arg2 ;
46106   uint32_t result;
46129   uint32_t arg2 ;
46687   uint32_t result;
46713   uint32_t result;
46791   uint32_t result;
46817   uint32_t result;
47213   uint32_t result;
47239   uint32_t result;
47262   uint32_t arg2 ;
47300   uint32_t result;
47323   uint32_t arg2 ;
47361   uint32_t result;
48382   uint32_t result;
48408   uint32_t result;
48629   uint32_t arg3 ;
48630   uint32_t arg4 ;
48631   uint32_t arg5 ;
48718   uint32_t arg3 ;
48719   uint32_t arg4 ;
48720   uint32_t arg5 ;
48721   uint32_t arg6 ;
49760   uint32_t result;
51167   uint32_t result;
52251   uint32_t result;
52274   uint32_t arg2 ;
52759   uint32_t result;
52784   uint32_t arg1 ;
52908   uint32_t arg9 ;
54161   uint32_t result;
54184   uint32_t arg2 ;
54393   uint32_t result;
54445   uint32_t result;
54471   uint32_t result;
54685   uint32_t arg3 ;
54961   uint32_t arg3 ;
55046   uint32_t arg3 ;
55168   uint32_t arg3 ;
55318   uint32_t arg2 ;
55363   uint32_t arg3 ;
55494   uint32_t arg3 ;
55541   uint32_t arg3 ;
55588   uint32_t arg3 ;
55644   uint32_t arg3 ;
55712   uint32_t arg3 ;
55713   uint32_t arg4 ;
56031   uint32_t arg3 ;
56102   uint32_t arg3 ;
56296   uint32_t arg3 ;
56297   uint32_t arg4 ;
56384   uint32_t arg3 ;
56385   uint32_t arg4 ;
56481   uint32_t arg3 ;
56482   uint32_t arg4 ;
57720   uint32_t result;
57743   uint32_t arg2 ;
58458   uint32_t result;
58481   uint32_t arg2 ;
58959   uint32_t arg3 ;
59011   uint32_t arg3 ;
60227   uint32_t arg2 ;
60444   uint32_t result;
60936   uint32_t arg3 ;
61003   uint32_t arg3 ;
61583   uint32_t arg4 ;
61864   uint32_t arg3 ;
62396   uint32_t result;
62419   uint32_t arg2 ;
62480   uint32_t arg2 ;
62837   uint32_t result;
63583   uint32_t arg2 ;
63862   uint32_t arg2 ;
63906   uint32_t arg2 ;
65393   uint32_t result;
65734   uint32_t result;
65757   uint32_t arg2 ;
66663   uint32_t result;
66689   uint32_t result;
66715   uint32_t result;
66738   uint32_t arg2 ;
66773   uint32_t arg2 ;
66808   uint32_t arg2 ;
66950   uint32_t result;
66973   uint32_t arg2 ;
67008   uint32_t arg2 ;
67098   uint32_t result;
67121   uint32_t arg2 ;
67185   uint32_t result;
67424   uint32_t arg2 ;
67462   uint32_t result;
67759   uint32_t arg2 ;
67797   uint32_t result;
67904   uint32_t result;
67930   uint32_t result;
67956   uint32_t result;
67982   uint32_t result;
68005   uint32_t arg2 ;
68040   uint32_t arg2 ;
68075   uint32_t arg2 ;
68110   uint32_t arg2 ;
68317   uint32_t arg2 ;
68352   uint32_t arg2 ;
68387   uint32_t arg2 ;
68422   uint32_t arg2 ;
69432   uint32_t arg2 ;
69470   uint32_t result;
69516   uint32_t arg1 ;
69734   uint32_t result;
69757   uint32_t arg2 ;
69792   uint32_t arg2 ;
69904   uint32_t result;
69927   uint32_t arg2 ;
70130   uint32_t arg2 ;
70191   uint32_t arg2 ;
70542   uint32_t result;
70636   uint32_t arg2 ;
71680   uint32_t arg2 ;
71791   uint32_t arg2 ;
71902   uint32_t arg2 ;
72408   uint32_t result;
72431   uint32_t arg2 ;
72634   uint32_t arg2 ;
72745   uint32_t arg2 ;
73162   uint32_t result;
73185   uint32_t arg2 ;
75096   uint32_t arg2 ;
75131   uint32_t arg2 ;
75249   uint32_t arg3 ;
75698   uint32_t result;
75986   uint32_t result;
76009   uint32_t arg2 ;
76016   uint32_t result;
76504   uint32_t arg2 ;
76505   uint32_t arg3 ;
76548   uint32_t arg2 ;
77493   uint32_t result;
77516   uint32_t arg2 ;
78673   uint32_t result;
78699   uint32_t result;
78722   uint32_t arg2 ;
79996     uint32_t max
80043     uint32_t idx

  599     uint64_t SizeInBits, uint32_t AlignInBits, LLVMMetadataRef *Elements,
  622     uint64_t SizeInBits, uint32_t AlignInBits, LLVMDIFlags Flags,
  638                              uint32_t AlignInBits, LLVMMetadataRef Ty,
  653                               uint32_t AlignInBits, LLVMMetadataRef Ty,
  695     uint64_t SizeInBits, uint32_t AlignInBits, unsigned AddressSpace,
  719     uint64_t SizeInBits, uint32_t AlignInBits, LLVMDIFlags Flags,
  741     uint64_t SizeInBits, uint32_t AlignInBits, uint64_t OffsetInBits,
  763     uint32_t AlignInBits);
  779                                      uint32_t AlignInBits,
  799                             uint64_t SizeInBits, uint32_t AlignInBits,
  893                                uint64_t BaseOffset, uint32_t VBPtrOffset,
  915     unsigned RuntimeLang, uint64_t SizeInBits, uint32_t AlignInBits,
  939     unsigned RuntimeLang, uint64_t SizeInBits, uint32_t AlignInBits,
  992     uint32_t AlignInBits, uint64_t OffsetInBits, LLVMDIFlags Flags,
 1038 uint32_t LLVMDITypeGetAlignInBits(LLVMMetadataRef DType);
 1119     LLVMMetadataRef Expr, LLVMMetadataRef Decl, uint32_t AlignInBits);
 1211     LLVMMetadataRef Decl, uint32_t AlignInBits);
 1291     LLVMBool AlwaysPreserve, LLVMDIFlags Flags, uint32_t AlignInBits);

   69 extern uint32_t LLVMRemarkStringGetLen(LLVMRemarkStringRef String);
   91 extern uint32_t LLVMRemarkDebugLocGetSourceLine(LLVMRemarkDebugLocRef DL);
   98 extern uint32_t LLVMRemarkDebugLocGetSourceColumn(LLVMRemarkDebugLocRef DL);
  203 extern uint32_t LLVMRemarkEntryGetNumArgs(LLVMRemarkEntryRef Remark);
  334 extern uint32_t LLVMRemarkVersion(void);

   30   explicit APSInt(uint32_t BitWidth, bool isUnsigned = true)
   98   APSInt trunc(uint32_t width) const {
  102   APSInt extend(uint32_t width) const {
  109   APSInt extOrTrunc(uint32_t width) const {
  287   static APSInt getMaxValue(uint32_t numBits, bool Unsigned) {
  294   static APSInt getMinValue(uint32_t numBits, bool Unsigned) {

  775   void setBitsInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) {
  781   void clearBitsInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) {
  787   void setBitsNotInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) {
  793   void clearBitsNotInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) {
  812   void wordShl(uint32_t Count) {
  816     uint32_t NumWords = NumBitWords(Size);
  832   void wordShr(uint32_t Count) {
  836     uint32_t NumWords = NumBitWords(Size);
  899   void applyMask(const uint32_t *Mask, unsigned MaskWords) {
  908         uint32_t M = *Mask++;
  916       uint32_t M = *Mask++;

   31   uint32_t Size;
   32   uint32_t Hash;
   39   CachedHashStringRef(StringRef S, uint32_t Hash)
   46   uint32_t size() const { return Size; }
   47   uint32_t hash() const { return Hash; }
   76   uint32_t Size;
   77   uint32_t Hash;
  104   CachedHashString(StringRef S, uint32_t Hash)
  137   uint32_t size() const { return Size; }
  138   uint32_t hash() const { return Hash; }

  152 inline uint32_t fetch32(const char *p) {
  153   uint32_t result;
  193   uint32_t y = static_cast<uint32_t>(a) + (static_cast<uint32_t>(b) << 8);
  194   uint32_t z = static_cast<uint32_t>(len) + (static_cast<uint32_t>(c) << 2);

  234   uint32_t digest = 0;
  235   uint32_t refCount = 0;
  296   static uint32_t computeDigest(ImutAVLTree *L, ImutAVLTree *R,
  298     uint32_t digest = 0;
  314   uint32_t computeDigest() {
  320     uint32_t X = computeDigest(getLeft(), getRight(), getValue());

  631   void setBitsInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) {
  640   void clearBitsInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) {
  649   void setBitsNotInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) {
  658   void clearBitsNotInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) {
  667   void applyMask(const uint32_t *Mask, unsigned MaskWords) {

  183     using IndexType = uint32_t;
  187     BlockNode() : Index(std::numeric_limits<uint32_t>::max()) {}
  200        return std::numeric_limits<uint32_t>::max() - 1;
  221     uint32_t NumHeaders = 1;     ///< Number of headers.
  617   SmallDenseMap<uint32_t, IrrNode *, 4> Lookup;
  662     for (uint32_t Index = 0; Index < BFI.Working.size(); ++Index)
 1163     DenseSet<uint32_t> HeadersWithoutWeight;
 1165     for (uint32_t H = 0; H < Loop.NumHeaders; ++H) {
 1195     for (uint32_t H : HeadersWithoutWeight) {
 1303 inline uint32_t getWeightFromBranchProb(const BranchProbability Prob) {
 1452     uint32_t N = BP.getNumerator();
 1453     uint32_t D = BP.getDenominator();

  177   static const uint32_t DEFAULT_WEIGHT = 16;

   38   uint32_t getProfitablePromotionCandidates(const Instruction *Inst,
   39                                             uint32_t NumVals,
   61   getPromotionCandidatesForInstruction(const Instruction *I, uint32_t &NumVals,
   63                                        uint32_t &NumCandidates);

  813   uint32_t GetMinTrailingZeros(const SCEV *S);
 1187   DenseMap<const SCEV *, uint32_t> MinTrailingZerosCache;
 1193   uint32_t GetMinTrailingZerosImpl(const SCEV *S);

  384   InterleaveGroup(uint32_t Factor, bool Reverse, Align Alignment)
  398   uint32_t getFactor() const { return Factor; }
  399   uint32_t getAlignment() const { return Alignment.value(); }
  400   uint32_t getNumMembers() const { return Members.size(); }
  447   InstTy *getMember(uint32_t Index) const {
  458   uint32_t getIndex(const InstTy *Instr) const {
  496   uint32_t Factor; // Interleave Factor.

   68   uint32_t TimeDateStamp;
   69   uint32_t PointerToSymbolTable;
   70   uint32_t NumberOfSymbols;
   82   uint32_t TimeDateStamp;
   84   uint32_t unused1;
   85   uint32_t unused2;
   86   uint32_t unused3;
   87   uint32_t unused4;
   88   uint32_t NumberOfSections;
   89   uint32_t PointerToSymbolTable;
   90   uint32_t NumberOfSymbols;
  189   uint32_t Value;
  272   uint32_t VirtualSize;
  273   uint32_t VirtualAddress;
  274   uint32_t SizeOfRawData;
  275   uint32_t PointerToRawData;
  276   uint32_t PointerToRelocations;
  277   uint32_t PointerToLineNumbers;
  280   uint32_t Characteristics;
  283 enum SectionCharacteristics : uint32_t {
  325   uint32_t VirtualAddress;
  326   uint32_t SymbolTableIndex;
  417   uint32_t TagIndex;
  418   uint32_t TotalSize;
  419   uint32_t PointerToLinenumber;
  420   uint32_t PointerToNextFunction;
  428   uint32_t PointerToNextFunction;
  433   uint32_t TagIndex;
  434   uint32_t Characteristics;
  445   uint32_t Length;
  448   uint32_t CheckSum;
  449   uint32_t Number;
  457   uint32_t SymbolTableIndex;
  472   uint32_t ImportLookupTableRVA;
  473   uint32_t TimeDateStamp;
  474   uint32_t ForwarderChain;
  475   uint32_t NameRVA;
  476   uint32_t ImportAddressTableRVA;
  488   uint32_t data;
  506   uint32_t getHintNameRVA() const {
  512   void setHintNameRVA(uint32_t rva) { data = rva; }
  535   uint32_t AddressOfNewExeHeader;
  544   uint32_t SizeOfCode;
  545   uint32_t SizeOfInitializedData;
  546   uint32_t SizeOfUninitializedData;
  547   uint32_t AddressOfEntryPoint; // RVA
  548   uint32_t BaseOfCode;          // RVA
  549   uint32_t BaseOfData;          // RVA
  550   uint32_t ImageBase;
  551   uint32_t SectionAlignment;
  552   uint32_t FileAlignment;
  559   uint32_t Win32VersionValue;
  560   uint32_t SizeOfImage;
  561   uint32_t SizeOfHeaders;
  562   uint32_t CheckSum;
  566   uint32_t SizeOfStackReserve;
  567   uint32_t SizeOfStackCommit;
  568   uint32_t SizeOfHeapReserve;
  569   uint32_t SizeOfHeapCommit;
  570   uint32_t LoaderFlags;
  572   uint32_t NumberOfRvaAndSize;
  576   uint32_t RelativeVirtualAddress;
  577   uint32_t Size;
  705   uint32_t TimeDateStamp;
  706   uint32_t SizeOfData;

   43 enum LLVMConstants : uint32_t {
   75 const uint32_t DW_CIE_ID = UINT32_MAX;
   80 const uint32_t DW_INVALID_OFFSET = UINT32_MAX;

   28 using Elf32_Addr = uint32_t; // Program address
   29 using Elf32_Off = uint32_t;  // File offset
   31 using Elf32_Word = uint32_t;
   37 using Elf64_Word = uint32_t;