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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc 6538 static_cast<AArch64Operand&>(*Operands[OpIdx]).addLogicalImmOperands<int64_t>(Inst, 1);
6565 static_cast<AArch64Operand&>(*Operands[OpIdx]).addLogicalImmNotOperands<int64_t>(Inst, 1);
9138 DiagnosticPredicate DP(Operand.isLogicalImm<int64_t>());
9147 DiagnosticPredicate DP(Operand.isLogicalImm<int64_t>());
9591 DiagnosticPredicate DP(Operand.isSVEAddSubImm<int64_t>());
9627 DiagnosticPredicate DP(Operand.isSVECpyImm<int64_t>());
11042 DiagnosticPredicate DP(Operand.isSVEPreferredLogicalImm<int64_t>());
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc12527 printLogicalImm<int64_t>(MI, 1, STI, O);
12537 printImm8OptLsl<int64_t>(MI, 1, STI, O);
12913 printImm8OptLsl<int64_t>(MI, 3, STI, O);
13413 printLogicalImm<int64_t>(MI, 2, STI, O);
13431 printImm8OptLsl<int64_t>(MI, 2, STI, O);
26801 printLogicalImm<int64_t>(MI, OpIdx, STI, OS);
26837 printImm8OptLsl<int64_t>(MI, OpIdx, STI, OS);
26855 printSVELogicalImm<int64_t>(MI, OpIdx, STI, OS);
26964 int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64);
26972 int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64);
26980 int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64);
26995 int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64);
27004 int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64);
27013 int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64);
27014 return AArch64_AM::isSVEMaskOfIdenticalElements<int64_t>(Val) &&
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc13506 printLogicalImm<int64_t>(MI, 1, STI, O);
13516 printImm8OptLsl<int64_t>(MI, 1, STI, O);
13792 printImm8OptLsl<int64_t>(MI, 3, STI, O);
14251 printLogicalImm<int64_t>(MI, 2, STI, O);
14269 printImm8OptLsl<int64_t>(MI, 2, STI, O);
27517 printLogicalImm<int64_t>(MI, OpIdx, STI, OS);
27553 printImm8OptLsl<int64_t>(MI, OpIdx, STI, OS);
27571 printSVELogicalImm<int64_t>(MI, OpIdx, STI, OS);
27680 int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64);
27688 int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64);
27696 int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64);
27711 int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64);
27720 int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64);
27729 int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64);
27730 return AArch64_AM::isSVEMaskOfIdenticalElements<int64_t>(Val) &&
gen/lib/Target/AArch64/AArch64GenDAGISel.inc114605 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114610 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114616 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114622 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114678 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114680 int64_t Imm64 = static_cast<int64_t>(Imm);
114687 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114694 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114702 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114710 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114718 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114823 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114838 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114845 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114852 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114860 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114867 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114874 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114882 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114889 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114936 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
114941 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
115069 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
115076 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
115083 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
115090 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
115387 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
gen/lib/Target/AArch64/AArch64GenFastISel.inc 11 static bool Predicate_imm0_31(int64_t Imm) {
16 static bool Predicate_imm0_63(int64_t Imm) {
21 static bool Predicate_imm32_0_31(int64_t Imm) {
26 static bool Predicate_tbz_imm0_31_diag(int64_t Imm) {
31 static bool Predicate_tbz_imm32_63(int64_t Imm) {
36 static bool Predicate_VectorIndexD(int64_t Imm) {
39 static bool Predicate_VectorIndexS(int64_t Imm) {
42 static bool Predicate_VectorIndexH(int64_t Imm) {
45 static bool Predicate_VectorIndexB(int64_t Imm) {
48 static bool Predicate_imm0_255(int64_t Imm) {
53 static bool Predicate_vecshiftL64(int64_t Imm) {
58 static bool Predicate_vecshiftL32(int64_t Imm) {
63 static bool Predicate_vecshiftR64(int64_t Imm) {
68 static bool Predicate_vecshiftL8(int64_t Imm) {
73 static bool Predicate_vecshiftL16(int64_t Imm) {
78 static bool Predicate_vecshiftR8(int64_t Imm) {
83 static bool Predicate_vecshiftR16(int64_t Imm) {
88 static bool Predicate_vecshiftR32(int64_t Imm) {
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc 21 bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override;
24 const int64_t *getMatchTable() const override;
325 bool AArch64InstructionSelector::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const {
393 return AArch64_AM::isSVEAddSubImm<int64_t>(Imm);
421 return AArch64_AM::isSVECpyImm<int64_t>(Imm);
529 int64_t Imm64 = static_cast<int64_t>(Imm);
1036 const int64_t *AArch64InstructionSelector::getMatchTable() const {
1037 constexpr static int64_t MatchTable0[] = {
gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc78692 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
gen/lib/Target/AMDGPU/AMDGPUGenGlobalISel.inc 21 bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override;
24 const int64_t *getMatchTable() const override;
327 bool AMDGPUInstructionSelector::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const {
455 const int64_t *AMDGPUInstructionSelector::getMatchTable() const {
456 constexpr static int64_t MatchTable0[] = {
gen/lib/Target/ARC/ARCGenDAGISel.inc 1196 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
gen/lib/Target/ARM/ARMGenDAGISel.inc54002 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54009 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54014 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54019 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54026 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54040 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54047 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54054 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54061 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54074 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54108 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54156 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54171 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54245 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54252 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54259 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54266 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54454 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54461 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54466 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54707 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54712 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54717 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54747 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54845 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54850 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
54855 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
gen/lib/Target/ARM/ARMGenFastISel.inc 11 static bool Predicate_mod_imm(int64_t Imm) {
16 static bool Predicate_imm0_65535(int64_t Imm) {
21 static bool Predicate_imm0_7(int64_t Imm) {
26 static bool Predicate_imm8_255(int64_t Imm) {
31 static bool Predicate_imm0_255(int64_t Imm) {
34 static bool Predicate_t2_so_imm(int64_t Imm) {
39 static bool Predicate_imm0_4095(int64_t Imm) {
44 static bool Predicate_imm1_31(int64_t Imm) {
47 static bool Predicate_imm0_31(int64_t Imm) {
52 static bool Predicate_shr_imm8(int64_t Imm) {
55 static bool Predicate_shr_imm16(int64_t Imm) {
58 static bool Predicate_shr_imm32(int64_t Imm) {
61 static bool Predicate_VectorIndex32(int64_t Imm) {
66 static bool Predicate_t2_so_imm_neg(int64_t Imm) {
71 static bool Predicate_imm0_15(int64_t Imm) {
gen/lib/Target/ARM/ARMGenGlobalISel.inc 21 bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override;
24 const int64_t *getMatchTable() const override;
480 bool ARMInstructionSelector::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const {
824 const int64_t *ARMInstructionSelector::getMatchTable() const {
825 constexpr static int64_t MatchTable0[] = {
gen/lib/Target/AVR/AVRGenDAGISel.inc 1681 int64_t val = -N->getSExtValue();
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc72423 int64_t V = N->getSExtValue();
72468 int64_t v = (int64_t)N->getSExtValue();
72771 int64_t v = (int64_t)(64 - N->getSExtValue());
72780 int64_t v = (int64_t)(128 - N->getSExtValue());
72792 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
72874 int64_t V = N->getSExtValue();
73109 int64_t V = N->getSExtValue();
gen/lib/Target/MSP430/MSP430GenDAGISel.inc 4821 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
4827 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
gen/lib/Target/Mips/MipsGenDAGISel.inc30118 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30217 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30222 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30235 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30242 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30249 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30255 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30260 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30266 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30272 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30289 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30294 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30299 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30354 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30367 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30378 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30385 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30390 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30403 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30411 int64_t Val = N->getSExtValue();
30425 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
30433 int64_t SVal = N->getSExtValue();
gen/lib/Target/Mips/MipsGenFastISel.inc 11 static bool Predicate_immZExt5(int64_t Imm) {
14 static bool Predicate_immZExt6(int64_t Imm) {
17 static bool Predicate_immSExt6(int64_t Imm) {
20 static bool Predicate_immZExt4Ptr(int64_t Imm) {
23 static bool Predicate_immZExt3Ptr(int64_t Imm) {
26 static bool Predicate_immZExt2Ptr(int64_t Imm) {
29 static bool Predicate_immZExt1Ptr(int64_t Imm) {
32 static bool Predicate_immZExt4(int64_t Imm) {
35 static bool Predicate_immSExtAddiur2(int64_t Imm) {
40 static bool Predicate_immSExtAddius5(int64_t Imm) {
43 static bool Predicate_immZExtAndi16(int64_t Imm) {
48 static bool Predicate_immZExt2Shift(int64_t Imm) {
gen/lib/Target/Mips/MipsGenGlobalISel.inc 21 bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override;
24 const int64_t *getMatchTable() const override;
407 bool MipsInstructionSelector::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const {
649 const int64_t *MipsInstructionSelector::getMatchTable() const {
650 constexpr static int64_t MatchTable0[] = {
gen/lib/Target/PowerPC/PPCGenDAGISel.inc44263 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
44272 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
44281 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
44290 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
44470 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
44477 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
gen/lib/Target/PowerPC/PPCGenFastISel.inc 11 static bool Predicate_imm32SExt16(int64_t Imm) {
18 static bool Predicate_imm64SExt16(int64_t Imm) {
25 static bool Predicate_immSExt5NonZero(int64_t Imm) {
gen/lib/Target/RISCV/RISCVGenAsmWriter.inc 2817 int64_t Imm;
2825 int64_t Imm;
2833 int64_t Imm;
gen/lib/Target/RISCV/RISCVGenCompressInstEmitter.inc 22 int64_t Imm;
30 int64_t Imm;
38 int64_t Imm;
46 int64_t Imm;
54 int64_t Imm;
63 int64_t Imm;
71 int64_t Imm;
79 int64_t Imm;
87 int64_t Imm;
95 int64_t Imm;
103 int64_t Imm;
112 int64_t Imm;
913 int64_t Imm;
921 int64_t Imm;
929 int64_t Imm;
937 int64_t Imm;
945 int64_t Imm;
gen/lib/Target/RISCV/RISCVGenDAGISel.inc13813 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
13962 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
13967 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
13976 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
13985 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
13990 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
gen/lib/Target/RISCV/RISCVGenGlobalISel.inc 21 bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override;
24 const int64_t *getMatchTable() const override;
133 bool RISCVInstructionSelector::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const {
295 const int64_t *RISCVInstructionSelector::getMatchTable() const {
296 constexpr static int64_t MatchTable0[] = {
gen/lib/Target/Sparc/SparcGenDAGISel.inc 3587 int64_t Imm = N->getSExtValue();
gen/lib/Target/WebAssembly/WebAssemblyGenDAGISel.inc21213 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
21218 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
21353 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
21358 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
21363 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
21368 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
21373 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
gen/lib/Target/WebAssembly/WebAssemblyGenFastISel.inc 11 static bool Predicate_ImmI8(int64_t Imm) {
14 static bool Predicate_ImmI16(int64_t Imm) {
17 static bool Predicate_LaneIdx4(int64_t Imm) {
20 static bool Predicate_LaneIdx2(int64_t Imm) {
23 static bool Predicate_LaneIdx32(int64_t Imm) {
26 static bool Predicate_LaneIdx16(int64_t Imm) {
29 static bool Predicate_LaneIdx8(int64_t Imm) {
gen/lib/Target/X86/X86GenDAGISel.inc253693 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
253936 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
253959 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
253966 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
253986 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
254005 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
254012 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
254019 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
254145 int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue();
gen/lib/Target/X86/X86GenFastISel.inc 11 static bool Predicate_i64immSExt32(int64_t Imm) {
14 static bool Predicate_AndMask64(int64_t Imm) {
19 static bool Predicate_BTRMask64(int64_t Imm) {
24 static bool Predicate_BTCBTSMask64(int64_t Imm) {
29 static bool Predicate_i16immSExt8(int64_t Imm) {
32 static bool Predicate_i32immSExt8(int64_t Imm) {
35 static bool Predicate_i64immSExt8(int64_t Imm) {
gen/lib/Target/X86/X86GenGlobalISel.inc 21 bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override;
24 const int64_t *getMatchTable() const override;
631 bool X86InstructionSelector::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const {
788 const int64_t *X86InstructionSelector::getMatchTable() const {
789 constexpr static int64_t MatchTable0[] = {
gen/projects/openmp/runtime/src/omp-tools.h 412 typedef int64_t ompd_word_t;
908 int64_t offset_in_file,
gen/tools/clang/lib/AST/Opcodes.inc 538 auto V0 = PC.read<int64_t>();
547 OS << "\t" << PC.read<int64_t>() << " "<< "\n";
551 bool emitConstSint64(int64_t, const SourceInfo &);
554 bool ByteCodeEmitter::emitConstSint64(int64_t A0,const SourceInfo &L) {
555 return emitOp<int64_t>(OP_ConstSint64, A0, L);
559 bool EvalEmitter::emitConstSint64(int64_t A0,const SourceInfo &L) {
gen/tools/lldb/scripts/LLDBWrapPython.cpp 3411 template <> int64_t PyLongAsT<int64_t>(PyObject *obj) {
3411 template <> int64_t PyLongAsT<int64_t>(PyObject *obj) {
19125 int64_t result;
19640 int64_t *arg3 = (int64_t *) 0 ;
19668 arg3 = (int64_t *) malloc(size * sizeof(int64_t));
20019 int64_t *arg2 = (int64_t *) 0 ;
20039 arg2 = (int64_t *) malloc(size * sizeof(int64_t));
22828 int64_t state_type_value = py_int.GetInteger() ;
22882 int64_t state_type_value = py_int.GetInteger() ;
22919 int64_t state_type_value = py_int.GetInteger() ;
54590 int64_t arg3 ;
69057 int64_t result;
73821 int64_t arg3 ;
73831 int64_t result;
73874 int64_t result;
73990 int64_t arg2 ;
73997 int64_t result;
74028 int64_t result;
80093 int64_t retval = int_result.GetInteger();
include/llvm-c/DebugInfo.h 579 int64_t Value,
1063 int64_t LowerBound,
1064 int64_t Count);
1084 int64_t *Addr, size_t Length);
1094 int64_t Value);
include/llvm/ADT/APInt.h 956 int64_t SExtVAL = SignExtend64(U.VAL, BitWidth);
1059 APInt sdiv(int64_t RHS) const;
1077 int64_t srem(int64_t RHS) const;
1077 int64_t srem(int64_t RHS) const;
1093 static void sdivrem(const APInt &LHS, int64_t RHS, APInt &Quotient,
1094 int64_t &Remainder);
1215 bool slt(int64_t RHS) const {
1285 bool sgt(int64_t RHS) const {
1320 bool sge(int64_t RHS) const { return !slt(RHS); }
1587 int64_t getSExtValue() const {
include/llvm/ADT/APSInt.h 93 int64_t getExtValue() const {
176 bool operator==(int64_t RHS) const {
179 bool operator!=(int64_t RHS) const {
182 bool operator<=(int64_t RHS) const {
185 bool operator>=(int64_t RHS) const {
188 bool operator<(int64_t RHS) const {
191 bool operator>(int64_t RHS) const {
331 static APSInt get(int64_t X) { return APSInt(APInt(64, X), false); }
339 inline bool operator==(int64_t V1, const APSInt &V2) { return V2 == V1; }
340 inline bool operator!=(int64_t V1, const APSInt &V2) { return V2 != V1; }
341 inline bool operator<=(int64_t V1, const APSInt &V2) { return V2 >= V1; }
342 inline bool operator>=(int64_t V1, const APSInt &V2) { return V2 <= V1; }
343 inline bool operator<(int64_t V1, const APSInt &V2) { return V2 > V1; }
344 inline bool operator>(int64_t V1, const APSInt &V2) { return V2 < V1; }
include/llvm/ADT/StringExtras.h 238 inline std::string itostr(int64_t X) {
include/llvm/Analysis/AliasAnalysisEvaluator.h 34 int64_t FunctionCount;
35 int64_t NoAliasCount, MayAliasCount, PartialAliasCount, MustAliasCount;
36 int64_t NoModRefCount, ModCount, RefCount, ModRefCount;
37 int64_t MustCount, MustRefCount, MustModCount, MustModRefCount;
include/llvm/Analysis/LoopAccessAnalysis.h 693 int64_t getPtrStride(PredicatedScalarEvolution &PSE, Value *Ptr, const Loop *Lp,
include/llvm/Analysis/LoopCacheAnalysis.h 30 using CacheCostTy = int64_t;
include/llvm/Analysis/MemoryDependenceAnalysis.h 479 int64_t MemLocOffs,
include/llvm/Analysis/TargetTransformInfo.h 535 bool isLegalAddImmediate(int64_t Imm) const;
541 bool isLegalICmpImmediate(int64_t Imm) const;
549 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
550 bool HasBaseReg, int64_t Scale,
620 int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
621 bool HasBaseReg, int64_t Scale,
1198 virtual bool isLegalAddImmediate(int64_t Imm) = 0;
1199 virtual bool isLegalICmpImmediate(int64_t Imm) = 0;
1201 int64_t BaseOffset, bool HasBaseReg,
1202 int64_t Scale,
1225 int64_t BaseOffset, bool HasBaseReg,
1226 int64_t Scale, unsigned AddrSpace) = 0;
1468 bool isLegalAddImmediate(int64_t Imm) override {
1471 bool isLegalICmpImmediate(int64_t Imm) override {
1474 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
1475 bool HasBaseReg, int64_t Scale,
1533 int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
1534 bool HasBaseReg, int64_t Scale,
include/llvm/Analysis/TargetTransformInfoImpl.h 215 bool isLegalAddImmediate(int64_t Imm) { return false; }
217 bool isLegalICmpImmediate(int64_t Imm) { return false; }
219 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
220 bool HasBaseReg, int64_t Scale,
278 int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
279 bool HasBaseReg, int64_t Scale, unsigned AddrSpace) {
674 int64_t MergeDistance) {
743 int64_t Scale = 0;
767 int64_t ElementSize = DL.getTypeAllocSize(GTI.getIndexedType());
include/llvm/Analysis/ValueTracking.h 244 inline Value *GetPointerBaseWithConstantOffset(Value *Ptr, int64_t &Offset,
255 GetPointerBaseWithConstantOffset(const Value *Ptr, int64_t &Offset,
676 Optional<int64_t> isPointerOffset(const Value *Ptr1, const Value *Ptr2,
include/llvm/Analysis/VectorUtils.h 614 StrideDescriptor(int64_t Stride, const SCEV *Scev, uint64_t Size,
619 int64_t Stride = 0;
include/llvm/BinaryFormat/ELF.h 40 using Elf64_Sxword = int64_t;
392 static inline int64_t decodePPC64LocalEntryOffset(unsigned Other) {
396 static inline unsigned encodePPC64LocalEntryOffset(int64_t Offset) {
include/llvm/BinaryFormat/MsgPackDocument.h 55 int64_t Int;
78 int64_t &getInt() {
98 int64_t getInt() const {
275 DocNode getNode(int64_t V) {
include/llvm/BinaryFormat/MsgPackReader.h 79 int64_t Int;
include/llvm/BinaryFormat/MsgPackWriter.h 70 void write(int64_t i);
include/llvm/BinaryFormat/Wasm.h 78 int64_t Int64;
80 int64_t Float64;
168 int64_t Addend; // A value to add to the symbol.
include/llvm/CodeGen/AsmPrinter.h 475 void printOffset(int64_t Offset, raw_ostream &OS) const;
520 void EmitSLEB128(int64_t Value, const char *Desc = nullptr) const;
include/llvm/CodeGen/BasicTTIImpl.h 229 bool isLegalAddImmediate(int64_t imm) {
233 bool isLegalICmpImmediate(int64_t imm) {
237 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
238 bool HasBaseReg, int64_t Scale,
264 int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
265 bool HasBaseReg, int64_t Scale, unsigned AddrSpace) {
include/llvm/CodeGen/DFAPacketizer.h 73 using DFAStateInput = int64_t;
include/llvm/CodeGen/DIE.h 57 int64_t Value = 0;
62 DIEAbbrevData(dwarf::Attribute A, int64_t V)
69 int64_t getValue() const { return Value; }
114 void AddImplicitConstAttribute(dwarf::Attribute Attribute, int64_t Value) {
172 const int64_t SignedInt = Int;
include/llvm/CodeGen/DebugHandlerBase.h 37 SmallVector<int64_t, 1> LoadChain;
include/llvm/CodeGen/GlobalISel/CSEInfo.h 185 const GISelInstProfileBuilder &addNodeIDImmediate(int64_t Imm) const;
include/llvm/CodeGen/GlobalISel/CallLowering.h 128 virtual Register getStackAddress(uint64_t Size, int64_t Offset,
include/llvm/CodeGen/GlobalISel/InstructionSelector.h 451 const int64_t *MatchTable, const TargetInstrInfo &TII,
456 virtual const int64_t *getMatchTable() const {
460 virtual bool testImmPredicate_I64(unsigned, int64_t) const {
487 bool isOperandImmEqual(const MachineOperand &MO, int64_t Value,
include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h 52 const int64_t *MatchTable, const TargetInstrInfo &TII,
75 int64_t MatcherOpcode = MatchTable[CurrentIdx++];
85 int64_t NewInsnID = MatchTable[CurrentIdx++];
86 int64_t InsnID = MatchTable[CurrentIdx++];
87 int64_t OpIdx = MatchTable[CurrentIdx++];
125 int64_t ExpectedBitsetID = MatchTable[CurrentIdx++];
139 int64_t InsnID = MatchTable[CurrentIdx++];
140 int64_t Expected = MatchTable[CurrentIdx++];
157 int64_t InsnID = MatchTable[CurrentIdx++];
158 int64_t LowerBound = MatchTable[CurrentIdx++];
159 int64_t UpperBound = MatchTable[CurrentIdx++];
160 int64_t Default = MatchTable[CurrentIdx++];
163 const int64_t Opcode = State.MIs[InsnID]->getOpcode();
184 int64_t InsnID = MatchTable[CurrentIdx++];
185 int64_t OpIdx = MatchTable[CurrentIdx++];
186 int64_t LowerBound = MatchTable[CurrentIdx++];
187 int64_t UpperBound = MatchTable[CurrentIdx++];
188 int64_t Default = MatchTable[CurrentIdx++];
213 const int64_t TypeID = TyI->second;
228 int64_t InsnID = MatchTable[CurrentIdx++];
229 int64_t Expected = MatchTable[CurrentIdx++];
241 int64_t InsnID = MatchTable[CurrentIdx++];
242 int64_t Predicate = MatchTable[CurrentIdx++];
251 int64_t Value = 0;
265 int64_t InsnID = MatchTable[CurrentIdx++];
266 int64_t Predicate = MatchTable[CurrentIdx++];
287 int64_t InsnID = MatchTable[CurrentIdx++];
288 int64_t Predicate = MatchTable[CurrentIdx++];
306 int64_t InsnID = MatchTable[CurrentIdx++];
307 int64_t Predicate = MatchTable[CurrentIdx++];
321 int64_t InsnID = MatchTable[CurrentIdx++];
338 int64_t InsnID = MatchTable[CurrentIdx++];
356 int64_t InsnID = MatchTable[CurrentIdx++];
374 int64_t InsnID = MatchTable[CurrentIdx++];
375 int64_t MMOIdx = MatchTable[CurrentIdx++];
413 int64_t InsnID = MatchTable[CurrentIdx++];
414 int64_t MMOIdx = MatchTable[CurrentIdx++];
437 int64_t InsnID = MatchTable[CurrentIdx++];
438 int64_t MMOIdx = MatchTable[CurrentIdx++];
468 int64_t InsnID = MatchTable[CurrentIdx++];
469 int64_t MMOIdx = MatchTable[CurrentIdx++];
470 int64_t OpIdx = MatchTable[CurrentIdx++];
518 int64_t InsnID = MatchTable[CurrentIdx++];
519 int64_t OpIdx = MatchTable[CurrentIdx++];
520 int64_t TypeID = MatchTable[CurrentIdx++];
535 int64_t InsnID = MatchTable[CurrentIdx++];
536 int64_t OpIdx = MatchTable[CurrentIdx++];
537 int64_t SizeInBits = MatchTable[CurrentIdx++];
566 int64_t InsnID = MatchTable[CurrentIdx++];
567 int64_t OpIdx = MatchTable[CurrentIdx++];
568 int64_t RCEnum = MatchTable[CurrentIdx++];
585 int64_t InsnID = MatchTable[CurrentIdx++];
586 int64_t OpIdx = MatchTable[CurrentIdx++];
587 int64_t RendererID = MatchTable[CurrentIdx++];
588 int64_t ComplexPredicateID = MatchTable[CurrentIdx++];
609 int64_t InsnID = MatchTable[CurrentIdx++];
610 int64_t OpIdx = MatchTable[CurrentIdx++];
611 int64_t Value = MatchTable[CurrentIdx++];
634 int64_t InsnID = MatchTable[CurrentIdx++];
635 int64_t OpIdx = MatchTable[CurrentIdx++];
636 int64_t Value = MatchTable[CurrentIdx++];
651 int64_t InsnID = MatchTable[CurrentIdx++];
652 int64_t OpIdx = MatchTable[CurrentIdx++];
653 int64_t Value = MatchTable[CurrentIdx++];
666 int64_t InsnID = MatchTable[CurrentIdx++];
667 int64_t OpIdx = MatchTable[CurrentIdx++];
668 int64_t Value = MatchTable[CurrentIdx++];
681 int64_t InsnID = MatchTable[CurrentIdx++];
682 int64_t OpIdx = MatchTable[CurrentIdx++];
694 int64_t InsnID = MatchTable[CurrentIdx++];
695 int64_t OpIdx = MatchTable[CurrentIdx++];
707 int64_t InsnID = MatchTable[CurrentIdx++];
719 int64_t InsnID = MatchTable[CurrentIdx++];
720 int64_t OpIdx = MatchTable[CurrentIdx++];
721 int64_t OtherInsnID = MatchTable[CurrentIdx++];
722 int64_t OtherOpIdx = MatchTable[CurrentIdx++];
744 int64_t OldInsnID = MatchTable[CurrentIdx++];
746 int64_t NewOpcode = MatchTable[CurrentIdx++];
762 int64_t Opcode = MatchTable[CurrentIdx++];
775 int64_t NewInsnID = MatchTable[CurrentIdx++];
776 int64_t OldInsnID = MatchTable[CurrentIdx++];
777 int64_t OpIdx = MatchTable[CurrentIdx++];
788 int64_t NewInsnID = MatchTable[CurrentIdx++];
789 int64_t OldInsnID = MatchTable[CurrentIdx++];
790 int64_t OpIdx = MatchTable[CurrentIdx++];
791 int64_t ZeroReg = MatchTable[CurrentIdx++];
806 int64_t NewInsnID = MatchTable[CurrentIdx++];
807 int64_t OldInsnID = MatchTable[CurrentIdx++];
808 int64_t OpIdx = MatchTable[CurrentIdx++];
809 int64_t SubRegIdx = MatchTable[CurrentIdx++];
821 int64_t InsnID = MatchTable[CurrentIdx++];
822 int64_t RegNum = MatchTable[CurrentIdx++];
832 int64_t InsnID = MatchTable[CurrentIdx++];
833 int64_t RegNum = MatchTable[CurrentIdx++];
843 int64_t InsnID = MatchTable[CurrentIdx++];
844 int64_t RegNum = MatchTable[CurrentIdx++];
856 int64_t InsnID = MatchTable[CurrentIdx++];
857 int64_t TempRegID = MatchTable[CurrentIdx++];
869 int64_t InsnID = MatchTable[CurrentIdx++];
870 int64_t Imm = MatchTable[CurrentIdx++];
880 int64_t InsnID = MatchTable[CurrentIdx++];
881 int64_t RendererID = MatchTable[CurrentIdx++];
891 int64_t InsnID = MatchTable[CurrentIdx++];
892 int64_t RendererID = MatchTable[CurrentIdx++];
893 int64_t RenderOpID = MatchTable[CurrentIdx++];
905 int64_t NewInsnID = MatchTable[CurrentIdx++];
906 int64_t OldInsnID = MatchTable[CurrentIdx++];
924 int64_t NewInsnID = MatchTable[CurrentIdx++];
925 int64_t OldInsnID = MatchTable[CurrentIdx++];
940 int64_t InsnID = MatchTable[CurrentIdx++];
941 int64_t OldInsnID = MatchTable[CurrentIdx++];
942 int64_t RendererFnID = MatchTable[CurrentIdx++];
953 int64_t InsnID = MatchTable[CurrentIdx++];
954 int64_t OpIdx = MatchTable[CurrentIdx++];
955 int64_t RCEnum = MatchTable[CurrentIdx++];
967 int64_t InsnID = MatchTable[CurrentIdx++];
979 int64_t InsnID = MatchTable[CurrentIdx++];
985 int64_t MergeInsnID = GIU_MergeMemOperands_EndOfList;
998 int64_t InsnID = MatchTable[CurrentIdx++];
1009 int64_t TempRegID = MatchTable[CurrentIdx++];
1010 int64_t TypeID = MatchTable[CurrentIdx++];
1021 int64_t RuleID = MatchTable[CurrentIdx++];
include/llvm/CodeGen/GlobalISel/MIPatternMatch.h 44 int64_t &CR;
45 ConstantMatch(int64_t &C) : CR(C) {}
55 inline ConstantMatch m_ICst(int64_t &Cst) { return ConstantMatch(Cst); }
include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h 125 int64_t Imm;
140 SrcOp(int64_t V) : Imm(V), Ty(SrcType::Ty_Imm) {}
194 int64_t getImm() const {
683 MachineInstrBuilder buildConstant(const DstOp &Res, int64_t Val);
include/llvm/CodeGen/GlobalISel/Utils.h 113 Optional<int64_t> getConstantVRegVal(unsigned VReg,
118 int64_t Value;
include/llvm/CodeGen/MIRYamlMapping.h 213 int64_t Offset = 0;
219 Optional<int64_t> LocalOffset;
279 int64_t Offset = 0;
include/llvm/CodeGen/MachineFrameInfo.h 126 int64_t SPOffset;
184 StackObject(uint64_t Size, Align Alignment, int64_t SPOffset,
300 SmallVector<std::pair<int, int64_t>, 32> LocalFrameObjects;
303 int64_t LocalFrameSize = 0;
399 void mapLocalFrameObject(int ObjectIndex, int64_t Offset) {
405 std::pair<int, int64_t> getLocalFrameObjectMap(int i) const {
412 int64_t getLocalFrameObjectCount() const { return LocalFrameObjects.size(); }
415 void setLocalFrameSize(int64_t sz) { LocalFrameSize = sz; }
418 int64_t getLocalFrameSize() const { return LocalFrameSize; }
450 int64_t getObjectSize(int ObjectIdx) const {
457 void setObjectSize(int ObjectIdx, int64_t Size) {
491 int64_t getObjectOffset(int ObjectIdx) const {
525 void setObjectOffset(int ObjectIdx, int64_t SPOffset) {
648 int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable,
653 int CreateFixedSpillStackObject(uint64_t Size, int64_t SPOffset,
include/llvm/CodeGen/MachineFunction.h 767 int64_t Offset, uint64_t Size);
include/llvm/CodeGen/MachineInstrBuilder.h 122 const MachineInstrBuilder &addImm(int64_t Val) const {
155 const MachineInstrBuilder &addTargetIndex(unsigned Idx, int64_t Offset = 0,
169 int64_t Offset = 0,
182 int64_t Offset = 0,
275 const MachineInstrBuilder &addDisp(const MachineOperand &Disp, int64_t off,
include/llvm/CodeGen/MachineMemOperand.h 43 int64_t Offset;
49 explicit MachinePointerInfo(const Value *v, int64_t offset = 0,
55 explicit MachinePointerInfo(const PseudoSourceValue *v, int64_t offset = 0,
67 int64_t offset = 0,
78 MachinePointerInfo getWithOffset(int64_t O) const {
101 int64_t Offset = 0);
110 static MachinePointerInfo getStack(MachineFunction &MF, int64_t Offset,
216 int64_t getOffset() const { return PtrInfo.Offset; }
288 void setOffset(int64_t NewOffset) { PtrInfo.Offset = NewOffset; }
include/llvm/CodeGen/MachineOperand.h 170 int64_t ImmVal; // For MO_Immediate.
202 static_assert(alignof(MachineOperand) <= alignof(int64_t),
207 alignTo<alignof(int64_t)>(2 * sizeof(unsigned) +
266 static void printOperandOffset(raw_ostream &OS, int64_t Offset);
530 int64_t getImm() const {
593 int64_t getOffset() const {
648 void setImm(int64_t immVal) {
663 void setOffset(int64_t Offset) {
721 void ChangeToImmediate(int64_t ImmVal);
732 void ChangeToGA(const GlobalValue *GV, int64_t Offset,
742 void ChangeToTargetIndex(unsigned Idx, int64_t Offset,
756 static MachineOperand CreateImm(int64_t Val) {
819 static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset,
833 static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset,
849 static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset,
include/llvm/CodeGen/MachinePipeliner.h 149 DenseMap<SUnit *, std::pair<unsigned, int64_t>> InstrChanges;
270 DenseMap<SUnit *, std::pair<unsigned, int64_t>>::iterator It =
306 int64_t &NewOffset);
include/llvm/CodeGen/ModuloSchedule.h 155 using InstrChangesTy = DenseMap<MachineInstr *, std::pair<unsigned, int64_t>>;
include/llvm/CodeGen/SelectionDAG.h 640 int64_t offset = 0, bool isTargetGA = false,
643 int64_t offset = 0, unsigned TargetFlags = 0) {
670 SDValue getTargetIndex(int Index, EVT VT, int64_t Offset = 0,
688 SDValue getBlockAddress(const BlockAddress *BA, EVT VT, int64_t Offset = 0,
691 int64_t Offset = 0, unsigned TargetFlags = 0) {
846 SDValue getObjectPtrOffset(const SDLoc &SL, SDValue Op, int64_t Offset) {
1069 int FrameIndex, int64_t Size, int64_t Offset = -1);
1069 int FrameIndex, int64_t Size, int64_t Offset = -1);
include/llvm/CodeGen/SelectionDAGAddressAnalysis.h 36 Optional<int64_t> Offset;
43 BaseIndexOffset(SDValue Base, SDValue Index, int64_t Offset,
58 int64_t &Off) const;
62 int64_t Off;
68 bool contains(const SelectionDAG &DAG, int64_t BitSize,
69 const BaseIndexOffset &Other, int64_t OtherBitSize,
70 int64_t &BitOffset) const;
72 bool contains(const SelectionDAG &DAG, int64_t BitSize,
73 const BaseIndexOffset &Other, int64_t OtherBitSize) const {
74 int64_t BitOffset;
81 const Optional<int64_t> NumBytes0,
83 const Optional<int64_t> NumBytes1,
include/llvm/CodeGen/SelectionDAGISel.h 255 int64_t DesiredMaskS) const;
257 int64_t DesiredMaskS) const;
include/llvm/CodeGen/SelectionDAGNodes.h 1344 int64_t getSrcValueOffset() const { return MMO->getOffset(); }
1589 int64_t getSExtValue() const { return Value->getSExtValue(); }
1726 int64_t Offset;
1730 const GlobalValue *GA, EVT VT, int64_t o,
1735 int64_t getOffset() const { return Offset; }
1771 int64_t Size;
1772 int64_t Offset; // -1 if offset is unknown.
1775 SDVTList VTs, int64_t Size, int64_t Offset)
1775 SDVTList VTs, int64_t Size, int64_t Offset)
1778 int64_t getFrameIndex() const {
1783 int64_t getOffset() const {
1787 int64_t getSize() const {
1888 int64_t Offset;
1891 TargetIndexSDNode(int Idx, EVT VT, int64_t Ofs, unsigned TF)
1897 int64_t getOffset() const { return Offset; }
2087 int64_t Offset;
2091 int64_t o, unsigned Flags)
2097 int64_t getOffset() const { return Offset; }
include/llvm/CodeGen/StackMaps.h 207 int64_t Offset = 0;
210 Location(LocationType Type, unsigned Size, unsigned Reg, int64_t Offset)
include/llvm/CodeGen/TargetInstrInfo.h 188 int64_t getFrameSize(const MachineInstr &I) const {
197 int64_t getFrameTotalSize(const MachineInstr &I) const {
531 int64_t BrOffset) const {
548 int64_t BrOffset = 0,
1195 int64_t &Offset1,
1196 int64_t &Offset2) const {
1209 int64_t Offset1, int64_t Offset2,
1209 int64_t Offset1, int64_t Offset2,
1218 int64_t &Offset,
include/llvm/CodeGen/TargetLowering.h 2192 int64_t BaseOffs = 0;
2194 int64_t Scale = 0;
2230 virtual bool isLegalICmpImmediate(int64_t) const {
2237 virtual bool isLegalAddImmediate(int64_t) const {
2243 virtual bool isLegalStoreImmediate(int64_t Value) const {
3305 isGAPlusOffset(SDNode *N, const GlobalValue* &GA, int64_t &Offset) const;
include/llvm/CodeGen/TargetLoweringObjectFileImpl.h 132 const MCValue &MV, int64_t Offset,
include/llvm/CodeGen/TargetRegisterInfo.h 872 virtual int64_t getFrameIndexInstrOffset(const MachineInstr *MI,
881 virtual bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const {
889 int64_t Offset) const {
897 int64_t Offset) const {
904 int64_t Offset) const {
include/llvm/DebugInfo/CodeView/CodeViewRecordIO.h 132 Error mapEncodedInteger(int64_t &Value, const Twine &Comment = "");
218 void emitEncodedSignedInteger(const int64_t &Value,
222 Error writeEncodedSignedInteger(const int64_t &Value);
include/llvm/DebugInfo/DIContext.h 124 Optional<int64_t> FrameOffset;
include/llvm/DebugInfo/DWARF/DWARFAbbreviationDeclaration.h 30 AttributeSpec(dwarf::Attribute A, dwarf::Form F, int64_t Value)
65 int64_t Value;
73 int64_t getImplicitConstValue() const {
82 Optional<int64_t> getByteSize(const DWARFUnit &U) const;
include/llvm/DebugInfo/DWARF/DWARFDebugFrame.h 62 CFIProgram(uint64_t CodeAlignmentFactor, int64_t DataAlignmentFactor,
80 const int64_t DataAlignmentFactor;
136 int64_t DataAlign, Triple::ArchType Arch)
192 int64_t getDataAlignmentFactor() const { return DataAlignmentFactor; }
212 const int64_t DataAlignmentFactor;
229 FDE(uint64_t Offset, uint64_t Length, int64_t LinkedCIEOffset,
include/llvm/DebugInfo/DWARF/DWARFFormValue.h 44 ValueType(int64_t V) : sval(V) {}
50 int64_t sval;
67 static DWARFFormValue createFromSValue(dwarf::Form F, int64_t V);
113 Optional<int64_t> getAsSignedConstant() const;
240 inline Optional<int64_t> toSigned(const Optional<DWARFFormValue> &V) {
252 inline int64_t toSigned(const Optional<DWARFFormValue> &V, int64_t Default) {
252 inline int64_t toSigned(const Optional<DWARFFormValue> &V, int64_t Default) {
include/llvm/DebugInfo/GSYM/FileWriter.h 67 void writeSLEB(int64_t Value);
include/llvm/DebugInfo/PDB/PDBTypes.h 419 explicit Variant(int64_t V) : Type(PDB_VariantType::Int64) {
456 int64_t Int64;
include/llvm/DebugInfo/Symbolize/DIPrinter.h 41 void printContext(const std::string &FileName, int64_t Line);
include/llvm/Demangle/MicrosoftDemangle.h 187 int64_t demangleSigned(StringView &MangledName);
include/llvm/Demangle/MicrosoftDemangleNodes.h 547 std::array<int64_t, 3> ThunkOffsets;
include/llvm/ExecutionEngine/JITLink/JITLink.h 69 using AddendT = int64_t;
include/llvm/IR/Constants.h 118 static ConstantInt *getSigned(IntegerType *Ty, int64_t V);
119 static Constant *getSigned(Type *Ty, int64_t V);
156 inline int64_t getSExtValue() const {
185 static bool isValueValidForType(Type *Ty, int64_t V);
include/llvm/IR/DIBuilder.h 180 DIEnumerator *createEnumerator(StringRef Name, int64_t Val, bool IsUnsigned = false);
565 DISubrange *getOrCreateSubrange(int64_t Lo, int64_t Count);
565 DISubrange *getOrCreateSubrange(int64_t Lo, int64_t Count);
566 DISubrange *getOrCreateSubrange(int64_t Lo, Metadata *CountNode);
638 DIExpression *createExpression(ArrayRef<int64_t> Addr);
include/llvm/IR/DataLayout.h 555 int64_t getIndexedOffsetInType(Type *ElemTy, ArrayRef<Value *> Indices) const;
include/llvm/IR/DebugInfoMetadata.h 290 int64_t LowerBound;
293 int64_t LowerBound, ArrayRef<Metadata *> Ops)
299 static DISubrange *getImpl(LLVMContext &Context, int64_t Count,
300 int64_t LowerBound, StorageType Storage,
304 int64_t LowerBound, StorageType Storage,
320 int64_t getLowerBound() const { return LowerBound; }
351 int64_t Value;
352 DIEnumerator(LLVMContext &C, StorageType Storage, int64_t Value,
360 static DIEnumerator *getImpl(LLVMContext &Context, int64_t Value,
366 static DIEnumerator *getImpl(LLVMContext &Context, int64_t Value,
382 int64_t getValue() const { return Value; }
2472 static void appendOffset(SmallVectorImpl<uint64_t> &Ops, int64_t Offset);
2476 bool extractIfOffset(int64_t &Offset) const;
2496 int64_t Offset = 0);
include/llvm/IR/LegacyPassManagers.h 422 Pass *P, Module &M, int64_t Delta, unsigned CountBefore,
include/llvm/MC/ConstantPools.h 47 std::map<int64_t, const MCSymbolRefExpr *> CachedEntries;
include/llvm/MC/MCAsmMacro.h 78 AsmToken(TokenKind Kind, StringRef Str, int64_t IntVal = 0)
115 int64_t getIntVal() const {
include/llvm/MC/MCDisassembler/MCDisassembler.h 111 int64_t Value,
115 void tryAddingPcLoadReferenceComment(int64_t Value, uint64_t Address) const;
include/llvm/MC/MCDisassembler/MCExternalSymbolizer.h 48 int64_t Value, uint64_t Address, bool IsBranch,
51 int64_t Value,
include/llvm/MC/MCDisassembler/MCSymbolizer.h 68 int64_t Value, uint64_t Address,
76 int64_t Value,
include/llvm/MC/MCDwarf.h 382 int64_t LineDelta, uint64_t AddrDelta, raw_ostream &OS);
388 int64_t LineDelta, uint64_t AddrDelta,
393 int64_t LineDelta, uint64_t AddrDelta);
include/llvm/MC/MCELFStreamer.h 70 void EmitValueToAlignment(unsigned, int64_t, unsigned, unsigned) override;
include/llvm/MC/MCExpr.h 49 bool evaluateAsAbsolute(int64_t &Res, const MCAssembler *Asm,
90 bool evaluateAsAbsolute(int64_t &Res, const MCAsmLayout &Layout,
92 bool evaluateAsAbsolute(int64_t &Res) const;
93 bool evaluateAsAbsolute(int64_t &Res, const MCAssembler &Asm) const;
94 bool evaluateAsAbsolute(int64_t &Res, const MCAssembler *Asm) const;
95 bool evaluateAsAbsolute(int64_t &Res, const MCAsmLayout &Layout) const;
97 bool evaluateKnownAbsolute(int64_t &Res, const MCAsmLayout &Layout) const;
132 int64_t Value;
135 explicit MCConstantExpr(int64_t Value)
138 MCConstantExpr(int64_t Value, bool PrintInHex)
146 static const MCConstantExpr *create(int64_t Value, MCContext &Ctx,
153 int64_t getValue() const { return Value; }
include/llvm/MC/MCFragment.h 301 int64_t Value;
311 MCAlignFragment(unsigned Alignment, int64_t Value, unsigned ValueSize,
321 int64_t getValue() const { return Value; }
522 int64_t LineDelta;
529 MCDwarfLineAddrFragment(int64_t LineDelta, const MCExpr &AddrDelta,
537 int64_t getLineDelta() const { return LineDelta; }
include/llvm/MC/MCInst.h 47 int64_t ImmVal;
75 int64_t getImm() const {
80 void setImm(int64_t Val) {
122 static MCOperand createImm(int64_t Val) {
153 bool evaluateAsConstantImm(int64_t &Imm) const;
include/llvm/MC/MCInstBuilder.h 37 MCInstBuilder &addImm(int64_t Val) {
include/llvm/MC/MCInstPrinter.h 97 format_object<int64_t> formatImm(int64_t Value) const {
97 format_object<int64_t> formatImm(int64_t Value) const {
102 format_object<int64_t> formatDec(int64_t Value) const;
102 format_object<int64_t> formatDec(int64_t Value) const;
103 format_object<int64_t> formatHex(int64_t Value) const;
103 format_object<int64_t> formatHex(int64_t Value) const;
include/llvm/MC/MCInstrDesc.h 194 int64_t DeprecatedFeature;
include/llvm/MC/MCObjectStreamer.h 128 void EmitValueToAlignment(unsigned ByteAlignment, int64_t Value = 0,
143 void EmitDwarfAdvanceLineAddr(int64_t LineDelta, const MCSymbol *LastLabel,
176 void emitFill(const MCExpr &NumValues, int64_t Size, int64_t Expr,
176 void emitFill(const MCExpr &NumValues, int64_t Size, int64_t Expr,
include/llvm/MC/MCParser/MCAsmParser.h 45 int64_t EnumVal;
67 void setEnum(int64_t enumVal) {
235 bool parseIntToken(int64_t &V, const Twine &ErrMsg);
284 virtual bool parseAbsoluteExpression(int64_t &Res) = 0;
include/llvm/MC/MCParser/MCTargetAsmParser.h 64 int64_t Imm;
73 IntelExpr(int64_t imm, bool needBracs) : IntelExpr(needBracs) {
78 IntelExpr(StringRef reg, int64_t imm = 0, unsigned scale = 0,
87 int64_t imm = 0, bool needBracs = true) :
110 int64_t Val;
115 AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len = 0, int64_t val = 0)
include/llvm/MC/MCStreamer.h 142 int64_t Offset = 0);
143 virtual void emitMovSP(unsigned Reg, int64_t Offset = 0);
144 virtual void emitPad(int64_t Offset);
147 virtual void emitUnwindRaw(int64_t StackOffset,
545 virtual void EmitCOFFImgRel32(MCSymbol const *Symbol, int64_t Offset);
663 void EmitSLEB128IntValue(int64_t Value);
734 virtual void emitFill(const MCExpr &NumValues, int64_t Size, int64_t Expr,
734 virtual void emitFill(const MCExpr &NumValues, int64_t Size, int64_t Expr,
758 virtual void EmitValueToAlignment(unsigned ByteAlignment, int64_t Value = 0,
923 virtual void EmitCFIDefCfa(int64_t Register, int64_t Offset);
923 virtual void EmitCFIDefCfa(int64_t Register, int64_t Offset);
924 virtual void EmitCFIDefCfaOffset(int64_t Offset);
925 virtual void EmitCFIDefCfaRegister(int64_t Register);
926 virtual void EmitCFIOffset(int64_t Register, int64_t Offset);
926 virtual void EmitCFIOffset(int64_t Register, int64_t Offset);
931 virtual void EmitCFISameValue(int64_t Register);
932 virtual void EmitCFIRestore(int64_t Register);
933 virtual void EmitCFIRelOffset(int64_t Register, int64_t Offset);
933 virtual void EmitCFIRelOffset(int64_t Register, int64_t Offset);
934 virtual void EmitCFIAdjustCfaOffset(int64_t Adjustment);
936 virtual void EmitCFIReturnColumn(int64_t Register);
937 virtual void EmitCFIGnuArgsSize(int64_t Size);
939 virtual void EmitCFIUndefined(int64_t Register);
940 virtual void EmitCFIRegister(int64_t Register1, int64_t Register2);
940 virtual void EmitCFIRegister(int64_t Register1, int64_t Register2);
include/llvm/MC/MCValue.h 41 int64_t Cst = 0;
46 int64_t getConstant() const { return Cst; }
64 int64_t Val = 0, uint32_t RefKind = 0) {
73 static MCValue get(int64_t Val) {
include/llvm/MC/MCWasmStreamer.h 71 void EmitValueToAlignment(unsigned, int64_t, unsigned, unsigned) override;
include/llvm/MC/MCWinCOFFStreamer.h 56 void EmitCOFFImgRel32(MCSymbol const *Symbol, int64_t Offset) override;
include/llvm/Object/ELFObjectFile.h 66 virtual Expected<int64_t> getRelocationAddend(DataRefImpl Rel) const = 0;
198 Expected<int64_t> getAddend() const {
422 Expected<int64_t> getRelocationAddend(DataRefImpl Rel) const override;
917 Expected<int64_t>
include/llvm/Object/ELFTypes.h 89 using Sxword = packed<int64_t>;
350 int64_t, int32_t>::type;
include/llvm/Object/MachO.h 223 int64_t addend() const;
240 int64_t readSLEB128(const char **error);
252 int64_t Addend = 0;
include/llvm/ObjectYAML/DWARFYAML.h 121 int64_t SData;
include/llvm/ObjectYAML/ELFYAML.h 340 int64_t Addend;
include/llvm/ObjectYAML/MachOYAML.h 86 std::vector<int64_t> SLEBExtraData;
include/llvm/ProfileData/Coverage/CoverageMapping.h 297 Expected<int64_t> evaluate(const Counter &C) const;
include/llvm/ProfileData/InstrProf.h 1128 void getMemOPSizeRangeFromOption(StringRef Str, int64_t &RangeStart,
1129 int64_t &RangeLast);
include/llvm/ProfileData/SampleProfReader.h 379 void reportError(int64_t LineNumber, Twine Msg) const {
include/llvm/Support/AMDHSAKernelDescriptor.h 156 int64_t kernel_code_entry_byte_offset;
include/llvm/Support/Allocator.h 296 llvm::Optional<int64_t> identifyObject(const void *Ptr) {
298 int64_t InSlabIdx = 0;
307 int64_t InCustomSizedSlabIdx = -1;
322 int64_t identifyKnownObject(const void *Ptr) {
323 Optional<int64_t> Out = identifyObject(Ptr);
339 int64_t identifyKnownAlignedObject(const void *Ptr) {
340 int64_t Out = identifyKnownObject(Ptr);
include/llvm/Support/BinaryStreamReader.h 109 Error readSLEB128(int64_t &Dest);
include/llvm/Support/BinaryStreamWriter.h 94 Error writeSLEB128(int64_t Value);
include/llvm/Support/DataExtractor.h 207 int64_t getSigned(uint64_t *offset_ptr, uint32_t size) const;
498 int64_t getSLEB128(uint64_t *offset_ptr) const;
include/llvm/Support/DebugCounter.h 106 static int64_t getCounterValue(unsigned ID) {
114 static void setCounterValue(unsigned ID, int64_t Count) {
169 int64_t Count = 0;
170 int64_t Skip = 0;
171 int64_t StopAfter = -1;
include/llvm/Support/Endian.h 283 detail::packed_endian_specific_integral<int64_t, little, unaligned>;
297 detail::packed_endian_specific_integral<int64_t, little, aligned>;
311 detail::packed_endian_specific_integral<int64_t, big, unaligned>;
325 detail::packed_endian_specific_integral<int64_t, big, aligned>;
339 detail::packed_endian_specific_integral<int64_t, native, unaligned>;
include/llvm/Support/Format.h 166 int64_t DecValue;
174 FormattedNumber(uint64_t HV, int64_t DV, unsigned W, bool H, bool U,
211 inline FormattedNumber format_decimal(int64_t N, unsigned Width) {
include/llvm/Support/JSON.h 140 llvm::Optional<int64_t> getInteger(StringRef K) const;
343 create<int64_t>(int64_t{I});
343 create<int64_t>(int64_t{I});
407 return as<int64_t>();
411 llvm::Optional<int64_t> getAsInteger() const {
413 return as<int64_t>();
477 mutable llvm::AlignedCharArrayUnion<bool, double, int64_t, llvm::StringRef,
575 inline bool fromJSON(const Value &E, int64_t &Out) {
include/llvm/Support/LEB128.h 23 inline unsigned encodeSLEB128(int64_t Value, raw_ostream &OS,
52 inline unsigned encodeSLEB128(int64_t Value, uint8_t *p, unsigned PadTo = 0) {
161 inline int64_t decodeSLEB128(const uint8_t *p, unsigned *n = nullptr,
165 int64_t Value = 0;
194 extern unsigned getSLEB128Size(int64_t Value);
include/llvm/Support/LineIterator.h 55 int64_t line_number() const { return LineNumber; }
include/llvm/Support/MathExtras.h 335 template <unsigned N> constexpr inline bool isInt(int64_t x) {
339 template <> constexpr inline bool isInt<8>(int64_t x) {
342 template <> constexpr inline bool isInt<16>(int64_t x) {
345 template <> constexpr inline bool isInt<32>(int64_t x) {
351 constexpr inline bool isShiftedInt(int64_t x) {
413 inline int64_t minIntN(int64_t N) {
413 inline int64_t minIntN(int64_t N) {
420 inline int64_t maxIntN(int64_t N) {
420 inline int64_t maxIntN(int64_t N) {
434 inline bool isIntN(unsigned N, int64_t x) {
761 template <unsigned B> constexpr inline int64_t SignExtend64(uint64_t x) {
769 inline int64_t SignExtend64(uint64_t X, unsigned B) {
include/llvm/Support/MemoryBuffer.h 80 getFile(const Twine &Filename, int64_t FileSize = -1,
94 int64_t Offset, bool IsVolatile = false);
126 getFileOrSTDIN(const Twine &Filename, int64_t FileSize = -1,
180 getFile(const Twine &Filename, int64_t FileSize = -1,
242 getFile(const Twine &Filename, int64_t FileSize = -1);
include/llvm/Support/ScaledNumber.h 432 static std::pair<uint64_t, bool> splitSigned(int64_t N) {
438 static int64_t joinSigned(uint64_t U, bool IsNeg) {
659 int64_t scale(int64_t N) const {
659 int64_t scale(int64_t N) const {
663 int64_t scaleByInverse(int64_t N) const {
663 int64_t scaleByInverse(int64_t N) const {
674 int compareTo(int64_t N) const { return N < 0 ? 1 : compareTo(uint64_t(N)); }
include/llvm/Support/ScopedPrinter.h 178 void printNumber(StringRef Label, int64_t Value) {
include/llvm/Support/SymbolRemappingReader.h 71 SymbolRemappingParseError(StringRef File, int64_t Line, Twine Message)
82 int64_t getLineNum() const { return Line; }
89 int64_t Line;
include/llvm/Support/TypeSize.h 159 TypeSize operator*(int64_t RHS) const {
171 friend TypeSize operator*(const int64_t LHS, const TypeSize &RHS) {
183 TypeSize operator/(int64_t RHS) const {
include/llvm/Support/VirtualFileSystem.h 118 getBuffer(const Twine &Name, int64_t FileSize = -1,
258 getBufferForFile(const Twine &Name, int64_t FileSize = -1,
include/llvm/Support/YAMLTraits.h 1227 static void output(const int64_t &, void *, raw_ostream &);
1228 static StringRef input(StringRef, void *, int64_t &);
include/llvm/TableGen/Record.h 565 int64_t Value;
567 explicit IntInit(int64_t V)
578 static IntInit *get(int64_t V);
580 int64_t getValue() const { return Value; }
1654 std::vector<int64_t> getValueAsListOfInts(StringRef FieldName) const;
1685 int64_t getValueAsInt(StringRef FieldName) const;
include/llvm/Target/TargetLoweringObjectFile.h 197 int64_t Offset,
include/llvm/Transforms/IPO/WholeProgramDevirt.h 212 int64_t &OffsetByte, uint64_t &OffsetBit);
219 int64_t &OffsetByte, uint64_t &OffsetBit);
include/llvm/Transforms/Instrumentation/InstrProfiling.h 72 int64_t MemOPSizeRangeStart;
74 int64_t MemOPSizeRangeLast;
76 int64_t TotalCountersPromoted = 0;
include/llvm/Transforms/Utils/Cloning.h 272 Function *Callee, int64_t entryDelta,
lib/Analysis/AliasAnalysisEvaluator.cpp 328 static void PrintPercent(int64_t Num, int64_t Sum) {
328 static void PrintPercent(int64_t Num, int64_t Sum) {
337 int64_t AliasSum =
360 int64_t ModRefSum = NoModRefCount + RefCount + ModCount + ModRefCount +
lib/Analysis/AliasAnalysisSummary.h 139 static const int64_t UnknownOffset = INT64_MAX;
141 inline int64_t addOffset(int64_t LHS, int64_t RHS) {
141 inline int64_t addOffset(int64_t LHS, int64_t RHS) {
141 inline int64_t addOffset(int64_t LHS, int64_t RHS) {
152 int64_t Offset;
230 int64_t Offset;
lib/Analysis/CFLAndersAliasAnalysis.cpp 137 int64_t Offset;
151 int64_t Offset;
277 DenseMapInfo<int64_t>::getEmptyKey()};
282 DenseMapInfo<int64_t>::getEmptyKey()};
286 return DenseMapInfo<std::pair<const Value *, int64_t>>::getHashValue(
300 DenseMapInfo<int64_t>::getEmptyKey()};
306 DenseMapInfo<int64_t>::getEmptyKey()};
310 return DenseMapInfo<std::pair<InstantiatedValue, int64_t>>::getHashValue(
lib/Analysis/CFLGraph.h 63 int64_t Offset;
126 void addEdge(Node From, Node To, int64_t Offset = 0) {
219 void addAssignEdge(Value *From, Value *To, int64_t Offset = 0) {
lib/Analysis/CallGraphSCCPass.cpp 147 int64_t Delta =
lib/Analysis/ConstantFolding.cpp 561 int64_t Offset = OffsetAI.getSExtValue();
562 int64_t InitializerSize = DL.getTypeAllocSize(GV->getInitializer()->getType());
lib/Analysis/IVDescriptors.cpp 1090 int64_t Size = static_cast<int64_t>(DL.getTypeAllocSize(PointerElementType));
1094 int64_t CVSize = CV->getSExtValue();
lib/Analysis/InlineCost.cpp 247 void addCost(int64_t Inc, int64_t UpperBound = INT_MAX) {
247 void addCost(int64_t Inc, int64_t UpperBound = INT_MAX) {
1465 int64_t JTCost = (int64_t)JumpTableSize * InlineConstants::InstrCost +
1493 int64_t ExpectedNumberOfCompare = 3 * (int64_t)NumCaseCluster / 2 - 1;
1494 int64_t SwitchCost =
lib/Analysis/Lint.cpp 461 int64_t Offset = 0;
lib/Analysis/LoopAccessAnalysis.cpp 646 int64_t Stride = getPtrStride(PSE, Ptr, L, Strides);
990 int64_t llvm::getPtrStride(PredicatedScalarEvolution &PSE, Value *Ptr,
1064 int64_t Size = DL.getTypeAllocSize(PtrTy->getElementType());
1071 int64_t StepVal = APStepVal.getSExtValue();
1074 int64_t Stride = StepVal / Size;
1075 int64_t Rem = StepVal % Size;
1106 SmallVector<std::pair<int64_t, Value *>, 4> OffValPairs;
1115 llvm::SmallSet<int64_t, 4> Offsets;
1137 int64_t Offset = Diff->getAPInt().getSExtValue();
1461 int64_t StrideAPtr = getPtrStride(PSE, APtr, InnermostLoop, Strides, true);
1462 int64_t StrideBPtr = getPtrStride(PSE, BPtr, InnermostLoop, Strides, true);
1511 int64_t Distance = Val.getSExtValue();
lib/Analysis/LoopPass.cpp 232 int64_t Delta = static_cast<int64_t>(NewSize) -
lib/Analysis/LoopUnrollAnalyzer.cpp 122 int64_t SimplifiedAddrOpV = SimplifiedAddrOp->getSExtValue();
lib/Analysis/MemoryDependenceAnalysis.cpp 241 const Value *MemLocBase, int64_t MemLocOffs, unsigned MemLocSize,
255 int64_t LIOffs = 0;
281 int64_t MemLocEnd = MemLocOffs + MemLocSize;
lib/Analysis/ScalarEvolutionExpander.cpp 1884 int64_t Offset = VO.second->getSExtValue();
1885 int64_t ESize = SE.getTypeSizeInBits(Ety);
lib/Analysis/TargetTransformInfo.cpp 250 bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const {
254 bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const {
259 int64_t BaseOffset,
261 int64_t Scale,
340 int64_t BaseOffset,
342 int64_t Scale,
lib/Analysis/TypeMetadataUtils.cpp 53 int64_t Offset, const CallInst *CI, DominatorTree &DT) {
64 int64_t GEPOffset = M->getDataLayout().getIndexedOffsetInType(
lib/Analysis/ValueTracking.cpp 5714 static Optional<int64_t>
5722 int64_t Offset = 0;
5745 Optional<int64_t> llvm::isPointerOffset(const Value *Ptr1, const Value *Ptr2,
5771 int64_t OffsetVal = 0;
lib/Analysis/VectorUtils.cpp 196 int64_t PtrAccessSize = 1;
227 int64_t StepVal = APStepVal.getSExtValue();
831 int64_t Stride = getPtrStride(PSE, Ptr, TheLoop, Strides,
1016 int64_t DistanceToB = DistToB->getAPInt().getSExtValue();
lib/AsmParser/LLParser.cpp 3865 struct MDSignedField : public MDFieldImpl<int64_t> {
3866 int64_t Min;
3867 int64_t Max;
3869 MDSignedField(int64_t Default = 0)
3871 MDSignedField(int64_t Default, int64_t Min, int64_t Max)
3871 MDSignedField(int64_t Default, int64_t Min, int64_t Max)
3871 MDSignedField(int64_t Default, int64_t Min, int64_t Max)
3904 MDSignedOrMDField(int64_t Default = 0, bool AllowNull = true)
3907 MDSignedOrMDField(int64_t Default, int64_t Min, int64_t Max,
3907 MDSignedOrMDField(int64_t Default, int64_t Min, int64_t Max,
3907 MDSignedOrMDField(int64_t Default, int64_t Min, int64_t Max,
3913 int64_t getMDSignedValue() const {
3929 int64_t getMDSignedValue() const {
4476 int64_t Value = value.isMDSignedField()
lib/BinaryFormat/MsgPackDocumentYAML.cpp 79 Err = yaml::ScalarTraits<int64_t>::input(S, nullptr, getInt());
189 return ScalarTraits<int64_t>::mustQuote(ScalarStr);
lib/BinaryFormat/MsgPackReader.cpp 57 return readInt<int64_t>(Obj);
lib/BinaryFormat/MsgPackWriter.cpp 27 void Writer::write(int64_t i) {
lib/Bitcode/Reader/MetadataLoader.cpp 106 static int64_t unrotateSign(uint64_t U) { return (U & 1) ? ~(U >> 1) : U >> 1; }
lib/Bitcode/Writer/BitcodeWriter.cpp 1507 static uint64_t rotateSign(int64_t I) {
2595 int64_t diff = ((int32_t)InstID - (int32_t)ValID);
lib/CodeGen/AsmPrinter/AsmPrinter.cpp 841 int64_t Offset = MemLoc ? MI->getOperand(1).getImm() : 0;
2212 int64_t Offset = OffsetAI.getSExtValue();
2278 int64_t Addend = (LHSOffset - RHSOffset).getSExtValue();
2633 int64_t GOTPCRelCst = Offset + MV.getConstant();
2765 void AsmPrinter::printOffset(int64_t Offset, raw_ostream &OS) const {
lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp 39 void AsmPrinter::EmitSLEB128(int64_t Value, const char *Desc) const {
lib/CodeGen/AsmPrinter/CodeViewDebug.cpp 1164 int64_t ExprOffset = 0;
1576 int64_t Count = -1;
lib/CodeGen/AsmPrinter/DIEHash.cpp 65 void DIEHash::addSLEB128(int64_t Value) {
lib/CodeGen/AsmPrinter/DIEHash.h 63 void addSLEB128(int64_t Value);
lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp 41 int64_t Offset = 0;
lib/CodeGen/AsmPrinter/DebugLocEntry.h 34 int64_t Int;
43 DbgValueLoc(const DIExpression *Expr, int64_t i)
64 int64_t getInt() const { return Constant.Int; }
lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp 1296 void DwarfCompileUnit::addBaseTypeRef(DIEValueList &Die, int64_t Idx) {
lib/CodeGen/AsmPrinter/DwarfCompileUnit.h 360 void addBaseTypeRef(DIEValueList &Die, int64_t Idx);
lib/CodeGen/AsmPrinter/DwarfDebug.cpp 178 void DebugLocDwarfExpression::emitSigned(int64_t Value) {
649 int64_t Val = ParamValue->first.getImm();
lib/CodeGen/AsmPrinter/DwarfExpression.cpp 187 void DwarfExpression::addSignedConstant(int64_t Value) {
lib/CodeGen/AsmPrinter/DwarfExpression.h 182 virtual void emitSigned(int64_t Value) = 0;
282 void addSignedConstant(int64_t Value);
361 void emitSigned(int64_t Value) override;
390 void emitSigned(int64_t Value) override;
lib/CodeGen/AsmPrinter/DwarfUnit.cpp 57 void DIEDwarfExpression::emitSigned(int64_t Value) {
111 int64_t DwarfUnit::getDefaultLowerBound() const {
247 Optional<dwarf::Form> Form, int64_t Integer) {
254 int64_t Integer) {
1321 int64_t LowerBound = SR->getLowerBound();
1322 int64_t DefaultLowerBound = getDefaultLowerBound();
1323 int64_t Count = -1;
1344 addUInt(*IndexTyDie, dwarf::DW_AT_byte_size, None, sizeof(int64_t));
lib/CodeGen/AsmPrinter/DwarfUnit.h 143 Optional<dwarf::Form> Form, int64_t Integer);
145 void addSInt(DIELoc &Die, Optional<dwarf::Form> Form, int64_t Integer);
324 int64_t getDefaultLowerBound() const;
lib/CodeGen/AsmPrinter/WinException.cpp 949 int64_t Offset = 0;
lib/CodeGen/BranchRelaxation.cpp 282 int64_t BrOffset = getInstrOffset(MI);
283 int64_t DestOffset = BlockInfo[DestBB.getNumber()].Offset;
444 int64_t DestOffset = BlockInfo[DestBB->getNumber()].Offset;
445 int64_t SrcOffset = getInstrOffset(MI);
lib/CodeGen/CodeGenPrepare.cpp 284 SmallVector<std::pair<AssertingVH<GetElementPtrInst>, int64_t>, 32>>
2774 std::pair<AssertingVH<GetElementPtrInst>, int64_t> &LargeOffsetGEP;
2819 bool matchScaledValue(Value *ScaleReg, int64_t Scale, unsigned Depth);
3480 bool AddressingModeMatcher::matchScaledValue(Value *ScaleReg, int64_t Scale,
4120 int64_t Scale = RHS->getSExtValue();
4132 int64_t ConstantOffset = 0;
4605 std::pair<AssertingVH<GetElementPtrInst>, int64_t> LargeOffsetGEP(nullptr,
4713 std::pair<AssertingVH<GetElementPtrInst>, int64_t> LargeOffsetGEP(nullptr,
5285 SmallVectorImpl<std::pair<AssertingVH<GetElementPtrInst>, int64_t>>
5305 int64_t BaseOffset = LargeOffsetGEPs.begin()->second;
5311 int64_t Offset = LargeOffsetGEP->second;
lib/CodeGen/DFAPacketizer.cpp 334 int64_t MinOffset = std::min(Op1.getOffset(), Op2.getOffset());
335 int64_t Overlapa = Op1.getSize() + Op1.getOffset() - MinOffset;
336 int64_t Overlapb = Op2.getSize() + Op2.getOffset() - MinOffset;
lib/CodeGen/GlobalISel/CSEInfo.cpp 303 GISelInstProfileBuilder::addNodeIDImmediate(int64_t Imm) const {
lib/CodeGen/GlobalISel/IRTranslator.cpp 1062 int64_t Offset = 0;
lib/CodeGen/GlobalISel/InstructionSelector.cpp 49 const MachineOperand &MO, int64_t Value,
lib/CodeGen/GlobalISel/LegalizerHelper.cpp 992 int64_t SizeInBits = MI.getOperand(2).getImm();
2261 int64_t SizeInBits = MI.getOperand(2).getImm();
3455 int64_t SizeOp1 = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits();
3483 int64_t ExtractOffset;
3552 int64_t ExtractOffset, InsertOffset;
lib/CodeGen/GlobalISel/LegalizerInfo.cpp 211 const int64_t FirstUncovered = TypeIdxsCovered.find_first_unset();
234 const int64_t FirstUncovered = ImmIdxsCovered.find_first_unset();
lib/CodeGen/GlobalISel/MachineIRBuilder.cpp 307 int64_t Val) {
lib/CodeGen/GlobalISel/Utils.cpp 207 Optional<int64_t> llvm::getConstantVRegVal(unsigned VReg,
lib/CodeGen/ImplicitNullChecks.cpp 365 int64_t Offset;
lib/CodeGen/InterleavedLoadCombinePass.cpp 891 int64_t Ofs = DL.getIndexedOffsetInType(Result.VTy, makeArrayRef(Idx, 2));
lib/CodeGen/LiveDebugValues.cpp 217 int64_t Immediate;
lib/CodeGen/LocalStackSlotAllocation.cpp 52 int64_t LocalOffset; // Local offset of the frame idx referenced
61 FrameRef(MachineInstr *I, int64_t Offset, int Idx, unsigned Ord) :
70 int64_t getLocalOffset() const { return LocalOffset; }
75 SmallVector<int64_t, 16> LocalOffsets;
80 void AdjustStackOffset(MachineFrameInfo &MFI, int FrameIdx, int64_t &Offset,
85 int64_t &Offset, unsigned &MaxAlign);
143 int FrameIdx, int64_t &Offset,
159 int64_t LocalOffset = StackGrowsDown ? -Offset : Offset;
178 bool StackGrowsDown, int64_t &Offset,
196 int64_t Offset = 0;
269 int64_t BaseOffset,
270 int64_t FrameSizeAdjust,
271 int64_t LocalFrameOffset,
276 int64_t Offset = FrameSizeAdjust + LocalFrameOffset - BaseOffset;
326 int64_t LocalOffset = LocalOffsets[Idx];
343 int64_t BaseOffset = 0;
349 int64_t LocalOffset = FR.getLocalOffset();
375 int64_t Offset = 0;
376 int64_t FrameSizeAdjust = StackGrowsDown ? MFI.getLocalFrameSize() : 0;
393 int64_t InstrOffset = TRI->getFrameIndexInstrOffset(&MI, idx);
395 int64_t PrevBaseOffset = BaseOffset;
lib/CodeGen/MIRParser/MIParser.cpp 462 bool parseOffset(int64_t &Offset);
2544 bool MIParser::parseOffset(int64_t &Offset) {
2588 int64_t Offset = 0;
2766 int64_t Offset = 0;
2783 int64_t Offset = 0;
lib/CodeGen/MachineBasicBlock.cpp 643 int64_t Sum = 0;
lib/CodeGen/MachineFrameInfo.cpp 82 int MachineFrameInfo::CreateFixedObject(uint64_t Size, int64_t SPOffset,
102 int64_t SPOffset,
242 int64_t Off = SO.SPOffset - ValOffset;
lib/CodeGen/MachineFunction.cpp 412 int64_t Offset, uint64_t Size) {
lib/CodeGen/MachineFunctionPass.cpp 82 int64_t Delta = static_cast<int64_t>(CountAfter) -
lib/CodeGen/MachineInstr.cpp 1229 int64_t OffsetA = MMOa->getOffset();
1230 int64_t OffsetB = MMOb->getOffset();
1231 int64_t MinOffset = std::min(OffsetA, OffsetB);
1255 int64_t MaxOffset = std::max(OffsetA, OffsetB);
1256 int64_t LowWidth = (MinOffset == OffsetA) ? WidthA : WidthB;
1269 int64_t OverlapA = KnownWidthA ? WidthA + OffsetA - MinOffset
1271 int64_t OverlapB = KnownWidthB ? WidthB + OffsetB - MinOffset
lib/CodeGen/MachineOperand.cpp 153 void MachineOperand::ChangeToImmediate(int64_t ImmVal) {
184 void MachineOperand::ChangeToGA(const GlobalValue *GV, int64_t Offset,
217 void MachineOperand::ChangeToTargetIndex(unsigned Idx, int64_t Offset,
603 void MachineOperand::printOperandOffset(raw_ostream &OS, int64_t Offset) {
995 int FI, int64_t Offset) {
1008 int64_t Offset, uint8_t ID) {
lib/CodeGen/MachineOutliner.cpp 1394 int64_t FnDelta = static_cast<int64_t>(FnCountAfter) -
lib/CodeGen/MachinePipeliner.cpp 541 DenseMap<MachineInstr *, std::pair<unsigned, int64_t>> NewInstrChanges;
695 int64_t Offset1, Offset2;
845 int64_t NewOffset = 0;
2059 int64_t Offset;
2097 int64_t &Offset) {
2130 int64_t LoadOffset = MI->getOperand(OffsetPosLd).getImm();
2131 int64_t StoreOffset = PrevDef->getOperand(OffsetPos1).getImm();
2152 DenseMap<SUnit *, std::pair<unsigned, int64_t>>::iterator It =
2155 std::pair<unsigned, int64_t> RegAndOffset = It->second;
2173 int64_t NewOffset =
2237 int64_t OffsetS, OffsetD;
2772 DenseMap<SUnit *, std::pair<unsigned, int64_t>>::iterator It =
2780 int64_t NewOffset =
lib/CodeGen/MachineScheduler.cpp 1472 int64_t Offset;
1474 MemOpInfo(SUnit *su, const MachineOperand *Op, int64_t ofs)
1561 int64_t Offset;
lib/CodeGen/MachineSink.cpp 741 int64_t Offset;
lib/CodeGen/MachineVerifier.cpp 1397 int64_t Imm = MI->getOperand(2).getImm();
lib/CodeGen/ModuloSchedule.cpp 914 int64_t Offset;
964 int64_t AdjOffset = Delta * Num;
1004 std::pair<unsigned, int64_t> RegAndOffset = It->second;
1008 int64_t NewOffset = OldMI->getOperand(OffsetPos).getImm();
lib/CodeGen/PrologEpilogInserter.cpp 635 bool StackGrowsDown, int64_t &Offset,
667 int64_t FixedCSEnd, BitVector &StackBytesFree) {
724 int64_t ObjSize = MFI.getObjectSize(FrameIdx);
771 int64_t &Offset, unsigned &MaxAlign, unsigned Skew) {
800 int64_t Offset = LocalAreaOffset;
822 int64_t FixedOff;
877 int64_t FixedCSEnd = Offset;
910 std::pair<int, int64_t> Entry = MFI.getLocalFrameObjectMap(i);
911 int64_t FIOffset = (StackGrowsDown ? -Offset : Offset) + Entry.second;
1084 int64_t StackSize = Offset - LocalAreaOffset;
1212 int64_t Offset =
lib/CodeGen/SelectionDAG/DAGCombiner.cpp 594 int64_t OffsetFromBase;
596 MemOpLink(LSBaseSDNode *N, int64_t Offset)
909 const int64_t CombinedValue = CombinedValueIntVal.getSExtValue();
6421 static Optional<bool> isBigEndian(const SmallVector<int64_t, 4> &ByteOffsets,
6430 int64_t CurrentByteOffset = ByteOffsets[i] - FirstOffset;
6502 SmallVector<int64_t, 4> ByteOffsets(Width, INT64_MAX);
6503 int64_t FirstOffset = INT64_MAX;
6514 int64_t Offset = 0;
6552 int64_t ByteOffsetFromBase = 0;
6682 int64_t FirstOffset = INT64_MAX;
6686 SmallVector<int64_t, 4> ByteOffsets(ByteWidth);
6707 int64_t ByteOffsetFromBase = 0;
13948 int64_t Offset;
14386 int64_t Offset = static_cast<int64_t>(getOffsetFromBase());
15115 int64_t ElementSizeBits = MemVT.getStoreSizeInBits();
15398 int64_t PtrDiff;
15409 int64_t PtrDiff;
15490 int64_t ElementSizeBytes = MemVT.getStoreSize();
15562 int64_t StartAddress = StoreNodes[0].OffsetFromBase;
15566 int64_t CurrAddress = StoreNodes[i].OffsetFromBase;
15785 int64_t LdOffset = 0;
15834 int64_t CurrAddress = LoadNodes[i].OffsetFromBase;
16263 int64_t BitOffset;
17598 int64_t Offset = checkElem(Op0);
20481 int64_t Offset;
20482 Optional<int64_t> NumBytes;
20488 int64_t Offset = 0;
20558 int64_t SrcValOffset0 = MUC0.MMO->getOffset();
20559 int64_t SrcValOffset1 = MUC1.MMO->getOffset();
20565 int64_t OffAlign0 = SrcValOffset0 % OrigAlignment0;
20566 int64_t OffAlign1 = SrcValOffset1 % OrigAlignment1;
20586 int64_t MinOffset = std::min(SrcValOffset0, SrcValOffset1);
20587 int64_t Overlap0 = *MUC0.NumBytes + SrcValOffset0 - MinOffset;
20588 int64_t Overlap1 = *MUC1.NumBytes + SrcValOffset1 - MinOffset;
20761 llvm::IntervalMap<int64_t, UnitT, 8, IntervalMapHalfOpenInfo<int64_t>>;
20761 llvm::IntervalMap<int64_t, UnitT, 8, IntervalMapHalfOpenInfo<int64_t>>;
20791 int64_t Offset;
20794 int64_t Length = (Chain->getMemoryVT().getSizeInBits() + 7) / 8;
lib/CodeGen/SelectionDAG/InstrEmitter.cpp 1064 int64_t ExtraInfo =
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp 224 SmallVector<int64_t, 4> Offsets;
240 int64_t Offset1, Offset2;
268 int64_t BaseOff = Offsets[0];
272 int64_t Offset = Offsets[i];
lib/CodeGen/SelectionDAG/SelectionDAG.cpp 1357 EVT VT, int64_t Offset, bool isTargetGA,
1477 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1806 int64_t Offset, bool isTarget,
4759 int64_t Offset = C2->getSExtValue();
6626 int64_t Size, int64_t Offset) {
6626 int64_t Size, int64_t Offset) {
6660 int64_t Offset = 0) {
8823 int64_t o, unsigned TF)
9249 int64_t Offset = 0;
9260 int64_t GVOffset = 0;
9274 int64_t FrameOffset = 0;
lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp 24 int64_t &Off) const {
86 const Optional<int64_t> NumBytes0,
88 const Optional<int64_t> NumBytes1,
96 int64_t PtrDiff;
146 bool BaseIndexOffset::contains(const SelectionDAG &DAG, int64_t BitSize,
148 int64_t OtherBitSize, int64_t &BitOffset) const {
148 int64_t OtherBitSize, int64_t &BitOffset) const {
149 int64_t Offset;
174 int64_t Offset = 0;
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 6573 const int64_t ObjectSize =
6594 int64_t Offset;
6798 int64_t Offset;
6807 int64_t Offset;
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp 582 int64_t offset = GADN->getOffset();
709 int64_t offset = BA->getOffset();
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp 1972 int64_t DesiredMaskS) const {
2001 int64_t DesiredMaskS) const {
2554 int64_t Val = MatcherTable[MatcherIndex++];
2573 int64_t Val = MatcherTable[MatcherIndex++];
2586 int64_t Val = MatcherTable[MatcherIndex++];
3202 int64_t Val = MatcherTable[MatcherIndex++];
lib/CodeGen/SelectionDAG/TargetLowering.cpp 3935 int64_t &Offset) const {
4082 int64_t ExtVal = ExtOpc == ISD::ZERO_EXTEND ? C->getZExtValue()
lib/CodeGen/StackMaps.cpp 117 int64_t Imm = (++MOI)->getImm();
123 int64_t Size = (++MOI)->getImm();
126 int64_t Imm = (++MOI)->getImm();
134 int64_t Imm = MOI->getImm();
135 Locs.emplace_back(Location::Constant, sizeof(int64_t), 0, Imm);
367 const int64_t ID = MI.getOperand(PatchPointOpers::IDPos).getImm();
376 const int64_t ID = opers.getID();
lib/CodeGen/StackSlotColoring.cpp 314 int64_t Size = OrigSizes[FI];
lib/CodeGen/SwitchLoweringUtils.cpp 63 const int64_t N = Clusters.size();
126 for (int64_t i = N - 2; i >= 0; i--) {
134 for (int64_t j = N - 1; j > i; j--) {
144 int64_t NumEntries = j - i + 1;
285 const int64_t N = Clusters.size();
299 for (int64_t i = N - 2; i >= 0; --i) {
307 for (int64_t j = std::min(N - 1, i + BitWidth - 1); j > i; --j) {
319 for (int64_t k = i; k <= j; k++) {
369 for (int64_t I = First; I <= Last; ++I) {
393 for (int64_t I = First + 1; I <= Last; ++I) {
lib/CodeGen/TargetInstrInfo.cpp 547 int64_t MemSize = 0;
555 int64_t OpSize = MFI.getObjectSize(FI);
lib/CodeGen/TargetLoweringObjectFileImpl.cpp 1115 int64_t Offset, MachineModuleInfo *MMI, MCStreamer &Streamer) const {
lib/CodeGen/XRayInstrumentation.cpp 159 int64_t MICount = 0;
lib/DebugInfo/CodeView/CodeViewRecordIO.cpp 148 Error CodeViewRecordIO::mapEncodedInteger(int64_t &Value,
274 void CodeViewRecordIO::emitEncodedSignedInteger(const int64_t &Value,
324 Error CodeViewRecordIO::writeEncodedSignedInteger(const int64_t &Value) {
lib/DebugInfo/CodeView/RecordSerialization.cpp 86 int64_t N;
lib/DebugInfo/DWARF/DWARFAbbreviationDeclaration.cpp 68 int64_t V = Data.getSLEB128(OffsetPtr);
197 Optional<int64_t> DWARFAbbreviationDeclaration::AttributeSpec::getByteSize(
203 Optional<int64_t> S;
lib/DebugInfo/DWARF/DWARFContext.cpp 1014 if (Optional<int64_t> UpperBound =
1016 int64_t LowerBound = 0;
lib/DebugInfo/DWARF/DWARFDebugFrame.cpp 396 int64_t DataAlignmentFactor = Data.getSLEB128(&Offset);
lib/DebugInfo/DWARF/DWARFFormValue.cpp 80 DWARFFormValue DWARFFormValue::createFromSValue(dwarf::Form F, int64_t V) {
684 Optional<int64_t> DWARFFormValue::getAsSignedConstant() const {
687 uint64_t(std::numeric_limits<int64_t>::max()) < Value.uval))
lib/DebugInfo/GSYM/FileWriter.cpp 20 void FileWriter::writeSLEB(int64_t S) {
lib/DebugInfo/GSYM/LineTable.cpp 25 int64_t Delta;
27 DeltaInfo(int64_t D, uint32_t C) : Delta(D), Count(C) {}
30 inline bool operator<(const DeltaInfo &LHS, int64_t Delta) {
34 static bool encodeSpecial(int64_t MinLineDelta, int64_t MaxLineDelta,
34 static bool encodeSpecial(int64_t MinLineDelta, int64_t MaxLineDelta,
35 int64_t LineDelta, uint64_t AddrDelta,
41 int64_t LineRange = MaxLineDelta - MinLineDelta + 1;
42 int64_t AdjustedOp = ((LineDelta - MinLineDelta) + AddrDelta * LineRange);
43 int64_t Op = AdjustedOp + FirstSpecial;
60 int64_t MinDelta = Data.getSLEB128(&Offset);
64 int64_t MaxDelta = Data.getSLEB128(&Offset);
65 int64_t LineRange = MaxDelta - MinDelta + 1;
108 int64_t LineDelta = MinDelta + (AdjustedOp % LineRange);
130 int64_t MinLineDelta = INT64_MAX;
131 int64_t MaxLineDelta = INT64_MIN;
137 int64_t PrevLine = 1;
143 int64_t LineDelta = (int64_t)line_entry.Line - PrevLine;
161 const int64_t MaxLineRange = 14;
168 const int64_t FirstDelta = DeltaInfos[I].Delta;
211 int64_t LineDelta = 0;
lib/DebugInfo/PDB/Native/NativeSymbolEnumerator.cpp 82 int64_t N = Record.Value.getSExtValue();
lib/DebugInfo/Symbolize/DIPrinter.cpp 34 void DIPrinter::printContext(const std::string &FileName, int64_t Line) {
44 int64_t FirstLine =
46 int64_t LastLine = FirstLine + PrintSourceContext;
51 int64_t L = I.line_number();
lib/Demangle/MicrosoftDemangle.cpp 929 int64_t Demangler::demangleSigned(StringView &MangledName) {
935 int64_t I = static_cast<int64_t>(Number);
lib/ExecutionEngine/Interpreter/Execution.cpp 1066 int64_t Idx;
lib/ExecutionEngine/Interpreter/ExternalFunctions.cpp 383 sizeof(long) < sizeof(int64_t)) {
lib/ExecutionEngine/JITLink/EHFrameSupport.cpp 197 int64_t DataAlignmentFactor = 0;
lib/ExecutionEngine/JITLink/MachO_arm64.cpp 551 int64_t Value = E.getTarget().getAddress() - FixupAddress + E.getAddend();
587 int64_t PageDelta = TargetPage - PCPage;
634 int64_t Delta = E.getTarget().getAddress() - FixupAddress;
650 int64_t Value;
lib/ExecutionEngine/JITLink/MachO_x86_64.cpp 490 int64_t Value =
508 int64_t Value =
520 int64_t Value =
532 int64_t Value;
lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp 268 uint32_t Type, int64_t Addend,
298 int64_t RealOffset = Value + Addend - FinalAddress;
306 int64_t RealOffset = Value + Addend - FinalAddress;
315 int64_t RealOffset = Value + Addend - FinalAddress;
332 int64_t GOTOffset = Value - GOTBase + Addend;
369 uint32_t Type, int64_t Addend) {
639 int64_t Addend;
713 uint32_t Type, int64_t Addend) {
733 uint32_t Type, int64_t Addend) {
793 int64_t Result = static_cast<int64_t>(Value + Addend);
800 int64_t delta = static_cast<int64_t>(Value - FinalAddress + Addend);
809 int64_t delta = static_cast<int64_t>(Value - FinalAddress + Addend);
827 uint32_t Type, int64_t Addend) {
835 int64_t Delta = (Value + Addend) - Section.getLoadAddressWithOffset(Offset);
842 int64_t Delta = (Value + Addend) - Section.getLoadAddressWithOffset(Offset);
848 int64_t Delta = (Value + Addend) - Section.getLoadAddressWithOffset(Offset);
854 int64_t Delta = (Value + Addend) - Section.getLoadAddressWithOffset(Offset);
860 int64_t Delta = (Value + Addend) - Section.getLoadAddressWithOffset(Offset);
881 uint32_t Type, int64_t Addend) {
936 uint32_t Type, int64_t Addend,
1114 int64_t Addend = 0;
1115 if (Expected<int64_t> AddendOrErr = ELFRelocationRef(*RelI).getAddend())
1320 int64_t Addend = (Opcode & 0x0000ffff) << 16;
1324 int64_t Addend = Value.Addend + SignExtend32<16>(Opcode & 0x0000ffff);
1474 int64_t delta = static_cast<int64_t>(Target - RelocTarget);
lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.h 29 uint64_t Value, uint32_t Type, int64_t Addend,
33 uint64_t Value, uint32_t Type, int64_t Addend,
40 uint64_t Value, uint32_t Type, int64_t Addend);
52 uint64_t Value, uint32_t Type, int64_t Addend);
55 uint64_t Value, uint32_t Type, int64_t Addend);
58 uint64_t Value, uint32_t Type, int64_t Addend);
61 uint64_t Value, uint32_t Type, int64_t Addend);
lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h 131 int64_t Addend;
154 RelocationEntry(unsigned id, uint64_t offset, uint32_t type, int64_t addend)
158 RelocationEntry(unsigned id, uint64_t offset, uint32_t type, int64_t addend,
164 RelocationEntry(unsigned id, uint64_t offset, uint32_t type, int64_t addend,
169 RelocationEntry(unsigned id, uint64_t offset, uint32_t type, int64_t addend,
179 RelocationEntry(unsigned id, uint64_t offset, uint32_t type, int64_t addend,
195 int64_t Addend;
lib/ExecutionEngine/RuntimeDyld/RuntimeDyldMachO.cpp 46 int64_t RuntimeDyldMachO::memcpyAddend(const RelocationEntry &RE) const {
71 int64_t Addend = readBytesUnaligned(LocalAddress, NumBytes);
276 int64_t DeltaForText,
277 int64_t DeltaForEH) {
310 static int64_t computeDelta(SectionEntry *A, SectionEntry *B) {
311 int64_t ObjDistance = static_cast<int64_t>(A->getObjAddress()) -
313 int64_t MemDistance = A->getLoadAddress() - B->getLoadAddress();
331 int64_t DeltaForText = computeDelta(Text, EHFrame);
332 int64_t DeltaForEH = 0;
lib/ExecutionEngine/RuntimeDyld/RuntimeDyldMachO.h 57 int64_t memcpyAddend(const RelocationEntry &RE) const;
150 unsigned char *processFDE(uint8_t *P, int64_t DeltaForText,
151 int64_t DeltaForEH);
lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldCOFFX86_64.h 50 void write32BitOffset(uint8_t *Target, int64_t Addend, uint64_t Delta) {
lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldELFMips.cpp 52 int64_t
108 int64_t RuntimeDyldELFMips::evaluateMIPS64Relocation(
110 int64_t Addend, uint64_t SymOffset, SID SectionID) {
170 int64_t page = (Value + Addend + 0x8000) & ~0xffff;
213 void RuntimeDyldELFMips::applyMIPSRelocation(uint8_t *TargetPtr, int64_t Value,
267 int64_t Addend, uint64_t SymOffset, SID SectionID) {
268 int64_t CalculatedValue = evaluateMIPS64Relocation(
276 int64_t Addend, uint64_t SymOffset, SID SectionID) {
284 int64_t CalculatedValue = evaluateMIPS64Relocation(Section, Offset, Value,
lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldELFMips.h 34 uint64_t Value, uint32_t Type, int64_t Addend,
37 uint64_t Value, uint32_t Type, int64_t Addend,
52 int64_t evaluateMIPS32Relocation(const SectionEntry &Section, uint64_t Offset,
54 int64_t evaluateMIPS64Relocation(const SectionEntry &Section,
56 uint32_t Type, int64_t Addend,
59 void applyMIPSRelocation(uint8_t *TargetPtr, int64_t CalculatedValue,
lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOAArch64.h 34 Expected<int64_t> decodeAddend(const RelocationEntry &RE) const {
38 int64_t Addend = 0;
156 MachO::RelocationInfoType RelType, int64_t Addend) const {
290 int64_t ExplicitAddend = 0;
295 int64_t RawAddend = Obj.getPlainRelocationSymbolNum(RelInfo);
393 int64_t PCRelVal = Value - FinalAddress + RE.Addend;
402 int64_t PCRelVal =
449 int64_t Offset;
499 int64_t Addend =
lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOARM.h 63 Expected<int64_t> decodeAddend(const RelocationEntry &RE) const {
365 int64_t Immediate = readBytesUnaligned(LocalAddress, 4); // Copy the whole instruction out.
408 int64_t Addend = FullImmVal - (AddrA - AddrB);
lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOX86_64.h 170 int64_t Addend =
lib/IR/AbstractCallSite.cpp 112 int64_t Idx = cast<ConstantInt>(OpAsCM->getValue())->getSExtValue();
lib/IR/ConstantFold.cpp 1417 int64_t C1Val = cast<ConstantInt>(C1)->getSExtValue();
1418 int64_t C2Val = cast<ConstantInt>(C2)->getSExtValue();
2156 int64_t IndexVal = CI->getSExtValue();
lib/IR/Constants.cpp 667 ConstantInt *ConstantInt::getSigned(IntegerType *Ty, int64_t V) {
671 Constant *ConstantInt::getSigned(Type *Ty, int64_t V) {
1305 bool ConstantInt::isValueValidForType(Type *Ty, int64_t Val) {
lib/IR/DIBuilder.cpp 244 DIEnumerator *DIBuilder::createEnumerator(StringRef Name, int64_t Val,
622 DISubrange *DIBuilder::getOrCreateSubrange(int64_t Lo, int64_t Count) {
622 DISubrange *DIBuilder::getOrCreateSubrange(int64_t Lo, int64_t Count) {
626 DISubrange *DIBuilder::getOrCreateSubrange(int64_t Lo, Metadata *CountNode) {
738 DIExpression *DIBuilder::createExpression(ArrayRef<int64_t> Signed) {
lib/IR/DataLayout.cpp 806 int64_t DataLayout::getIndexedOffsetInType(Type *ElemTy,
808 int64_t Result = 0;
826 if (int64_t arrayIdx = cast<ConstantInt>(Idx)->getSExtValue())
lib/IR/DebugInfo.cpp 954 int64_t Value,
1274 int64_t *Addr, size_t Length) {
1281 int64_t Value) {
1410 int64_t Lo, int64_t Count) {
1410 int64_t Lo, int64_t Count) {
lib/IR/DebugInfoMetadata.cpp 317 DISubrange *DISubrange::getImpl(LLVMContext &Context, int64_t Count, int64_t Lo,
317 DISubrange *DISubrange::getImpl(LLVMContext &Context, int64_t Count, int64_t Lo,
325 int64_t Lo, StorageType Storage,
332 DIEnumerator *DIEnumerator::getImpl(LLVMContext &Context, int64_t Value,
978 int64_t Offset) {
989 bool DIExpression::extractIfOffset(int64_t &Offset) const {
1033 int64_t Offset) {
lib/IR/LLVMContextImpl.h 328 int64_t LowerBound;
330 MDNodeKeyImpl(Metadata *CountNode, int64_t LowerBound)
358 int64_t Value;
362 MDNodeKeyImpl(int64_t Value, bool IsUnsigned, MDString *Name)
lib/IR/LegacyPassManager.cpp 166 Pass *P, Module &M, int64_t Delta, unsigned CountBefore,
222 int64_t CountAfter = static_cast<int64_t>(CountBefore) + Delta;
246 int64_t FnDelta = static_cast<int64_t>(FnCountAfter) -
1412 int64_t Delta =
1655 int64_t Delta = static_cast<int64_t>(NewSize) -
1754 int64_t Delta = static_cast<int64_t>(ModuleCount) -
lib/IR/Verifier.cpp 1949 const int64_t NumPatchBytes =
lib/MC/ELFObjectWriter.cpp 561 int64_t Res;
lib/MC/MCAsmStreamer.cpp 60 void EmitRegisterName(int64_t Register);
166 void EmitCOFFImgRel32(MCSymbol const *Symbol, int64_t Offset) override;
213 void emitFill(const MCExpr &NumValues, int64_t Size, int64_t Expr,
213 void emitFill(const MCExpr &NumValues, int64_t Size, int64_t Expr,
216 void EmitValueToAlignment(unsigned ByteAlignment, int64_t Value = 0,
289 void EmitCFIDefCfa(int64_t Register, int64_t Offset) override;
289 void EmitCFIDefCfa(int64_t Register, int64_t Offset) override;
290 void EmitCFIDefCfaOffset(int64_t Offset) override;
291 void EmitCFIDefCfaRegister(int64_t Register) override;
292 void EmitCFIOffset(int64_t Register, int64_t Offset) override;
292 void EmitCFIOffset(int64_t Register, int64_t Offset) override;
297 void EmitCFIRestore(int64_t Register) override;
298 void EmitCFISameValue(int64_t Register) override;
299 void EmitCFIRelOffset(int64_t Register, int64_t Offset) override;
299 void EmitCFIRelOffset(int64_t Register, int64_t Offset) override;
300 void EmitCFIAdjustCfaOffset(int64_t Adjustment) override;
302 void EmitCFIGnuArgsSize(int64_t Size) override;
304 void EmitCFIUndefined(int64_t Register) override;
305 void EmitCFIRegister(int64_t Register1, int64_t Register2) override;
305 void EmitCFIRegister(int64_t Register1, int64_t Register2) override;
308 void EmitCFIReturnColumn(int64_t Register) override;
387 static inline int64_t truncateToSize(int64_t Value, unsigned Bytes) {
387 static inline int64_t truncateToSize(int64_t Value, unsigned Bytes) {
755 void MCAsmStreamer::EmitCOFFImgRel32(MCSymbol const *Symbol, int64_t Offset) {
986 int64_t IntValue;
1030 int64_t IntValue;
1041 int64_t IntValue;
1095 int64_t IntNumBytes;
1112 void MCAsmStreamer::emitFill(const MCExpr &NumValues, int64_t Size,
1113 int64_t Expr, SMLoc Loc) {
1122 void MCAsmStreamer::EmitValueToAlignment(unsigned ByteAlignment, int64_t Value,
1532 void MCAsmStreamer::EmitRegisterName(int64_t Register) {
1546 void MCAsmStreamer::EmitCFIDefCfa(int64_t Register, int64_t Offset) {
1546 void MCAsmStreamer::EmitCFIDefCfa(int64_t Register, int64_t Offset) {
1554 void MCAsmStreamer::EmitCFIDefCfaOffset(int64_t Offset) {
1576 void MCAsmStreamer::EmitCFIGnuArgsSize(int64_t Size) {
1586 void MCAsmStreamer::EmitCFIDefCfaRegister(int64_t Register) {
1593 void MCAsmStreamer::EmitCFIOffset(int64_t Register, int64_t Offset) {
1593 void MCAsmStreamer::EmitCFIOffset(int64_t Register, int64_t Offset) {
1628 void MCAsmStreamer::EmitCFIRestore(int64_t Register) {
1635 void MCAsmStreamer::EmitCFISameValue(int64_t Register) {
1642 void MCAsmStreamer::EmitCFIRelOffset(int64_t Register, int64_t Offset) {
1642 void MCAsmStreamer::EmitCFIRelOffset(int64_t Register, int64_t Offset) {
1650 void MCAsmStreamer::EmitCFIAdjustCfaOffset(int64_t Adjustment) {
1662 void MCAsmStreamer::EmitCFIUndefined(int64_t Register) {
1668 void MCAsmStreamer::EmitCFIRegister(int64_t Register1, int64_t Register2) {
1668 void MCAsmStreamer::EmitCFIRegister(int64_t Register1, int64_t Register2) {
1686 void MCAsmStreamer::EmitCFIReturnColumn(int64_t Register) {
lib/MC/MCAssembler.cpp 299 int64_t NumValues = 0;
305 int64_t Size = NumValues * FF.getValueSize();
354 int64_t TargetLocation = Value.getConstant();
363 int64_t Size = TargetLocation - FragmentOffset;
954 int64_t Value;
976 int64_t AddrDelta;
980 int64_t LineDelta;
1017 int64_t AddrDelta;
lib/MC/MCCodeView.cpp 452 int64_t Result;
lib/MC/MCDisassembler/MCDisassembler.cpp 26 bool MCDisassembler::tryAddingSymbolicOperand(MCInst &Inst, int64_t Value,
37 void MCDisassembler::tryAddingPcLoadReferenceComment(int64_t Value,
lib/MC/MCDisassembler/MCExternalSymbolizer.cpp 36 int64_t Value,
157 int64_t Value,
lib/MC/MCDwarf.cpp 162 int64_t LineDelta = static_cast<int64_t>(LineEntry.getLine()) - LastLine;
645 int64_t LineDelta, uint64_t AddrDelta) {
661 int64_t LineDelta, uint64_t AddrDelta,
744 int64_t LineDelta, uint64_t AddrDelta,
lib/MC/MCELFStreamer.cpp 353 int64_t Value,
lib/MC/MCExpr.cpp 169 const MCConstantExpr *MCConstantExpr::create(int64_t Value, MCContext &Ctx,
459 bool MCExpr::evaluateAsAbsolute(int64_t &Res) const {
463 bool MCExpr::evaluateAsAbsolute(int64_t &Res,
468 bool MCExpr::evaluateAsAbsolute(int64_t &Res,
476 bool MCExpr::evaluateAsAbsolute(int64_t &Res, const MCAssembler &Asm) const {
480 bool MCExpr::evaluateAsAbsolute(int64_t &Res, const MCAssembler *Asm) const {
484 bool MCExpr::evaluateKnownAbsolute(int64_t &Res,
490 bool MCExpr::evaluateAsAbsolute(int64_t &Res, const MCAssembler *Asm,
514 const MCSymbolRefExpr *&B, int64_t &Addend) {
618 int64_t RHS_Cst, MCValue &Res) {
623 int64_t LHS_Cst = LHS.getConstant();
626 int64_t Result_Cst = LHS_Cst + RHS_Cst;
829 int64_t LHS = LHSValue.getConstant(), RHS = RHSValue.getConstant();
830 int64_t Result = 0;
lib/MC/MCInst.cpp 39 bool MCOperand::evaluateAsConstantImm(int64_t &Imm) const {
lib/MC/MCInstPrinter.cpp 81 format_object<int64_t> MCInstPrinter::formatDec(int64_t Value) const {
81 format_object<int64_t> MCInstPrinter::formatDec(int64_t Value) const {
85 format_object<int64_t> MCInstPrinter::formatHex(int64_t Value) const {
85 format_object<int64_t> MCInstPrinter::formatHex(int64_t Value) const {
89 if (Value == std::numeric_limits<int64_t>::min())
90 return format<int64_t>("-0x8000000000000000", Value);
96 if (Value == std::numeric_limits<int64_t>::min())
97 return format<int64_t>("-8000000000000000h", Value);
lib/MC/MCInstrAnalysis.cpp 32 int64_t Imm = Inst.getOperand(0).getImm();
lib/MC/MCObjectStreamer.cpp 199 int64_t AbsValue;
261 int64_t IntValue;
270 int64_t IntValue;
296 int64_t IntSubsection = 0;
420 int64_t LineDelta, const MCSymbol *Label,
432 void MCObjectStreamer::EmitDwarfAdvanceLineAddr(int64_t LineDelta,
442 int64_t Res;
454 int64_t Res;
532 int64_t Value,
643 int64_t OffsetValue;
675 void MCObjectStreamer::emitFill(const MCExpr &NumValues, int64_t Size,
676 int64_t Expr, SMLoc Loc) {
677 int64_t IntNumValues;
687 int64_t NonZeroSize = Size > 4 ? 4 : Size;
lib/MC/MCParser/AsmParser.cpp 162 int64_t LineNumber;
256 bool parseAbsoluteExpression(int64_t &Res) override;
326 bool processIncbinFile(const std::string &Filename, int64_t Skip = 0,
356 bool parseRegisterOrRegisterNumber(int64_t &Register, SMLoc DirectiveLoc);
358 bool parseCVFunctionId(int64_t &FunctionId, StringRef DirectiveName);
359 bool parseCVFileId(int64_t &FileId, StringRef DirectiveName);
801 bool AsmParser::processIncbinFile(const std::string &Filename, int64_t Skip,
813 int64_t Res;
1188 int64_t IntVal = getTok().getIntVal();
1442 int64_t Value;
1475 bool AsmParser::parseAbsoluteExpression(int64_t &Res) {
1704 int64_t LocalLabelVal = -1;
2307 int64_t LineNumber = getTok().getIntVal();
2687 int64_t Value;
3003 int64_t OffsetValue;
3181 int64_t Val = 0;
3204 int64_t FillSize = 1;
3205 int64_t FillExpr = 0;
3249 int64_t FillExpr = 0;
3264 int64_t Alignment;
3267 int64_t FillExpr = 0;
3268 int64_t MaxBytesToFill = 0;
3360 int64_t FileNumber = -1;
3477 int64_t LineNumber;
3499 int64_t FileNumber = 0, LineNumber = 0;
3516 int64_t ColumnPos = 0;
3526 int64_t Discriminator = 0;
3599 int64_t FileNumber;
3602 int64_t ChecksumKind = 0;
3635 bool AsmParser::parseCVFunctionId(int64_t &FunctionId,
3645 bool AsmParser::parseCVFileId(int64_t &FileNumber, StringRef DirectiveName) {
3662 int64_t FunctionId;
3685 int64_t FunctionId;
3686 int64_t IAFunc;
3687 int64_t IAFile;
3688 int64_t IALine;
3689 int64_t IACol = 0;
3745 int64_t FunctionId, FileNumber;
3750 int64_t LineNumber = 0;
3758 int64_t ColumnPos = 0;
3806 int64_t FunctionId;
3830 int64_t PrimaryFunctionId, SourceFileId, SourceLineNum;
3905 int64_t DRRegister;
3918 int64_t DROffset;
3930 int64_t DRRegister;
3931 int64_t DROffsetInParent;
3949 int64_t DRRegister;
3950 int64_t DRFlags;
3951 int64_t DRBasePointerOffset;
4010 int64_t FileNo;
4092 bool AsmParser::parseRegisterOrRegisterNumber(int64_t &Register,
4109 int64_t Register = 0, Offset = 0;
4122 int64_t Offset = 0;
4133 int64_t Register1 = 0, Register2 = 0;
4153 int64_t Adjustment = 0;
4164 int64_t Register = 0;
4175 int64_t Register = 0;
4176 int64_t Offset = 0;
4190 int64_t Register = 0, Offset = 0;
4201 static bool isValidEncoding(int64_t Encoding) {
4228 int64_t Encoding = 0;
4266 int64_t Register = 0;
4278 int64_t Register = 0;
4290 int64_t CurrValue;
4312 int64_t Register = 0;
4333 int64_t Register = 0;
4660 int64_t AlignSizePow2;
4720 int64_t FillExpr = 0;
4737 int64_t NumValues;
4779 int64_t NumValues;
4811 int64_t NumValues;
4895 int64_t Size;
4900 int64_t Pow2Alignment = 0;
5004 int64_t Skip = 0;
5042 int64_t ExprValue;
5208 int64_t ExprValue;
5565 int64_t Count;
lib/MC/MCParser/COFFAsmParser.cpp 421 int64_t SymbolStorageClass;
434 int64_t Type;
457 int64_t Offset = 0;
487 int64_t Offset = 0;
671 int64_t Size;
lib/MC/MCParser/DarwinAsmParser.cpp 534 int64_t DescValue;
842 int64_t Size;
847 int64_t Pow2Alignment = 0;
927 int64_t Size;
932 int64_t Pow2Alignment = 0;
1019 int64_t MajorVal = getLexer().getTok().getIntVal();
1032 int64_t MinorVal = getLexer().getTok().getIntVal();
1048 int64_t Val = getLexer().getTok().getIntVal();
lib/MC/MCParser/ELFAsmParser.cpp 159 bool parseMergeSize(int64_t &Size);
162 bool maybeParseUniqueID(int64_t &UniqueID);
413 bool ELFAsmParser::parseMergeSize(int64_t &Size) {
460 bool ELFAsmParser::maybeParseUniqueID(int64_t &UniqueID) {
493 int64_t Size = 0;
499 int64_t UniqueID = ~0;
873 int64_t Count;
lib/MC/MCParser/MCAsmParser.cpp 58 bool MCAsmParser::parseIntToken(int64_t &V, const Twine &Msg) {
lib/MC/MCStreamer.cpp 155 void MCStreamer::EmitSLEB128IntValue(int64_t Value) {
466 void MCStreamer::EmitCFIDefCfa(int64_t Register, int64_t Offset) {
466 void MCStreamer::EmitCFIDefCfa(int64_t Register, int64_t Offset) {
477 void MCStreamer::EmitCFIDefCfaOffset(int64_t Offset) {
487 void MCStreamer::EmitCFIAdjustCfaOffset(int64_t Adjustment) {
497 void MCStreamer::EmitCFIDefCfaRegister(int64_t Register) {
508 void MCStreamer::EmitCFIOffset(int64_t Register, int64_t Offset) {
508 void MCStreamer::EmitCFIOffset(int64_t Register, int64_t Offset) {
518 void MCStreamer::EmitCFIRelOffset(int64_t Register, int64_t Offset) {
518 void MCStreamer::EmitCFIRelOffset(int64_t Register, int64_t Offset) {
564 void MCStreamer::EmitCFISameValue(int64_t Register) {
574 void MCStreamer::EmitCFIRestore(int64_t Register) {
593 void MCStreamer::EmitCFIGnuArgsSize(int64_t Size) {
610 void MCStreamer::EmitCFIUndefined(int64_t Register) {
620 void MCStreamer::EmitCFIRegister(int64_t Register1, int64_t Register2) {
620 void MCStreamer::EmitCFIRegister(int64_t Register1, int64_t Register2) {
649 void MCStreamer::EmitCFIReturnColumn(int64_t Register) {
934 void MCStreamer::EmitCOFFImgRel32(MCSymbol const *Symbol, int64_t Offset) {}
1087 void MCStreamer::emitFill(const MCExpr &NumValues, int64_t Size, int64_t Expr,
1087 void MCStreamer::emitFill(const MCExpr &NumValues, int64_t Size, int64_t Expr,
1089 void MCStreamer::EmitValueToAlignment(unsigned ByteAlignment, int64_t Value,
lib/MC/MCWasmStreamer.cpp 156 void MCWasmStreamer::EmitValueToAlignment(unsigned ByteAlignment, int64_t Value,
lib/MC/MCWin64EH.cpp 251 static int64_t GetAbsDifference(MCStreamer &Streamer, const MCSymbol *LHS,
261 int64_t value;
505 int64_t RawFuncLength;
lib/MC/MCWinCOFFStreamer.cpp 247 int64_t Offset) {
lib/MC/WasmObjectWriter.cpp 140 int64_t Addend; // A value to add to the symbol.
145 int64_t Addend, unsigned Type,
606 int64_t NumValues;
837 int64_t Size = 0;
1348 int64_t Size = 0;
lib/MC/WinCOFFObjectWriter.cpp 91 int64_t getIndex() const { return Index; }
737 int64_t OffsetOfB = Layout.getSymbolOffset(*B);
740 int64_t OffsetOfRelocation =
lib/Object/ELF.cpp 369 int64_t Result = decodeSLEB128(Cur, &Len, End, &ErrStr);
lib/Object/MachOObjectFile.cpp 3933 int64_t MachOBindEntry::readSLEB128(const char **error) {
3935 int64_t Result = decodeSLEB128(Ptr, &Count, Opcodes.end(), error);
3960 int64_t MachOBindEntry::addend() const { return Addend; }
lib/Object/RelocationResolver.cpp 18 static int64_t getELFAddend(RelocationRef R) {
19 Expected<int64_t> AddendOrErr = ELFRelocationRef(R).getAddend();
357 int64_t RA = getELFAddend(R);
lib/Object/WasmObjectFile.cpp 94 static int64_t readFloat64(WasmObjectFile::ReadContext &Ctx) {
97 int64_t Result = 0;
123 static int64_t readLEB128(WasmObjectFile::ReadContext &Ctx) {
134 int64_t Result = readLEB128(Ctx);
141 int64_t Result = readLEB128(Ctx);
154 static int64_t readVarint64(WasmObjectFile::ReadContext &Ctx) {
lib/ObjectYAML/DWARFEmitter.cpp 177 void onValue(const int64_t S, const bool LEB = false) override {
336 virtual void onValue(const int64_t S, const bool LEB = false) {
lib/ObjectYAML/DWARFVisitor.h 61 virtual void onValue(const int64_t S, const bool LEB = false) {}
lib/ProfileData/Coverage/CoverageMapping.cpp 157 Expected<int64_t> Value = evaluate(C);
165 Expected<int64_t> CounterMappingContext::evaluate(const Counter &C) const {
177 Expected<int64_t> LHS = evaluate(E.LHS);
180 Expected<int64_t> RHS = evaluate(E.RHS);
246 Expected<int64_t> ExecutionCount = Ctx.evaluate(Region.Count);
lib/ProfileData/InstrProf.cpp 1111 void getMemOPSizeRangeFromOption(StringRef MemOPSizeRange, int64_t &RangeStart,
1112 int64_t &RangeLast) {
1113 static const int64_t DefaultMemOPSizeRangeStart = 0;
1114 static const int64_t DefaultMemOPSizeRangeLast = 8;
lib/Support/APInt.cpp 286 int64_t lhsSext = SignExtend64(U.VAL, BitWidth);
287 int64_t rhsSext = SignExtend64(RHS.U.VAL, BitWidth);
776 int64_t exp = ((I >> 52) & 0x7ff) - 1023;
814 int64_t sext = SignExtend64(getWord(0), BitWidth);
1381 int64_t borrow = 0;
1384 int64_t subres = int64_t(u[j+i]) - borrow - Lo_32(p);
1658 APInt APInt::sdiv(int64_t RHS) const {
1750 int64_t APInt::srem(int64_t RHS) const {
1750 int64_t APInt::srem(int64_t RHS) const {
1911 void APInt::sdivrem(const APInt &LHS, int64_t RHS,
1912 APInt &Quotient, int64_t &Remainder) {
2190 int64_t I = getSExtValue();
lib/Support/BinaryStreamReader.cpp 59 Error BinaryStreamReader::readSLEB128(int64_t &Dest) {
lib/Support/BinaryStreamWriter.cpp 41 Error BinaryStreamWriter::writeSLEB128(int64_t Value) {
lib/Support/DataExtractor.cpp 139 int64_t
195 int64_t DataExtractor::getSLEB128(uint64_t *offset_ptr) const {
200 int64_t result = decodeSLEB128(
lib/Support/DebugCounter.cpp 79 int64_t CounterVal;
lib/Support/FileCheck.cpp 1002 int64_t Count;
lib/Support/JSON.cpp 50 llvm::Optional<int64_t> Object::getInteger(StringRef K) const {
353 if (End == S.end() && I >= std::numeric_limits<int64_t>::min() &&
354 I <= std::numeric_limits<int64_t>::max()) {
lib/Support/LEB128.cpp 29 unsigned getSLEB128Size(int64_t Value) {
lib/Support/MemoryBuffer.cpp 108 getFileAux(const Twine &Filename, int64_t FileSize, uint64_t MapSize,
143 MemoryBuffer::getFileOrSTDIN(const Twine &Filename, int64_t FileSize,
231 MemoryBuffer::getFile(const Twine &Filename, int64_t FileSize,
240 uint64_t MapSize, int64_t Offset, bool RequiresNullTerminator,
245 getFileAux(const Twine &Filename, int64_t FileSize, uint64_t MapSize,
259 WritableMemoryBuffer::getFile(const Twine &Filename, int64_t FileSize,
405 WriteThroughMemoryBuffer::getFile(const Twine &Filename, int64_t FileSize) {
419 uint64_t MapSize, int64_t Offset, bool RequiresNullTerminator,
490 int64_t Offset, bool IsVolatile) {
lib/Support/VirtualFileSystem.cpp 115 FileSystem::getBufferForFile(const llvm::Twine &Name, int64_t FileSize,
192 int64_t FileSize,
218 RealFile::getBuffer(const Twine &Name, int64_t FileSize,
611 getBuffer(const Twine &Name, int64_t FileSize, bool RequiresNullTerminator,
1752 getBuffer(const Twine &Name, int64_t FileSize, bool RequiresNullTerminator,
lib/Support/YAMLTraits.cpp 999 void ScalarTraits<int64_t>::output(const int64_t &Val, void *,
1004 StringRef ScalarTraits<int64_t>::input(StringRef Scalar, void *, int64_t &Val) {
lib/TableGen/Record.cpp 379 int64_t Result = 0;
460 IntInit *IntInit::get(int64_t V) {
461 static std::map<int64_t, IntInit*> ThePool;
472 static bool canFitInBitfield(int64_t Value, unsigned NumBits) {
483 int64_t Val = getValue();
489 int64_t Value = getValue();
990 int64_t LHSv = LHSi->getValue(), RHSv = RHSi->getValue();
991 int64_t Result;
2222 int64_t Record::getValueAsInt(StringRef FieldName) const {
2236 std::vector<int64_t>
2239 std::vector<int64_t> Ints;
lib/TableGen/SetTheory.cpp 198 int64_t From, To;
lib/TableGen/TGLexer.h 83 int64_t CurIntVal; // This is valid for INTVAL.
114 int64_t getCurIntVal() const {
118 std::pair<int64_t, unsigned> getCurBinaryIntVal() const {
lib/TableGen/TGParser.cpp 679 int64_t Start = II->getValue();
680 int64_t End;
lib/Target/AArch64/AArch64AsmPrinter.cpp 827 int64_t CallTarget = Opers.getCallTarget().getImm();
lib/Target/AArch64/AArch64CallLowering.cpp 60 Register getStackAddress(uint64_t Size, int64_t Offset,
141 Register getStackAddress(uint64_t Size, int64_t Offset,
lib/Target/AArch64/AArch64ExpandImm.cpp 161 int64_t Chunk = getChunk(UImm, Idx);
lib/Target/AArch64/AArch64FastISel.cpp 96 int64_t Offset = 0;
137 void setOffset(int64_t O) { Offset = O; }
138 int64_t getOffset() { return Offset; }
238 unsigned emitAdd_ri_(MVT VT, unsigned Op0, bool Op0IsKill, int64_t Imm);
1034 int64_t Offset = Addr.getOffset();
1125 int64_t Offset = Addr.getOffset() / ScaleFactor;
1566 int64_t Imm) {
3333 int64_t UnscaledOffset = 0;
3367 int64_t Size = VT.getSizeInBits() / 8;
4946 int64_t Pow2MinusOne = (1ULL << Lg2) - 1;
lib/Target/AArch64/AArch64FrameLowering.cpp 286 int64_t Amount = I->getOperand(0).getImm();
360 int64_t Offset =
1526 int64_t OffsetToFrameRecord =
1709 int64_t OffsetToSVEArea =
2253 int64_t SVEStackSize =
2324 int64_t AArch64FrameLowering::determineSVEStackSize(MachineFrameInfo &MFI,
2327 int64_t Offset = 0;
2330 int64_t FixedOffset = -MFI.getObjectOffset(I);
2349 int64_t SVEStackSize = determineSVEStackSize(MFI, MaxAlign);
lib/Target/AArch64/AArch64FrameLowering.h 104 int64_t determineSVEStackSize(MachineFrameInfo &MF, unsigned &MaxAlign) const;
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 735 int64_t RHSC = RHS->getSExtValue();
737 int64_t Range = 0x1LL << (BW - 1);
813 int64_t RHSC = (int64_t)RHS->getZExtValue();
852 int64_t RHSC = RHS->getSExtValue();
993 static bool isPreferredADD(int64_t ImmOff) {
1036 int64_t ImmOff = (int64_t)cast<ConstantSDNode>(RHS)->getZExtValue();
lib/Target/AArch64/AArch64ISelLowering.cpp 3680 int64_t FirstByte = MFI.getObjectOffset(ClobberedFI);
3681 int64_t LastByte = FirstByte + MFI.getObjectSize(ClobberedFI) - 1;
3695 int64_t InFirstByte = MFI.getObjectOffset(FI->getIndex());
3696 int64_t InLastByte = InFirstByte;
5076 const int64_t TrueVal = CTVal->getSExtValue();
5077 const int64_t FalseVal = CFVal->getSExtValue();
7962 static bool getVShiftImm(SDValue Op, unsigned ElementBits, int64_t &Cnt) {
7982 static bool isVShiftLImm(SDValue Op, EVT VT, bool isLong, int64_t &Cnt) {
7984 int64_t ElementBits = VT.getScalarSizeInBits();
7993 static bool isVShiftRImm(SDValue Op, EVT VT, bool isNarrow, int64_t &Cnt) {
7995 int64_t ElementBits = VT.getScalarSizeInBits();
8005 int64_t Cnt;
9094 bool AArch64TargetLowering::isLegalAddImmediate(int64_t Immed) const {
9095 if (Immed == std::numeric_limits<int64_t>::min()) {
9111 bool AArch64TargetLowering::isLegalICmpImmediate(int64_t Immed) const {
9146 int64_t Offset = AM.BaseOffs;
9242 int64_t Val = Imm.getSExtValue();
10378 int64_t ShiftAmount;
10709 int64_t Offset = St.getBasePtr()->getConstantOperandVal(1);
11868 int64_t RHSC = RHS->getSExtValue();
lib/Target/AArch64/AArch64ISelLowering.h 369 bool isLegalAddImmediate(int64_t) const override;
370 bool isLegalICmpImmediate(int64_t) const override;
lib/Target/AArch64/AArch64InstrInfo.cpp 179 int64_t BrOffset) const {
935 int64_t OffsetA = 0, OffsetB = 0;
1982 int64_t &Offset,
1989 const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset,
2010 int64_t Dummy1, Dummy2;
2044 unsigned &Width, int64_t &MinOffset,
2045 int64_t &MaxOffset) {
2253 static bool scaleOffset(unsigned Opc, int64_t &Offset) {
2270 static bool unscaleOffset(unsigned Opc, int64_t &Offset) {
2300 int64_t Offset1, unsigned Opcode1, int FI2,
2301 int64_t Offset2, unsigned Opcode2) {
2305 int64_t ObjectOffset1 = MFI.getObjectOffset(FI1);
2306 int64_t ObjectOffset2 = MFI.getObjectOffset(FI2);
2361 int64_t Offset1 = FirstLdSt.getOperand(2).getImm();
2365 int64_t Offset2 = SecondLdSt.getOperand(2).getImm();
3142 int64_t Bytes, NumPredicateVectors, NumDataVectors;
3371 int64_t *EmittableOffset) {
3404 int64_t MinOff, MaxOff;
3411 int64_t Offset =
3428 int64_t Remainder = Offset % Scale;
3433 int64_t NewOffset = Offset / Scale;
3474 int64_t NewOffset;
5135 int64_t Offset; // Filled with the offset of MI.
5145 int64_t MinOffset,
5494 int64_t Imm = MI.getOperand(0).getImm();
5506 int64_t Offset;
5516 int64_t Dummy1, Dummy2;
5526 int64_t NewImm = (Offset + 16) / Scale;
5586 int64_t StackPosEntry =
5594 int64_t LRPosEntry =
lib/Target/AArch64/AArch64InstrInfo.h 111 int64_t &Offset,
116 int64_t &Offset, unsigned &Width,
127 int64_t &MinOffset, int64_t &MaxOffset);
127 int64_t &MinOffset, int64_t &MaxOffset);
171 int64_t BrOffset) const override;
338 int64_t *EmittableOffset = nullptr);
lib/Target/AArch64/AArch64InstructionSelector.cpp 1770 int64_t Imm = *COff;
3601 int64_t Index = 0;
4184 int64_t LegalShiftVal = Log2_32(SizeInBytes);
4238 int64_t ImmVal = ValAndVReg->Value;
4360 int64_t RHSC;
4408 int64_t RHSC = (int64_t)RHSDef->getOperand(1).getCImm()->getZExtValue();
4639 Optional<int64_t> CstVal = getConstantVRegVal(MI.getOperand(0).getReg(), MRI);
lib/Target/AArch64/AArch64MachineFunctionInfo.h 196 int64_t MinOffset = std::numeric_limits<int64_t>::max();
196 int64_t MinOffset = std::numeric_limits<int64_t>::max();
197 int64_t MaxOffset = std::numeric_limits<int64_t>::min();
197 int64_t MaxOffset = std::numeric_limits<int64_t>::min();
200 int64_t Offset = MFI.getObjectOffset(FrameIdx);
201 int64_t ObjSize = MFI.getObjectSize(FrameIdx);
202 MinOffset = std::min<int64_t>(Offset, MinOffset);
203 MaxOffset = std::max<int64_t>(Offset + ObjSize, MaxOffset);
lib/Target/AArch64/AArch64RedundantCopyElimination.cpp 384 int64_t SrcImm = IsMoveImm ? MI->getOperand(1).getImm() : 0;
lib/Target/AArch64/AArch64RegisterInfo.cpp 335 int64_t Offset) const {
364 int64_t FPOffset = Offset - 16 * 20;
396 int64_t Offset) const {
408 int64_t Offset) const {
428 int64_t Offset) const {
lib/Target/AArch64/AArch64RegisterInfo.h 98 bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const override;
100 int64_t Offset) const override;
103 int64_t Offset) const override;
105 int64_t Offset) const override;
lib/Target/AArch64/AArch64StackOffset.h 37 int64_t Bytes;
38 int64_t ScalableBytes;
43 using Part = std::pair<int64_t, MVT>;
47 StackOffset(int64_t Offset, MVT::SimpleValueType T) : StackOffset() {
59 int64_t OffsetInBytes = Other.first * (Other.second.getSizeInBits() / 8);
99 int64_t getScalableBytes() const { return ScalableBytes; }
102 int64_t getBytes() const { return Bytes; }
107 void getForFrameOffset(int64_t &NumBytes, int64_t &NumPredicateVectors,
107 void getForFrameOffset(int64_t &NumBytes, int64_t &NumPredicateVectors,
108 int64_t &NumDataVectors) const {
lib/Target/AArch64/AArch64StackTagging.cpp 108 int64_t StoreSize = DL->getTypeStoreSize(SI->getOperand(0)->getType());
126 void applyMemSet(IRBuilder<> &IRB, int64_t Start, int64_t End,
126 void applyMemSet(IRBuilder<> &IRB, int64_t Start, int64_t End,
133 for (int64_t Offset = Start - Start % 8; Offset < End; Offset += 8) {
155 Value *sliceValue(IRBuilder<> &IRB, Value *V, int64_t Offset) {
168 void applyStore(IRBuilder<> &IRB, int64_t Start, int64_t End,
168 void applyStore(IRBuilder<> &IRB, int64_t Start, int64_t End,
171 for (int64_t Offset = Start - Start % 8; Offset < End; Offset += 8) {
362 Optional<int64_t> Offset =
380 Optional<int64_t> Offset = isPointerOffset(StartPtr, MSI->getDest(), *DL);
lib/Target/AArch64/AArch64StorePairSuppress.cpp 151 int64_t Offset;
lib/Target/AArch64/AArch64TargetObjectFile.cpp 63 int64_t Offset, MachineModuleInfo *MMI, MCStreamer &Streamer) const {
lib/Target/AArch64/AArch64TargetObjectFile.h 40 const MCValue &MV, int64_t Offset,
lib/Target/AArch64/AArch64TargetTransformInfo.cpp 44 int AArch64TTIImpl::getIntImmCost(int64_t Val) {
76 int64_t Val = Tmp.getSExtValue();
lib/Target/AArch64/AArch64TargetTransformInfo.h 74 int getIntImmCost(int64_t Val);
lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp 270 int64_t &Addend);
637 int64_t Val = MCE->getValue();
660 int64_t MinVal, MaxVal;
662 int64_t Shift = Bits - 1;
670 int64_t Val = MCE->getValue();
683 int64_t Val = MCE->getValue();
692 int64_t Addend;
732 int64_t Val = MCE->getValue();
743 int64_t Val = MCE->getValue();
757 int64_t Val = MCE->getValue();
758 int64_t SVal = typename std::make_signed<T>::type(Val);
759 int64_t UVal = typename std::make_unsigned<T>::type(Val);
772 Optional<std::pair<int64_t, unsigned> > getShiftedVal() const {
779 int64_t Val = CE->getValue();
807 int64_t Addend;
908 int64_t Val = MCE->getValue();
922 int64_t Addend;
1389 int64_t Val = CE->getValue();
1390 int64_t Min = - (4096 * (1LL << (21 - 1)));
1391 int64_t Max = 4096 * ((1LL << (21 - 1)) - 1);
1405 int64_t Val = CE->getValue();
1406 int64_t Min = - (1LL << (21 - 1));
1407 int64_t Max = ((1LL << (21 - 1)) - 1);
2475 int64_t Addend;
2529 int64_t Addend;
2643 int64_t ShiftAmount = Parser.getTok().getIntVal();
3348 int64_t PrevReg = FirstReg;
4124 int64_t Addend;
5324 int64_t Id = getParser().getTok().getIntVal();
5473 int64_t &Addend) {
5534 int64_t ExpectedVal;
5724 int64_t Pattern;
lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp 802 int64_t ImmVal = Imm;
1095 int64_t offset = fieldFromInstruction(insn, 12, 9);
1377 int64_t offset = fieldFromInstruction(insn, 15, 7);
1653 int64_t imm = fieldFromInstruction(insn, 5, 19) << 2;
1708 int64_t imm = fieldFromInstruction(insn, 0, 26);
1757 int64_t dst = fieldFromInstruction(insn, 5, 14);
lib/Target/AArch64/Disassembler/AArch64ExternalSymbolizer.cpp 60 MCInst &MI, raw_ostream &CommentStream, int64_t Value, uint64_t Address,
lib/Target/AArch64/Disassembler/AArch64ExternalSymbolizer.h 31 int64_t Value, uint64_t Address, bool IsBranch,
lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h 396 int64_t Mantissa = Imm.getZExtValue() & 0x7fffff; // 23 bits
423 int64_t Exp = (Imm.lshr(52).getSExtValue() & 0x7ff) - 1023; // -1022 to 1023
755 static inline bool isSVEMaskOfIdenticalElements(int64_t Imm) {
756 auto Parts = bit_cast<std::array<T, sizeof(int64_t) / sizeof(T)>>(Imm);
762 static inline bool isSVECpyImm(int64_t Imm) {
777 static inline bool isSVEAddSubImm(int64_t Imm) {
784 static inline bool isSVEMoveMaskPreferredLogicalImmediate(int64_t Imm) {
785 if (isSVECpyImm<int64_t>(Imm))
lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp 156 int64_t SignedValue = static_cast<int64_t>(Value);
378 int64_t SignedValue = static_cast<int64_t>(Value);
lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp 179 int64_t MappingSymbolCounter;
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 121 int64_t immr = Op2.getImm();
122 int64_t imms = Op3.getImm();
1345 int64_t Address;
lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp 320 int64_t Imm = Inst.getOperand(i).getImm() * 4;
lib/Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp 160 int64_t Value = 0;
lib/Target/AMDGPU/AMDGPUCallLowering.cpp 42 Register getStackAddress(uint64_t Size, int64_t Offset,
82 Register getStackAddress(uint64_t Size, int64_t Offset,
254 int64_t Offset = 0;
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp 266 SDValue getMaterializedScalarImm32(int64_t Val, const SDLoc &DL) const;
970 SDValue AMDGPUDAGToDAGISel::getMaterializedScalarImm32(int64_t Val,
1183 int64_t ByteOffset = C->getSExtValue();
1637 int64_t OffsetVal = 0;
1754 int64_t ByteOffset = C->getSExtValue();
1755 int64_t EncodedOffset = AMDGPU::getSMRDEncodedOffset(*Subtarget, ByteOffset);
lib/Target/AMDGPU/AMDGPUISelLowering.cpp 1051 int64_t FirstByte = MFI.getObjectOffset(ClobberedFI);
1052 int64_t LastByte = FirstByte + MFI.getObjectSize(ClobberedFI) - 1;
1066 int64_t InFirstByte = MFI.getObjectOffset(FI->getIndex());
1067 int64_t InLastByte = InFirstByte;
4111 int64_t Offset) {
4125 int64_t Offset) const {
4142 int64_t Offset) const {
lib/Target/AMDGPU/AMDGPUISelLowering.h 300 int64_t Offset) const;
306 int64_t Offset) const;
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp 571 int64_t Offset = I.getOperand(3).getImm();
776 int64_t C;
818 int64_t Offset;
1038 int64_t Tgt = I.getOperand(1).getImm();
1039 int64_t Enabled = I.getOperand(2).getImm();
1040 int64_t Done = I.getOperand(7).getImm();
1041 int64_t VM = I.getOperand(8).getImm();
1054 int64_t Tgt = I.getOperand(1).getImm();
1055 int64_t Enabled = I.getOperand(2).getImm();
1059 int64_t Done = I.getOperand(5).getImm();
1060 int64_t VM = I.getOperand(6).getImm();
1355 static int64_t getFPTrueImmVal(unsigned Size, bool Signed) {
1891 int64_t EncodedImm = AMDGPU::getSMRDEncodedOffset(STI, GEPInfo.Imm);
1908 int64_t EncodedImm = AMDGPU::getSMRDEncodedOffset(STI, GEPInfo.Imm);
1967 Optional<int64_t> Offset =
2007 int64_t Offset = 0;
2050 int64_t PossibleOffset =
2093 int64_t Offset,
2113 int64_t Offset = 0;
2145 int64_t ConstAddr = 0;
2152 int64_t PossibleOffset =
2181 Optional<int64_t> CstVal = getConstantVRegVal(MI.getOperand(0).getReg(), MRI);
lib/Target/AMDGPU/AMDGPUInstructionSelector.h 65 int64_t Imm;
162 int64_t Offset, unsigned OffsetBits) const;
lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp 1497 Optional<int64_t> IdxVal = getConstantVRegVal(MI.getOperand(2).getReg(), MRI);
1526 Optional<int64_t> IdxVal = getConstantVRegVal(MI.getOperand(3).getReg(), MRI);
lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp 129 int64_t AlignDownOffset = alignDown(EltOffset, 4);
130 int64_t OffsetDiff = EltOffset - AlignDownOffset;
lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp 100 int64_t Offset = 0;
lib/Target/AMDGPU/AMDGPUMCInstLower.cpp 155 int64_t Offset = MO.getOffset();
lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp 81 int64_t Offset;
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp 1175 int64_t Const;
1232 int64_t C;
lib/Target/AMDGPU/AMDKernelCodeT.h 548 int64_t kernel_code_entry_byte_offset;
554 int64_t kernel_code_prefetch_byte_offset;
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp 104 int64_t getFPModifiersOperand() const {
105 int64_t Operand = 0;
111 int64_t getIntModifiersOperand() const {
112 int64_t Operand = 0;
117 int64_t getModifiersOperand() const {
197 int64_t Val;
684 int64_t getImm() const {
740 void addLiteralImmOperand(MCInst &Inst, int64_t Val, bool ApplyModifiers) const;
896 int64_t Val, SMLoc Loc,
1246 OperandMatchResultTy parseIntWithPrefix(const char *Prefix, int64_t &Int);
1251 bool (*ConvertResult)(int64_t &) = nullptr);
1257 bool (*ConvertResult)(int64_t&) = nullptr);
1286 bool parseCnt(int64_t &IntVal);
1292 int64_t Id;
1296 OperandInfoTy(int64_t Id_) : Id(Id_) {}
1305 bool parseHwregBody(OperandInfoTy &HwReg, int64_t &Offset, int64_t &Width);
1305 bool parseHwregBody(OperandInfoTy &HwReg, int64_t &Offset, int64_t &Width);
1307 const int64_t Offset,
1308 const int64_t Width,
1346 bool parseExpr(int64_t &Imm);
1365 bool parseSwizzleOperands(const unsigned OpNum, int64_t* Op,
1370 bool parseSwizzleOffset(int64_t &Imm);
1371 bool parseSwizzleMacro(int64_t &Imm);
1372 bool parseSwizzleQuadPerm(int64_t &Imm);
1373 bool parseSwizzleBitmaskPerm(int64_t &Imm);
1374 bool parseSwizzleBroadcast(int64_t &Imm);
1375 bool parseSwizzleSwap(int64_t &Imm);
1376 bool parseSwizzleReverse(int64_t &Imm);
1379 int64_t parseGPRIdxMacro();
1445 bool (*ConvertResult)(int64_t&);
1522 static bool isSafeTruncation(int64_t Val, unsigned Size) {
1699 void AMDGPUOperand::addLiteralImmOperand(MCInst &Inst, int64_t Val, bool ApplyModifiers) const {
2143 int64_t RegLo, RegHi;
2299 int64_t NewMax = DwordRegIndex + RegWidth - 1;
2300 int64_t OldCount;
2378 int64_t IntVal;
2750 int64_t Val = MO.getImm();
3554 int64_t Tmp = -1;
3693 int64_t IVal;
4261 int64_t Size;
4270 int64_t Align = 4;
4527 AMDGPUAsmParser::parseIntWithPrefix(const char *Prefix, int64_t &IntVal) {
4538 bool (*ConvertResult)(int64_t&)) {
4540 int64_t Value = 0;
4558 bool (*ConvertResult)(int64_t&)) {
4572 int64_t Op;
4603 int64_t Bit = 0;
4643 int64_t Default = 0) {
4682 int64_t Dfmt = 0, Nfmt = 0;
4856 int64_t &IntVal,
4857 int64_t CntVal,
4875 bool AMDGPUAsmParser::parseCnt(int64_t &IntVal) {
4884 int64_t CntVal;
4926 int64_t Waitcnt = getWaitcntBitMask(ISA);
4952 int64_t &Offset,
4953 int64_t &Width) {
4979 const int64_t Offset,
4980 const int64_t Width,
5005 int64_t ImmVal = 0;
5012 int64_t Offset = OFFSET_DEFAULT_;
5013 int64_t Width = WIDTH_DEFAULT_;
5104 int64_t ImmVal = 0;
5341 AMDGPUAsmParser::parseExpr(int64_t &Imm) {
5353 int64_t IntVal;
5430 AMDGPUAsmParser::parseSwizzleOperands(const unsigned OpNum, int64_t* Op,
5452 AMDGPUAsmParser::parseSwizzleQuadPerm(int64_t &Imm) {
5455 int64_t Lane[LANE_NUM];
5468 AMDGPUAsmParser::parseSwizzleBroadcast(int64_t &Imm) {
5472 int64_t GroupSize;
5473 int64_t LaneIdx;
5494 AMDGPUAsmParser::parseSwizzleReverse(int64_t &Imm) {
5498 int64_t GroupSize;
5514 AMDGPUAsmParser::parseSwizzleSwap(int64_t &Imm) {
5518 int64_t GroupSize;
5534 AMDGPUAsmParser::parseSwizzleBitmaskPerm(int64_t &Imm) {
5581 AMDGPUAsmParser::parseSwizzleOffset(int64_t &Imm) {
5596 AMDGPUAsmParser::parseSwizzleMacro(int64_t &Imm) {
5627 int64_t Imm = 0;
5659 int64_t AMDGPUAsmParser::parseGPRIdxMacro() {
5667 int64_t Imm = 0;
5706 int64_t Imm = 0;
5999 static bool ConvertOmodMul(int64_t &Mul) {
6007 static bool ConvertOmodDiv(int64_t &Div) {
6021 static bool ConvertBoundCtrl(int64_t &BoundCtrl) {
6397 int64_t Imm = getImm();
6503 int64_t Sels[8];
6548 int64_t Int;
6606 int64_t Temp;
6761 int64_t Int;
6794 int64_t Int;
7014 int64_t Imm = 0;
lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp 97 int64_t Offset = (SignedOffset.sext(64) + 4 + Addr).getSExtValue();
821 static int64_t getInlineImmVal32(unsigned Imm) {
846 static int64_t getInlineImmVal64(unsigned Imm) {
871 static int64_t getInlineImmVal16(unsigned Imm) {
1212 raw_ostream &/*cStream*/, int64_t Value,
1241 int64_t Value,
lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h 160 int64_t Value, uint64_t Address,
165 int64_t Value,
lib/Target/AMDGPU/GCNDPPCombine.cpp 87 int64_t Value,
88 int64_t Mask = -1) const;
341 int64_t Value, int64_t Mask) const {
341 int64_t Value, int64_t Mask) const {
493 const int64_t Mask = ~(SISrcMods::ABS | SISrcMods::NEG);
lib/Target/AMDGPU/GCNHazardRecognizer.cpp 1001 const int64_t Imm = MI->getOperand(0).getImm();
lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp 110 int64_t SignedValue = static_cast<int64_t>(Value);
114 int64_t BrImm = (SignedValue - 4) / 4;
lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp 52 int64_t Imm = MI->getOperand(OpNo).getImm();
424 int64_t SImm = static_cast<int64_t>(Imm);
1423 int64_t Imm = Op.getImm();
lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp 122 int64_t Imm = Inst.getOperand(0).getImm();
lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp 123 int64_t Sampler = MI.getOperand(14).getImm();
125 int64_t SrcSelect[4] = {
131 int64_t Offsets[3] = {
lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp 219 int64_t Imm;
327 int64_t Imm = 0;
lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp 366 const SmallVector<std::pair<MachineOperand *, int64_t>, 3> Srcs =
371 int64_t Imm = Src.second;
lib/Target/AMDGPU/R600EmitClauseMarkers.cpp 137 const SmallVectorImpl<std::pair<MachineOperand *, int64_t>> &Consts =
lib/Target/AMDGPU/R600InstrInfo.cpp 277 SmallVector<std::pair<MachineOperand *, int64_t>, 3>
279 SmallVector<std::pair<MachineOperand *, int64_t>, 3> Result;
611 SmallSet<int64_t, 4> Literals;
1389 int64_t Imm) const {
lib/Target/AMDGPU/R600InstrInfo.h 119 SmallVector<std::pair<MachineOperand *, int64_t>, 3>
298 void setImmOperand(MachineInstr &MI, unsigned Op, int64_t Imm) const;
lib/Target/AMDGPU/SIFixSGPRCopies.cpp 326 int64_t &Imm) {
643 int64_t Imm;
lib/Target/AMDGPU/SIFoldOperands.cpp 705 int64_t Imm = Def->getImm();
1320 static int getOModValue(unsigned Opc, int64_t Val) {
lib/Target/AMDGPU/SIFrameLowering.cpp 99 int64_t Offset = MFI.getObjectOffset(FI);
146 int64_t Offset = MFI.getObjectOffset(FI);
518 int64_t StackSize = FrameInfo.getStackSize();
1101 int64_t Amount = I->getOperand(0).getImm();
lib/Target/AMDGPU/SIISelLowering.cpp 1471 int64_t AlignDownOffset = alignDown(Offset, 4);
1472 int64_t OffsetDiff = Offset - AlignDownOffset;
1659 int64_t Offset = CCInfo.AllocateStack(4, 4);
lib/Target/AMDGPU/SIInsertSkips.cpp 278 int64_t KillVal = MI.getOperand(1).getImm();
283 int64_t Imm = Op.getImm();
lib/Target/AMDGPU/SIInsertWaitcnts.cpp 1076 int64_t Imm = II->getOperand(0).getImm();
lib/Target/AMDGPU/SIInstrInfo.cpp 145 int64_t &Offset0,
146 int64_t &Offset1) const {
261 int64_t &Offset,
498 int64_t Offset0, int64_t Offset1,
498 int64_t Offset0, int64_t Offset1,
799 int64_t IdxValue = Idx == 0 ? Value : 0;
1741 int64_t BrOffset) const {
1770 int64_t BrOffset,
2388 const int64_t Imm = ImmOp->getImm();
2471 const int64_t Imm = ImmOp->getImm();
2522 int64_t Offset0, Offset1;
2593 static int64_t getFoldableImm(const MachineOperand* MO) {
2842 int64_t Imm = MO.getImm();
6283 bool SIInstrInfo::isLegalFLATOffset(int64_t Offset, unsigned AddrSpace,
lib/Target/AMDGPU/SIInstrInfo.h 179 int64_t &Offset1,
180 int64_t &Offset2) const override;
184 int64_t &Offset,
191 bool shouldScheduleLoadsNear(SDNode *Load0, SDNode *Load1, int64_t Offset0,
192 int64_t Offset1, unsigned NumLoads) const override;
260 int64_t BrOffset) const override;
267 int64_t BrOffset,
916 int64_t getNamedImmOperand(const MachineInstr &MI, unsigned OpName) const {
1012 bool isLegalFLATOffset(int64_t Offset, unsigned AddrSpace,
lib/Target/AMDGPU/SILoadStoreOptimizer.cpp 199 int64_t Offset = 0;
1586 SmallVector<std::pair<MachineInstr *, int64_t>, 4> InstsWCommonBase;
1620 int64_t Dist = MAddr.Offset - MAddrNext.Offset;
lib/Target/AMDGPU/SILowerI1Copies.cpp 757 int64_t Imm = MI->getOperand(1).getImm();
lib/Target/AMDGPU/SIMachineScheduler.cpp 1960 int64_t OffLatReg;
lib/Target/AMDGPU/SIPeepholeSDWA.cpp 80 Optional<int64_t> foldToImm(const MachineOperand &Op) const;
522 Optional<int64_t> SIPeepholeSDWA::foldToImm(const MachineOperand &Op) const {
lib/Target/AMDGPU/SIRegisterInfo.cpp 313 int64_t SIRegisterInfo::getMUBUFInstrOffset(const MachineInstr *MI) const {
321 int64_t SIRegisterInfo::getFrameIndexInstrOffset(const MachineInstr *MI,
333 bool SIRegisterInfo::needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const {
337 int64_t FullOffset = Offset + getMUBUFInstrOffset(MI);
345 int64_t Offset) const {
378 int64_t Offset) const {
406 int64_t NewOffset = OffsetOp->getImm() + Offset;
415 int64_t Offset) const {
419 int64_t NewOffset = Offset + getMUBUFInstrOffset(MI);
640 int64_t Offset = InstOffset + MFI.getObjectOffset(Index);
641 int64_t ScratchOffsetRegDelta = 0;
1114 int64_t Offset = FrameInfo.getObjectOffset(Index);
1211 int64_t Offset = FrameInfo.getObjectOffset(Index);
1212 int64_t OldImm
1214 int64_t NewOffset = OldImm + Offset;
1226 int64_t Offset = FrameInfo.getObjectOffset(Index);
lib/Target/AMDGPU/SIRegisterInfo.h 82 int64_t getMUBUFInstrOffset(const MachineInstr *MI) const;
84 int64_t getFrameIndexInstrOffset(const MachineInstr *MI,
87 bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const override;
91 int64_t Offset) const override;
94 int64_t Offset) const override;
97 int64_t Offset) const override;
lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp 708 int64_t getHwregId(const StringRef Name) {
725 bool isValidHwreg(int64_t Id, const MCSubtargetInfo &STI) {
730 bool isValidHwreg(int64_t Id) {
734 bool isValidHwregOffset(int64_t Offset) {
738 bool isValidHwregWidth(int64_t Width) {
766 int64_t getMsgId(const StringRef Name) {
774 static bool isValidMsgId(int64_t MsgId) {
778 bool isValidMsgId(int64_t MsgId, const MCSubtargetInfo &STI, bool Strict) {
789 StringRef getMsgName(int64_t MsgId) {
793 int64_t getMsgOpId(int64_t MsgId, const StringRef Name) {
793 int64_t getMsgOpId(int64_t MsgId, const StringRef Name) {
805 bool isValidMsgOp(int64_t MsgId, int64_t OpId, bool Strict) {
805 bool isValidMsgOp(int64_t MsgId, int64_t OpId, bool Strict) {
823 StringRef getMsgOpName(int64_t MsgId, int64_t OpId) {
823 StringRef getMsgOpName(int64_t MsgId, int64_t OpId) {
828 bool isValidMsgStream(int64_t MsgId, int64_t OpId, int64_t StreamId, bool Strict) {
828 bool isValidMsgStream(int64_t MsgId, int64_t OpId, int64_t StreamId, bool Strict) {
828 bool isValidMsgStream(int64_t MsgId, int64_t OpId, int64_t StreamId, bool Strict) {
846 bool msgRequiresOp(int64_t MsgId) {
850 bool msgSupportsStream(int64_t MsgId, int64_t OpId) {
850 bool msgSupportsStream(int64_t MsgId, int64_t OpId) {
1139 bool isInlinableLiteral64(int64_t Literal, bool HasInv2Pi) {
1246 int64_t getSMRDEncodedOffset(const MCSubtargetInfo &ST, int64_t ByteOffset) {
1246 int64_t getSMRDEncodedOffset(const MCSubtargetInfo &ST, int64_t ByteOffset) {
1252 bool isLegalSMRDImmOffset(const MCSubtargetInfo &ST, int64_t ByteOffset) {
1253 int64_t EncodedOffset = getSMRDEncodedOffset(ST, ByteOffset);
lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h 445 int64_t getHwregId(const StringRef Name);
448 bool isValidHwreg(int64_t Id, const MCSubtargetInfo &STI);
451 bool isValidHwreg(int64_t Id);
454 bool isValidHwregOffset(int64_t Offset);
457 bool isValidHwregWidth(int64_t Width);
472 int64_t getMsgId(const StringRef Name);
475 int64_t getMsgOpId(int64_t MsgId, const StringRef Name);
475 int64_t getMsgOpId(int64_t MsgId, const StringRef Name);
478 StringRef getMsgName(int64_t MsgId);
481 StringRef getMsgOpName(int64_t MsgId, int64_t OpId);
481 StringRef getMsgOpName(int64_t MsgId, int64_t OpId);
484 bool isValidMsgId(int64_t MsgId, const MCSubtargetInfo &STI, bool Strict = true);
487 bool isValidMsgOp(int64_t MsgId, int64_t OpId, bool Strict = true);
487 bool isValidMsgOp(int64_t MsgId, int64_t OpId, bool Strict = true);
490 bool isValidMsgStream(int64_t MsgId, int64_t OpId, int64_t StreamId, bool Strict = true);
490 bool isValidMsgStream(int64_t MsgId, int64_t OpId, int64_t StreamId, bool Strict = true);
490 bool isValidMsgStream(int64_t MsgId, int64_t OpId, int64_t StreamId, bool Strict = true);
493 bool msgRequiresOp(int64_t MsgId);
496 bool msgSupportsStream(int64_t MsgId, int64_t OpId);
496 bool msgSupportsStream(int64_t MsgId, int64_t OpId);
621 bool isInlinableLiteral64(int64_t Literal, bool HasInv2Pi);
636 int64_t getSMRDEncodedOffset(const MCSubtargetInfo &ST, int64_t ByteOffset);
636 int64_t getSMRDEncodedOffset(const MCSubtargetInfo &ST, int64_t ByteOffset);
641 bool isLegalSMRDImmOffset(const MCSubtargetInfo &ST, int64_t ByteOffset);
lib/Target/AMDGPU/Utils/AMDKernelCodeTUtils.cpp 119 static bool expectAbsExpression(MCAsmParser &MCParser, int64_t &Value, raw_ostream& Err) {
137 int64_t Value = 0;
147 int64_t Value = 0;
lib/Target/ARC/ARCISelLowering.cpp 728 int64_t Offset = GN->getOffset();
lib/Target/ARC/ARCOptAddrMode.cpp 94 int64_t Offset);
116 static bool isValidLoadStoreOffset(int64_t Off) { return isInt<9>(Off); }
120 static bool isValidIncrementOffset(int64_t Off) { return isUInt<6>(Off); }
122 static bool isAddConstantOp(const MachineInstr &MI, int64_t &Amount) {
123 int64_t Sign = 1;
170 int64_t Disp) {
177 int64_t Offset = MO.getImm() + Disp;
220 int64_t Incr;
345 int64_t NewOffset = Incr.getImm();
347 int64_t Dummy;
363 unsigned NewBase, int64_t NewOffset) {
366 int64_t Amount;
lib/Target/ARM/ARMAsmPrinter.cpp 1162 int64_t Offset = 0;
lib/Target/ARM/ARMBaseInstrInfo.cpp 581 int64_t OpcImm = Opc.getImm();
1839 int64_t &Offset1,
1840 int64_t &Offset2) const {
1920 int64_t Offset1, int64_t Offset2,
1920 int64_t Offset1, int64_t Offset2,
lib/Target/ARM/ARMBaseInstrInfo.h 246 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
247 int64_t &Offset2) const override;
258 int64_t Offset1, int64_t Offset2,
258 int64_t Offset1, int64_t Offset2,
lib/Target/ARM/ARMBaseRegisterInfo.cpp 497 int64_t ARMBaseRegisterInfo::
501 int64_t InstrOffs = 0;
549 needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const {
591 int64_t FPOffset = Offset - 8;
632 int64_t Offset) const {
656 int64_t Offset) const {
684 int64_t Offset) const {
lib/Target/ARM/ARMBaseRegisterInfo.h 165 int64_t getFrameIndexInstrOffset(const MachineInstr *MI,
167 bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const override;
170 int64_t Offset) const override;
172 int64_t Offset) const override;
174 int64_t Offset) const override;
lib/Target/ARM/ARMCallLowering.cpp 95 Register getStackAddress(uint64_t Size, int64_t Offset,
292 Register getStackAddress(uint64_t Size, int64_t Offset,
lib/Target/ARM/ARMISelDAGToDAG.cpp 3406 int64_t Addend = -C->getSExtValue();
lib/Target/ARM/ARMISelLowering.cpp 2703 int64_t LROffset;
4801 int64_t Val1 = cast<ConstantSDNode>(*K1)->getSExtValue();
4802 int64_t Val2 = cast<ConstantSDNode>(*K2)->getSExtValue();
4803 int64_t PosVal = std::max(Val1, Val2);
4804 int64_t NegVal = std::min(Val1, Val2);
5981 static bool getVShiftImm(SDValue Op, unsigned ElementBits, int64_t &Cnt) {
6002 static bool isVShiftLImm(SDValue Op, EVT VT, bool isLong, int64_t &Cnt) {
6004 int64_t ElementBits = VT.getScalarSizeInBits();
6017 int64_t &Cnt) {
6019 int64_t ElementBits = VT.getScalarSizeInBits();
6035 int64_t Cnt;
11504 int64_t imm = C->getSExtValue();
11843 int64_t MulAmt = C->getSExtValue();
13609 int64_t Cnt;
13710 int64_t Cnt;
13800 int64_t Cnt;
14861 static bool isLegalT1AddressImmediate(int64_t V, EVT VT) {
14887 static bool isLegalT2AddressImmediate(int64_t V, EVT VT,
14941 static bool isLegalAddressImmediate(int64_t V, EVT VT,
15096 bool ARMTargetLowering::isLegalICmpImmediate(int64_t Imm) const {
15112 bool ARMTargetLowering::isLegalAddImmediate(int64_t Imm) const {
15114 int64_t AbsImm = std::abs(Imm);
15770 int64_t CVal64 = C->getSExtValue();
lib/Target/ARM/ARMISelLowering.h 388 bool isLegalICmpImmediate(int64_t Imm) const override;
394 bool isLegalAddImmediate(int64_t Imm) const override;
lib/Target/ARM/ARMOptimizeBarriersPass.cpp 58 int64_t DMBType = -1;
lib/Target/ARM/ARMTargetTransformInfo.cpp 72 int64_t SImmVal = Imm.getSExtValue();
132 int64_t NegImm = -Imm.getSExtValue();
lib/Target/ARM/AsmParser/ARMAsmParser.cpp 993 int64_t Val = CE->getValue();
994 int64_t Align = 1LL << scale;
995 int64_t Max = Align * ((1LL << width) - 1);
1008 int64_t Val = CE->getValue();
1009 int64_t Align = 1LL << scale;
1010 int64_t Max = Align * ((1LL << (width-1)) - 1);
1011 int64_t Min = -Align * (1LL << (width-1));
1023 int64_t Val = CE->getValue();
1034 int64_t Val = 0;
1063 int64_t Value = CE->getValue();
1072 int64_t Value = CE->getValue();
1080 int64_t Value = CE->getValue();
1117 int64_t Value = -CE->getValue();
1157 int64_t Value = CE->getValue();
1167 int64_t Value = CE->getValue();
1225 int64_t Value = CE->getValue();
1243 int64_t Value = CE->getValue();
1251 int64_t Value = CE->getValue();
1260 int64_t Value = CE->getValue();
1270 int64_t Value = CE->getValue();
1334 int64_t Value = CE->getValue();
1344 int64_t Value = CE->getValue();
1352 int64_t Value = CE->getValue();
1433 int64_t Val = Memory.OffsetImm->getValue();
1518 int64_t Val = Memory.OffsetImm->getValue();
1527 int64_t Val = CE->getValue();
1545 int64_t Val = Memory.OffsetImm->getValue();
1560 int64_t Val = CE->getValue();
1577 int64_t Val = Memory.OffsetImm->getValue();
1593 int64_t Val = Memory.OffsetImm->getValue();
1647 int64_t Val = Memory.OffsetImm->getValue();
1657 int64_t Val = Memory.OffsetImm->getValue();
1667 int64_t Val = Memory.OffsetImm->getValue();
1677 int64_t Val = Memory.OffsetImm->getValue();
1691 int64_t Val = Memory.OffsetImm->getValue();
1708 int64_t Val = Memory.OffsetImm->getValue();
1717 int64_t Val = Memory.OffsetImm->getValue();
1728 int64_t Val = Memory.OffsetImm->getValue();
1743 int64_t Val = Memory.OffsetImm->getValue();
1793 int64_t Val = Memory.OffsetImm->getValue();
1802 int64_t Range = (1U << (7+shift)) - 1;
1811 int64_t Val = Memory.OffsetImm->getValue();
1822 int64_t Val = Memory.OffsetImm->getValue();
1832 int64_t Val = Memory.OffsetImm->getValue();
1848 int64_t Val = Memory.OffsetImm->getValue();
1863 int64_t Val = CE->getValue();
1872 int64_t Val = CE->getValue();
2107 int64_t Value = CE->getValue();
2157 static bool isValidNEONi32vmovImm(int64_t Value) {
2179 int64_t Value = CE->getValue();
2947 int64_t Val = Memory.OffsetImm ? Memory.OffsetImm->getValue() : 0;
2963 int64_t Val = Memory.OffsetImm ? Memory.OffsetImm->getValue() : 0;
2978 int64_t Val = Memory.OffsetImm ? Memory.OffsetImm->getValue() : 0;
2999 int64_t Val = Memory.OffsetImm ? Memory.OffsetImm->getValue() : 0;
3014 int64_t Val = Memory.OffsetImm ? Memory.OffsetImm->getValue() : 0;
3064 int64_t Val = Memory.OffsetImm ? (Memory.OffsetImm->getValue() / 4) : 0;
3071 int64_t Val = Memory.OffsetImm ? (Memory.OffsetImm->getValue() / 2) : 0;
3078 int64_t Val = Memory.OffsetImm ? (Memory.OffsetImm->getValue()) : 0;
3085 int64_t Val = Memory.OffsetImm ? (Memory.OffsetImm->getValue() / 4) : 0;
3980 int64_t Imm = 0;
4477 int64_t Val = CE->getValue();
4934 int64_t Val = Tok.getIntVal();
5165 int64_t Val = CE->getValue();
5227 int64_t Val = CE->getValue();
5245 int64_t Imm1, Imm2;
5382 int64_t LSB = CE->getValue();
5415 int64_t Width = CE->getValue();
5882 int64_t Imm = CE->getValue();
5962 int64_t Val = Tok.getIntVal();
8365 int64_t Value =
10693 int64_t Val = Parser.getTok().getIntVal();
10806 int64_t Tag;
10837 int64_t IntegerValue = 0;
11090 int64_t Offset = 0;
11323 int64_t StackOffset;
11353 const int64_t Opcode = OC->getValue();
11408 int64_t Offset = 0;
11832 int64_t Value;
lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h 656 int64_t Mantissa = Imm.getZExtValue() & 0x3ff; // 10 bits
682 int64_t Mantissa = Imm.getZExtValue() & 0x7fffff; // 23 bits
709 int64_t Exp = (Imm.lshr(52).getSExtValue() & 0x7ff) - 1023; // -1022 to 1023
lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp 227 static const char *checkPCRelOffset(uint64_t Value, int64_t Min, int64_t Max) {
227 static const char *checkPCRelOffset(uint64_t Value, int64_t Min, int64_t Max) {
228 int64_t Offset = int64_t(Value) - 4;
244 int64_t Offset = int64_t(Value) - 4;
256 int64_t Offset = int64_t(Value) - 4;
265 int64_t Offset = int64_t(Value) - 4;
276 int64_t Offset = (Value & ~1);
lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp 82 void emitSetFP(unsigned FpReg, unsigned SpReg, int64_t Offset = 0) override;
83 void emitMovSP(unsigned Reg, int64_t Offset = 0) override;
84 void emitPad(int64_t Offset) override;
87 void emitUnwindRaw(int64_t Offset,
132 int64_t Offset) {
142 void ARMTargetAsmStreamer::emitMovSP(unsigned Reg, int64_t Offset) {
153 void ARMTargetAsmStreamer::emitPad(int64_t Offset) {
261 void ARMTargetAsmStreamer::emitUnwindRaw(int64_t Offset,
394 void emitSetFP(unsigned FpReg, unsigned SpReg, int64_t Offset = 0) override;
395 void emitMovSP(unsigned Reg, int64_t Offset = 0) override;
396 void emitPad(int64_t Offset) override;
399 void emitUnwindRaw(int64_t Offset,
462 void emitSetFP(unsigned NewFpReg, unsigned NewSpReg, int64_t Offset = 0);
463 void emitMovSP(unsigned Reg, int64_t Offset = 0);
464 void emitPad(int64_t Offset);
466 void emitUnwindRaw(int64_t Offset, const SmallVectorImpl<uint8_t> &Opcodes);
690 int64_t MappingSymbolCounter = 0;
703 int64_t FPOffset; // Offset: (final frame pointer) - (initial $sp)
704 int64_t SPOffset; // Offset: (final $sp) - (initial $sp)
705 int64_t PendingOffset; // Offset: (final $sp) - (emitted $sp)
735 int64_t Offset) {
739 void ARMTargetELFStreamer::emitMovSP(unsigned Reg, int64_t Offset) {
743 void ARMTargetELFStreamer::emitPad(int64_t Offset) {
752 void ARMTargetELFStreamer::emitUnwindRaw(int64_t Offset,
1340 int64_t LastRegSaveSPOffset = SPOffset - PendingOffset;
1409 int64_t Offset) {
1422 void ARMELFStreamer::emitMovSP(unsigned Reg, int64_t Offset) {
1436 void ARMELFStreamer::emitPad(int64_t Offset) {
1475 void ARMELFStreamer::emitUnwindRaw(int64_t Offset,
lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp 331 int64_t TargetAddress;
633 int64_t Imm = MO2.getImm();
lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp 836 int64_t offset = MO.getImm();
1212 const int64_t Value = MCE->getValue();
lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp 271 int64_t Imm = Inst.getOperand(0).getImm();
lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp 338 int64_t Value = (int64_t)FixedValue; // The displacement is signed.
339 int64_t Range;
438 int64_t Res;
lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp 95 int64_t Offset) {}
96 void ARMTargetStreamer::emitMovSP(unsigned Reg, int64_t Offset) {}
97 void ARMTargetStreamer::emitPad(int64_t Offset) {}
100 void ARMTargetStreamer::emitUnwindRaw(int64_t StackOffset,
lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.cpp 132 void UnwindOpcodeAssembler::EmitSPOffset(int64_t Offset) {
lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.h 59 void EmitSPOffset(int64_t Offset);
lib/Target/ARM/ThumbRegisterInfo.cpp 431 int64_t Offset) const {
lib/Target/ARM/ThumbRegisterInfo.h 53 int64_t Offset) const override;
lib/Target/AVR/AVRExpandPseudoInsts.cpp 292 int64_t Offs = MI.getOperand(2).getOffset();
503 int64_t Offs = MI.getOperand(1).getOffset();
552 int64_t Offs = MI.getOperand(1).getOffset();
984 int64_t Offs = MI.getOperand(0).getOffset();
lib/Target/AVR/AVRISelLowering.cpp 403 int64_t Offset = cast<GlobalAddressSDNode>(Op)->getOffset();
747 int64_t Offs = AM.BaseOffs;
1934 int64_t CVal64 = C->getSExtValue();
lib/Target/AVR/AVRInstrInfo.cpp 533 int64_t BrOffset) const {
561 int64_t BrOffset,
lib/Target/AVR/AVRInstrInfo.h 108 int64_t BrOffset) const override;
113 int64_t BrOffset,
lib/Target/AVR/AVRRelaxMemOperations.cpp 93 int64_t Imm = MI.getOperand(1).getImm();
lib/Target/AVR/AsmParser/AVRAsmParser.cpp 175 int64_t Value = CE->getValue();
703 int64_t RegNum = Const->getValue();
lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp 42 int64_t Min = minIntN(Width);
43 int64_t Max = maxIntN(Width);
61 int64_t Max = maxUIntN(Width);
lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp 130 int64_t Imm = Op.getImm();
156 int64_t Offset = OffsetOp.getImm();
lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp 235 int64_t Result;
274 for (int64_t i = WordCount - 1; i >= 0; --i) {
lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp 54 bool AVRMCExpr::evaluateAsConstant(int64_t &Result) const {
98 int64_t AVRMCExpr::evaluateAsInt64(int64_t Value) const {
98 int64_t AVRMCExpr::evaluateAsInt64(int64_t Value) const {
lib/Target/AVR/MCTargetDesc/AVRMCExpr.h 52 bool evaluateAsConstant(int64_t &Result) const;
77 int64_t evaluateAsInt64(int64_t Value) const;
77 int64_t evaluateAsInt64(int64_t Value) const;
lib/Target/BPF/AsmParser/BPFAsmParser.cpp 132 int64_t getConstantImm() const {
lib/Target/BPF/BPFISelLowering.cpp 725 int64_t imm32 = MI.getOperand(2).getImm();
lib/Target/BPF/BPFMIPeephole.cpp 402 int64_t imm = MI.getOperand(2).getImm();
lib/Target/BPF/BTFDebug.cpp 487 int64_t Count = CI->getSExtValue();
lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp 271 int64_t Res;
287 const int64_t high_bit_set = 1ULL << 63;
359 int64_t Value;
392 int64_t Value;
397 int64_t Extended = SignExtend64(Value, 32);
536 int64_t Value(I.getImm());
668 int64_t Res;
695 int64_t MaxBytesToFill = 15;
744 int64_t Size;
749 int64_t ByteAlignment = 1;
760 int64_t AccessAlignment = 0;
1174 int64_t Value;
1242 int64_t Value;
1248 int64_t Value;
1354 int64_t Value;
1457 int64_t Value;
1548 int64_t Value;
1560 int64_t Value;
1586 int64_t Value;
1600 int64_t Value;
1683 int64_t Value;
1707 int64_t Value;
1737 int64_t Value;
1861 int64_t Value;
1881 int64_t Value;
lib/Target/Hexagon/BitTracker.cpp 412 BT::RegisterCell BT::MachineEvaluator::eIMM(int64_t V, uint16_t W) const {
lib/Target/Hexagon/BitTracker.h 416 RegisterCell eIMM(int64_t V, uint16_t W) const;
lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp 66 int64_t Value) {
73 int64_t Bits;
89 int64_t FullValue = fullValue(Disassembler, MI, SignExtend64<T>(tmp));
90 int64_t Extended = SignExtend64<32>(FullValue);
723 int64_t FullValue = fullValue(Disassembler, MI, tmp);
lib/Target/Hexagon/HexagonAsmPrinter.cpp 184 int64_t Value;
426 int64_t Imm;
454 int64_t Imm;
490 int64_t Imm;
521 int64_t Imm;
580 int64_t Value;
lib/Target/Hexagon/HexagonBitSimplify.cpp 341 int64_t T = 0;
1382 unsigned genTfrConst(const TargetRegisterClass *RC, int64_t C,
1410 unsigned ConstGeneration::genTfrConst(const TargetRegisterClass *RC, int64_t C,
1475 int64_t C = U;
1959 int64_t Off = OffOp.getImm();
lib/Target/Hexagon/HexagonBitTracker.cpp 647 int64_t S = im(2);
lib/Target/Hexagon/HexagonCommonGEP.cpp 214 int64_t i = CI->getValue().getSExtValue();
lib/Target/Hexagon/HexagonConstExtenders.cpp 344 int64_t ImmVal; // MO_Immediate, MO_TargetIndex,
lib/Target/Hexagon/HexagonConstPropagation.cpp 1622 int64_t V = A1.getSExtValue();
1765 int64_t V = A1.getZExtValue();
1982 int64_t V = MI.getOperand(1).getImm();
2040 int64_t B = MI.getOperand(2).getImm();
2688 int64_t V = ValOp.getImm();
2890 int64_t V = A.getSExtValue();
3006 int64_t V = A.getSExtValue();
lib/Target/Hexagon/HexagonCopyToCombine.cpp 657 int64_t V = HiOperand.getImm();
lib/Target/Hexagon/HexagonFrameLowering.cpp 946 int64_t Offset;
lib/Target/Hexagon/HexagonHardwareLoops.cpp 183 int64_t &IVBump, MachineInstr *&IVOp) const;
189 int64_t IVBump) const;
206 int64_t IVBump, Comparison::Kind Cmp) const;
257 bool checkForImmediate(const MachineOperand &MO, int64_t &Val) const;
261 int64_t V;
266 int64_t getImmediate(const MachineOperand &MO) const {
267 int64_t V;
276 void setImmediate(MachineOperand &MO, int64_t Val);
403 int64_t &IVBump,
415 using RegisterBump = std::pair<unsigned, int64_t>;
446 int64_t V;
510 int64_t IVBump) const {
595 int64_t IVBump = 0;
700 int64_t V;
710 int64_t V;
728 int64_t IVBump,
779 int64_t StartV = Start->getImm();
780 int64_t EndV = End->getImm();
781 int64_t Dist = EndV - StartV;
807 int64_t Dist1 = (IVBump > 0) ? (Dist + (IVBump - 1)) / IVBump
852 int64_t StartV = 0, EndV = 0;
858 int64_t AdjV = 0;
1258 int64_t CountImm = TripCount->getImm();
1427 int64_t Imm;
1498 int64_t &Val) const {
1509 int64_t TV;
1535 int64_t V1, V2;
1544 int64_t V1, V3;
1578 void HexagonHardwareLoops::setImmediate(MachineOperand &MO, int64_t Val) {
1596 static bool isImmValidForOpcode(unsigned CmpOpc, int64_t Imm) {
1616 using RegisterBump = std::pair<unsigned, int64_t>;
1645 int64_t V;
1811 int64_t CmpImm = getImmediate(*CmpImmOp);
1812 int64_t V = RB.second;
lib/Target/Hexagon/HexagonISelDAGToDAG.cpp 1583 int64_t V = CN->getSExtValue();
lib/Target/Hexagon/HexagonISelLowering.cpp 1020 int64_t Offset = GAN->getOffset();
1114 int64_t Offset = GA->getOffset();
1156 int64_t Offset = GA->getOffset();
1178 int64_t Offset = GA->getOffset();
3107 bool HexagonTargetLowering::isLegalICmpImmediate(int64_t Imm) const {
lib/Target/Hexagon/HexagonISelLowering.h 301 bool isLegalICmpImmediate(int64_t Imm) const override;
lib/Target/Hexagon/HexagonInstrInfo.cpp 682 int64_t TripCount;
733 int64_t TripCount = Loop->getOperand(1).getImm() + TripCountAdjust;
2940 const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset,
3157 int64_t &Offset,
lib/Target/Hexagon/HexagonInstrInfo.h 209 int64_t &Offset,
430 MachineOperand *getBaseAndOffset(const MachineInstr &MI, int64_t &Offset,
lib/Target/Hexagon/HexagonNewValueJump.cpp 254 int64_t v = Op2.getImm();
lib/Target/Hexagon/HexagonOptAddrMode.cpp 373 int64_t newOffset = OffsetOp.getImm() + AddMI->getOperand(2).getImm();
511 int64_t Offset = ImmOp.getOffset() + OldMI->getOperand(2).getImm();
568 int64_t Offset = ImmOp.getOffset() + OldMI->getOperand(1).getImm();
lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp 87 int64_t ImmValue = MI.getOperand(1).getImm();
lib/Target/Hexagon/HexagonSplitDouble.cpp 359 int64_t V = OpX.getImm();
651 int64_t Off = PostInc ? 0 : MI->getOperand(2).getImm();
660 int64_t Off = PostInc ? 0 : MI->getOperand(1).getImm();
673 int64_t Inc = Load ? MI->getOperand(3).getImm()
785 int64_t Sh64 = Op2.getImm();
910 int64_t Sh64 = Op3.getImm();
lib/Target/Hexagon/HexagonStoreWidening.cpp 127 static int64_t getStoreOffset(const MachineInstr *MI) {
432 int64_t Off = FirstSt->getOperand(1).getImm();
455 int64_t Off = FirstSt->getOperand(1).getImm();
lib/Target/Hexagon/HexagonSubtarget.cpp 277 int64_t Offset0;
290 int64_t Offset1;
lib/Target/Hexagon/HexagonVLIWPacketizer.cpp 482 int64_t NewOff = Off.getImm() - (FrameSize + HEXAGON_LRFP_SIZE);
533 int64_t Offset = MI.getOperand(OPI).getImm();
lib/Target/Hexagon/HexagonVLIWPacketizer.h 41 int64_t ChangedOffset;
lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp 390 const int64_t FixupValue, const char *fixupStr) const {
609 int64_t sValue = Value;
610 int64_t maxValue;
lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp 70 int64_t Value;
85 int64_t Value;
lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp 589 int64_t Value;
lib/Target/Hexagon/MCTargetDesc/HexagonMCCompound.cpp 201 int64_t Value;
lib/Target/Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp 549 int64_t Value;
560 int64_t Value;
705 int64_t Value;
lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp 519 int64_t Value;
596 int64_t Flags = MCI.getOperand(0).getImm();
624 int64_t Flags = MCI.getOperand(0).getImm();
762 int64_t HexagonMCInstrInfo::minConstant(MCInst const &MCI, size_t Index) {
770 int64_t Value;
lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.h 67 int64_t const innerLoopMask = 1 << innerLoopOffset;
70 int64_t const outerLoopMask = 1 << outerLoopOffset;
75 int64_t const memReorderDisabledMask = 1 << memReorderDisabledOffset;
186 int64_t minConstant(MCInst const &MCI, size_t Index);
lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp 444 int64_t Value;
lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.h 151 int64_t BundleFlags;
lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp 216 int64_t Value = MCE->getValue();
231 int64_t Value = ConstExpr->getValue();
254 int64_t Value = ConstExpr->getValue();
267 int64_t Value = ConstExpr->getValue();
291 int64_t Value = ConstExpr->getValue();
315 int64_t Value = ConstExpr->getValue();
329 int64_t Value = ConstExpr->getValue();
339 int64_t Value = ConstExpr->getValue();
371 int64_t Value = ConstExpr->getValue();
846 int64_t Value = ConstExpr->getValue();
lib/Target/Lanai/Disassembler/LanaiDisassembler.cpp 209 static bool tryAddingSymbolicOperand(int64_t Value, bool IsBranch,
lib/Target/Lanai/LanaiISelLowering.cpp 334 int64_t Val = C->getSExtValue();
343 int64_t Val = C->getSExtValue();
892 int64_t MulAmt = C->getSExtValue();
906 int64_t E = std::abs(MulAmt);
1162 int64_t Offset = cast<GlobalAddressSDNode>(Op)->getOffset();
lib/Target/Lanai/LanaiInstrInfo.cpp 104 int64_t OffsetA = 0, OffsetB = 0;
758 const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset,
798 int64_t &Offset,
lib/Target/Lanai/LanaiInstrInfo.h 72 int64_t &Offset,
77 int64_t &Offset, unsigned &Width,
lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.cpp 103 int64_t Imm = Inst.getOperand(0).getImm();
107 int64_t Imm = Inst.getOperand(0).getImm();
lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp 168 int64_t Val;
355 int64_t Res;
lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp 117 int64_t Imm;
lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.cpp 40 int64_t Imm = Op.getImm() * 2 + 2;
lib/Target/MSP430/MCTargetDesc/MSP430MCCodeEmitter.cpp 171 int64_t Imm = MO.getImm();
lib/Target/MSP430/MSP430ISelLowering.cpp 999 int64_t Offset = cast<GlobalAddressSDNode>(Op)->getOffset();
lib/Target/MSP430/MSP430InstrInfo.h 72 int64_t getFramePoppedByCallee(const MachineInstr &I) const {
lib/Target/Mips/AsmParser/MipsAsmParser.cpp 224 bool loadImmediate(int64_t ImmValue, unsigned DstReg, unsigned SrcReg,
1200 int64_t Imm = getConstantImm() - Offset;
1250 int64_t Res;
1400 int64_t Val = getConstantImm();
1427 int64_t getConstantImm() const {
1429 int64_t Value = 0;
1444 int64_t getConstantMemOff() const {
2078 int64_t MemOffset = Op.getImm();
2480 int64_t ImmValue = Inst.getOperand(2).getImm();
2492 int64_t ImmValue = Inst.getOperand(2).getImm();
2614 bool MipsAsmParser::loadImmediate(int64_t ImmValue, unsigned DstReg,
3566 int64_t ImmValue = ImmOp.getImm();
3644 int64_t LoOffset = OffsetOp.getImm() & 0xffff;
3645 int64_t HiOffset = OffsetOp.getImm() & ~0xffff;
4031 int64_t ImmValue;
4241 int64_t OffsetValue = OffsetImmOp.getImm();
4257 int64_t FirstOffset = IsLargeOffset ? 0 : OffsetValue;
4258 int64_t SecondOffset = IsLargeOffset ? 1 : (OffsetValue + 1);
4293 int64_t OffsetValue = OffsetImmOp.getImm();
4307 int64_t FirstOffset = IsLargeOffset ? 1 : (OffsetValue + 1);
4308 int64_t SecondOffset = IsLargeOffset ? 0 : OffsetValue;
4344 int64_t OffsetValue = OffsetImmOp.getImm();
4348 int64_t LxlOffset = IsLargeOffset ? 0 : OffsetValue;
4349 int64_t LxrOffset = IsLargeOffset ? 3 : (OffsetValue + 3);
4428 int64_t ImmValue = Inst.getOperand(2).getImm();
4485 int64_t ImmValue = Inst.getOperand(2).getImm();
4534 int64_t ImmValue = Inst.getOperand(2).getImm();
4696 int64_t ImmValue = Inst.getOperand(2).getImm();
4821 int64_t ImmValue = Inst.getOperand(2).getImm() % 64;
5166 int64_t Imm = Inst.getOperand(2).getImm();
6229 int64_t Imm;
6356 int64_t RegNum = Token.getIntVal();
6450 int64_t Val = MCE->getValue();
7364 int64_t StackOffsetVal;
7424 int64_t OffsetVal;
8228 int64_t DummyNumberVal;
8310 int64_t FrameSizeVal;
8373 int64_t BitMaskVal;
8394 int64_t FrameOffsetVal;
lib/Target/Mips/Disassembler/MipsDisassembler.cpp 676 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4;
705 int64_t Imm = 0;
749 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4;
778 int64_t Imm = 0;
819 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4;
858 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4;
901 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4;
946 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4;
988 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4;
1037 int64_t Imm = SignExtend64(fieldFromInstruction(insn, 0, 16), 16) * 4 + 4;
2037 int64_t Offset = SignExtend64<9>((Insn >> 7) & 0x1ff);
lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp 64 int64_t Shift = Inst.getOperand(2).getImm();
592 int64_t Res;
lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp 38 int64_t AbsVal;
159 int64_t AbsVal = Res.getConstant();
lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp 303 unsigned Opcode, unsigned SrcReg, unsigned BaseReg, int64_t Offset,
370 unsigned BaseReg, int64_t Offset,
lib/Target/Mips/MicroMipsSizeReduction.cpp 308 static bool GetImm(MachineInstr *MI, unsigned Op, int64_t &Imm) {
317 static bool AddiuspImmValue(int64_t Value) {
318 int64_t Value2 = Value >> 2;
327 static bool InRange(int64_t Value, unsigned short Shift, int LBound,
329 int64_t Value2 = Value >> Shift;
339 int64_t offset;
400 int64_t Offset1, Offset2;
528 int64_t ImmValue;
lib/Target/Mips/Mips16FrameLowering.cpp 77 int64_t Offset = MFI.getObjectOffset(I->getFrameIdx());
lib/Target/Mips/Mips16ISelLowering.cpp 729 int64_t imm = MI.getOperand(1).getImm();
746 (unsigned shortOp, unsigned longOp, int64_t Imm) {
782 int64_t Imm = MI.getOperand(2).getImm();
lib/Target/Mips/Mips16InstrInfo.cpp 214 void Mips16InstrInfo::makeFrame(unsigned SP, int64_t FrameSize,
234 int64_t Remainder = FrameSize - Base;
244 void Mips16InstrInfo::restoreFrame(unsigned SP, int64_t FrameSize,
258 int64_t Remainder = FrameSize - Base;
279 void Mips16InstrInfo::adjustStackPtrBig(unsigned SP, int64_t Amount,
304 unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
310 void Mips16InstrInfo::adjustStackPtr(unsigned SP, int64_t Amount,
324 unsigned Mips16InstrInfo::loadImmediate(unsigned FrameReg, int64_t Imm,
458 const MCInstrDesc &Mips16InstrInfo::AddiuSpImm(int64_t Imm) const {
476 int64_t Amount) {
lib/Target/Mips/Mips16InstrInfo.h 74 void makeFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB,
78 void restoreFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB,
82 void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
88 unsigned loadImmediate(unsigned FrameReg, int64_t Imm, MachineBasicBlock &MBB,
92 static bool validImmediate(unsigned Opcode, unsigned Reg, int64_t Amount);
100 const MCInstrDesc& AddiuSpImm(int64_t Imm) const;
119 void adjustStackPtrBig(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
124 void adjustStackPtrBigUnrestricted(unsigned SP, int64_t Amount,
lib/Target/Mips/Mips16RegisterInfo.cpp 124 int64_t Offset;
lib/Target/Mips/MipsAnalyzeImmediate.cpp 97 int64_t Imm = SignExtend64<16>(Seq[0].ImmOpnd);
98 int64_t ShiftedImm = (uint64_t)Imm << (Seq[1].ImmOpnd - 16);
lib/Target/Mips/MipsBranchExpansion.cpp 156 int64_t computeOffset(const MachineInstr *Br);
304 int64_t MipsBranchExpansion::computeOffset(const MachineInstr *Br) {
305 int64_t Offset = 0;
795 int64_t Offset = computeOffset(&*Br);
lib/Target/Mips/MipsConstantIslandPass.cpp 1654 int64_t V = Literal.getImm();
lib/Target/Mips/MipsFastISel.cpp 96 int64_t Offset = 0;
129 void setOffset(int64_t Offset_) { Offset = Offset_; }
130 int64_t getOffset() const { return Offset; }
207 unsigned materialize32BitInt(int64_t Imm, const TargetRegisterClass *RC);
220 unsigned MemReg, int64_t MemOffset) {
225 unsigned MemReg, int64_t MemOffset) {
364 unsigned MipsFastISel::materialize32BitInt(int64_t Imm,
392 int64_t Imm = CFP->getValueAPF().bitcastToAPInt().getZExtValue();
488 int64_t TmpOffset = Addr.getOffset();
799 int64_t Offset = Addr.getOffset();
850 int64_t Offset = Addr.getOffset();
1877 int64_t Imm;
lib/Target/Mips/MipsFrameLowering.cpp 118 int64_t Size = 0;
143 int64_t Amount = I->getOperand(0).getImm();
lib/Target/Mips/MipsISelLowering.cpp 732 int64_t Diff = TrueC->getSExtValue() - FalseC->getSExtValue();
1560 int64_t ShiftImm = 32 - (Size * 8);
1669 int64_t MaskImm = (Size == 1) ? 255 : 65535;
1850 int64_t MaskImm = (Size == 1) ? 255 : 65535;
4037 int64_t Val = C->getSExtValue();
4047 int64_t Val = C->getZExtValue();
4067 int64_t Val = C->getSExtValue();
4077 int64_t Val = C->getSExtValue();
4087 int64_t Val = C->getSExtValue();
4097 int64_t Val = C->getSExtValue();
lib/Target/Mips/MipsInstrInfo.cpp 278 bool MipsInstrInfo::isBranchOffsetInRange(unsigned BranchOpc, int64_t BrOffset) const {
723 const int64_t PosLow, const int64_t PosHigh,
723 const int64_t PosLow, const int64_t PosHigh,
724 const int64_t SizeLow,
725 const int64_t SizeHigh,
726 const int64_t BothLow,
727 const int64_t BothHigh) {
733 int64_t Pos = MOPos.getImm();
744 int64_t Size = MOSize.getImm();
lib/Target/Mips/MipsInstrInfo.h 90 int64_t BrOffset) const override;
142 virtual void adjustStackPtr(unsigned SP, int64_t Amount,
lib/Target/Mips/MipsInstructionSelector.cpp 393 int64_t SignedOffset = 0;
lib/Target/Mips/MipsOptionRecord.h 77 int64_t ri_gp_value;
lib/Target/Mips/MipsRegisterInfo.cpp 268 int64_t spOffset = MF.getFrameInfo().getObjectOffset(FrameIndex);
lib/Target/Mips/MipsSEFrameLowering.cpp 375 int64_t Offset = 4 * (Subtarget.isLittle() ? N : (1 - N));
457 int64_t Offset = MFI.getObjectOffset(I->getFrameIdx());
517 int64_t Offset = MFI.getObjectOffset(MipsFI->getEhDataRegFI(I));
lib/Target/Mips/MipsSEISelDAGToDAG.cpp 793 int64_t Imm = CN->getSExtValue();
lib/Target/Mips/MipsSEISelLowering.cpp 1969 int64_t Max;
1977 int64_t Value = cast<ConstantSDNode>(Op->getOperand(2))->getSExtValue();
2128 int64_t Max;
2140 int64_t Value = cast<ConstantSDNode>(Op->getOperand(2))->getSExtValue();
2148 int64_t Value = cast<ConstantSDNode>(Op->getOperand(2))->getSExtValue();
2159 int64_t Max;
2167 int64_t Value = cast<ConstantSDNode>(Op->getOperand(3))->getSExtValue();
2219 int64_t Max;
2227 int64_t Value = cast<ConstantSDNode>(Op->getOperand(2))->getSExtValue();
2249 int64_t Max;
2257 int64_t Value = cast<ConstantSDNode>(Op->getOperand(2))->getSExtValue();
lib/Target/Mips/MipsSEInstrInfo.cpp 580 void MipsSEInstrInfo::adjustStackPtr(unsigned SP, int64_t Amount,
608 unsigned MipsSEInstrInfo::loadImmediate(int64_t Imm, MachineBasicBlock &MBB,
lib/Target/Mips/MipsSEInstrInfo.h 68 void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
74 unsigned loadImmediate(int64_t Imm, MachineBasicBlock &MBB,
lib/Target/Mips/MipsSERegisterInfo.cpp 201 int64_t Offset;
lib/Target/Mips/MipsTargetStreamer.h 156 unsigned BaseReg, int64_t Offset,
164 int64_t Offset, unsigned TmpReg, SMLoc IDLoc,
lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp 100 int64_t Imm = MO.getImm();
150 int64_t Imm = MO.getImm();
lib/Target/NVPTX/NVPTXAsmPrinter.cpp 1352 int64_t ElementSize = 0;
1765 int64_t vp = (int64_t)val;
1779 int64_t *vp = (int64_t *)&val;
1780 for (unsigned i = 0; i < sizeof(int64_t); ++i) {
2040 int64_t Offset = OffsetAI.getSExtValue();
lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp 71 int64_t Offset =
102 bool StackGrowsDown, int64_t &Offset,
148 int64_t Offset = LocalAreaOffset;
156 int64_t FixedOff;
190 std::pair<int, int64_t> Entry = MFI.getLocalFrameObjectMap(i);
191 int64_t FIOffset = (StackGrowsDown ? -Offset : Offset) + Entry.second;
245 int64_t StackSize = Offset - LocalAreaOffset;
lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp 38 static int64_t
45 int64_t Res = cast<MCConstantExpr>(E)->getValue();
76 int64_t LHSVal = EvaluateCRExpr(BE->getLHS());
77 int64_t RHSVal = EvaluateCRExpr(BE->getRHS());
78 int64_t Res;
109 bool MatchRegisterName(unsigned &RegNo, int64_t &IntVal);
189 int64_t Val;
194 int64_t CRVal; // Cached result of EvaluateCRExpr(Val)
249 int64_t getImm() const {
253 int64_t getImmS16Context() const {
260 int64_t getImmU16Context() const {
271 int64_t getExprCRVal() const {
609 static std::unique_ptr<PPCOperand> CreateImm(int64_t Val, SMLoc S, SMLoc E,
641 CreateContextImm(int64_t Val, SMLoc S, SMLoc E, bool IsPPC64) {
660 int64_t Res;
815 int64_t N = Inst.getOperand(2).getImm();
816 int64_t B = Inst.getOperand(3).getImm();
829 int64_t N = Inst.getOperand(2).getImm();
830 int64_t B = Inst.getOperand(3).getImm();
843 int64_t N = Inst.getOperand(2).getImm();
844 int64_t B = Inst.getOperand(3).getImm();
858 int64_t N = Inst.getOperand(2).getImm();
859 int64_t B = Inst.getOperand(3).getImm();
873 int64_t N = Inst.getOperand(2).getImm();
886 int64_t N = Inst.getOperand(2).getImm();
899 int64_t N = Inst.getOperand(2).getImm();
912 int64_t N = Inst.getOperand(2).getImm();
925 int64_t B = Inst.getOperand(2).getImm();
926 int64_t N = Inst.getOperand(3).getImm();
939 int64_t N = Inst.getOperand(2).getImm();
940 int64_t B = Inst.getOperand(3).getImm();
952 int64_t N = Inst.getOperand(2).getImm();
953 int64_t B = Inst.getOperand(3).getImm();
965 int64_t N = Inst.getOperand(2).getImm();
966 int64_t B = Inst.getOperand(3).getImm();
979 int64_t N = Inst.getOperand(2).getImm();
991 int64_t N = Inst.getOperand(2).getImm();
1002 int64_t N = Inst.getOperand(1).getImm();
1012 int64_t N = Inst.getOperand(2).getImm();
1024 int64_t N = Inst.getOperand(2).getImm();
1036 int64_t B = Inst.getOperand(2).getImm();
1037 int64_t N = Inst.getOperand(3).getImm();
1049 int64_t BM = Inst.getOperand(3).getImm();
1066 int64_t BM = Inst.getOperand(3).getImm();
1084 int64_t BM = Inst.getOperand(3).getImm();
1173 bool PPCAsmParser::MatchRegisterName(unsigned &RegNo, int64_t &IntVal) {
1217 int64_t IntVal;
1451 int64_t IntVal;
1473 int64_t IntVal;
1517 int64_t IntVal;
1749 int64_t AbiVersion;
1807 int64_t ImmVal;
lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp 181 int64_t Address, const void *Decoder) {
189 int64_t Address, const void *Decoder) {
196 int64_t Address, const void *Decoder) {
231 int64_t Address, const void *Decoder) {
252 int64_t Address, const void *Decoder) {
267 int64_t Address, const void *Decoder) {
282 int64_t Address, const void *Decoder) {
297 int64_t Address, const void *Decoder) {
312 int64_t Address, const void *Decoder) {
lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp 57 PPCMCExpr::evaluateAsConstant(int64_t &Res) const {
70 int64_t
71 PPCMCExpr::evaluateAsInt64(int64_t Value) const {
107 int64_t Result = evaluateAsInt64(Value.getConstant());
lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h 38 int64_t evaluateAsInt64(int64_t Value) const;
38 int64_t evaluateAsInt64(int64_t Value) const;
93 bool evaluateAsConstant(int64_t &Res) const;
lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp 167 int64_t Res;
lib/Target/PowerPC/MCTargetDesc/PPCMachObjectWriter.cpp 344 int64_t Res;
lib/Target/PowerPC/PPCAsmPrinter.cpp 387 int64_t CallTarget = CalleeMO.getImm();
lib/Target/PowerPC/PPCFastISel.cpp 178 unsigned PPCMaterialize32BitInt(int64_t Imm,
180 unsigned PPCMaterialize64BitInt(int64_t Imm,
2111 unsigned PPCFastISel::PPCMaterialize32BitInt(int64_t Imm,
2143 unsigned PPCFastISel::PPCMaterialize64BitInt(int64_t Imm,
2152 int64_t ImmSh = static_cast<uint64_t>(Imm) >> Shift;
2216 int64_t Imm = UseSExt ? CI->getSExtValue() : CI->getZExtValue();
lib/Target/PowerPC/PPCFrameLowering.cpp 1937 int64_t LowerBound = 0;
lib/Target/PowerPC/PPCHazardRecognizers.cpp 298 isLoadOfStoredAddress(uint64_t LoadSize, int64_t LoadOffset,
lib/Target/PowerPC/PPCHazardRecognizers.h 72 int64_t StoreOffset[4];
94 bool isLoadOfStoredAddress(uint64_t LoadSize, int64_t LoadOffset,
lib/Target/PowerPC/PPCISelDAGToDAG.cpp 789 static unsigned selectI64ImmInstrCountDirect(int64_t Imm) {
798 int64_t ImmSh = static_cast<uint64_t>(Imm) >> Shift;
857 static unsigned selectI64ImmInstrCount(int64_t Imm) {
888 int64_t Imm) {
897 int64_t ImmSh = static_cast<uint64_t>(Imm) >> Shift;
973 int64_t Imm) {
983 int64_t MatImm;
1093 int64_t Imm = cast<ConstantSDNode>(N)->getZExtValue();
2485 int64_t RHSValue, SDLoc dl);
2487 int64_t RHSValue, SDLoc dl);
2489 int64_t RHSValue, SDLoc dl);
2491 int64_t RHSValue, SDLoc dl);
2891 int64_t RHSValue, SDLoc dl) {
3064 int64_t RHSValue, SDLoc dl) {
3236 int64_t RHSValue, SDLoc dl) {
3393 int64_t RHSValue, SDLoc dl) {
3606 int64_t RHSValue = RHSConst ? RHSConst->getSExtValue() : INT64_MAX;
4229 int64_t TrueResVal = TrueConst->getSExtValue();
4267 int64_t SelCCTVal = SelCCTrueConst->getSExtValue();
4268 int64_t SelCCFVal = SelCCFalseConst->getSExtValue();
lib/Target/PowerPC/PPCISelLowering.cpp 5656 int64_t FrameSize = CallSeqStart.getConstantOperandVal(1);
10672 const int64_t LabelOffset = 1 * PVT.getStoreSize();
10673 const int64_t TOCOffset = 3 * PVT.getStoreSize();
10674 const int64_t BPOffset = 4 * PVT.getStoreSize();
10778 const int64_t LabelOffset = 1 * PVT.getStoreSize();
10779 const int64_t SPOffset = 2 * PVT.getStoreSize();
10780 const int64_t TOCOffset = 3 * PVT.getStoreSize();
10781 const int64_t BPOffset = 4 * PVT.getStoreSize();
11710 int64_t& Offset, SelectionDAG &DAG) {
11741 int64_t Offset1 = 0, Offset2 = 0;
14415 int64_t Value = CST->getSExtValue();
14902 bool PPCTargetLowering::isLegalICmpImmediate(int64_t Imm) const {
14906 bool PPCTargetLowering::isLegalAddImmediate(int64_t Imm) const {
15199 int64_t NegConstant = 0 - Constant->getSExtValue();
15224 int64_t NegConstant = 0 - Constant->getSExtValue();
15457 int64_t ConstVal = CI->getZExtValue();
lib/Target/PowerPC/PPCISelLowering.h 830 bool isLegalICmpImmediate(int64_t Imm) const override;
836 bool isLegalAddImmediate(int64_t Imm) const override;
lib/Target/PowerPC/PPCInstrInfo.cpp 1933 int64_t SH = MI->getOperand(2).getImm();
1934 int64_t MB = MI->getOperand(3).getImm();
1935 int64_t ME = MI->getOperand(4).getImm();
1966 int64_t MB = MI->getOperand(3).getImm();
2140 const int64_t Offset = Subtarget.isPPC64() ? -0x7010 : -0x7008;
2239 static unsigned selectReg(int64_t Imm1, int64_t Imm2, unsigned CompareOpc,
2239 static unsigned selectReg(int64_t Imm1, int64_t Imm2, unsigned CompareOpc,
2271 int64_t Imm) const {
2564 int64_t OffsetImm = 0;
2585 int64_t OffsetAddi = 0;
2645 int64_t &Imm) const {
2667 int64_t &OffsetImm,
2709 int64_t &OffsetAddi,
2710 int64_t OffsetImm) const {
2788 int64_t Immediate = DefMI->getOperand(1).getImm();
2790 int64_t SExtImm = ((uint64_t)Immediate & ~0x7FFFuLL) != 0 ?
2800 int64_t NewImm = 0;
2824 int64_t Comparand = MI.getOperand(2).getImm();
2825 int64_t SExtComparand = ((uint64_t)Comparand & ~0x7FFFuLL) != 0 ?
2872 int64_t Addend = MI.getOperand(2).getImm();
2886 int64_t SH = MI.getOperand(2).getImm();
2887 int64_t MB = MI.getOperand(3).getImm();
2910 int64_t SH = MI.getOperand(2).getImm();
2911 int64_t MB = MI.getOperand(3).getImm();
2912 int64_t ME = MI.getOperand(4).getImm();
2937 int64_t LogicalImm = MI.getOperand(2).getImm();
2938 int64_t Result = 0;
3546 int64_t &Imm) const {
3569 int64_t Immediate = ImmMO.getImm();
3623 int64_t Imm = 0;
3716 int64_t Imm) const {
3916 int64_t Imm = MI.getOperand(1).getImm();
4163 int64_t TripCount;
4210 int64_t TripCount = LoopCount->getOperand(1).getImm() + TripCountAdjust;
4266 int64_t &Offset,
4302 int64_t OffsetA = 0, OffsetB = 0;
lib/Target/PowerPC/PPCInstrInfo.h 128 int64_t Imm) const;
154 int64_t &Imm) const;
366 int64_t &Offset, unsigned &Width,
426 bool isADDIInstrEligibleForFolding(MachineInstr &ADDIMI, int64_t &Imm) const;
430 int64_t &OffsetOfImmInstr,
433 MachineInstr *&ADDIMI, int64_t &OffsetAddi,
434 int64_t OffsetImm) const;
449 int64_t Imm) const;
lib/Target/PowerPC/PPCPreEmitPeephole.cpp 97 int64_t Imm = BBI->getOperand(1).getImm();
lib/Target/PowerPC/PPCRegisterInfo.cpp 1175 needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const {
1222 int64_t Offset) const {
1242 int64_t Offset) const {
1267 int64_t Offset) const {
lib/Target/PowerPC/PPCRegisterInfo.h 134 bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const override;
137 int64_t Offset) const override;
139 int64_t Offset) const override;
141 int64_t Offset) const override;
lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp 63 int64_t Lower, int64_t Upper, Twine Msg);
63 int64_t Lower, int64_t Upper, Twine Msg);
83 void emitLoadImm(Register DestReg, int64_t Value, MCStreamer &Out);
181 int64_t &Addend);
261 static bool evaluateConstantImm(const MCExpr *Expr, int64_t &Imm,
280 int64_t Imm;
296 int64_t Imm;
306 int64_t Imm;
317 int64_t Imm;
368 int64_t Imm;
382 int64_t Imm;
393 int64_t Imm;
406 int64_t Imm;
415 int64_t Imm;
428 int64_t Imm;
438 int64_t Imm;
447 int64_t Imm;
458 int64_t Imm;
468 int64_t Imm;
478 int64_t Imm;
490 int64_t Imm;
500 int64_t Imm;
509 int64_t Imm;
531 int64_t Imm;
540 int64_t Imm;
558 int64_t Imm;
583 int64_t Imm;
677 int64_t Imm = 0;
772 OperandVector &Operands, uint64_t ErrorInfo, int64_t Lower, int64_t Upper,
772 OperandVector &Operands, uint64_t ErrorInfo, int64_t Lower, int64_t Upper,
1048 int64_t Imm = CE->getValue();
1311 int64_t ImmVal;
1437 int64_t &Addend) {
1594 void RISCVAsmParser::emitLoadImm(Register DestReg, int64_t Value,
1764 int64_t Imm = Inst.getOperand(1).getImm();
lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp 154 static void addImplySP(MCInst &Inst, int64_t Address, const void *Decoder) {
172 int64_t Address, const void *Decoder) {
181 int64_t Address,
190 int64_t Address, const void *Decoder) {
200 int64_t Address,
209 int64_t Address,
220 int64_t Address,
231 int64_t Address,
lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp 92 int64_t Offset = int64_t(Value);
lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp 268 bool RISCVMCExpr::evaluateAsConstant(int64_t &Res) const {
288 int64_t RISCVMCExpr::evaluateAsInt64(int64_t Value) const {
288 int64_t RISCVMCExpr::evaluateAsInt64(int64_t Value) const {
lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h 47 int64_t evaluateAsInt64(int64_t Value) const;
47 int64_t evaluateAsInt64(int64_t Value) const;
80 bool evaluateAsConstant(int64_t &Res) const;
lib/Target/RISCV/RISCVFrameLowering.cpp 167 int64_t Offset = MFI.getObjectOffset(Entry.getFrameIdx());
451 int64_t Amount = MI->getOperand(0).getImm();
lib/Target/RISCV/RISCVISelDAGToDAG.cpp 66 static SDNode *selectImm(SelectionDAG *CurDAG, const SDLoc &DL, int64_t Imm,
122 int64_t Imm = ConstNode->getSExtValue();
lib/Target/RISCV/RISCVISelLowering.cpp 278 bool RISCVTargetLowering::isLegalICmpImmediate(int64_t Imm) const {
282 bool RISCVTargetLowering::isLegalAddImmediate(int64_t Imm) const {
472 int64_t Offset = N->getOffset();
581 int64_t Offset = N->getOffset();
lib/Target/RISCV/RISCVISelLowering.h 71 bool isLegalICmpImmediate(int64_t Imm) const override;
72 bool isLegalAddImmediate(int64_t Imm) const override;
lib/Target/RISCV/RISCVInstrInfo.cpp 375 int64_t BrOffset,
430 int64_t BrOffset) const {
502 int64_t Imm = MO.getImm();
lib/Target/RISCV/RISCVInstrInfo.h 70 const DebugLoc &DL, int64_t BrOffset,
82 int64_t BrOffset) const override;
lib/Target/RISCV/RISCVMergeBaseOffset.cpp 47 int64_t Offset);
48 bool matchLargeOffset(MachineInstr &TailAdd, Register GSReg, int64_t &Offset);
104 MachineInstr &Tail, int64_t Offset) {
136 int64_t &Offset) {
153 int64_t OffLo = AddiImmOp.getImm();
161 int64_t OffHi = OffsetLui.getOperand(1).getImm();
192 int64_t Offset = Tail.getOperand(2).getImm();
206 int64_t Offset;
239 int64_t Offset = TailImmOp.getImm();
lib/Target/RISCV/Utils/RISCVMatInt.cpp 19 void generateInstSeq(int64_t Val, bool IsRV64, InstSeq &Res) {
28 int64_t Hi20 = ((Val + 0x800) >> 12) & 0xFFFFF;
29 int64_t Lo12 = SignExtend64<12>(Val);
66 int64_t Lo12 = SignExtend64<12>(Val);
67 int64_t Hi52 = ((uint64_t)Val + 0x800ull) >> 12;
lib/Target/RISCV/Utils/RISCVMatInt.h 22 int64_t Imm;
24 Inst(unsigned Opc, int64_t Imm) : Opc(Opc), Imm(Imm) {}
33 void generateInstSeq(int64_t Val, bool IsRV64, InstSeq &Res);
lib/Target/Sparc/AsmParser/SparcAsmParser.cpp 515 int64_t RawImmValue = IsImm ? MCValOp.getImm() : 0;
758 int64_t ImmVal = 0;
984 int64_t intVal = 0;
lib/Target/Sparc/DelaySlotFiller.cpp 456 int64_t imm = SetHiMI->getOperand(1).getImm();
lib/Target/Sparc/Disassembler/SparcDisassembler.cpp 503 static bool tryAddingSymbolicOperand(int64_t Value, bool isBranch,
lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp 141 int64_t Res;
lib/Target/Sparc/Sparc.h 149 inline static unsigned HI22(int64_t imm) {
153 inline static unsigned LO10(int64_t imm) {
157 inline static unsigned HIX22(int64_t imm) {
161 inline static unsigned LOX10(int64_t imm) {
lib/Target/Sparc/SparcFrameLowering.cpp 180 int64_t Bias = Subtarget.getStackPointerBias();
294 int64_t FrameOffset = MF.getFrameInfo().getObjectOffset(FI) +
lib/Target/Sparc/SparcInstrInfo.cpp 500 const int64_t Offset = Subtarget.is64Bit() ? 0x28 : 0x14;
lib/Target/Sparc/SparcSubtarget.h 111 int64_t getStackPointerBias() const {
lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp 41 static bool inRange(const MCExpr *Expr, int64_t MinValue, int64_t MaxValue) {
41 static bool inRange(const MCExpr *Expr, int64_t MinValue, int64_t MaxValue) {
43 int64_t Value = CE->getValue();
234 bool isImm(int64_t MinValue, int64_t MaxValue) const {
234 bool isImm(int64_t MinValue, int64_t MaxValue) const {
430 OperandMatchResultTy parsePCRel(OperandVector &Operands, int64_t MinVal,
431 int64_t MaxVal, bool AllowTLS);
784 int64_t Value = CE->getValue();
1298 SystemZAsmParser::parsePCRel(OperandVector &Operands, int64_t MinVal,
1299 int64_t MaxVal, bool AllowTLS) {
1310 int64_t Value = CE->getValue();
lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp 74 static bool tryAddingSymbolicOperand(int64_t Value, bool isBranch,
lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp 26 void SystemZInstPrinter::printAddress(unsigned Base, int64_t Disp,
67 int64_t Value = MI->getOperand(OpNum).getImm();
74 int64_t Value = MI->getOperand(OpNum).getImm();
lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.h 34 static void printAddress(unsigned Base, int64_t Disp, unsigned Index,
lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp 99 unsigned Kind, int64_t Offset,
272 unsigned Kind, int64_t Offset,
lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h 35 const int64_t CallFrameSize = 160;
38 const int64_t CFAOffsetFromInitialSP = CallFrameSize;
lib/Target/SystemZ/SystemZFrameLowering.cpp 292 int64_t MaxArgOffset = SystemZMC::CallFrameSize;
295 int64_t ArgOffset = SystemZMC::CallFrameSize +
320 int64_t ThisVal = NumBytes;
326 int64_t MinVal = -uint64_t(1) << 31;
327 int64_t MaxVal = (int64_t(1) << 31) - 8;
359 int64_t SPOffsetFromCFA = -SystemZMC::CFAOffsetFromInitialSP;
372 int64_t Offset = SPOffsetFromCFA + RegSpillOffsets[Reg];
401 int64_t Delta = -int64_t(StackSize);
458 int64_t Offset =
lib/Target/SystemZ/SystemZISelDAGToDAG.cpp 60 int64_t Disp;
383 static bool selectDisp(SystemZAddressingMode::DispRange DR, int64_t Val) {
439 int64_t TestDisp = AM.Disp + Op1;
494 static bool isValidDisp(SystemZAddressingMode::DispRange DR, int64_t Val) {
514 static bool shouldUseLA(SDNode *Base, int64_t Disp, SDNode *Index) {
632 int64_t FrameIndex = cast<FrameIndexSDNode>(Base)->getIndex();
1423 int64_t End1 = Load->getSrcValueOffset() + Size;
1424 int64_t End2 = Store->getSrcValueOffset() + Size;
1747 IPMConversion(unsigned xorValue, int64_t addValue, unsigned bit)
1750 int64_t XORValue;
1751 int64_t AddValue;
lib/Target/SystemZ/SystemZISelLowering.cpp 699 int64_t SignedValue = SignExtend64(Value, SplatBitSize);
788 bool SystemZTargetLowering::isLegalICmpImmediate(int64_t Imm) const {
793 bool SystemZTargetLowering::isLegalAddImmediate(int64_t Imm) const {
1404 int64_t StackSize = CCInfo.getNextStackOffset();
1409 int64_t RegSaveOffset = TFL->getOffsetOfLocalArea();
1966 int64_t Value = ConstOp1->getSExtValue();
2000 int64_t SignedValue = ConstOp1->getSExtValue();
2825 int64_t Offset = Node->getOffset();
3018 int64_t Offset = Node->getOffset();
3410 int64_t Value = int32_t(cast<ConstantSDNode>(LowOp)->getZExtValue());
3593 int64_t OrigBitSize = VT.getSizeInBits();
3594 int64_t BitSize = (int64_t)1 << Log2_32_Ceil(NumSignificantBits);
3604 for (int64_t I = BitSize / 2; I >= 8; I = I / 2) {
3678 int64_t BitSize = NarrowVT.getSizeInBits();
3755 int64_t Value = (-Op2->getAPIntValue()).getSExtValue();
3806 int64_t BitSize = NarrowVT.getSizeInBits();
6723 int64_t Disp = MI.getOperand(2).getImm();
6818 int64_t Disp = MI.getOperand(2).getImm();
6936 int64_t Disp = MI.getOperand(2).getImm();
7050 int64_t Disp = MI.getOperand(2).getImm();
7055 int64_t BitSize = MI.getOperand(7).getImm();
lib/Target/SystemZ/SystemZISelLowering.h 410 bool isLegalICmpImmediate(int64_t Imm) const override;
411 bool isLegalAddImmediate(int64_t Imm) const override;
lib/Target/SystemZ/SystemZInstrBuilder.h 36 int64_t Offset = 0;
lib/Target/SystemZ/SystemZInstrInfo.cpp 341 int64_t Length = MI.getOperand(2).getImm();
1502 int64_t Offset) const {
1504 int64_t Offset2 = (MCID.TSFlags & SystemZII::Is128Bit ? Offset + 8 : Offset);
lib/Target/SystemZ/SystemZInstrInfo.h 296 unsigned getOpcodeForOffset(unsigned Opcode, int64_t Offset) const;
lib/Target/SystemZ/SystemZMCInstLower.cpp 72 if (int64_t Offset = MO.getOffset()) {
lib/Target/SystemZ/SystemZRegisterInfo.cpp 267 int64_t Offset = (TFI->getFrameIndexReference(MF, FrameIndex, BasePtr) +
292 int64_t OldOffset = Offset;
293 int64_t Mask = 0xffff;
303 int64_t HighOffset = OldOffset - Offset;
lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp 52 int64_t Val;
344 int64_t Val = Int.getIntVal();
lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp 85 static bool nextLEB(int64_t &Val, ArrayRef<uint8_t> Bytes, uint64_t &Size,
102 int64_t Val;
130 int64_t FunctionCount;
136 int64_t BodySize, LocalEntryCount;
142 for (int64_t I = 0; I < LocalEntryCount; I++) {
143 int64_t Count, Type;
147 for (int64_t J = 0; J < Count; J++) {
180 int64_t PrefixedOpc;
219 int64_t Val;
275 int64_t TargetTableLen;
278 for (int64_t I = 0; I < TargetTableLen; I++) {
lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp 266 int64_t Imm = MI->getOperand(OpNo).getImm();
lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp 689 int64_t RetType = Try->getOperand(0).getImm();
lib/Target/WebAssembly/WebAssemblyFastISel.cpp 61 int64_t Offset = 0;
94 void setOffset(int64_t NewOffset) {
98 int64_t getOffset() const { return Offset; }
361 int64_t TmpOffset = Addr.getOffset() - CI->getSExtValue();
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp 348 int64_t Limit = Int64 ? INT64_MIN : INT32_MIN;
349 int64_t Substitute = IsUnsigned ? 0 : Limit;
lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp 78 int64_t Imm = MI.getOperand(1).getImm();
lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp 64 int64_t FrameOffset = MFI.getStackSize() + MFI.getObjectOffset(FrameIndex);
79 int64_t Offset = MI.getOperand(OffsetOperandNum).getImm() + FrameOffset;
lib/Target/X86/AsmParser/X86AsmParser.cpp 141 typedef std::pair< InfixCalculatorTok, int64_t > ICToken;
150 int64_t popOperand() {
157 void pushOperand(InfixCalculatorTok Op, int64_t Val = 0) {
214 int64_t execute() {
248 int64_t Val;
346 int64_t Imm;
360 void addImm(int64_t imm) { Imm += imm; }
368 int64_t getImm() { return Imm + IC.execute(); }
630 bool onInteger(int64_t TmpInt, StringRef &ErrMsg) {
1491 if (int64_t Val = ParseIntelInlineAsmOperator(OpKind)) {
1517 int64_t IntVal = getTok().getIntVal();
1897 int64_t Imm = SM.getImm();
2268 int64_t ScaleVal;
2289 int64_t ScaleVal;
3676 int64_t ParamsSize;
3714 int64_t Offset;
3724 int64_t Offset;
3765 int64_t EncodedReg;
3802 int64_t Off;
3822 int64_t Off;
3842 int64_t Off;
lib/Target/X86/Disassembler/X86Disassembler.cpp 296 static bool tryAddingSymbolicOperand(int64_t Value, bool isBranch,
lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp 84 int64_t Imm = MI->getOperand(MI->getNumOperands() - 1).getImm();
359 int64_t Imm = Op.getImm();
397 int64_t DispVal = DispSpec.getImm();
lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp 29 int64_t Imm = MI->getOperand(Op).getImm();
53 int64_t Imm = MI->getOperand(Op).getImm();
95 int64_t Imm = MI->getOperand(MI->getNumOperands() - 1).getImm();
271 int64_t Imm = MI->getOperand(Op).getImm();
304 int64_t Address;
lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp 65 int64_t Imm = MI->getOperand(MI->getNumOperands() - 1).getImm();
375 int64_t DispVal = DispSpec.getImm();
lib/Target/X86/MCTargetDesc/X86MCExpr.h 28 const int64_t RegNo; // All
30 explicit X86MCExpr(int64_t R) : RegNo(R) {}
36 static const X86MCExpr *create(int64_t RegNo, MCContext &Ctx) {
45 int64_t getRegNo() const { return RegNo; }
lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp 115 int64_t Value = 0;
253 int64_t Res;
563 int64_t Res;
lib/Target/X86/X86AsmPrinter.cpp 373 int64_t DispVal = DispSpec.getImm();
606 int64_t Feat00Flags = 0;
lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp 67 using DisplacementSizeMap = std::map<int64_t, unsigned>;
103 void buildCopies(int Size, MachineInstr *LoadInst, int64_t LdDispImm,
104 MachineInstr *StoreInst, int64_t StDispImm,
105 int64_t LMMOffset, int64_t SMMOffset);
105 int64_t LMMOffset, int64_t SMMOffset);
107 void buildCopy(MachineInstr *LoadInst, unsigned NLoadOpcode, int64_t LoadDisp,
109 int64_t StoreDisp, unsigned Size, int64_t LMMOffset,
109 int64_t StoreDisp, unsigned Size, int64_t LMMOffset,
110 int64_t SMMOffset);
384 int64_t LoadDisp, MachineInstr *StoreInst,
385 unsigned NStoreOpcode, int64_t StoreDisp,
386 unsigned Size, int64_t LMMOffset,
387 int64_t SMMOffset) {
436 int64_t LdDispImm, MachineInstr *StoreInst,
437 int64_t StDispImm, int64_t LMMOffset,
437 int64_t StDispImm, int64_t LMMOffset,
438 int64_t SMMOffset) {
526 int64_t MinOffset = std::min(Op1.getOffset(), Op2.getOffset());
527 int64_t Overlapa = Op1.getSize() + Op1.getOffset() - MinOffset;
528 int64_t Overlapb = Op2.getSize() + Op2.getOffset() - MinOffset;
573 int64_t LdDispImm = getDispOperand(LoadInst).getImm();
574 int64_t StDispImm = getDispOperand(StoreInst).getImm();
575 int64_t LMMOffset = 0;
576 int64_t SMMOffset = 0;
578 int64_t LdDisp1 = LdDispImm;
579 int64_t LdDisp2 = 0;
580 int64_t StDisp1 = StDispImm;
581 int64_t StDisp2 = 0;
584 int64_t LdStDelta = StDispImm - LdDispImm;
627 static bool isBlockingStore(int64_t LoadDispImm, unsigned LoadSize,
628 int64_t StoreDispImm, unsigned StoreSize) {
636 int64_t DispImm, unsigned Size) {
652 SmallVector<std::pair<int64_t, unsigned>, 0> DispSizeStack;
654 int64_t CurrDisp = DispSizePair.first;
657 int64_t PrevDisp = DispSizeStack.back().first;
688 int64_t LdDispImm = getDispOperand(LoadInst).getImm();
698 int64_t PBstDispImm = getDispOperand(PBInst).getImm();
lib/Target/X86/X86CallFrameOptimization.cpp 83 int64_t ExpectedDist = 0;
204 int64_t Advantage = 0;
436 int64_t StackDisp = I->getOperand(X86::AddrDisp).getImm();
529 int64_t Val = PushOp.getImm();
lib/Target/X86/X86CallLowering.cpp 107 Register getStackAddress(uint64_t Size, int64_t Offset,
237 Register getStackAddress(uint64_t Size, int64_t Offset,
lib/Target/X86/X86EvexToVex.cpp 175 int64_t ImmVal = Imm.getImm();
197 int64_t ImmVal = Imm.getImm();
lib/Target/X86/X86ExpandPseudo.cpp 300 int64_t StackAdj = MBBI->getOperand(0).getImm();
310 int64_t StackAdj = MBBI->getOperand(0).getImm();
lib/Target/X86/X86FastISel.cpp 1366 int64_t Val = RHSC->getSExtValue();
lib/Target/X86/X86FrameLowering.cpp 95 static unsigned getSUBriOpcode(unsigned IsLP64, int64_t Imm) {
107 static unsigned getADDriOpcode(unsigned IsLP64, int64_t Imm) {
127 static unsigned getANDriOpcode(bool IsLP64, int64_t Imm) {
475 int64_t Offset = MFI.getObjectOffset(I->getFrameIdx());
579 const int64_t ThreadEnvironmentStackLimit = 0x10;
580 const int64_t PageSize = 0x1000;
581 const int64_t PageMask = ~(PageSize - 1);
607 int64_t RCXShadowSlot = 0;
608 int64_t RDXShadowSlot = 0;
616 const int64_t CalleeSaveSize = X86FI->getCalleeSavedFrameSize();
624 int64_t InitSlot = 8 + CalleeSaveSize + (HasFP ? 8 : 0);
1376 int64_t EHRegOffset = getFrameIndexReference(MF, FI, FrameReg);
1733 int64_t Offset = -CSSize - SlotSize;
1785 int64_t FPDelta = 0;
1970 int64_t TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
2850 int64_t StackAdjustment = isDestroy ? Amount : -Amount;
2875 int64_t CfaAdjustment = -StackAdjustment;
3190 int64_t MinFixedObjOffset = -SlotSize;
3209 int64_t UnwindHelpOffset = MinFixedObjOffset - SlotSize;
lib/Target/X86/X86ISelDAGToDAG.cpp 1335 static bool isDispSafeForFrameIndex(int64_t Val) {
1355 int64_t Val = AM.Disp + Offset;
1435 int64_t Offset = 0;
1617 int64_t Mask = cast<ConstantSDNode>(N->getOperand(1))->getSExtValue();
3123 int64_t OperandV = OperandC->getSExtValue();
3736 int64_t Val = Cst->getSExtValue();
3794 int64_t ShiftedVal;
4537 int64_t Val = Cst->getSExtValue();
lib/Target/X86/X86ISelLowering.cpp 3074 int64_t PartBegin = VA.getLocMemOffset();
3075 int64_t PartEnd = PartBegin + ValVT.getSizeInBits() / 8;
3078 int64_t ObjBegin = MFI.getObjectOffset(FI);
3079 int64_t ObjEnd = ObjBegin + MFI.getObjectSize(FI);
4192 int64_t Offset = StackSize;
4596 bool X86::isOffsetSuitableForCodeModel(int64_t Offset, CodeModel::Model M,
7684 int64_t Offset = 0;
7720 int64_t StartOffset = Offset & ~int64_t(RequiredAlign - 1);
7743 static bool findEltLoadSrc(SDValue Elt, LoadSDNode *&Ld, int64_t &ByteOffset) {
7805 SmallVector<int64_t, 8> ByteOffsets(NumElems, 0);
7871 int64_t ByteOffset = ByteOffsets[EltIdx];
7873 int64_t BaseIdx = EltIdx - (ByteOffset / BaseSizeInBytes);
17841 int64_t Offset = cast<BlockAddressSDNode>(Op)->getOffset();
17863 int64_t Offset = 0;
17890 int64_t GlobalOffset = 0;
29034 bool X86TargetLowering::isLegalICmpImmediate(int64_t Imm) const {
29038 bool X86TargetLowering::isLegalAddImmediate(int64_t Imm) const {
29043 bool X86TargetLowering::isLegalStoreImmediate(int64_t Imm) const {
29548 int64_t RegSaveFrameIndex = MI.getOperand(1).getImm();
29549 int64_t VarArgsFPOffset = MI.getOperand(2).getImm();
29567 int64_t Offset = (i - 3) * 16 + VarArgsFPOffset;
30452 const int64_t SSPOffset = 3 * PVT.getStoreSize();
30533 const int64_t LabelOffset = 1 * PVT.getStoreSize();
30712 const int64_t SPPOffset = 3 * PVT.getStoreSize();
30826 const int64_t LabelOffset = 1 * PVT.getStoreSize();
30827 const int64_t SPOffset = 2 * PVT.getStoreSize();
38142 int64_t SignMulAmt = C->getSExtValue();
42248 int64_t AddConstant = Sext ? AddOp1->getSExtValue() : AddOp1->getZExtValue();
45724 int64_t ExtVal = ExtOpc == ISD::ZERO_EXTEND ? CST->getZExtValue()
lib/Target/X86/X86ISelLowering.h 682 bool isOffsetSuitableForCodeModel(int64_t Offset, CodeModel::Model M,
1006 bool isLegalICmpImmediate(int64_t Imm) const override;
1012 bool isLegalAddImmediate(int64_t Imm) const override;
1014 bool isLegalStoreImmediate(int64_t Imm) const override;
lib/Target/X86/X86InsertPrefetch.cpp 48 int64_t Delta;
128 int64_t D = static_cast<int64_t>(S_V.second);
211 int64_t Delta = PrefInfo.Delta;
lib/Target/X86/X86InstrInfo.cpp 1127 int64_t Imm = MI.getOperand(2).getImm();
1155 int64_t Imm = MI.getOperand(2).getImm();
3196 const MachineInstr &MemOp, const MachineOperand *&BaseOp, int64_t &Offset,
3929 int64_t Imm = MIB->getOperand(1).getImm();
4066 int64_t ShiftAmt = MIB->getOperand(2).getImm();
5747 int64_t &Offset1, int64_t &Offset2) const {
5747 int64_t &Offset1, int64_t &Offset2) const {
5945 int64_t Offset1, int64_t Offset2,
5945 int64_t Offset1, int64_t Offset2,
7592 int64_t Coef = MI.getOperand(2).getImm();
7593 int64_t Offset = MI.getOperand(4).getImm();
lib/Target/X86/X86InstrInfo.h 155 int64_t getFrameAdjustment(const MachineInstr &I) const {
164 void setFrameAdjustment(MachineInstr &I, int64_t V) const {
296 int64_t &Offset,
381 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
382 int64_t &Offset2) const override;
392 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1,
393 int64_t Offset2,
lib/Target/X86/X86InstructionSelector.cpp 481 int64_t Imm = *COff;
1145 int64_t Index = I.getOperand(2).getImm();
1278 int64_t Index = I.getOperand(3).getImm();
lib/Target/X86/X86MCInstLower.cpp 1899 int64_t Disp = MI->getOperand(1 + X86::AddrDisp).getImm();
1930 int64_t Disp = MI->getOperand(X86::AddrDisp).getImm();
lib/Target/X86/X86OptimizeLEAs.cpp 263 int64_t &AddrDispShift, int &Dist);
268 int64_t getAddrDispShift(const MachineInstr &MI1, unsigned N1,
276 int64_t &AddrDispShift) const;
290 int64_t AddrDispShift);
334 MachineInstr *&BestLEA, int64_t &AddrDispShift, int &Dist) {
345 int64_t AddrDispShiftTemp = getAddrDispShift(MI, MemOpNo, *DefMI, 1);
390 int64_t X86OptimizeLEAPass::getAddrDispShift(const MachineInstr &MI1,
417 int64_t &AddrDispShift) const {
521 int64_t AddrDispShift;
571 int64_t AddrDispShift) {
602 int64_t AddrDispShift;
lib/Target/X86/X86RegisterInfo.cpp 772 int64_t Offset = MI.getOperand(FIOperandNum + 1).getImm() + FIOffset;
lib/Target/X86/X86TargetObjectFile.cpp 51 int64_t Offset, MachineModuleInfo *MMI, MCStreamer &Streamer) const {
lib/Target/X86/X86TargetObjectFile.h 35 const MCValue &MV, int64_t Offset,
lib/Target/X86/X86TargetTransformInfo.cpp 2916 int X86TTIImpl::getIntImmCost(int64_t Val) {
2953 int64_t Val = Tmp.getSExtValue();
lib/Target/X86/X86TargetTransformInfo.h 177 int getIntImmCost(int64_t);
lib/Target/X86/X86WinAllocaExpander.cpp 52 Lowering getLowering(int64_t CurrentOffset, int64_t AllocaAmount);
52 Lowering getLowering(int64_t CurrentOffset, int64_t AllocaAmount);
63 int64_t StackProbeSize;
79 static int64_t getWinAllocaAmount(MachineInstr *MI, MachineRegisterInfo *MRI) {
96 X86WinAllocaExpander::getLowering(int64_t CurrentOffset,
97 int64_t AllocaAmount) {
137 DenseMap<MachineBasicBlock *, int64_t> OutOffset;
149 int64_t Offset = -1;
158 int64_t Amount = getWinAllocaAmount(&MI, MRI);
191 static unsigned getSubOpcode(bool Is64Bit, int64_t Amount) {
202 int64_t Amount = getWinAllocaAmount(MI, MRI);
lib/Target/XCore/XCoreISelLowering.cpp 283 int64_t Offset = GN->getOffset();
286 int64_t FoldedOffset = std::max(Offset & ~3, (int64_t)0);
367 const SDLoc &DL, SDValue Chain, SDValue Base, int64_t Offset,
427 int64_t Offset = 0;
1866 static inline bool isImmUs(int64_t val)
1871 static inline bool isImmUs2(int64_t val)
1876 static inline bool isImmUs4(int64_t val)
lib/Target/XCore/XCoreISelLowering.h 165 int64_t Offset,
lib/Transforms/Coroutines/CoroEarly.cpp 73 int64_t Offset = alignTo(
lib/Transforms/Coroutines/CoroInstr.h 50 int64_t Index = getRawIndex()->getValue().getSExtValue();
lib/Transforms/IPO/Attributor.cpp 305 int64_t &BytesOffset,
1523 static int64_t getKnownNonNullAndDerefBytesForUse(
1553 int64_t Offset;
1556 int64_t DerefBytes =
1570 int64_t DerefBytes = DerefAA.getKnownDereferenceableBytes();
2490 int64_t DerefBytes = getKnownNonNullAndDerefBytesForUse(
2541 int64_t DerefBytes = 0;
2557 int64_t OffsetSExt = Offset.getSExtValue();
lib/Transforms/IPO/LowerTypeTests.cpp 2024 int64_t Offset;
lib/Transforms/IPO/WholeProgramDevirt.cpp 214 unsigned BitWidth, int64_t &OffsetByte, uint64_t &OffsetBit) {
231 unsigned BitWidth, int64_t &OffsetByte, uint64_t &OffsetBit) {
1446 TotalPaddingBefore += std::max<int64_t>(
1448 TotalPaddingAfter += std::max<int64_t>(
1459 int64_t OffsetByte;
lib/Transforms/InstCombine/InstCombineCalls.cpp 3665 int64_t CCVal = CC->getZExtValue();
lib/Transforms/InstCombine/InstCombineCompares.cpp 435 int64_t Offset = 0;
504 int64_t NewOffs = Offset / (int64_t)VariableScale;
lib/Transforms/InstCombine/InstCombineInternal.h 472 Type *FindElementAtOffset(PointerType *PtrTy, int64_t Offset,
lib/Transforms/InstCombine/InstructionCombining.cpp 1092 Type *InstCombiner::FindElementAtOffset(PointerType *PtrTy, int64_t Offset,
1102 int64_t FirstIdx = 0;
1103 if (int64_t TySize = DL.getTypeAllocSize(Ty)) {
lib/Transforms/Instrumentation/AddressSanitizer.cpp 3330 int64_t Offset = SizeOffset.second.getSExtValue();
lib/Transforms/Instrumentation/HWAddressSanitizer.cpp 613 const int64_t AccessInfo = Recover * 0x20 + IsWrite * 0x10 + AccessSizeIndex;
lib/Transforms/Instrumentation/InstrProfiling.cpp 256 bool run(int64_t *NumPromoted) {
lib/Transforms/Instrumentation/PGOMemOPSizeOpt.cpp 179 int64_t PreciseRangeStart;
181 int64_t PreciseRangeLast;
191 MemOPSizeKind getMemOPSizeKind(int64_t Value) const {
280 int64_t V = VD.Value;
lib/Transforms/Scalar/AlignmentFromAssumptions.cpp 103 int64_t DiffUnits = ConstDUSCEV->getValue()->getSExtValue();
lib/Transforms/Scalar/DeadStoreElimination.cpp 91 using OverlapIntervalsTy = std::map<int64_t, int64_t>;
91 using OverlapIntervalsTy = std::map<int64_t, int64_t>;
346 int64_t &EarlierOff, int64_t &LaterOff,
346 int64_t &EarlierOff, int64_t &LaterOff,
439 int64_t LaterIntStart = LaterOff, LaterIntEnd = LaterOff + LaterSize;
904 static bool tryToShorten(Instruction *EarlierWrite, int64_t &EarlierOffset,
905 int64_t &EarlierSize, int64_t LaterOffset,
905 int64_t &EarlierSize, int64_t LaterOffset,
906 int64_t LaterSize, bool IsOverwriteEnd) {
922 int64_t NewLength = IsOverwriteEnd
946 int64_t OffsetMoved = (LaterOffset - EarlierOffset);
961 int64_t &EarlierStart, int64_t &EarlierSize) {
961 int64_t &EarlierStart, int64_t &EarlierSize) {
966 int64_t LaterStart = OII->second;
967 int64_t LaterSize = OII->first - LaterStart;
982 int64_t &EarlierStart, int64_t &EarlierSize) {
982 int64_t &EarlierStart, int64_t &EarlierSize) {
987 int64_t LaterStart = OII->second;
988 int64_t LaterSize = OII->first - LaterStart;
1012 int64_t EarlierStart = 0;
1013 int64_t EarlierSize = int64_t(Loc.Size.getValue());
1181 int64_t InstWriteOffset, DepWriteOffset;
1204 int64_t EarlierSize = DepLoc.Size.getValue();
1205 int64_t LaterSize = Loc.Size.getValue();
lib/Transforms/Scalar/IndVarSimplify.cpp 287 static bool ConvertToSInt(const APFloat &APF, int64_t &IntVal) {
314 int64_t InitValue;
326 int64_t IncValue;
363 int64_t ExitValue;
lib/Transforms/Scalar/LoopDataPrefetch.cpp 290 int64_t PD = std::abs(ConstPtrDiff->getValue()->getSExtValue());
lib/Transforms/Scalar/LoopRerollPass.cpp 190 DenseMap<Instruction *, int64_t> IVToIncMap;
382 DenseMap<Instruction *, int64_t> &IncrMap,
406 std::map<int64_t,Instruction*> &Roots);
444 int64_t Inc;
463 DenseMap<Instruction *, int64_t> &IVToIncMap;
778 collectPossibleRoots(Instruction *Base, std::map<int64_t,Instruction*> &Roots) {
810 int64_t V = std::abs(CI->getValue().getSExtValue());
920 std::map<int64_t, Instruction*> V;
lib/Transforms/Scalar/LoopStrengthReduce.cpp 328 int64_t BaseOffset = 0;
334 int64_t Scale = 0;
359 int64_t UnfoldedOffset = 0;
745 static int64_t ExtractImmediate(const SCEV *&S, ScalarEvolution &SE) {
753 int64_t Result = ExtractImmediate(NewOps.front(), SE);
759 int64_t Result = ExtractImmediate(NewOps.front(), SE);
1091 int64_t Offset = 0;
1154 int64_t MinOffset = std::numeric_limits<int64_t>::max();
1154 int64_t MinOffset = std::numeric_limits<int64_t>::max();
1155 int64_t MaxOffset = std::numeric_limits<int64_t>::min();
1155 int64_t MaxOffset = std::numeric_limits<int64_t>::min();
1211 GlobalValue *BaseGV, int64_t BaseOffset,
1212 bool HasBaseReg, int64_t Scale,
1365 int64_t O = Fixup.Offset;
1366 int64_t Offset = (uint64_t)O + F.BaseOffset;
1630 GlobalValue *BaseGV, int64_t BaseOffset,
1631 bool HasBaseReg, int64_t Scale,
1683 int64_t MinOffset, int64_t MaxOffset,
1683 int64_t MinOffset, int64_t MaxOffset,
1685 GlobalValue *BaseGV, int64_t BaseOffset,
1686 bool HasBaseReg, int64_t Scale) {
1704 int64_t MinOffset, int64_t MaxOffset,
1704 int64_t MinOffset, int64_t MaxOffset,
1720 static bool isLegalUse(const TargetTransformInfo &TTI, int64_t MinOffset,
1721 int64_t MaxOffset, LSRUse::KindType Kind,
1723 int64_t BaseOffset, bool HasBaseReg, int64_t Scale) {
1723 int64_t BaseOffset, bool HasBaseReg, int64_t Scale) {
1734 static bool isLegalUse(const TargetTransformInfo &TTI, int64_t MinOffset,
1735 int64_t MaxOffset, LSRUse::KindType Kind,
1797 GlobalValue *BaseGV, int64_t BaseOffset,
1804 int64_t Scale = Kind == LSRUse::ICmpZero ? -1 : 1;
1818 ScalarEvolution &SE, int64_t MinOffset,
1819 int64_t MaxOffset, LSRUse::KindType Kind,
1827 int64_t BaseOffset = ExtractImmediate(S, SE);
1838 int64_t Scale = Kind == LSRUse::ICmpZero ? -1 : 1;
1933 SetVector<int64_t, SmallVector<int64_t, 8>, SmallSet<int64_t, 8>> Factors;
1933 SetVector<int64_t, SmallVector<int64_t, 8>, SmallSet<int64_t, 8>> Factors;
1933 SetVector<int64_t, SmallVector<int64_t, 8>, SmallSet<int64_t, 8>> Factors;
1974 bool reconcileNewOffset(LSRUse &LU, int64_t NewOffset, bool HasBaseReg,
1977 std::pair<size_t, int64_t> getUse(const SCEV *&Expr, LSRUse::KindType Kind,
2004 const SmallVectorImpl<int64_t> &Worklist,
2453 int64_t Scale = C->getSExtValue();
2518 bool LSRInstance::reconcileNewOffset(LSRUse &LU, int64_t NewOffset,
2521 int64_t NewMinOffset = LU.MinOffset;
2522 int64_t NewMaxOffset = LU.MaxOffset;
2564 std::pair<size_t, int64_t> LSRInstance::getUse(const SCEV *&Expr,
2568 int64_t Offset = ExtractImmediate(Expr, SE);
3128 int64_t IncOffset = IncConst->getValue()->getSExtValue();
3307 std::pair<size_t, int64_t> P = getUse(S, Kind, AccessTy);
3309 int64_t Offset = P.second;
3458 std::pair<size_t, int64_t> P = getUse(
3461 int64_t Offset = P.second;
3776 const SmallVectorImpl<int64_t> &Worklist, size_t Idx, bool IsScaledReg) {
3818 int64_t Step = StepInt.isNegative() ?
3821 for (int64_t Offset : Worklist) {
3828 for (int64_t Offset : Worklist)
3831 int64_t Imm = ExtractImmediate(G, SE);
3850 SmallVector<int64_t, 2> Worklist;
3885 for (int64_t Factor : Factors) {
3887 if (Base.BaseOffset == std::numeric_limits<int64_t>::min() && Factor == -1)
3889 int64_t NewBaseOffset = (uint64_t)Base.BaseOffset * Factor;
3898 int64_t Offset = LU.MinOffset;
3899 if (Offset == std::numeric_limits<int64_t>::min() && Factor == -1)
3937 if (F.UnfoldedOffset == std::numeric_limits<int64_t>::min() &&
3970 for (int64_t Factor : Factors) {
4076 int64_t Imm;
4079 WorkItem(size_t LI, int64_t I, const SCEV *R)
4103 using ImmMapTy = std::map<int64_t, const SCEV *>;
4110 int64_t Imm = ExtractImmediate(Reg, SE);
4122 SmallSet<std::pair<size_t, int64_t>, 32> UniqueItems;
4141 int64_t JImm = J->first;
4153 int64_t First = Imms.begin()->first;
4154 int64_t Last = std::prev(Imms.end())->first;
4157 int64_t Avg = (First & Last) + ((First ^ Last) >> 1);
4169 int64_t Imm = (uint64_t)JImm - M->first;
4187 int64_t Imm = WI.Imm;
4204 int64_t Offset = (uint64_t)F.BaseOffset + Imm * (uint64_t)F.Scale;
4592 using BestFormulaeTy = DenseMap<std::pair<const SCEV *, int64_t>, size_t>;
5230 int64_t Offset = (uint64_t)F.BaseOffset + LF.Offset;
5249 int64_t UnfoldedOffset = F.UnfoldedOffset;
5616 for (int64_t Factor : Factors) {
lib/Transforms/Scalar/MemCpyOptimizer.cpp 87 int64_t Start, End;
165 void addInst(int64_t OffsetFromFirst, Instruction *Inst) {
172 void addStore(int64_t OffsetFromFirst, StoreInst *SI) {
173 int64_t StoreSize = DL.getTypeStoreSize(SI->getOperand(0)->getType());
179 void addMemSet(int64_t OffsetFromFirst, MemSetInst *MSI) {
180 int64_t Size = cast<ConstantInt>(MSI->getLength())->getZExtValue();
184 void addRange(int64_t Start, int64_t Size, Value *Ptr,
184 void addRange(int64_t Start, int64_t Size, Value *Ptr,
193 void MemsetRanges::addRange(int64_t Start, int64_t Size, Value *Ptr,
193 void MemsetRanges::addRange(int64_t Start, int64_t Size, Value *Ptr,
195 int64_t End = Start+Size;
338 Optional<int64_t> Offset =
352 Optional<int64_t> Offset = isPointerOffset(StartPtr, MSI->getDest(), DL);
lib/Transforms/Scalar/NewGVN.cpp 865 int64_t StartingVNCounter;
lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp 242 static int64_t Find(Value *Idx, GetElementPtrInst *GEP,
382 int64_t AccumulativeByteOffset);
392 int64_t AccumulativeByteOffset);
399 int64_t accumulateByteOffset(GetElementPtrInst *GEP, bool &NeedsExtraction);
753 int64_t ConstantOffsetExtractor::Find(Value *Idx, GetElementPtrInst *GEP,
780 int64_t
784 int64_t AccumulativeByteOffset = 0;
789 int64_t ConstantOffset =
814 GetElementPtrInst *Variadic, int64_t AccumulativeByteOffset) {
886 int64_t AccumulativeByteOffset) {
943 int64_t AccumulativeByteOffset = accumulateByteOffset(GEP, NeedsExtraction);
1066 int64_t ElementTypeSizeOfGEP = static_cast<int64_t>(
1072 int64_t Index = AccumulativeByteOffset / ElementTypeSizeOfGEP;
lib/Transforms/Utils/BasicBlockUtils.cpp 562 for (int64_t i = PN->getNumIncomingValues() - 1; i >= 0; --i)
582 for (int64_t i = PN->getNumIncomingValues() - 1; i >= 0; --i) {
lib/Transforms/Utils/InlineFunction.cpp 1488 int64_t CallCount =
1495 Function *Callee, int64_t entryDelta,
lib/Transforms/Utils/LowerSwitch.cpp 52 int64_t Low, High;
294 int64_t GapLow = LHS.back().High->getSExtValue() + 1;
295 int64_t GapHigh = NewLowerBound->getSExtValue() - 1;
417 int64_t nextValue = J->Low->getSExtValue();
418 int64_t currentValue = I->High->getSExtValue();
521 IntRange R = {std::numeric_limits<int64_t>::min(),
522 std::numeric_limits<int64_t>::max()};
525 int64_t Low = I.Low->getSExtValue();
526 int64_t High = I.High->getSExtValue();
537 if (High != std::numeric_limits<int64_t>::max()) {
538 IntRange R = { High + 1, std::numeric_limits<int64_t>::max() };
543 int64_t N = High - Low + 1;
lib/Transforms/Utils/SimplifyCFG.cpp 5531 static bool isSwitchDense(ArrayRef<int64_t> Values) {
5566 SmallVector<int64_t,4> Values;
5576 int64_t Base = Values[0];
lib/Transforms/Utils/SimplifyLibCalls.cpp 116 static Value *convertStrToNumber(CallInst *CI, StringRef &Str, int64_t Base) {
lib/Transforms/Utils/VNCoercion.cpp 172 int64_t StoreOffset = 0, LoadOffset = 0;
265 int64_t LoadOffs = 0;
lib/Transforms/Vectorize/LoopVectorize.cpp 354 static Constant *getSignedIntOrFpConstant(Type *Ty, int64_t C) {
projects/compiler-rt/lib/builtins/fp_lib.h 62 typedef int64_t srep_t;
projects/compiler-rt/lib/builtins/gcc_personality_v0.c 99 p += sizeof(int64_t);
projects/compiler-rt/lib/builtins/x86_64/floatdidf.c 11 double __floatdidf(int64_t a) { return (double)a; }
projects/compiler-rt/lib/builtins/x86_64/floatdisf.c 9 float __floatdisf(int64_t a) { return (float)a; }
projects/compiler-rt/lib/builtins/x86_64/floatdixf.c 11 long double __floatdixf(int64_t a) { return (long double)a; }
projects/compiler-rt/lib/profile/InstrProfilingValue.c 255 int64_t PreciseRangeStart, int64_t PreciseRangeLast, int64_t LargeValue) {
255 int64_t PreciseRangeStart, int64_t PreciseRangeLast, int64_t LargeValue) {
255 int64_t PreciseRangeStart, int64_t PreciseRangeLast, int64_t LargeValue) {
projects/compiler-rt/lib/xray/xray_x86_64.cpp 127 static constexpr int64_t MinOffset{std::numeric_limits<int32_t>::min()};
128 static constexpr int64_t MaxOffset{std::numeric_limits<int32_t>::max()};
154 int64_t TrampolineOffset = reinterpret_cast<int64_t>(Trampoline) -
199 int64_t TrampolineOffset = reinterpret_cast<int64_t>(__xray_FunctionExit) -
226 int64_t TrampolineOffset =
projects/openmp/libomptarget/include/omptarget.h 134 void __tgt_register_requires(int64_t flags);
145 void __tgt_target_data_begin(int64_t device_id, int32_t arg_num,
146 void **args_base, void **args, int64_t *arg_sizes,
147 int64_t *arg_types);
148 void __tgt_target_data_begin_nowait(int64_t device_id, int32_t arg_num,
150 int64_t *arg_sizes, int64_t *arg_types,
150 int64_t *arg_sizes, int64_t *arg_types,
158 void __tgt_target_data_end(int64_t device_id, int32_t arg_num, void **args_base,
159 void **args, int64_t *arg_sizes, int64_t *arg_types);
159 void **args, int64_t *arg_sizes, int64_t *arg_types);
160 void __tgt_target_data_end_nowait(int64_t device_id, int32_t arg_num,
162 int64_t *arg_sizes, int64_t *arg_types,
162 int64_t *arg_sizes, int64_t *arg_types,
167 void __tgt_target_data_update(int64_t device_id, int32_t arg_num,
168 void **args_base, void **args, int64_t *arg_sizes,
169 int64_t *arg_types);
170 void __tgt_target_data_update_nowait(int64_t device_id, int32_t arg_num,
172 int64_t *arg_sizes, int64_t *arg_types,
172 int64_t *arg_sizes, int64_t *arg_types,
183 int __tgt_target(int64_t device_id, void *host_ptr, int32_t arg_num,
184 void **args_base, void **args, int64_t *arg_sizes,
185 int64_t *arg_types);
186 int __tgt_target_nowait(int64_t device_id, void *host_ptr, int32_t arg_num,
187 void **args_base, void **args, int64_t *arg_sizes,
188 int64_t *arg_types, int32_t depNum, void *depList,
191 int __tgt_target_teams(int64_t device_id, void *host_ptr, int32_t arg_num,
192 void **args_base, void **args, int64_t *arg_sizes,
193 int64_t *arg_types, int32_t num_teams,
195 int __tgt_target_teams_nowait(int64_t device_id, void *host_ptr,
197 int64_t *arg_sizes, int64_t *arg_types,
197 int64_t *arg_sizes, int64_t *arg_types,
201 void __kmpc_push_target_tripcount(int64_t device_id, uint64_t loop_tripcount);
projects/openmp/libomptarget/src/device.cpp 24 int DeviceTy::associatePtr(void *HstPtrBegin, void *TgtPtrBegin, int64_t Size) {
118 LookupResult DeviceTy::lookupMapping(void *HstPtrBegin, int64_t Size) {
160 int64_t Size, bool &IsNew, bool &IsHostPtr, bool IsImplicit,
222 void *DeviceTy::getTgtPtrBegin(void *HstPtrBegin, int64_t Size, bool &IsLast,
260 void *DeviceTy::getTgtPtrBegin(void *HstPtrBegin, int64_t Size) {
272 int DeviceTy::deallocTgtPtr(void *HstPtrBegin, int64_t Size, bool ForceDelete,
342 int64_t Size) {
348 int64_t Size) {
projects/openmp/libomptarget/src/device.h 133 LookupResult lookupMapping(void *HstPtrBegin, int64_t Size);
134 void *getOrAllocTgtPtr(void *HstPtrBegin, void *HstPtrBase, int64_t Size,
137 void *getTgtPtrBegin(void *HstPtrBegin, int64_t Size);
138 void *getTgtPtrBegin(void *HstPtrBegin, int64_t Size, bool &IsLast,
140 int deallocTgtPtr(void *TgtPtrBegin, int64_t Size, bool ForceDelete,
142 int associatePtr(void *HstPtrBegin, void *TgtPtrBegin, int64_t Size);
149 int32_t data_submit(void *TgtPtrBegin, void *HstPtrBegin, int64_t Size);
150 int32_t data_retrieve(void *HstPtrBegin, void *TgtPtrBegin, int64_t Size);
projects/openmp/libomptarget/src/interface.cpp 73 EXTERN void __tgt_register_requires(int64_t flags) {
92 EXTERN void __tgt_target_data_begin(int64_t device_id, int32_t arg_num,
93 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types) {
93 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types) {
126 EXTERN void __tgt_target_data_begin_nowait(int64_t device_id, int32_t arg_num,
127 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types,
127 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types,
140 EXTERN void __tgt_target_data_end(int64_t device_id, int32_t arg_num,
141 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types) {
141 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types) {
179 EXTERN void __tgt_target_data_end_nowait(int64_t device_id, int32_t arg_num,
180 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types,
180 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types,
190 EXTERN void __tgt_target_data_update(int64_t device_id, int32_t arg_num,
191 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types) {
191 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types) {
213 int64_t device_id, int32_t arg_num, void **args_base, void **args,
214 int64_t *arg_sizes, int64_t *arg_types, int32_t depNum, void *depList,
214 int64_t *arg_sizes, int64_t *arg_types, int32_t depNum, void *depList,
223 EXTERN int __tgt_target(int64_t device_id, void *host_ptr, int32_t arg_num,
224 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types) {
224 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types) {
253 EXTERN int __tgt_target_nowait(int64_t device_id, void *host_ptr,
254 int32_t arg_num, void **args_base, void **args, int64_t *arg_sizes,
255 int64_t *arg_types, int32_t depNum, void *depList, int32_t noAliasDepNum,
264 EXTERN int __tgt_target_teams(int64_t device_id, void *host_ptr,
265 int32_t arg_num, void **args_base, void **args, int64_t *arg_sizes,
266 int64_t *arg_types, int32_t team_num, int32_t thread_limit) {
296 EXTERN int __tgt_target_teams_nowait(int64_t device_id, void *host_ptr,
297 int32_t arg_num, void **args_base, void **args, int64_t *arg_sizes,
298 int64_t *arg_types, int32_t team_num, int32_t thread_limit, int32_t depNum,
308 EXTERN int64_t __tgt_mapper_num_components(void *rt_mapper_handle) {
310 int64_t size = MapperComponentsPtr->Components.size();
318 void *begin, int64_t size,
319 int64_t type) {
329 EXTERN void __kmpc_push_target_tripcount(int64_t device_id,
projects/openmp/libomptarget/src/omptarget.cpp 59 static const int64_t alignment = 8;
186 int CheckDeviceAndCtors(int64_t device_id) {
208 static int32_t member_of(int64_t type) {
214 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types) {
214 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types) {
224 int64_t data_size = arg_sizes[i];
229 int64_t padding = 0;
347 void **args, int64_t *arg_sizes, int64_t *arg_types) {
347 void **args, int64_t *arg_sizes, int64_t *arg_types) {
357 int64_t data_size = arg_sizes[i];
361 int64_t padding = 0;
480 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types) {
480 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types) {
488 int64_t MapSize = arg_sizes[i];
570 static bool isLambdaMapping(int64_t Mapping) {
580 int target(int64_t device_id, void *host_ptr, int32_t arg_num,
581 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types,
581 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types,
projects/openmp/libomptarget/src/private.h 21 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types);
21 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types);
24 void **args, int64_t *arg_sizes, int64_t *arg_types);
24 void **args, int64_t *arg_sizes, int64_t *arg_types);
27 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types);
27 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types);
29 extern int target(int64_t device_id, void *host_ptr, int32_t arg_num,
30 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types,
30 void **args_base, void **args, int64_t *arg_sizes, int64_t *arg_types,
33 extern int CheckDeviceAndCtors(int64_t device_id);
48 int64_t Size;
49 int64_t Type;
51 MapComponentInfoTy(void *Base, void *Begin, int64_t Size, int64_t Type)
51 MapComponentInfoTy(void *Base, void *Begin, int64_t Size, int64_t Type)
projects/openmp/libomptarget/src/rtl.cpp 193 void RTLsTy::RegisterRequires(int64_t flags) {
projects/openmp/libomptarget/src/rtl.h 31 typedef void *(data_alloc_ty)(int32_t, int64_t, void *);
32 typedef int32_t(data_submit_ty)(int32_t, void *, void *, int64_t);
33 typedef int32_t(data_retrieve_ty)(int32_t, void *, void *, int64_t);
39 typedef int64_t(init_requires_ty)(int64_t);
39 typedef int64_t(init_requires_ty)(int64_t);
124 int64_t RequiresFlags;
129 void RegisterRequires(int64_t flags);
projects/openmp/runtime/src/ompt-specific.cpp 447 int64_t ret_size = taskdata->td_size_alloc - sizeof(kmp_taskdata_t);
tools/clang/include/clang/AST/ASTContext.h 2097 CharUnits toCharUnitsFromBits(int64_t BitSize) const;
2100 int64_t toBits(CharUnits CharSize) const;
tools/clang/include/clang/AST/BaseSubobject.h 61 clang::CharUnits::fromQuantity(DenseMapInfo<int64_t>::getEmptyKey()));
67 clang::CharUnits::fromQuantity(DenseMapInfo<int64_t>::getTombstoneKey()));
tools/clang/include/clang/AST/CharUnits.h 40 typedef int64_t QuantityType;
tools/clang/include/clang/AST/DeclBase.h 1149 int64_t getID() const;
tools/clang/include/clang/AST/DeclCXX.h 2203 int64_t getID(const ASTContext &Context) const;
tools/clang/include/clang/AST/Mangle.h 160 virtual void mangleCXXCtorVTable(const CXXRecordDecl *RD, int64_t Offset,
tools/clang/include/clang/AST/Stmt.h 1128 int64_t getID(const ASTContext &Context) const;
tools/clang/include/clang/AST/VTableBuilder.h 229 int64_t Value;
352 typedef llvm::DenseMap<GlobalDecl, int64_t> MethodVTableIndicesTy;
tools/clang/include/clang/Analysis/Analyses/ThreadSafetyTIL.h 242 inline ValueType ValueType::getValueType<int64_t>() {
606 return Vs.reduceLiteralT(as<int64_t>());
tools/clang/include/clang/Analysis/Analyses/ThreadSafetyTraverse.h 589 printLiteralT(&E->as<int64_t>(), SS);
tools/clang/include/clang/Analysis/AnalysisDeclContext.h 228 int64_t ID;
233 int64_t ID)
241 int64_t getID() const {
315 unsigned idx, int64_t ID)
353 const Stmt *s, int64_t ID)
381 const void *contextData, int64_t ID)
410 int64_t NewID = 0;
tools/clang/include/clang/Basic/ABI.h 44 int64_t NonVirtual;
53 int64_t VBaseOffsetOffset;
110 int64_t NonVirtual;
119 int64_t VCallOffsetOffset;
tools/clang/include/clang/Basic/FileManager.h 389 getBufferForFileImpl(StringRef Filename, int64_t FileSize, bool isVolatile);
tools/clang/include/clang/Basic/PlistSupport.h 71 inline raw_ostream &EmitInteger(raw_ostream &o, int64_t value) {
tools/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExplodedGraph.h 134 int64_t Id;
138 int64_t Id, bool IsSink)
263 int64_t getID() const { return Id; }
329 int64_t NumNodes = 0;
363 int64_t Id,
tools/clang/include/clang/StaticAnalyzer/Core/PathSensitive/MemRegion.h 67 int64_t Offset;
72 static const int64_t Symbolic = std::numeric_limits<int64_t>::max();
72 static const int64_t Symbolic = std::numeric_limits<int64_t>::max();
75 RegionOffset(const MemRegion *r, int64_t off) : R(r), Offset(off) {}
81 int64_t getOffset() const {
tools/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h 107 int64_t getID() const;
tools/clang/lib/AST/ASTContext.cpp 2246 CharUnits ASTContext::toCharUnitsFromBits(int64_t BitSize) const {
2251 int64_t ASTContext::toBits(CharUnits CharSize) const {
2429 static llvm::Optional<int64_t>
2435 int64_t CurOffsetInBits = 0;
2440 SmallVector<std::pair<QualType, int64_t>, 4> Bases;
2445 llvm::Optional<int64_t> Size = structHasUniqueObjectRepresentations(
2460 int64_t BaseOffset = Context.toBits(
2462 int64_t BaseSize = Base.second;
2474 int64_t FieldSizeInBits =
2477 int64_t BitfieldSize = Field->getBitWidthValue(Context);
2484 int64_t FieldOffsetInBits = Context.getFieldOffset(Field);
2545 Optional<int64_t> StructSize =
tools/clang/lib/AST/DeclBase.cpp 948 int64_t Decl::getID() const {
tools/clang/lib/AST/DeclCXX.cpp 2388 int64_t CXXCtorInitializer::getID(const ASTContext &Context) const {
tools/clang/lib/AST/ExprConstant.cpp 2791 int64_t Adjustment) {
8159 int64_t AdditionalOffset = -Offset.getZExtValue();
10425 int64_t ElemsRemaining;
10719 int64_t Off = String.Offset.getQuantity();
tools/clang/lib/AST/Interp/Boolean.h 50 explicit operator int64_t() const { return V; }
111 static bool inRange(int64_t Value, unsigned NumBits) {
tools/clang/lib/AST/Interp/ByteCodeEmitter.cpp 106 const int64_t Position = Code.size() + sizeof(Opcode) + sizeof(int32_t);
tools/clang/lib/AST/Interp/Integral.h 49 template <> struct Repr<64, true> { using Type = int64_t; };
103 explicit operator int64_t() const { return V; }
183 static bool inRange(int64_t Value, unsigned NumBits) {
249 CheckRange(int64_t V) {
255 CheckRange(int64_t V) {
tools/clang/lib/AST/Interp/Interp.h 772 int64_t WideIndex = static_cast<int64_t>(Index);
773 int64_t WideOffset = static_cast<int64_t>(Offset);
774 int64_t Result = Add ? (WideIndex + WideOffset) : (WideIndex - WideOffset);
tools/clang/lib/AST/Interp/Pointer.h 263 int64_t getIndex() const {
tools/clang/lib/AST/ItaniumMangle.cpp 147 void mangleCXXCtorVTable(const CXXRecordDecl *RD, int64_t Offset,
420 void mangleCallOffset(int64_t NonVirtual, int64_t Virtual);
420 void mangleCallOffset(int64_t NonVirtual, int64_t Virtual);
422 void mangleNumber(int64_t Number);
1055 void CXXNameMangler::mangleNumber(int64_t Number) {
1065 void CXXNameMangler::mangleCallOffset(int64_t NonVirtual, int64_t Virtual) {
1065 void CXXNameMangler::mangleCallOffset(int64_t NonVirtual, int64_t Virtual) {
5116 int64_t Offset,
tools/clang/lib/AST/MicrosoftMangle.cpp 320 void mangleNumber(int64_t Number);
593 int64_t FieldOffset;
594 int64_t VBTableOffset;
728 void MicrosoftCXXNameMangler::mangleNumber(int64_t Number) {
tools/clang/lib/AST/Stmt.cpp 299 int64_t Stmt::getID(const ASTContext &Context) const {
tools/clang/lib/AST/VTableBuilder.cpp 663 int64_t OffsetIndex = -(int64_t)(3 + Components.size());
782 typedef llvm::DenseMap<GlobalDecl, int64_t> MethodVTableIndicesTy;
tools/clang/lib/Basic/FileManager.cpp 479 FileManager::getBufferForFileImpl(StringRef Filename, int64_t FileSize,
tools/clang/lib/CodeGen/CGAtomic.cpp 728 int64_t SizeInBits = CGF.getContext().toBits(SizeInChars);
tools/clang/lib/CodeGen/CGBuiltin.cpp 44 int64_t clamp(int64_t Value, int64_t Low, int64_t High) {
44 int64_t clamp(int64_t Value, int64_t Low, int64_t High) {
44 int64_t clamp(int64_t Value, int64_t Low, int64_t High) {
44 int64_t clamp(int64_t Value, int64_t Low, int64_t High) {
12662 const int64_t MaxIndex = 12;
12663 int64_t Index = clamp(ArgCI->getSExtValue(), 0, MaxIndex);
12708 const int64_t MaxIndex = 12;
12709 int64_t Index = clamp(ArgCI->getSExtValue(), 0, MaxIndex);
tools/clang/lib/CodeGen/CGDebugInfo.cpp 2611 int64_t Count = Ty->getNumElements();
2665 int64_t Count = -1; // Count == -1 is an unbounded array.
3774 unsigned AddressSpace, SmallVectorImpl<int64_t> &Expr) const {
3939 SmallVector<int64_t, 13> Expr;
4123 SmallVector<int64_t, 9> addr;
4419 SmallVector<int64_t, 4> Expr;
tools/clang/lib/CodeGen/CGDebugInfo.h 324 SmallVectorImpl<int64_t> &Expr) const;
tools/clang/lib/CodeGen/CGExprScalar.cpp 2689 int64_t OffsetInt = RL.getFieldOffset(i) /
tools/clang/lib/CodeGen/CGOpenMPRuntime.cpp 463 enum OpenMPOffloadingRequiresDirFlags : int64_t {
tools/clang/lib/CodeGen/ItaniumCXXABI.cpp 1908 int64_t NonVirtualAdjustment,
1909 int64_t VirtualAdjustment,
3704 int64_t OffsetFlags = 0;
tools/clang/lib/CodeGen/MicrosoftCXXABI.cpp 1025 int64_t VBPtrChars =
3188 if (int64_t SrcOffsetToFirstVBase =
3257 if (int64_t DstOffsetToFirstVBase =
tools/clang/lib/Driver/ToolChains/Clang.cpp 2186 int64_t IVal;
tools/clang/lib/Lex/LiteralSupport.cpp 1073 int64_t BaseShift = 0;
1125 int64_t FractBaseShift = 0;
1154 for (int64_t i = 0; i < BaseShift; ++i) {
1158 for (int64_t i = BaseShift; i < 0 && !Val.isNullValue(); ++i)
tools/clang/lib/Sema/SemaChecking.cpp 4483 static bool isValidOrderingForOp(int64_t Ordering, AtomicExpr::AtomicOp Op) {
6732 int64_t Offset;
6735 FormatStringLiteral(const StringLiteral *fexpr, int64_t Offset = 0)
tools/clang/lib/Sema/SemaDecl.cpp17227 typedef std::unordered_map<int64_t, DeclOrVector> ValueToVectorMap;
tools/clang/lib/Sema/SemaExpr.cpp11245 int64_t RightSideIntValue = RightSideValue.getSExtValue();
tools/clang/lib/StaticAnalyzer/Checkers/MmapWriteExecChecker.cpp 52 int64_t Prot = ProtLoc->getValue().getSExtValue();
tools/clang/lib/StaticAnalyzer/Checkers/PaddingChecker.cpp 39 int64_t AllowedPad;
tools/clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp 270 int64_t x = CI->getValue().getSExtValue();
tools/clang/lib/StaticAnalyzer/Core/ExplodedGraph.cpp 435 int64_t Id,
tools/clang/lib/StaticAnalyzer/Core/MemRegion.cpp 1231 int64_t offset = 0;
1245 int64_t i = CI->getValue().getSExtValue();
1256 int64_t size = C.getTypeSizeInChars(elemType).getQuantity();
1296 int64_t Offset = 0;
1417 int64_t i = CI->getValue().getSExtValue();
tools/clang/lib/StaticAnalyzer/Core/ProgramState.cpp 71 int64_t ProgramState::getID() const {
tools/clang/lib/StaticAnalyzer/Core/RegionStore.cpp 1691 int64_t i = CI->getValue().getSExtValue();
1696 int64_t length = Str->getLength();
1715 int64_t i = CI->getValue().getSExtValue();
tools/clang/lib/StaticAnalyzer/Core/SimpleSValBuilder.cpp 1069 int64_t left = LeftOffset.getOffset();
1070 int64_t right = RightOffset.getOffset();
tools/clang/lib/StaticAnalyzer/Core/Store.cpp 196 int64_t newIndex = 0;
tools/clang/lib/Tooling/DependencyScanning/DependencyScanningFilesystem.cpp 224 getBuffer(const Twine &Name, int64_t FileSize, bool RequiresNullTerminator,
tools/clang/tools/driver/cc1as_main.cpp 514 int64_t Value;
tools/clang/tools/extra/clang-tidy/ClangTidyCheck.cpp 66 int64_t Value) const {
tools/clang/tools/extra/clang-tidy/ClangTidyCheck.h 170 int64_t Value) const;
tools/clang/tools/extra/clang-tidy/readability/MagicNumbersCheck.cpp 124 const int64_t Value = IntValue.getZExtValue();
tools/clang/tools/extra/clang-tidy/readability/MagicNumbersCheck.h 84 llvm::SmallVector<int64_t, SensibleNumberOfMagicValueExceptions>
tools/clang/tools/extra/clangd/FSProvider.cpp 53 getBuffer(const llvm::Twine &Name, int64_t FileSize,
tools/clang/tools/extra/clangd/Trace.cpp 133 static int64_t nextID() {
134 static std::atomic<int64_t> Next = {0};
tools/clang/tools/extra/clangd/index/Index.cpp 36 int64_t Limit;
tools/clang/unittests/Basic/FixedPointTest.cpp 192 void CheckIntPart(const FixedPointSemantics &Sema, int64_t IntPart) {
220 void CheckIntPartMin(const FixedPointSemantics &Sema, int64_t Expected) {
364 FixedPointSemantics Dst, int64_t TestVal) {
365 int64_t ScaledVal = TestVal;
387 FixedPointSemantics Dst, int64_t TestVal) {
395 FixedPointSemantics Dst, int64_t TestVal) {
402 int64_t OneVal) {
403 int64_t NormalVal = (OneVal * 2) + (OneVal / 2); // 2.5
404 int64_t HalfVal = (OneVal / 2); // 0.5
476 int64_t OneVal) {
477 int64_t NormalVal = (OneVal * 2) + (OneVal / 2); // 2.5
478 int64_t HalfVal = (OneVal / 2); // 0.5
tools/clang/utils/TableGen/ClangAttrEmitter.cpp 365 int64_t Default;
369 std::string T, int64_t Default)
tools/clang/utils/TableGen/MveEmitter.cpp 687 int64_t i1, i2;
tools/clang/utils/TableGen/NeonEmitter.cpp 1711 int64_t VectorSize = cast<IntInit>(Expr->getArg(0))->getValue();
tools/dsymutil/CompileUnit.cpp 95 void CompileUnit::addLabelLowPc(uint64_t LabelLowPc, int64_t PcOffset) {
100 int64_t PcOffset) {
117 void CompileUnit::noteLocationAttribute(PatchLocation Attr, int64_t PcOffset) {
tools/dsymutil/CompileUnit.h 26 using FunctionIntervals = HalfOpenIntervalMap<uint64_t, int64_t>;
55 int64_t AddrAdjust;
142 const std::vector<std::pair<PatchLocation, int64_t>> &
172 void addLabelLowPc(uint64_t LabelLowPc, int64_t PcOffset);
176 void addFunctionRange(uint64_t LowPC, uint64_t HighPC, int64_t PCOffset);
183 void noteLocationAttribute(PatchLocation Attr, int64_t PcOffset);
298 std::vector<std::pair<PatchLocation, int64_t>> LocationAttributes;
tools/dsymutil/DebugMap.cpp 159 int64_t Timestamp;
tools/dsymutil/DwarfLinker.cpp 476 int64_t SymOffset;
1503 OffsetsStringPool &StringPool, int64_t PCOffset, uint32_t OutOffset,
1717 int64_t UnitPcOffset = 0;
tools/dsymutil/DwarfLinker.h 30 int64_t Offset;
32 DebugMapObjectRange(uint64_t EndPC, int64_t Offset)
291 int64_t PCOffset, uint32_t OutOffset, unsigned Flags,
322 int64_t PCOffset = 0;
tools/dsymutil/DwarfStreamer.cpp 273 int64_t UnitPcOffset, uint64_t OrigLowPc,
280 int64_t PcOffset = Entries.empty() ? 0 : FuncRange.value() + UnitPcOffset;
373 int64_t PcOffset = -Unit.getLowPc();
409 int64_t UnitPcOffset = 0;
419 int64_t LocPcOffset = Attr.second + UnitPcOffset;
479 MCDwarfLineAddr::Encode(*MC, Params, std::numeric_limits<int64_t>::max(), 0,
500 int64_t AddressDelta;
559 int64_t LineDelta = int64_t(Row.Line) - LastLine;
579 MCDwarfLineAddr::Encode(*MC, Params, std::numeric_limits<int64_t>::max(),
591 MCDwarfLineAddr::Encode(*MC, Params, std::numeric_limits<int64_t>::max(), 0,
tools/dsymutil/DwarfStreamer.h 83 int64_t UnitPcOffset, uint64_t OrigLowPc,
tools/gold/gold-plugin.cpp 509 int64_t offset = 0;
tools/lld/COFF/Chunks.cpp 62 static void add64(uint8_t *p, int64_t v) { write64le(p, read64le(p) + v); }
274 void applyArm64Branch26(uint8_t *off, int64_t v) {
280 static void applyArm64Branch19(uint8_t *off, int64_t v) {
286 static void applyArm64Branch14(uint8_t *off, int64_t v) {
696 int64_t off = impSymbol->getRVA() & 0xfff;
tools/lld/COFF/Chunks.h 675 void applyArm64Branch26(uint8_t *off, int64_t v);
tools/lld/COFF/Writer.cpp 338 int64_t diff = AbsoluteDifference(s, p + 4) + margin;
349 int64_t diff = AbsoluteDifference(s, p) + margin;
tools/lld/Common/Args.cpp 29 int64_t lld::args::getInteger(opt::InputArgList &args, unsigned key,
30 int64_t Default) {
35 int64_t v;
tools/lld/ELF/ARMErrataFix.cpp 157 int64_t offset;
426 int64_t patchRelAddend = sr.rel->addend;
tools/lld/ELF/Arch/ARM.cpp 33 int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override;
521 int64_t ARM::getImplicitAddend(const uint8_t *buf, RelType type) const {
tools/lld/ELF/Arch/Mips.cpp 31 int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override;
370 int64_t MIPS<ELFT>::getImplicitAddend(const uint8_t *buf, RelType type) const {
tools/lld/ELF/Arch/PPC64.cpp 109 static std::pair<Defined *, int64_t>
169 int64_t addend;
666 int64_t gotPltOffset = in.gotPlt->getVA() - (in.plt->getVA() + 8);
931 int64_t offset = dst - src;
tools/lld/ELF/Arch/RISCV.cpp 285 int64_t imm = SignExtend64(val + 0x800, bits) >> 12;
330 int64_t hi = SignExtend64(val + 0x800, bits) >> 12;
tools/lld/ELF/Arch/X86.cpp 30 int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override;
241 int64_t X86::getImplicitAddend(const uint8_t *buf, RelType type) const {
tools/lld/ELF/InputSection.cpp 463 int64_t addend = getAddend<ELFT>(rel);
605 static int64_t getTlsTpOffset(const Symbol &s) {
648 static uint64_t getRelocTargetVA(const InputFile *file, RelType type, int64_t a,
847 int64_t addend = getAddend<ELFT>(rel);
tools/lld/ELF/InputSection.h 213 mutable int64_t uncompressedSize = -1;
tools/lld/ELF/Relocations.cpp 135 int64_t addend, RelExpr expr) {
159 typename ELFT::uint offset, int64_t addend, RelExpr expr) {
594 static int64_t computeMipsAddend(const RelTy &rel, const RelTy *end,
629 static int64_t computeAddend(const RelTy &rel, const RelTy *end,
632 int64_t addend;
934 Symbol *sym, int64_t addend, RelExpr expr,
1029 int64_t addend) {
1219 int64_t addend = computeAddend<ELFT>(rel, end, sec, expr, sym.isLocal());
tools/lld/ELF/Relocations.h 107 int64_t addend;
172 static inline int64_t getAddend(const typename ELFT::Rel &rel) {
176 static inline int64_t getAddend(const typename ELFT::Rela &rel) {
tools/lld/ELF/Symbols.cpp 56 static uint64_t getSymVA(const Symbol &sym, int64_t &addend) {
140 uint64_t Symbol::getVA(int64_t addend) const {
tools/lld/ELF/Symbols.h 186 uint64_t getVA(int64_t addend = 0) const;
tools/lld/ELF/SyntheticSections.cpp 671 void MipsGotSection::addEntry(InputFile &file, Symbol &sym, int64_t addend,
732 int64_t addend) const {
746 int64_t addend) const {
1513 int64_t DynamicReloc::computeAddend() const {
1542 int64_t addend, RelExpr expr,
tools/lld/ELF/SyntheticSections.h 207 void addEntry(InputFile &file, Symbol &sym, int64_t addend, RelExpr expr);
212 int64_t addend) const;
214 int64_t addend) const;
324 using GotEntry = std::pair<Symbol *, int64_t>;
423 uint64_t offsetInSec, bool useSymVA, Symbol *sym, int64_t addend)
431 int64_t addend)
441 int64_t computeAddend() const;
453 int64_t addend;
495 uint64_t offsetInSec, Symbol *sym, int64_t addend, RelExpr expr,
tools/lld/ELF/Target.cpp 126 int64_t TargetInfo::getImplicitAddend(const uint8_t *buf, RelType type) const {
tools/lld/ELF/Target.h 36 virtual int64_t getImplicitAddend(const uint8_t *buf, RelType type) const;
194 int64_t min, uint64_t max) {
207 inline void checkInt(uint8_t *loc, int64_t v, int n, RelType type) {
tools/lld/ELF/Thunks.cpp 401 int64_t offset = s - p - 8;
414 int64_t offset = s - p - 8;
439 int64_t offset = s - p - 4;
452 int64_t offset = s - p - 4;
511 int64_t offset = s - p - 16;
532 int64_t offset = s - p - 12;
765 static void writePPCLoadAndBranch(uint8_t *buf, int64_t offset) {
776 int64_t offset = destination.getGotPltVA() - getPPC64TocBase();
789 int64_t offset = destination.getPPC64LongBranchTableVA() - getPPC64TocBase();
tools/lld/include/lld/Common/Args.h 28 int64_t getInteger(llvm::opt::InputArgList &args, unsigned key,
29 int64_t Default);
tools/lld/include/lld/Core/Reference.h 78 typedef int64_t Addend;
tools/lld/lib/ReaderWriter/MachO/ArchHandler.cpp 138 int64_t ArchHandler::readS64(const uint8_t *addr, bool isBig) {
tools/lld/lib/ReaderWriter/MachO/ArchHandler.h 316 static int64_t readS64(const uint8_t *addr, bool isBig);
tools/lld/lib/ReaderWriter/MachO/ArchHandler_arm.cpp 851 int64_t ta = (int64_t) value - (toAddress - fromAddress);
tools/lld/lib/ReaderWriter/MachO/ArchHandler_arm64.cpp 230 static uint32_t setDisplacementInADRP(uint32_t instr, int64_t disp);
342 int64_t displacement) {
tools/lld/lib/ReaderWriter/MachO/MachONormalizedFileBinaryUtils.h 44 void append_sleb128(int64_t value) {
tools/lld/lib/ReaderWriter/MachO/MachONormalizedFileFromAtoms.cpp 570 int64_t taddr = 0;
576 int64_t padding = taddr - hlcSize;
tools/lld/lib/ReaderWriter/MachO/MachONormalizedFileToAtoms.cpp 990 static int64_t readSPtr(bool is64, bool isBig, const uint8_t *addr) {
1279 int64_t functionFromFDE = readSPtr(is64, isBig,
1304 int64_t lsdaFromFDE = readSPtr(is64, isBig,
tools/lldb/include/lldb/API/SBData.h 64 int64_t GetSignedInt64(lldb::SBError &error, lldb::offset_t offset);
104 int64_t *array,
123 bool SetDataFromSInt64Array(int64_t *array, size_t array_len);
tools/lldb/include/lldb/API/SBTarget.h 371 int64_t sections_offset);
tools/lldb/include/lldb/API/SBTypeEnumMember.h 31 int64_t GetValueAsSigned();
tools/lldb/include/lldb/API/SBValue.h 57 int64_t GetValueAsSigned(lldb::SBError &error, int64_t fail_value = 0);
57 int64_t GetValueAsSigned(lldb::SBError &error, int64_t fail_value = 0);
61 int64_t GetValueAsSigned(int64_t fail_value = 0);
61 int64_t GetValueAsSigned(int64_t fail_value = 0);
tools/lldb/include/lldb/Core/Address.h 426 bool Slide(int64_t offset) {
tools/lldb/include/lldb/Core/Disassembler.h 199 static Operand BuildImmediate(int64_t imm);
254 std::function<bool(const Instruction::Operand &)> MatchImmOp(int64_t imm);
256 std::function<bool(const Instruction::Operand &)> FetchImmOp(int64_t &imm);
tools/lldb/include/lldb/Core/EmulateInstruction.h 190 int64_t signed_offset; // signed offset added to base register
201 int64_t offset; // offset for address calculation
217 int64_t signed_offset; // signed offset by which to adjust self (for
223 int64_t signed_immediate; // signed immediate value
242 void SetRegisterPlusOffset(RegisterInfo base_reg, int64_t signed_offset) {
257 int64_t offset) {
280 void SetOffset(int64_t signed_offset) {
295 void SetImmediateSigned(int64_t signed_immediate) {
tools/lldb/include/lldb/Core/ValueObject.h 438 virtual int64_t GetValueAsSigned(int64_t fail_value, bool *success = nullptr);
438 virtual int64_t GetValueAsSigned(int64_t fail_value, bool *success = nullptr);
tools/lldb/include/lldb/Host/StringConvert.h 29 int64_t ToSInt64(const char *s, int64_t fail_value = 0, int base = 0,
29 int64_t ToSInt64(const char *s, int64_t fail_value = 0, int base = 0,
tools/lldb/include/lldb/Interpreter/OptionArgParser.h 25 static int64_t ToOptionEnum(llvm::StringRef s,
tools/lldb/include/lldb/Interpreter/OptionValue.h 262 int64_t GetEnumerationValue(int64_t fail_value = -1) const;
262 int64_t GetEnumerationValue(int64_t fail_value = -1) const;
264 bool SetEnumerationValue(int64_t value);
286 int64_t GetSInt64Value(int64_t fail_value = 0) const;
286 int64_t GetSInt64Value(int64_t fail_value = 0) const;
288 bool SetSInt64Value(int64_t new_value);
tools/lldb/include/lldb/Interpreter/OptionValueEnumeration.h 24 typedef int64_t enum_type;
tools/lldb/include/lldb/Interpreter/OptionValueProperties.h 136 int64_t GetPropertyAtIndexAsEnumeration(const ExecutionContext *exe_ctx,
138 int64_t fail_value) const;
141 uint32_t idx, int64_t new_value);
155 int64_t GetPropertyAtIndexAsSInt64(const ExecutionContext *exe_ctx,
156 uint32_t idx, int64_t fail_value) const;
159 int64_t new_value);
tools/lldb/include/lldb/Interpreter/OptionValueSInt64.h 23 OptionValueSInt64(int64_t value)
27 OptionValueSInt64(int64_t current_value, int64_t default_value)
27 OptionValueSInt64(int64_t current_value, int64_t default_value)
63 const int64_t &operator=(int64_t value) {
63 const int64_t &operator=(int64_t value) {
68 int64_t GetCurrentValue() const { return m_current_value; }
70 int64_t GetDefaultValue() const { return m_default_value; }
72 bool SetCurrentValue(int64_t value) {
80 bool SetDefaultValue(int64_t value) {
88 void SetMinimumValue(int64_t v) { m_min_value = v; }
90 int64_t GetMinimumValue() const { return m_min_value; }
92 void SetMaximumValue(int64_t v) { m_max_value = v; }
94 int64_t GetMaximumValue() const { return m_max_value; }
97 int64_t m_current_value;
98 int64_t m_default_value;
99 int64_t m_min_value;
100 int64_t m_max_value;
tools/lldb/include/lldb/Symbol/ClangASTContext.h 866 int64_t enum_value, uint32_t enum_value_bit_size);
tools/lldb/include/lldb/Symbol/PostfixExpression.h 91 IntegerNode(int64_t value) : Node(Integer), m_value(value) {}
93 int64_t GetValue() const { return m_value; }
98 int64_t m_value;
tools/lldb/include/lldb/Symbol/SymbolFile.h 143 int64_t first_index = 0;
tools/lldb/include/lldb/Symbol/Type.h 491 int64_t GetValueAsSigned() const { return m_value.getSExtValue(); }
tools/lldb/include/lldb/Target/DynamicLoader.h 298 int64_t ReadUnsignedIntWithSizeInBytes(lldb::addr_t addr, int size_in_bytes);
tools/lldb/include/lldb/Target/Process.h 1565 int64_t ReadSignedIntegerFromMemory(lldb::addr_t load_addr, size_t byte_size,
1566 int64_t fail_value, Status &error);
tools/lldb/include/lldb/Target/StackFrame.h 466 int64_t offset);
tools/lldb/include/lldb/Utility/Args.h 269 static bool SInt64ValueIsValidForByteSize(int64_t sval64,
277 const int64_t max = (static_cast<int64_t>(1)
280 const int64_t min = ~(max);
tools/lldb/include/lldb/Utility/DataExtractor.h 503 int64_t GetMaxS64(lldb::offset_t *offset_ptr, size_t byte_size) const;
577 int64_t GetMaxS64Bitfield(lldb::offset_t *offset_ptr, size_t size,
797 int64_t GetSLEB128(lldb::offset_t *offset_ptr) const;
tools/lldb/include/lldb/Utility/Scalar.h 253 static bool SIntValueIsValidForSize(int64_t sval64, size_t total_byte_size) {
260 const int64_t max = (static_cast<int64_t>(1)
263 const int64_t min = ~(max);
tools/lldb/include/lldb/Utility/Stream.h 294 Stream &operator<<(int64_t sval);
458 size_t PutSLEB128(int64_t uval);
tools/lldb/include/lldb/Utility/StringExtractor.h 79 int64_t GetS64(int64_t fail_value, int base = 0);
79 int64_t GetS64(int64_t fail_value, int base = 0);
tools/lldb/include/lldb/Utility/Timeout.h 28 class Timeout : public llvm::Optional<std::chrono::duration<int64_t, Ratio>> {
30 template <typename Ratio2> using Dur = std::chrono::duration<int64_t, Ratio2>;
tools/lldb/include/lldb/lldb-private-types.h 88 int64_t value;
tools/lldb/source/API/SBData.cpp 295 int64_t SBData::GetSignedInt64(lldb::SBError &error, lldb::offset_t offset) {
299 int64_t value = 0;
453 int64_t *array,
462 size_t data_len = array_len * sizeof(int64_t);
584 bool SBData::SetDataFromSInt64Array(int64_t *array, size_t array_len) {
593 size_t data_len = array_len * sizeof(int64_t);
tools/lldb/source/API/SBTarget.cpp 2191 int64_t slide_offset) {
tools/lldb/source/API/SBTypeEnumMember.cpp 70 int64_t SBTypeEnumMember::GetValueAsSigned() {
tools/lldb/source/API/SBValue.cpp 909 int64_t SBValue::GetValueAsSigned(SBError &error, int64_t fail_value) {
909 int64_t SBValue::GetValueAsSigned(SBError &error, int64_t fail_value) {
951 int64_t SBValue::GetValueAsSigned(int64_t fail_value) {
951 int64_t SBValue::GetValueAsSigned(int64_t fail_value) {
tools/lldb/source/Commands/CommandObjectFrame.cpp 114 llvm::Optional<int64_t> offset;
tools/lldb/source/Commands/CommandObjectMemory.cpp 1172 int64_t j = buffer_size - 1;
1300 bool SIntValueIsValidForSize(int64_t sval64, size_t total_byte_size) {
1307 const int64_t max = ((int64_t)1 << (uint64_t)(total_byte_size * 8 - 1)) - 1;
1308 const int64_t min = ~(max);
1403 int64_t sval64;
tools/lldb/source/Core/Disassembler.cpp 1361 Instruction::Operand Instruction::Operand::BuildImmediate(int64_t imm) {
1440 lldb_private::OperandMatchers::MatchImmOp(int64_t imm) {
1449 lldb_private::OperandMatchers::FetchImmOp(int64_t &imm) {
tools/lldb/source/Core/DynamicLoader.cpp 220 int64_t DynamicLoader::ReadUnsignedIntWithSizeInBytes(addr_t addr,
tools/lldb/source/Core/FormatEntity.cpp 512 int64_t &index_lower, int64_t &index_higher) {
512 int64_t &index_lower, int64_t &index_higher) {
558 const int64_t temp = index_lower;
735 int64_t index_lower = -1;
736 int64_t index_higher = -1;
954 for (int64_t index = index_lower; index <= index_higher; ++index) {
tools/lldb/source/Core/ValueObject.cpp 1218 int64_t ValueObject::GetValueAsSigned(int64_t fail_value, bool *success) {
1218 int64_t ValueObject::GetValueAsSigned(int64_t fail_value, bool *success) {
tools/lldb/source/Expression/DWARFExpression.cpp 2098 int64_t breg_offset = opcodes.GetSLEB128(&offset);
2117 int64_t breg_offset = opcodes.GetSLEB128(&offset);
2131 int64_t fbreg_offset = opcodes.GetSLEB128(&offset);
2720 int64_t sint;
2995 int64_t offset = opcodes.GetSLEB128(&op_offset);
3020 int64_t offset = 0;
tools/lldb/source/Host/common/StringConvert.cpp 48 int64_t ToSInt64(const char *s, int64_t fail_value, int base,
48 int64_t ToSInt64(const char *s, int64_t fail_value, int base,
52 int64_t uval = ::strtoll(s, &end, base);
tools/lldb/source/Interpreter/OptionArgParser.cpp 47 int64_t OptionArgParser::ToOptionEnum(llvm::StringRef s,
tools/lldb/source/Interpreter/OptionValue.cpp 305 int64_t OptionValue::GetEnumerationValue(int64_t fail_value) const {
305 int64_t OptionValue::GetEnumerationValue(int64_t fail_value) const {
312 bool OptionValue::SetEnumerationValue(int64_t value) {
391 int64_t OptionValue::GetSInt64Value(int64_t fail_value) const {
391 int64_t OptionValue::GetSInt64Value(int64_t fail_value) const {
398 bool OptionValue::SetSInt64Value(int64_t new_value) {
tools/lldb/source/Interpreter/OptionValueProperties.cpp 353 int64_t OptionValueProperties::GetPropertyAtIndexAsEnumeration(
354 const ExecutionContext *exe_ctx, uint32_t idx, int64_t fail_value) const {
365 const ExecutionContext *exe_ctx, uint32_t idx, int64_t new_value) {
445 int64_t OptionValueProperties::GetPropertyAtIndexAsSInt64(
446 const ExecutionContext *exe_ctx, uint32_t idx, int64_t fail_value) const {
457 const ExecutionContext *exe_ctx, uint32_t idx, int64_t new_value) {
tools/lldb/source/Interpreter/OptionValueSInt64.cpp 46 int64_t value = StringConvert::ToSInt64(value_str.c_str(), 0, 0, &success);
tools/lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp 678 int64_t modid = ReadUnsignedIntWithSizeInBytes(
tools/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp 7640 int64_t signed_data = llvm::SignExtend64<8>(unsigned_data);
7737 int64_t signed_data = llvm::SignExtend64<8>(unsigned_data);
7888 int64_t signed_data = llvm::SignExtend64<8>(unsigned_data);
8050 int64_t signed_data = llvm::SignExtend64<16>(data);
8151 int64_t signed_data = llvm::SignExtend64<16>(data);
8332 int64_t signed_data = llvm::SignExtend64<16>(data);
8414 int64_t data = llvm::SignExtend64<8>(rotated);
8506 int64_t data = llvm::SignExtend64<16>(rotated);
9749 int64_t imm32_signed = imm32;
14178 int64_t signed_sum = (int32_t)x + (int32_t)y + (int32_t)carry_in;
tools/lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.cpp 92 int64_t signed_sum = SInt(x) + SInt(y) + UInt(carry_in);
1076 int64_t offset = llvm::SignExtend64<28>(Bits32(opcode, 25, 0) << 2);
1113 int64_t offset = llvm::SignExtend64<21>(Bits32(opcode, 23, 5) << 2);
1177 int64_t offset = llvm::SignExtend64<16>(Bits32(opcode, 18, 5) << 2);
tools/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp 1190 int64_t imm = SignedBits(imm16, 15, 0);
1203 const int64_t src_opd_val = ReadRegisterUnsigned(
1429 int64_t imm = SignedBits(imm32, 31, 0);
tools/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp 1082 int64_t imm = SignedBits(imm16, 15, 0);
1199 int64_t imm, address;
1247 int64_t imm = SignedBits(imm32, 31, 0);
1345 int64_t offset, pc, rs_val, rt_val, target = 0;
1396 int64_t offset, pc, target = 0;
1397 int64_t rs_val;
1440 int64_t offset, pc, target;
1471 int64_t offset, pc, target;
1507 int64_t offset, pc, rs_val, target = 0;
1575 int64_t offset, pc, rs_val, target = 0;
1626 int64_t offset, pc, target;
1647 static int IsAdd64bitOverflow(int64_t a, int64_t b) {
1647 static int IsAdd64bitOverflow(int64_t a, int64_t b) {
1648 int64_t r = (uint64_t)a + (uint64_t)b;
1660 int64_t offset, pc, rs_val, rt_val, target = 0;
1739 int64_t offset, pc, target = 0;
1740 int64_t rs_val;
1889 int64_t target, offset, pc, rt_val;
1927 int64_t target, offset, rt_val;
1980 int64_t pc, offset, target = 0;
2027 int64_t target, pc, offset;
2063 int64_t target, pc, offset;
2105 int64_t pc, offset, target = 0;
2191 int64_t target = 0;
2196 int64_t offset = insn.getOperand(1).getImm();
2198 int64_t pc =
2258 int64_t target = 0;
2265 int64_t offset = insn.getOperand(1).getImm();
2267 int64_t pc =
2293 int64_t imm, address;
2326 int64_t address, index_address;
tools/lldb/source/Plugins/Language/CPlusPlus/LibCxxVariant.cpp 76 int64_t index_value = index_sp->GetValueAsSigned(0);
tools/lldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABI/ItaniumABILanguageRuntime.cpp 255 const int64_t offset_to_top = process->ReadSignedIntegerFromMemory(
tools/lldb/source/Plugins/LanguageRuntime/RenderScript/RenderScriptRuntime/RenderScriptRuntime.cpp 752 {eFormatDecimal, eFormatVectorOfSInt64, sizeof(int64_t)},
tools/lldb/source/Plugins/ObjectFile/ELF/ELFHeader.cpp 48 lldb::offset_t *offset, int64_t *value,
56 lldb::offset_t *offset, int64_t *value,
tools/lldb/source/Plugins/ObjectFile/ELF/ELFHeader.h 48 typedef int64_t elf_sxword;
tools/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp 2073 int64_t symbol_value_offset = 0;
tools/lldb/source/Plugins/Process/Utility/ARMUtils.h 147 int64_t extended = llvm::SignExtend64<32>(value);
tools/lldb/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp 263 int64_t bitsize = 0;
tools/lldb/source/Plugins/Process/Utility/InstructionUtils.h 104 static inline int64_t SignedBits(const uint64_t value, const uint64_t msbit,
tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.cpp 62 int64_t signal; // Signal causing core dump.
tools/lldb/source/Plugins/Process/Utility/UnwindLLDB.cpp 473 int64_t frame_num = starting_frame_num;
tools/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp 370 int64_t i;
tools/lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h 285 int64_t m_breakpoint_pc_offset;
tools/lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp 425 PythonInteger::PythonInteger(int64_t value) { SetInteger(value); }
468 int64_t PythonInteger::GetInteger() const {
474 int64_t result = PyLong_AsLongLongAndOverflow(m_py_obj, &overflow);
487 void PythonInteger::SetInteger(int64_t value) {
tools/lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.h 489 explicit PythonInteger(int64_t value);
494 int64_t GetInteger() const;
496 void SetInteger(int64_t value);
tools/lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp 2241 int64_t enum_value = 0;
2499 int64_t bit_offset = 0;
tools/lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.cpp 634 int64_t a = a_value.Signed();
635 int64_t b = b_value.Signed();
tools/lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.h 27 int64_t sval;
65 int64_t Signed() const { return m_value.value.sval; }
66 void SetSigned(int64_t sval) { m_value.value.sval = sval; }
tools/lldb/source/Plugins/SymbolFile/PDB/PDBASTParser.cpp 1132 int64_t raw_value;
tools/lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp 559 const int64_t offset = context.info.RegisterPlusOffset.signed_offset;
tools/lldb/source/Symbol/ClangASTContext.cpp 269 static int64_t ReadVBaseOffsetFromVTable(Process &process,
8908 int64_t enum_value, uint32_t enum_value_bit_size) {
9175 const int64_t enum_value = data.GetMaxU64Bitfield(
tools/lldb/source/Symbol/CompilerType.cpp 820 int64_t sval64 = data.GetMaxS64(&offset, *byte_size);
tools/lldb/source/Symbol/PostfixExpression.cpp 71 int64_t value;
tools/lldb/source/Target/Process.cpp 2119 int64_t Process::ReadSignedIntegerFromMemory(lldb::addr_t vm_addr,
2121 int64_t fail_value,
tools/lldb/source/Target/StackFrame.cpp 1241 std::pair<const Instruction::Operand *, int64_t>
1271 std::pair<const Instruction::Operand *, int64_t> base_and_offset =
1304 std::pair<const Instruction::Operand *, int64_t>
1354 std::pair<const Instruction::Operand *, int64_t> base_and_offset =
1400 int64_t offset) {
1417 int64_t child_offset = child_sp->GetByteOffset();
1418 int64_t child_size = child_sp->GetByteSize();
1434 int64_t offset) {
1451 int64_t index = offset / pointee->GetByteSize();
1490 int64_t offset, Disassembler &disassembler,
1571 int64_t offset = 0;
1649 int64_t origin_offset = 0;
1682 int64_t offset) {
tools/lldb/source/Utility/DataExtractor.cpp 572 int64_t DataExtractor::GetMaxS64(offset_t *offset_ptr, size_t byte_size) const {
595 int64_t DataExtractor::GetMaxS64Bitfield(offset_t *offset_ptr, size_t size,
598 int64_t sval64 = GetMaxS64(offset_ptr, size);
909 int64_t DataExtractor::GetSLEB128(offset_t *offset_ptr) const {
917 int64_t result = 0;
919 int size = sizeof(int64_t) * 8;
tools/lldb/source/Utility/RegisterValue.cpp 349 int64_t ival64;
tools/lldb/source/Utility/Scalar.cpp 2457 if (byte_size <= sizeof(int64_t)) {
2458 int64_t sval64;
tools/lldb/source/Utility/Stream.cpp 45 size_t Stream::PutSLEB128(int64_t sval) {
206 Stream &Stream::operator<<(int64_t sval) {
tools/lldb/source/Utility/StringExtractor.cpp 139 int64_t StringExtractor::GetS64(int64_t fail_value, int base) {
139 int64_t StringExtractor::GetS64(int64_t fail_value, int base) {
144 int64_t result = ::strtoll(cstr, &end, base);
tools/lldb/source/Utility/StructuredData.cpp 66 int64_t i;
tools/lldb/tools/lldb-vscode/JSONUtils.cpp 84 int64_t GetSigned(const llvm::json::Object &obj, llvm::StringRef key,
85 int64_t fail_value) {
91 int64_t GetSigned(const llvm::json::Object *obj, llvm::StringRef key,
92 int64_t fail_value) {
162 const int64_t seq = GetSigned(request, "seq", 0);
226 int64_t variablesReference,
227 int64_t namedVariables, bool expensive) {
475 llvm::json::Value CreateSource(lldb::SBFrame &frame, int64_t &disasm_line) {
620 int64_t frame_id = MakeVSCodeFrameID(frame);
623 int64_t disasm_line = 0;
848 llvm::json::Value CreateVariable(lldb::SBValue v, int64_t variablesReference,
849 int64_t varID, bool format_hex) {
tools/lldb/tools/lldb-vscode/JSONUtils.h 109 int64_t GetSigned(const llvm::json::Object &obj, llvm::StringRef key,
110 int64_t fail_value);
111 int64_t GetSigned(const llvm::json::Object *obj, llvm::StringRef key,
112 int64_t fail_value);
251 int64_t variablesReference,
252 int64_t namedVariables, bool expensive);
289 llvm::json::Value CreateSource(lldb::SBFrame &frame, int64_t &disasm_line);
390 llvm::json::Value CreateVariable(lldb::SBValue v, int64_t variablesReference,
391 int64_t varID, bool format_hex);
tools/lldb/tools/lldb-vscode/LLDBUtils.cpp 77 int64_t MakeVSCodeFrameID(lldb::SBFrame &frame) {
92 int64_t MakeVSCodeBreakpointID(lldb::SBBreakpointLocation &bp_loc) {
tools/lldb/tools/lldb-vscode/LLDBUtils.h 81 int64_t MakeVSCodeFrameID(lldb::SBFrame &frame);
122 int64_t MakeVSCodeBreakpointID(lldb::SBBreakpointLocation &bp_loc);
tools/lldb/tools/lldb-vscode/SourceReference.h 20 llvm::DenseMap<lldb::addr_t, int64_t> addr_to_line;
22 int64_t GetLineForPC(lldb::addr_t pc) const {
tools/lldb/tools/lldb-vscode/VSCode.cpp 57 int64_t VSCode::GetLineForPC(int64_t sourceReference, lldb::addr_t pc) const {
57 int64_t VSCode::GetLineForPC(int64_t sourceReference, lldb::addr_t pc) const {
230 int64_t VSCode::GetNextSourceReference() {
231 static int64_t ref = 0;
tools/lldb/tools/lldb-vscode/VSCode.h 75 int64_t num_regs;
76 int64_t num_locals;
77 int64_t num_globals;
80 llvm::DenseMap<lldb::addr_t, int64_t> addr_to_source_ref;
81 llvm::DenseMap<int64_t, SourceReference> source_map;
99 int64_t GetLineForPC(int64_t sourceReference, lldb::addr_t pc) const;
99 int64_t GetLineForPC(int64_t sourceReference, lldb::addr_t pc) const;
118 static int64_t GetNextSourceReference();
tools/lldb/tools/lldb-vscode/lldb-vscode.cpp 2295 int64_t newVariablesReference = 0;
2312 int64_t start_idx = 0;
2313 int64_t end_idx = 0;
2336 for (int64_t i = end_idx - 1; i >= start_idx; --i) {
2349 const int64_t var_idx = VARREF_TO_VARIDX(variablesReference);
2469 const int64_t start = GetSigned(arguments, "start", 0);
2470 const int64_t count = GetSigned(arguments, "count", 0);
2479 int64_t start_idx = 0;
2480 int64_t num_children = 0;
2497 const int64_t end_idx = start_idx + ((count == 0) ? num_children : count);
2508 const int64_t var_idx = VARREF_TO_VARIDX(variablesReference);
2512 const int64_t end_idx = start + ((count == 0) ? num_children : count);
2518 const int64_t var_idx = g_vsc.variables.GetSize();
tools/lldb/unittests/Host/FileSystemTest.cpp 28 getBuffer(const Twine &Name, int64_t FileSize, bool RequiresNullTerminator,
tools/lldb/unittests/Utility/DataExtractorTest.cpp 156 int64_t value = LE.GetMaxS64(&offset, 3);
tools/lldb/unittests/Utility/StreamTest.cpp 302 s << std::numeric_limits<int64_t>::max();
556 auto bytes = s.PutSLEB128(std::numeric_limits<int64_t>::max());
tools/llvm-cov/SourceCoverageView.h 153 int64_t LineNo;
155 LineRef(StringRef Line, int64_t LineNo) : Line(Line), LineNo(LineNo) {}
tools/llvm-cxxdump/llvm-cxxdump.cpp 171 std::map<std::pair<StringRef, uint64_t>, int64_t> VTableDataEntries;
330 int64_t VData;
489 int64_t VTableEntry = VTableDataI->second;
tools/llvm-exegesis/lib/BenchmarkResult.cpp 109 void serializeIntegerOperand(raw_ostream &OS, int64_t Value) {
114 bool tryDeserializeIntegerOperand(StringRef String, int64_t &Value) {
146 int64_t IntValue = 0;
tools/llvm-exegesis/lib/BenchmarkRunner.cpp 44 Expected<int64_t> runAndMeasure(const char *Counters) const override {
47 int64_t CounterValue = 0;
tools/llvm-exegesis/lib/BenchmarkRunner.h 68 virtual Expected<int64_t> runAndMeasure(const char *Counters) const = 0;
tools/llvm-exegesis/lib/Latency.cpp 187 int64_t MinValue = std::numeric_limits<int64_t>::max();
187 int64_t MinValue = std::numeric_limits<int64_t>::max();
tools/llvm-exegesis/lib/PerfHelper.cpp 133 int64_t Counter::read() const { return 42; }
tools/llvm-exegesis/lib/PerfHelper.h 77 int64_t read() const; // Return the current value of the counter.
90 const std::function<void(const PerfEvent &Event, int64_t Value)> &Callback,
tools/llvm-exegesis/lib/SnippetFile.cpp 94 void EmitValueToAlignment(unsigned ByteAlignment, int64_t Value,
tools/llvm-exegesis/lib/X86/Target.cpp 217 const int64_t Scale = 1ull << LogScale;
tools/llvm-mc/llvm-mc.cpp 270 int64_t Value;
tools/llvm-objcopy/CopyConfig.cpp 721 auto EIncr = getAsInteger<int64_t>(Arg->getValue());
tools/llvm-objdump/ELFDump.cpp 62 int64_t Addend = 0;
tools/llvm-opt-report/OptReport.cpp 294 int64_t NumLines = 0;
301 int64_t L = LI.line_number();
tools/llvm-readobj/COFFDumper.cpp 1399 int64_t SymbolIndex = -1;
tools/llvm-readobj/ELFDumper.cpp 2308 int64_t getGotOffset(const Entry * E) const;
2494 int64_t Offset = std::distance(GotEntries.data(), E) * sizeof(Entry);
2499 int64_t MipsGOTParser<ELFT>::getGotOffset(const Entry *E) const {
2500 int64_t Offset = std::distance(GotEntries.data(), E) * sizeof(Entry);
2507 int64_t Offset = std::distance(GotEntries.data(), E);
2533 int64_t Offset = std::distance(PltEntries.data(), E) * sizeof(Entry);
2540 int64_t Offset = std::distance(getPltEntries().data(), E);
2959 int64_t RelAddend = R.r_addend;
tools/llvm-xray/xray-graph.cpp 164 static void updateStat(GraphRenderer::TimeStat &S, int64_t L) {
312 int64_t OldCount = S.Count;
tools/llvm-xray/xray-graph.h 43 int64_t Count;
tools/llvm-xray/xray-stacks.cpp 259 llvm::SmallVector<int64_t, 4> TerminalDurations;
260 llvm::SmallVector<int64_t, 4> IntermediateDurations;
tools/obj2yaml/macho2yaml.cpp 314 int64_t SLEB = 0;
tools/polly/lib/External/isl/isl_int_sioimath.c 28 extern mp_int isl_sioimath_si64arg_src(int64_t arg,
35 extern void isl_sioimath_set_int64(isl_sioimath_ptr ptr, int64_t val);
tools/polly/lib/External/isl/isl_int_sioimath.h 295 inline mp_int isl_sioimath_si64arg_src(int64_t arg,
361 inline void isl_sioimath_set_int64(isl_sioimath_ptr ptr, int64_t val)
1016 int64_t lhssmall, rhssmall;
unittests/ADT/APIntTest.cpp 463 int64_t edge = INT64_MIN;
464 int64_t edgeP1 = edge + 1;
465 int64_t edgeM1 = INT64_MAX;
1027 int64_t sr;
2546 for (int64_t Ai = -128; Ai <= 127; Ai++) {
2635 int64_t Over0 = OverflowBits(C, Width);
2638 int64_t ValueAtX = A*X*X + B*X + C;
2639 int64_t OverX = OverflowBits(ValueAtX, Width);
unittests/ADT/StringRefTest.cpp 573 int64_t Expected;
638 int64_t S64;
721 int64_t Expected;
824 int64_t S64;
unittests/BinaryFormat/MsgPackWriterTest.cpp 126 for (int64_t i = -1; i >= -32; --i) {
137 int64_t i = -33;
143 int64_t i = -40;
149 int64_t i = INT8_MIN;
155 int64_t i = static_cast<int64_t>(INT8_MIN) - 1;
161 int64_t i = -4369;
167 int64_t i = INT16_MIN;
173 int64_t i = static_cast<int64_t>(INT16_MIN) - 1;
179 int64_t i = -286331153;
185 int64_t i = INT32_MIN;
191 int64_t i = static_cast<int64_t>(INT32_MIN) - 1;
197 int64_t i = -1229782938247303441;
203 int64_t i = INT64_MIN;
unittests/CodeGen/GlobalISel/ConstantFoldingTest.cpp 27 int64_t Cst;
unittests/CodeGen/GlobalISel/PatternMatchTest.cpp 38 int64_t Cst;
83 int64_t Cst;
unittests/DebugInfo/DWARF/DWARFDebugInfoTest.cpp 60 const int64_t SData = INT64_MIN;
61 const int64_t ICSData = INT64_MAX; // DW_FORM_implicit_const SData
1559 int64_t InvalidS64 = 0xBADBADBADBADBADB;
1636 int64_t SData8 = 0x1020304050607080ULL;
1754 const int64_t Val1 = 42;
1755 const int64_t Val2 = 43;
1805 int64_t Val = std::atoll(S.substr(ValPos).c_str());
1829 std::multimap<int64_t, decltype(it->getAbbreviationDeclarationPtr())> DIEs;
unittests/DebugInfo/DWARF/DWARFFormValueTest.cpp 63 DWARFFormValue createSLEBFormValue(int64_t Value) {
unittests/DebugInfo/GSYM/GSYMTest.cpp 687 const int64_t MinSLEB = INT64_MIN;
688 const int64_t MaxSLEB = INT64_MAX;
unittests/ExecutionEngine/JITLink/JITLinkTestCommon.cpp 219 Expected<int64_t> JITLinkTestCommon::decodeImmediateOperand(
unittests/ExecutionEngine/JITLink/JITLinkTestCommon.h 166 static Expected<int64_t> decodeImmediateOperand(const MCDisassembler &Dis,
unittests/ExecutionEngine/Orc/RPCUtilsTest.cpp 136 int32_t, uint32_t, int64_t, uint64_t,
unittests/IR/InstructionsTest.cpp 358 int64_t Offset;
unittests/Support/BinaryStreamTest.cpp 589 enum class MyEnum : int64_t { Foo = -10, Bar = 0, Baz = 10 };
648 std::vector<int64_t> TestValues = {
674 std::vector<int64_t> Results;
unittests/Support/CheckedArithmeticTest.cpp 9 const int64_t Max = std::numeric_limits<int64_t>::max();
9 const int64_t Max = std::numeric_limits<int64_t>::max();
10 const int64_t Min = std::numeric_limits<int64_t>::min();
10 const int64_t Min = std::numeric_limits<int64_t>::min();
27 const int64_t Max = std::numeric_limits<int64_t>::max();
27 const int64_t Max = std::numeric_limits<int64_t>::max();
28 const int64_t Min = std::numeric_limits<int64_t>::min();
28 const int64_t Min = std::numeric_limits<int64_t>::min();
36 const int64_t Max = std::numeric_limits<int64_t>::max();
36 const int64_t Max = std::numeric_limits<int64_t>::max();
37 const int64_t Min = std::numeric_limits<int64_t>::min();
37 const int64_t Min = std::numeric_limits<int64_t>::min();
unittests/Support/EndianTest.cpp 126 endian::writeAtBitAlignment<int64_t, big, unaligned>(
146 endian::writeAtBitAlignment<int64_t, little, unaligned>(
unittests/Support/FormatVariadicTest.cpp 500 void *, int, double, int64_t, uint64_t, double, uint8_t>;
unittests/Support/JSONTest.cpp 273 llvm::Optional<int64_t> AsInt;
unittests/Support/SwapByteOrderTest.cpp 64 int64_t original_int64 = static_cast<int64_t>(value);
183 int64_t value = 0x8877665544332211LL;
unittests/Support/VirtualFileSystemTest.cpp 34 getBuffer(const Twine &Name, int64_t FileSize, bool RequiresNullTerminator,
unittests/Support/YAMLIOTest.cpp 335 int64_t s64;
2121 std::vector<int64_t> seq;
2139 std::vector<int64_t> seq;
unittests/Target/AArch64/TestStackOffset.cpp 101 int64_t ByteSized, VLSized, PLSized;
unittests/Transforms/IPO/WholeProgramDevirt.cpp 78 int64_t OffsetByte;
unittests/tools/llvm-exegesis/Mips/TargetTest.cpp 33 Matcher<MCOperand> IsImm(int64_t Value) {
47 Matcher<MCInst> IsLoadLowImm(int64_t Reg, int64_t Value) {
47 Matcher<MCInst> IsLoadLowImm(int64_t Reg, int64_t Value) {
unittests/tools/llvm-exegesis/X86/TargetTest.cpp 63 Matcher<MCOperand> IsImm(int64_t Value) {
77 Matcher<MCInst> IsMovImmediate(unsigned Opcode, int64_t Reg, int64_t Value) {
77 Matcher<MCInst> IsMovImmediate(unsigned Opcode, int64_t Reg, int64_t Value) {
81 Matcher<MCInst> IsMovValueToStack(unsigned Opcode, int64_t Value,
usr/include/c++/7.4.0/atomic 935 typedef atomic<int64_t> atomic_int64_t;
usr/include/c++/7.4.0/chrono 597 typedef duration<int64_t, nano> nanoseconds;
600 typedef duration<int64_t, micro> microseconds;
603 typedef duration<int64_t, milli> milliseconds;
606 typedef duration<int64_t> seconds;
609 typedef duration<int64_t, ratio< 60>> minutes;
612 typedef duration<int64_t, ratio<3600>> hours;
usr/include/elf.h 42 typedef int64_t Elf32_Sxword;
44 typedef int64_t Elf64_Sxword;
usr/include/rpc/xdr.h 302 extern bool_t xdr_int64_t (XDR *__xdrs, int64_t *__ip) __THROW;
utils/TableGen/AsmMatcherEmitter.cpp 448 int64_t ImmVal;
475 static ResOperand getImmOp(int64_t Val) {
1899 int64_t ImmVal = CGA.ResultOperands[AliasOpNo].getImm();
2179 int64_t Val = OpInfo.ImmVal;
utils/TableGen/CodeGenDAGPatterns.cpp 989 int64_t MinAlign = getMinAlignment();
1196 int64_t TreePredicateFn::getMinAlignment() const {
2367 int64_t SignBitAndAbove = II->getValue() >> (Size - 1);
utils/TableGen/CodeGenDAGPatterns.h 597 int64_t getMinAlignment() const;
utils/TableGen/CodeGenInstruction.h 337 int64_t Imm;
347 ResultOperand(int64_t I) : Imm(I), Kind(K_Imm) {}
356 int64_t getImm() const { assert(isImm()); return Imm; }
utils/TableGen/CodeGenSchedule.cpp 269 static APInt constructOperandMask(ArrayRef<int64_t> Indices) {
274 int64_t MaxIndex = *std::max_element(Indices.begin(), Indices.end());
277 for (const int64_t Index : Indices) {
340 std::vector<int64_t> OpIndices =
1810 std::vector<int64_t> RegisterCosts = RF->getValueAsListOfInts("RegCosts");
utils/TableGen/CodeGenTarget.cpp 536 int64_t RawComplexity = R->getValueAsInt("Complexity");
utils/TableGen/DAGISelMatcher.h 569 int64_t Value;
571 CheckIntegerMatcher(int64_t value)
574 int64_t getValue() const { return Value; }
592 int64_t Value;
594 CheckChildIntegerMatcher(unsigned childno, int64_t value)
598 int64_t getValue() const { return Value; }
721 int64_t Value;
723 CheckAndImmMatcher(int64_t value)
726 int64_t getValue() const { return Value; }
742 int64_t Value;
744 CheckOrImmMatcher(int64_t value)
747 int64_t getValue() const { return Value; }
810 int64_t Val;
813 EmitIntegerMatcher(int64_t val, MVT::SimpleValueType vt)
816 int64_t getValue() const { return Val; }
utils/TableGen/DAGISelMatcherEmitter.cpp 613 int64_t Val = cast<EmitIntegerMatcher>(N)->getValue();
utils/TableGen/DFAPacketizerEmitter.cpp 62 typedef int64_t DFAStateInput;
utils/TableGen/FixedLenDecoderEmitter.cpp 1061 int64_t Val = -1;
utils/TableGen/GlobalISelEmitter.cpp 252 int64_t MinAlign = P.getMinAlignment();
443 int64_t RawValue;
447 int64_t RawValue = std::numeric_limits<int64_t>::min())
447 int64_t RawValue = std::numeric_limits<int64_t>::min())
469 int64_t getRawValue() const { return RawValue; }
515 static MatchTableRecord NamedValue(StringRef NamedValue, int64_t RawValue) {
525 int64_t RawValue) {
529 static MatchTableRecord IntValue(int64_t IntValue) {
1365 int64_t Value;
1368 ConstantIntOperandMatcher(unsigned InsnVarID, unsigned OpIdx, int64_t Value)
1393 int64_t Value;
1396 LiteralIntOperandMatcher(unsigned InsnVarID, unsigned OpIdx, int64_t Value)
2615 int64_t Imm;
2618 ImmRenderer(unsigned InsnID, int64_t Imm)
3531 int64_t MinAlign = Predicate.getMinAlignment();
5582 const int64_t LowerBound = Values.begin()->getRawValue();
5583 const int64_t UpperBound = Values.rbegin()->getRawValue() + 1;
5591 int64_t J = LowerBound;
utils/TableGen/RegisterInfoEmitter.cpp 342 using DwarfRegNumsMapPair = std::pair<Record*, std::vector<int64_t>>;
379 std::vector<int64_t> RegNums = Reg->getValueAsListOfInts("DwarfNumbers");
utils/TableGen/SearchableTableEmitter.cpp 44 using Entry = std::pair<StringRef, int64_t>;
195 static int64_t getNumericKey(const SearchIndex &Index, Record *Rec) {
215 int64_t LHSi = getAsInt(LHSI);
216 int64_t RHSi = getAsInt(RHSI);
250 int64_t LHSv = Field.Enum->EntryMap[LHSr]->second;
251 int64_t RHSv = Field.Enum->EntryMap[RHSr]->second;
576 int64_t Value = 0;
utils/TableGen/SubtargetEmitter.cpp 111 void ExpandProcResources(RecVec &PRVec, std::vector<int64_t> &Cycles,
341 std::vector<int64_t> OperandCycleList =
644 int64_t ReorderBufferSize = 0, MaxRetirePerCycle = 0;
936 std::vector<int64_t> &Cycles,
1105 std::vector<int64_t> Cycles =
utils/benchmark/include/benchmark/benchmark.h 400 typedef double(BigOFunc)(int64_t);
529 void SetBytesProcessed(int64_t bytes) { bytes_processed_ = bytes; }
532 int64_t bytes_processed() const { return bytes_processed_; }
540 void SetComplexityN(int64_t complexity_n) { complexity_n_ = complexity_n; }
543 int64_t complexity_length_n() { return complexity_n_; }
552 void SetItemsProcessed(int64_t items) { items_processed_ = items; }
555 int64_t items_processed() const { return items_processed_; }
577 int64_t range(std::size_t pos = 0) const {
583 int64_t range_x() const { return range(0); }
586 int64_t range_y() const { return range(1); }
616 std::vector<int64_t> range_;
618 int64_t bytes_processed_;
619 int64_t items_processed_;
621 int64_t complexity_n_;
633 State(size_t max_iters, const std::vector<int64_t>& ranges, int thread_i,
754 Benchmark* Arg(int64_t x);
762 Benchmark* Range(int64_t start, int64_t limit);
762 Benchmark* Range(int64_t start, int64_t limit);
767 Benchmark* DenseRange(int64_t start, int64_t limit, int step = 1);
767 Benchmark* DenseRange(int64_t start, int64_t limit, int step = 1);
772 Benchmark* Args(const std::vector<int64_t>& args);
777 Benchmark* ArgPair(int64_t x, int64_t y) {
777 Benchmark* ArgPair(int64_t x, int64_t y) {
778 std::vector<int64_t> args;
787 Benchmark* Ranges(const std::vector<std::pair<int64_t, int64_t> >& ranges);
787 Benchmark* Ranges(const std::vector<std::pair<int64_t, int64_t> >& ranges);
799 Benchmark* RangePair(int64_t lo1, int64_t hi1, int64_t lo2, int64_t hi2) {
799 Benchmark* RangePair(int64_t lo1, int64_t hi1, int64_t lo2, int64_t hi2) {
799 Benchmark* RangePair(int64_t lo1, int64_t hi1, int64_t lo2, int64_t hi2) {
799 Benchmark* RangePair(int64_t lo1, int64_t hi1, int64_t lo2, int64_t hi2) {
800 std::vector<std::pair<int64_t, int64_t> > ranges;
800 std::vector<std::pair<int64_t, int64_t> > ranges;
913 std::vector<std::vector<int64_t> > args_; // Args for all benchmark runs
1294 int64_t iterations;
1321 int64_t complexity_n;
utils/benchmark/src/benchmark.cc 293 State::State(size_t max_iters, const std::vector<int64_t>& ranges, int thread_i,
utils/benchmark/src/benchmark_api_internal.h 20 std::vector<int64_t> arg;
utils/benchmark/src/benchmark_register.cc 256 Benchmark* Benchmark::Arg(int64_t x) {
267 Benchmark* Benchmark::Range(int64_t start, int64_t limit) {
267 Benchmark* Benchmark::Range(int64_t start, int64_t limit) {
269 std::vector<int64_t> arglist;
272 for (int64_t i : arglist) {
279 const std::vector<std::pair<int64_t, int64_t>>& ranges) {
279 const std::vector<std::pair<int64_t, int64_t>>& ranges) {
281 std::vector<std::vector<int64_t>> arglists(ranges.size());
292 std::vector<int64_t> tmp;
324 Benchmark* Benchmark::DenseRange(int64_t start, int64_t limit, int step) {
324 Benchmark* Benchmark::DenseRange(int64_t start, int64_t limit, int step) {
328 for (int64_t arg = start; arg <= limit; arg += step) {
334 Benchmark* Benchmark::Args(const std::vector<int64_t>& args) {
utils/benchmark/src/complexity.cc 76 LeastSq MinimalLeastSq(const std::vector<int64_t>& n,
120 LeastSq MinimalLeastSq(const std::vector<int64_t>& n,
160 std::vector<int64_t> n;
utils/benchmark/src/cycleclock.h 61 inline BENCHMARK_ALWAYS_INLINE int64_t Now() {
utils/benchmark/src/json_reporter.cc 46 std::string FormatKV(std::string const& key, int64_t value) {
63 int64_t RoundDouble(double v) { return static_cast<int64_t>(v + 0.5); }
utils/benchmark/src/statistics.cc 105 int64_t const run_iterations = reports.front().iterations;
utils/benchmark/src/string_util.cc 28 static const int64_t kUnitsSize = arraysize(kBigSIUnits);
32 int64_t* exponent) {
86 std::string ExponentToPrefix(int64_t exponent, bool iec) {
89 const int64_t index = (exponent > 0 ? exponent - 1 : -exponent - 1);
103 int64_t exponent;
utils/benchmark/src/thread_manager.h 41 int64_t iterations = 0;
45 int64_t bytes_processed = 0;
46 int64_t items_processed = 0;
47 int64_t complexity_n = 0;