reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Derived Classes

lib/Target/Hexagon/HexagonBitSimplify.cpp
   74   struct RegisterSet : private BitVector {
lib/Target/Hexagon/HexagonGenInsert.cpp
   91   struct RegisterSet : private BitVector {

Declarations

include/llvm/CodeGen/LiveIntervals.h
   43 class BitVector;
include/llvm/CodeGen/MachineFrameInfo.h
   26 class BitVector;
include/llvm/CodeGen/TargetFrameLowering.h
   22   class BitVector;
include/llvm/CodeGen/TargetRegisterInfo.h
   36 class BitVector;
include/llvm/Support/GlobPattern.h
   26 class BitVector;
lib/CodeGen/SpillPlacement.h
   37 class BitVector;
lib/Target/Hexagon/BitTracker.h
   26 class BitVector;
lib/Target/Hexagon/HexagonFrameLowering.h
   22 class BitVector;
lib/Target/Lanai/LanaiFrameLowering.h
   20 class BitVector;
tools/clang/include/clang/Analysis/Analyses/ReachableCode.h
   23   class BitVector;
tools/llvm-pdbutil/DumpOutputStyle.h
   24 class BitVector;
tools/llvm-pdbutil/PrettyClassDefinitionDumper.h
   23 class BitVector;

References

include/llvm/ADT/ArrayRef.h
   43     using iterator = const T *;
   44     using const_iterator = const T *;
   50     const T *Data = nullptr;
   66     /*implicit*/ ArrayRef(const T &OneElt)
   70     /*implicit*/ ArrayRef(const T *data, size_t length)
   74     ArrayRef(const T *begin, const T *end)
   74     ArrayRef(const T *begin, const T *end)
   81     /*implicit*/ ArrayRef(const SmallVectorTemplateCommon<T, U> &Vec)
   87     /*implicit*/ ArrayRef(const std::vector<T, A> &Vec)
   92     /*implicit*/ constexpr ArrayRef(const std::array<T, N> &Arr)
   97     /*implicit*/ constexpr ArrayRef(const T (&Arr)[N]) : Data(Arr), Length(N) {}
  100     /*implicit*/ ArrayRef(const std::initializer_list<T> &Vec)
  145     const T *data() const { return Data; }
  151     const T &front() const {
  157     const T &back() const {
  163     template <typename Allocator> ArrayRef<T> copy(Allocator &A) {
  178     ArrayRef<T> slice(size_t N, size_t M) const {
  184     ArrayRef<T> slice(size_t N) const { return slice(N, size() - N); }
  187     ArrayRef<T> drop_front(size_t N = 1) const {
  193     ArrayRef<T> drop_back(size_t N = 1) const {
  200     template <class PredicateT> ArrayRef<T> drop_while(PredicateT Pred) const {
  206     template <class PredicateT> ArrayRef<T> drop_until(PredicateT Pred) const {
  211     ArrayRef<T> take_front(size_t N = 1) const {
  218     ArrayRef<T> take_back(size_t N = 1) const {
  226     template <class PredicateT> ArrayRef<T> take_while(PredicateT Pred) const {
  232     template <class PredicateT> ArrayRef<T> take_until(PredicateT Pred) const {
  239     const T &operator[](size_t Index) const {
  249     typename std::enable_if<std::is_same<U, T>::value, ArrayRef<T>>::type &
  257     typename std::enable_if<std::is_same<U, T>::value, ArrayRef<T>>::type &
  263     std::vector<T> vec() const {
  270     operator std::vector<T>() const {
include/llvm/ADT/BitVector.h
   32   const BitVectorT &Parent;
   41   const_set_bits_iterator_impl(const BitVectorT &Parent, int Current)
   43   explicit const_set_bits_iterator_impl(const BitVectorT &Parent)
   94     reference(BitVector &b, unsigned Idx) {
  120   typedef const_set_bits_iterator_impl<BitVector> const_set_bits_iterator;
  147   BitVector(const BitVector &RHS) : Size(RHS.size()) {
  158   BitVector(BitVector &&RHS) : Bits(RHS.Bits), Size(RHS.Size) {
  397   BitVector &set() {
  403   BitVector &set(unsigned Idx) {
  410   BitVector &set(unsigned I, unsigned E) {
  438   BitVector &reset() {
  443   BitVector &reset(unsigned Idx) {
  449   BitVector &reset(unsigned I, unsigned E) {
  477   BitVector &flip() {
  484   BitVector &flip(unsigned Idx) {
  523   bool anyCommon(const BitVector &RHS) const {
  533   bool operator==(const BitVector &RHS) const {
  554   bool operator!=(const BitVector &RHS) const {
  559   BitVector &operator&=(const BitVector &RHS) {
  559   BitVector &operator&=(const BitVector &RHS) {
  576   BitVector &reset(const BitVector &RHS) {
  576   BitVector &reset(const BitVector &RHS) {
  587   bool test(const BitVector &RHS) const {
  602   BitVector &operator|=(const BitVector &RHS) {
  602   BitVector &operator|=(const BitVector &RHS) {
  610   BitVector &operator^=(const BitVector &RHS) {
  610   BitVector &operator^=(const BitVector &RHS) {
  618   BitVector &operator>>=(unsigned N) {
  667   BitVector &operator<<=(unsigned N) {
  718   const BitVector &operator=(const BitVector &RHS) {
  718   const BitVector &operator=(const BitVector &RHS) {
  743   const BitVector &operator=(BitVector &&RHS) {
  743   const BitVector &operator=(BitVector &&RHS) {
  756   void swap(BitVector &RHS) {
  931 inline size_t capacity_in_bytes(const BitVector &X) {
  940   swap(llvm::BitVector &LHS, llvm::BitVector &RHS) {
  940   swap(llvm::BitVector &LHS, llvm::BitVector &RHS) {
include/llvm/ADT/DenseMap.h
   40 struct DenseMapPair : public std::pair<KeyT, ValueT> {
   45   ValueT &getSecond() { return std::pair<KeyT, ValueT>::second; }
   46   const ValueT &getSecond() const { return std::pair<KeyT, ValueT>::second; }
   66   using mapped_type = ValueT;
   69   using iterator = DenseMapIterator<KeyT, ValueT, KeyInfoT, BucketT>;
   71       DenseMapIterator<KeyT, ValueT, KeyInfoT, BucketT, true>;
  185   ValueT lookup(const_arg_type_t<KeyT> Val) const {
  195   std::pair<iterator, bool> insert(const std::pair<KeyT, ValueT> &KV) {
  202   std::pair<iterator, bool> insert(std::pair<KeyT, ValueT> &&KV) {
  249   std::pair<iterator, bool> insert_as(std::pair<KeyT, ValueT> &&KV,
  299   ValueT &operator[](const KeyT &Key) {
  311   ValueT &operator[](KeyT &&Key) {
  380         ::new (&DestBucket->getSecond()) ValueT(std::move(B->getSecond()));
  392       const DenseMapBase<OtherBaseT, KeyT, ValueT, KeyInfoT, BucketT> &other) {
  520     ::new (&TheBucket->getSecond()) ValueT(std::forward<ValueArgs>(Values)...);
  526                                       ValueT &&Value, LookupKeyT &Lookup) {
  684 class DenseMap : public DenseMapBase<DenseMap<KeyT, ValueT, KeyInfoT, BucketT>,
  685                                      KeyT, ValueT, KeyInfoT, BucketT> {
  690   using BaseT = DenseMapBase<DenseMap, KeyT, ValueT, KeyInfoT, BucketT>;
 1163   using ConstIterator = DenseMapIterator<KeyT, ValueT, KeyInfoT, Bucket, true>;
 1199       const DenseMapIterator<KeyT, ValueT, KeyInfoT, Bucket, IsConstSrc> &I)
include/llvm/ADT/MapVector.h
   83   std::pair<KeyT, ValueT>       &front()       { return Vector.front(); }
   84   const std::pair<KeyT, ValueT> &front() const { return Vector.front(); }
   85   std::pair<KeyT, ValueT>       &back()        { return Vector.back(); }
   86   const std::pair<KeyT, ValueT> &back()  const { return Vector.back(); }
   98   ValueT &operator[](const KeyT &Key) {
  110   ValueT lookup(const KeyT &Key) const {
  117   std::pair<iterator, bool> insert(const std::pair<KeyT, ValueT> &KV) {
  129   std::pair<iterator, bool> insert(std::pair<KeyT, ValueT> &&KV) {
include/llvm/ADT/PackedVector.h
   30   static T getValue(const BitVectorTy &Bits, unsigned Idx) {
   37   static void setValue(BitVectorTy &Bits, unsigned Idx, T val) {
   47   static T getValue(const BitVectorTy &Bits, unsigned Idx) {
   56   static void setValue(BitVectorTy &Bits, unsigned Idx, T val) {
   75 class PackedVector : public PackedVectorBase<T, BitNum, BitVectorTy,
   77   BitVectorTy Bits;
   78   using base = PackedVectorBase<T, BitNum, BitVectorTy,
include/llvm/ADT/SmallBitVector.h
   94   BitVector *getPointer() const {
  105   void switchToLarge(BitVector *BV) {
  149       switchToLarge(new BitVector(s, t));
  157       switchToLarge(new BitVector(*RHS.getPointer()));
  337       BitVector *BV = new BitVector(N, t);
  337       BitVector *BV = new BitVector(N, t);
  350         BitVector *BV = new BitVector(SmallSize);
  350         BitVector *BV = new BitVector(SmallSize);
  605         switchToLarge(new BitVector(*RHS.getPointer()));
include/llvm/ADT/SmallVector.h
   75   AlignedCharArrayUnion<T> FirstEl;
  114   using value_type = T;
  115   using iterator = T *;
  116   using const_iterator = const T *;
  121   using reference = T &;
  122   using const_reference = const T &;
  123   using pointer = T *;
  124   using const_pointer = const T *;
  179 class SmallVectorTemplateBase : public SmallVectorTemplateCommon<T> {
  183   static void destroy_range(T *S, T *E) {
  183   static void destroy_range(T *S, T *E) {
  211   void push_back(const T &Elt) {
  218   void push_back(T &&Elt) {
  240   T *NewElts = static_cast<T*>(llvm::safe_malloc(NewCapacity*sizeof(T)));
  240   T *NewElts = static_cast<T*>(llvm::safe_malloc(NewCapacity*sizeof(T)));
  315 class SmallVectorImpl : public SmallVectorTemplateBase<T> {
  316   using SuperClass = SmallVectorTemplateBase<T>;
  352         new (&*I) T();
  357   void resize(size_type N, const T &NV) {
  374   LLVM_NODISCARD T pop_back_val() {
  397   void append(size_type NumInputs, const T &Elt) {
  405   void append(std::initializer_list<T> IL) {
  412   void assign(size_type NumElts, const T &Elt) {
  429   void assign(std::initializer_list<T> IL) {
  467   iterator insert(iterator I, T &&Elt) {
  497   iterator insert(iterator I, const T &Elt) {
  526   iterator insert(iterator I, size_type NumToInsert, const T &Elt) {
  637   void insert(iterator I, std::initializer_list<T> IL) {
  820   AlignedCharArrayUnion<T> InlineElts[N];
  837 class SmallVector : public SmallVectorImpl<T>, SmallVectorStorage<T, N> {
  837 class SmallVector : public SmallVectorImpl<T>, SmallVectorStorage<T, N> {
  846   explicit SmallVector(size_t Size, const T &Value = T())
  865   SmallVector(std::initializer_list<T> IL) : SmallVectorImpl<T>(N) {
  884   SmallVector(SmallVectorImpl<T> &&RHS) : SmallVectorImpl<T>(N) {
include/llvm/CodeGen/BasicTTIImpl.h
  962       BitVector UsedInsts(NumLegalInsts, false);
include/llvm/CodeGen/FunctionLoweringInfo.h
  139   BitVector DescribedArgs;
include/llvm/CodeGen/GlobalISel/RegisterBank.h
   33   BitVector ContainedRegClasses;
include/llvm/CodeGen/LiveIntervals.h
  378                                   BitVector &UsableRegs);
include/llvm/CodeGen/LiveRangeCalc.h
   62   BitVector Seen;
   75   using EntryInfoMap = DenseMap<LiveRange *, std::pair<BitVector, BitVector>>;
   75   using EntryInfoMap = DenseMap<LiveRange *, std::pair<BitVector, BitVector>>;
  129                     MachineBasicBlock &MBB, BitVector &DefOnEntry,
  130                     BitVector &UndefOnEntry);
include/llvm/CodeGen/LiveRegMatrix.h
   58   BitVector RegMaskUsable;
include/llvm/CodeGen/LiveRegUnits.h
   32   BitVector Units;
  145   void addUnits(const BitVector &RegUnits) {
  149   void removeUnits(const BitVector &RegUnits) {
  153   const BitVector &getBitVector() const {
include/llvm/CodeGen/MachineFrameInfo.h
  802   BitVector getPristineRegs(const MachineFunction &MF) const;
include/llvm/CodeGen/MachineFunction.h
  198   BitVector Properties =
include/llvm/CodeGen/MachinePipeliner.h
  162     BitVector Blocked;
include/llvm/CodeGen/MachineRegisterInfo.h
  130   BitVector UsedPhysRegMask;
  136   BitVector ReservedRegs;
  852   const BitVector &getUsedPhysRegsMask() const { return UsedPhysRegMask; }
  886   const BitVector &getReservedRegs() const {
include/llvm/CodeGen/MachineScheduler.h
  388   BitVector ScheduledTrees;
  467   BitVector &getScheduledTrees() { return ScheduledTrees; }
include/llvm/CodeGen/ModuloSchedule.h
  288   DenseMap<MachineBasicBlock *, BitVector> LiveStages;
  292   DenseMap<MachineBasicBlock *, BitVector> AvailableStages;
include/llvm/CodeGen/RegisterClassInfo.h
   65   BitVector Reserved;
include/llvm/CodeGen/RegisterScavenging.h
   67   BitVector KillRegUnits, DefRegUnits;
   68   BitVector TmpRegUnits;
  125   BitVector getRegsAvailable(const TargetRegisterClass *RC);
  194   void setUsed(const BitVector &RegUnits) {
  197   void setUnused(const BitVector &RegUnits) {
  206   void addRegUnits(BitVector &BV, Register Reg);
  209   void removeRegUnits(BitVector &BV, Register Reg);
include/llvm/CodeGen/ScheduleDAG.h
  705     BitVector Visited;
  714     void Shift(BitVector& Visited, int LowerBound, int UpperBound);
include/llvm/CodeGen/SelectionDAGNodes.h
 1951                         BitVector *UndefElements = nullptr) const;
 1957   SDValue getSplatValue(BitVector *UndefElements = nullptr) const;
 1967                        BitVector *UndefElements = nullptr) const;
 1975   getConstantSplatNode(BitVector *UndefElements = nullptr) const;
 1985                          BitVector *UndefElements = nullptr) const;
 1993   getConstantFPSplatNode(BitVector *UndefElements = nullptr) const;
 2000   int32_t getConstantFPSplatPow2ToLog2Int(BitVector *UndefElements,
include/llvm/CodeGen/TargetFrameLowering.h
  288                                   BitVector &SavedRegs) const;
  300   virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
include/llvm/CodeGen/TargetRegisterInfo.h
  322   BitVector getAllocatableSet(const MachineFunction &MF,
  476   virtual BitVector getReservedRegs(const MachineFunction &MF) const = 0;
  963   void markSuperRegs(BitVector &RegisterSet, unsigned Reg) const;
  967   bool checkAllSuperRegsMarked(const BitVector &RegisterSet,
include/llvm/DebugInfo/MSF/MSFBuilder.h
  136   BitVector FreeBlocks;
include/llvm/DebugInfo/MSF/MSFCommon.h
   65   BitVector FreePageMap;
include/llvm/DebugInfo/PDB/UDTLayout.h
   51   const BitVector &usedBytes() const { return UsedBytes; }
   64   BitVector UsedBytes;
  173   BitVector ImmediateUsedBytes;
include/llvm/Support/AlignOf.h
   30   T t;
   39 template <typename T> union SizerImpl<T> { char arr[sizeof(T)]; };
   50       llvm::detail::SizerImpl<T, Ts...>)];
include/llvm/Support/Capacity.h
   22 static inline size_t capacity_in_bytes(const T &x) {
include/llvm/Support/CodeGenCoverage.h
   22   BitVector RuleCoverage;
   25   using const_covered_iterator = BitVector::const_set_bits_iterator;
include/llvm/Support/Error.h
  437   static const bool isRef = std::is_reference<T>::value;
  439   using wrap = std::reference_wrapper<typename std::remove_reference<T>::type>;
  444   using storage_type = typename std::conditional<isRef, wrap, T>::type;
  445   using value_type = T;
  448   using reference = typename std::remove_reference<T>::type &;
  449   using const_reference = const typename std::remove_reference<T>::type &;
  450   using pointer = typename std::remove_reference<T>::type *;
  451   using const_pointer = const typename std::remove_reference<T>::type *;
  474   Expected(OtherT &&Val,
  475            typename std::enable_if<std::is_convertible<OtherT, T>::value>::type
  475            typename std::enable_if<std::is_convertible<OtherT, T>::value>::type
  483     new (getStorage()) storage_type(std::forward<OtherT>(Val));
  492   Expected(Expected<OtherT> &&Other,
  493            typename std::enable_if<std::is_convertible<OtherT, T>::value>::type
  493            typename std::enable_if<std::is_convertible<OtherT, T>::value>::type
  594   template <class OtherT> void moveConstruct(Expected<OtherT> &&Other) {
include/llvm/Support/GlobPattern.h
   35   bool matchOne(ArrayRef<BitVector> Pat, StringRef S) const;
   38   std::vector<BitVector> Tokens;
include/llvm/Support/type_traits.h
   91     T t;
  122     static auto get(F*) -> decltype(std::declval<F &>() = std::declval<const F &>(), std::true_type{});
  122     static auto get(F*) -> decltype(std::declval<F &>() = std::declval<const F &>(), std::true_type{});
  122     static auto get(F*) -> decltype(std::declval<F &>() = std::declval<const F &>(), std::true_type{});
  130     static auto get(F*) -> decltype(std::declval<F &>() = std::declval<F &&>(), std::true_type{});
  130     static auto get(F*) -> decltype(std::declval<F &>() = std::declval<F &&>(), std::true_type{});
  130     static auto get(F*) -> decltype(std::declval<F &>() = std::declval<F &&>(), std::true_type{});
  145       std::is_copy_constructible<detail::trivial_helper<T>>::value;
  147       !std::is_copy_constructible<T>::value;
  151       std::is_move_constructible<detail::trivial_helper<T>>::value;
  153       !std::is_move_constructible<T>::value;
  157       is_copy_assignable<detail::trivial_helper<T>>::value;
  159       !is_copy_assignable<T>::value;
  163       is_move_assignable<detail::trivial_helper<T>>::value;
  165       !is_move_assignable<T>::value;
  169       std::is_destructible<detail::trivial_helper<T>>::value;
lib/CodeGen/AggressiveAntiDepBreaker.cpp
  134     BitVector CPSet = TRI->getAllocatableSet(MF, CriticalPathRCs[i]);
  176   BitVector Pristine = MFI.getPristineRegs(MF);
  525 BitVector AggressiveAntiDepBreaker::GetRenameRegisters(unsigned Reg) {
  526   BitVector BV(TRI->getNumRegs(), false);
  536     BitVector RCBV = TRI->getAllocatableSet(MF, RC);
  573   std::map<unsigned, BitVector> RenameRegisterMap;
  584       BitVector &BV = RenameRegisterMap[Reg];
  807   BitVector RegAliases(TRI->getNumRegs());
  838     BitVector *ExcludeRegs = nullptr;
lib/CodeGen/AggressiveAntiDepBreaker.h
  126     BitVector CriticalPathSet;
  175     BitVector GetRenameRegisters(unsigned Reg);
lib/CodeGen/BranchFolding.cpp
  229   BitVector JTIsLive(JTI->getJumpTables().size());
lib/CodeGen/CriticalAntiDepBreaker.cpp
   86   BitVector Pristine = MFI.getPristineRegs(MF);
lib/CodeGen/CriticalAntiDepBreaker.h
   46     const BitVector AllocatableSet;
   71     BitVector KeepRegs;
lib/CodeGen/DeadMachineInstructionElim.cpp
   35     BitVector LivePhysRegs;
lib/CodeGen/DetectDeadLanes.cpp
  122   BitVector WorklistMembers;
  125   BitVector DefinedByCopy;
lib/CodeGen/DwarfEHPrepare.cpp
  144   BitVector ResumeReachable(Resumes.size());
lib/CodeGen/EarlyIfConversion.cpp
  131   BitVector ClobberedRegUnits;
lib/CodeGen/GlobalMerge.cpp
  164                  const BitVector &GlobalSet, Module &M, bool isConst,
  230     BitVector AllGlobals(Globals.size());
  255     BitVector Globals;
  398     BitVector AllGlobals(Globals.size());
  415   BitVector PickedGlobals(Globals.size());
  437                           const BitVector &GlobalSet, Module &M, bool isConst,
lib/CodeGen/LiveDebugValues.cpp
   99   BitVector CalleeSavedRegs;
lib/CodeGen/LiveIntervals.cpp
  885                                              BitVector &UsableRegs) {
lib/CodeGen/LiveRangeCalc.cpp
  277                                  MachineBasicBlock &MBB, BitVector &DefOnEntry,
  278                                  BitVector &UndefOnEntry) {
  461   BitVector &DefOnEntry = Entry->second.first;
  462   BitVector &UndefOnEntry = Entry->second.second;
  591   BitVector DefBlocks(MF.getNumBlockIDs());
lib/CodeGen/MachineFrameInfo.cpp
  114 BitVector MachineFrameInfo::getPristineRegs(const MachineFunction &MF) const {
  116   BitVector BV(TRI->getNumRegs());
lib/CodeGen/MachineFunction.cpp
  108   for (BitVector::size_type I = 0; I < Properties.size(); ++I) {
lib/CodeGen/MachineLICM.cpp
  182     void ProcessMI(MachineInstr *MI, BitVector &PhysRegDefs,
  183                    BitVector &PhysRegClobbers, SmallSet<int, 32> &StoredFIs,
  398                                 BitVector &PhysRegDefs,
  399                                 BitVector &PhysRegClobbers,
  494   BitVector PhysRegDefs(NumRegs); // Regs defined once in the loop.
  495   BitVector PhysRegClobbers(NumRegs); // Regs defined more than once.
  522   BitVector TermRegs(NumRegs);
lib/CodeGen/MachinePipeliner.cpp
 1143   BitVector Added(SUnits.size());
lib/CodeGen/MachineScheduler.cpp
 3467   const BitVector *ScheduledTrees = nullptr;
lib/CodeGen/MachineVerifier.cpp
  115     BitVector regsReserved;
  811   BitVector PR = MFI.getPristineRegs(*MF);
lib/CodeGen/ModuloSchedule.cpp
 1586   BitVector LS(Schedule.getNumStages(), true);
 1587   BitVector AS(Schedule.getNumStages(), true);
lib/CodeGen/PrologEpilogInserter.cpp
  381                                         const BitVector &SavedRegs,
  605   BitVector SavedRegs;
  667                       int64_t FixedCSEnd, BitVector &StackBytesFree) {
  709                                      BitVector &StackBytesFree) {
 1035   BitVector StackBytesFree;
lib/CodeGen/RegAllocBasic.cpp
   73   BitVector UsableRegs;
lib/CodeGen/RegAllocFast.cpp
  106     BitVector MayLiveAcrossBlocks;
lib/CodeGen/RegAllocGreedy.cpp
  366     BitVector LiveBundles;
 1314   BitVector Todo = SA->getThroughBlocks();
 1587   const BitVector &LiveBundles = Cand.LiveBundles;
 1737   BitVector Todo = SA->getThroughBlocks();
lib/CodeGen/RegAllocPBQP.cpp
  607     BitVector RegMaskOverlaps;
lib/CodeGen/RegUsageInfoCollector.cpp
   61   static void computeCalleeSavedRegs(BitVector &SavedRegs, MachineFunction &MF);
  138   BitVector SavedRegs;
  141   const BitVector &UsedPhysRegsMask = MRI->getUsedPhysRegsMask();
  196 computeCalleeSavedRegs(BitVector &SavedRegs, MachineFunction &MF) {
lib/CodeGen/RegisterClassInfo.cpp
   72   const BitVector &RR = MF->getRegInfo().getReservedRegs();
lib/CodeGen/RegisterCoalescer.cpp
 2010     BitVector RegMaskUsable;
lib/CodeGen/RegisterScavenging.cpp
   99 void RegScavenger::addRegUnits(BitVector &BV, Register Reg) {
  104 void RegScavenger::removeRegUnits(BitVector &BV, Register Reg) {
  298 BitVector RegScavenger::getRegsAvailable(const TargetRegisterClass *RC) {
  299   BitVector Mask(TRI->getNumRegs());
  540   BitVector Candidates = TRI->getAllocatableSet(MF, RC);
  552   BitVector Available = getRegsAvailable(RC);
  801     BitVector SavedRegs;
lib/CodeGen/SafeStackColoring.cpp
  170       BitVector LocalLiveIn;
  186       BitVector LocalLiveOut = LocalLiveIn;
  212     BitVector Started, Ended;
lib/CodeGen/SafeStackColoring.h
   43     BitVector Begin;
   46     BitVector End;
   49     BitVector LiveIn;
   52     BitVector LiveOut;
   59     BitVector bv;
   97   BitVector InterestingAllocas;
  140 static inline raw_ostream &operator<<(raw_ostream &OS, const BitVector &V) {
lib/CodeGen/ScheduleDAG.cpp
  605   BitVector VisitedBack;
  679 void ScheduleDAGTopologicalSort::Shift(BitVector& Visited, int LowerBound,
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
 1605       BitVector UndefElements;
 1679       BitVector UndefElements;
 8724     BitVector UndefElements;
 8748     BitVector UndefElements;
 8770     BitVector UndefElements;
 8786     BitVector UndefElements;
 9427                                          BitVector *UndefElements) const {
 9461 SDValue BuildVectorSDNode::getSplatValue(BitVector *UndefElements) const {
 9468                                         BitVector *UndefElements) const {
 9474 BuildVectorSDNode::getConstantSplatNode(BitVector *UndefElements) const {
 9480                                           BitVector *UndefElements) const {
 9486 BuildVectorSDNode::getConstantFPSplatNode(BitVector *UndefElements) const {
 9491 BuildVectorSDNode::getConstantFPSplatPow2ToLog2Int(BitVector *UndefElements,
lib/CodeGen/ShrinkWrap.cpp
  166       BitVector SavedRegs;
lib/CodeGen/SpillPlacement.cpp
  360 void SpillPlacement::prepare(BitVector &RegBundles) {
lib/CodeGen/SpillPlacement.h
   53   BitVector *ActiveNodes;
  107   void prepare(BitVector &RegBundles);
lib/CodeGen/SplitKit.h
  153   BitVector ThroughBlocks;
  209   const BitVector &getThroughBlocks() const { return ThroughBlocks; }
lib/CodeGen/StackColoring.cpp
  389     BitVector Begin;
  392     BitVector End;
  395     BitVector LiveIn;
  398     BitVector LiveOut;
  430   BitVector InterestingSlots;
  434   BitVector ConservativeSlots;
  451   using BlockBitVecMap = DenseMap<const MachineBasicBlock *, BitVector>;
  457   void dumpBV(const char *tag, const BitVector &BV) const;
  532                                             const BitVector &BV) const {
  642     BitVector BetweenStartEnd;
  692     BitVector &SeenStart = SeenStartMap[MBB];
  774       BitVector LocalLiveIn;
  792       BitVector LocalLiveOut = LocalLiveIn;
lib/CodeGen/StackSlotColoring.cpp
   85     SmallVector<BitVector, 2> AllColors;
   91     SmallVector<BitVector, 2> UsedColors;
  327   BitVector UsedColors(NumObjs);
lib/CodeGen/SwitchLoweringUtils.cpp
  318       BitVector Dests(FuncInfo.MF->getNumBlockIDs());
  367   BitVector Dests(FuncInfo.MF->getNumBlockIDs());
lib/CodeGen/TargetFrameLoweringImpl.cpp
   64                                          BitVector &CalleeSaves) const {
   77                                                BitVector &SavedRegs,
lib/CodeGen/TargetLoweringBase.cpp
 1143   BitVector SuperRegRC(TRI->getNumRegClasses());
lib/CodeGen/TargetRegisterInfo.cpp
   58 void TargetRegisterInfo::markSuperRegs(BitVector &RegisterSet, unsigned Reg)
   64 bool TargetRegisterInfo::checkAllSuperRegsMarked(const BitVector &RegisterSet,
   67   BitVector Checked(getNumRegs());
  210                                    const TargetRegisterClass *RC, BitVector &R){
  217 BitVector TargetRegisterInfo::getAllocatableSet(const MachineFunction &MF,
  219   BitVector Allocatable(getNumRegs());
  232   BitVector Reserved = getReservedRegs(MF);
lib/DebugInfo/PDB/UDTLayout.cpp
  281     BitVector ChildBytes = Child->usedBytes();
lib/Support/GlobPattern.cpp
   27 static Expected<BitVector> expand(StringRef S, StringRef Original) {
   28   BitVector BV(256, false);
   67 static Expected<BitVector> scan(StringRef &S, StringRef Original) {
   88       Expected<BitVector> BV = expand(Chars.substr(1), Original);
  101     BitVector BV(256, false);
  135     Expected<BitVector> BV = scan(S, Original);
  154 bool GlobPattern::matchOne(ArrayRef<BitVector> Pats, StringRef S) const {
lib/Target/AArch64/AArch64FrameLowering.cpp
 2174                                                 BitVector &SavedRegs,
lib/Target/AArch64/AArch64FrameLowering.h
   66   void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
lib/Target/AArch64/AArch64ISelLowering.cpp
 9594   BitVector UndefElements;
 9668   BitVector UndefElements;
lib/Target/AArch64/AArch64RegisterInfo.cpp
  193 BitVector
  198   BitVector Reserved(getNumRegs());
lib/Target/AArch64/AArch64RegisterInfo.h
   84   BitVector getReservedRegs(const MachineFunction &MF) const override;
lib/Target/AArch64/AArch64SpeculationHardening.cpp
  146   BitVector RegsNeedingCSDBBeforeUse;
  147   BitVector RegsAlreadyMasked;
lib/Target/AArch64/AArch64Subtarget.h
  208   BitVector ReserveXRegister;
  211   BitVector CustomCallSavedXRegs;
lib/Target/AMDGPU/AMDGPURegisterInfo.cpp
   84 void AMDGPURegisterInfo::reserveRegisterTuples(BitVector &Reserved, unsigned Reg) const {
lib/Target/AMDGPU/AMDGPURegisterInfo.h
   33   void reserveRegisterTuples(BitVector &, unsigned Reg) const;
lib/Target/AMDGPU/GCNHazardRecognizer.cpp
  469                         BitVector &BV, unsigned Reg) {
  476                          BitVector &Set) {
lib/Target/AMDGPU/GCNHazardRecognizer.h
   53   BitVector ClauseUses;
   56   BitVector ClauseDefs;
lib/Target/AMDGPU/GCNRegBankReassign.cpp
  155   BitVector RegsUsed;
lib/Target/AMDGPU/R600InstrInfo.cpp
 1089 void R600InstrInfo::reserveIndirectRegisters(BitVector &Reserved,
lib/Target/AMDGPU/R600InstrInfo.h
  215   void reserveIndirectRegisters(BitVector &Reserved,
lib/Target/AMDGPU/R600RegisterInfo.cpp
   31 BitVector R600RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
   32   BitVector Reserved(getNumRegs());
  115 void R600RegisterInfo::reserveRegisterTuples(BitVector &Reserved, unsigned Reg) const {
lib/Target/AMDGPU/R600RegisterInfo.h
   27   BitVector getReservedRegs(const MachineFunction &MF) const override;
   51   void reserveRegisterTuples(BitVector &Reserved, unsigned Reg) const;
lib/Target/AMDGPU/SIFrameLowering.cpp
  986                                            BitVector &SavedVGPRs,
 1061                                                BitVector &SavedRegs,
lib/Target/AMDGPU/SIFrameLowering.h
   37   void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
   39   void determineCalleeSavesSGPR(MachineFunction &MF, BitVector &SavedRegs,
lib/Target/AMDGPU/SIISelLowering.cpp
 1566                                    BitVector &Skipped,
 2037   BitVector Skipped(Ins.size());
lib/Target/AMDGPU/SILowerSGPRSpills.cpp
  193   BitVector SavedRegs;
lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
  353   BitVector OtherUsedRegs;
lib/Target/AMDGPU/SIRegisterInfo.cpp
   41                                          BitVector &PressureSets) const {
  139 BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
  140   BitVector Reserved(getNumRegs());
lib/Target/AMDGPU/SIRegisterInfo.h
   34   BitVector SGPRPressureSets;
   35   BitVector VGPRPressureSets;
   36   BitVector AGPRPressureSets;
   41                            BitVector &PressureSets) const;
   58   BitVector getReservedRegs(const MachineFunction &MF) const override;
lib/Target/ARC/ARCFrameLowering.cpp
   90                                             BitVector &SavedRegs,
lib/Target/ARC/ARCFrameLowering.h
   40   void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
lib/Target/ARC/ARCRegisterInfo.cpp
  139 BitVector ARCRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
  140   BitVector Reserved(getNumRegs());
lib/Target/ARC/ARCRegisterInfo.h
   33   BitVector getReservedRegs(const MachineFunction &MF) const override;
lib/Target/ARM/ARMBaseRegisterInfo.cpp
  186 BitVector ARMBaseRegisterInfo::
  192   BitVector Reserved(getNumRegs());
lib/Target/ARM/ARMBaseRegisterInfo.h
  135   BitVector getReservedRegs(const MachineFunction &MF) const override;
lib/Target/ARM/ARMFrameLowering.cpp
 1590 checkNumAlignedDPRCS2Regs(MachineFunction &MF, BitVector &SavedRegs) {
 1634                                             BitVector &SavedRegs,
 2134                                       BitVector &SavedRegs) const {
lib/Target/ARM/ARMFrameLowering.h
   57                       BitVector &SavedRegs) const override;
   58   void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
lib/Target/ARM/ARMISelLowering.cpp
13501   BitVector UndefElements;
13559   BitVector UndefElements;
lib/Target/ARM/Thumb1FrameLowering.cpp
  580 static void findTemporariesForLR(const BitVector &GPRsNoLRSP,
  581                                  const BitVector &PopFriendly,
  677   BitVector PopFriendly =
  688   BitVector GPRsNoLRSP =
lib/Target/AVR/AVRExpandPseudoInsts.cpp
  870   BitVector Candidates =
  881   BitVector Available = RS.getRegsAvailable(&AVR::GPR8RegClass);
lib/Target/AVR/AVRFrameLowering.cpp
  417                                             BitVector &SavedRegs,
lib/Target/AVR/AVRFrameLowering.h
   36   void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
lib/Target/AVR/AVRRegisterInfo.cpp
   52 BitVector AVRRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
   53   BitVector Reserved(getNumRegs());
lib/Target/AVR/AVRRegisterInfo.h
   33   BitVector getReservedRegs(const MachineFunction &MF) const override;
lib/Target/BPF/BPFFrameLowering.cpp
   32                                             BitVector &SavedRegs,
lib/Target/BPF/BPFFrameLowering.h
   30   void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
lib/Target/BPF/BPFRegisterInfo.cpp
   37 BitVector BPFRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
   38   BitVector Reserved(getNumRegs());
lib/Target/BPF/BPFRegisterInfo.h
   29   BitVector getReservedRegs(const MachineFunction &MF) const override;
lib/Target/Hexagon/BitTracker.cpp
 1053 void BT::runEdgeQueue(BitVector &BlockScanned) {
 1134   BitVector BlockScanned(MaxBN+1);
lib/Target/Hexagon/BitTracker.h
  109   void runEdgeQueue(BitVector &BlockScanned);
lib/Target/Hexagon/HexagonBitSimplify.cpp
   74   struct RegisterSet : private BitVector {
  220     static bool getUsedBitsInStore(unsigned Opc, BitVector &Bits,
  222     static bool getUsedBits(unsigned Opc, unsigned OpN, BitVector &Bits,
  461 bool HexagonBitSimplify::getUsedBitsInStore(unsigned Opc, BitVector &Bits,
  621       BitVector &Bits, uint16_t Begin, const HexagonInstrInfo &HII) {
 1062     bool computeUsedBits(unsigned Reg, BitVector &Bits);
 1063     bool computeUsedBits(const MachineInstr &MI, unsigned OpN, BitVector &Bits,
 1202 bool RedundantInstrElimination::computeUsedBits(unsigned Reg, BitVector &Bits) {
 1203   BitVector Used(Bits.size());
 1249       unsigned OpN, BitVector &Bits, uint16_t Begin) {
 1251   BitVector T(Bits.size());
 1290   BitVector Used(DC.width());
lib/Target/Hexagon/HexagonBlockRanges.cpp
  475   BitVector Visited(NumRegs);
lib/Target/Hexagon/HexagonBlockRanges.h
  171   BitVector Reserved;
lib/Target/Hexagon/HexagonFrameLowering.cpp
  282 static bool needsStackFrame(const MachineBasicBlock &MBB, const BitVector &CSR,
  435   BitVector CSR(Hexagon::NUM_TARGET_REGS);
  547     BitVector DoneT(MaxBN+1), DoneF(MaxBN+1), Path(MaxBN+1);
  797       MachineBasicBlock &RestoreB, BitVector &DoneT, BitVector &DoneF,
  797       MachineBasicBlock &RestoreB, BitVector &DoneT, BitVector &DoneF,
  798       BitVector &Path) const {
 1417 static void dump_registers(BitVector &Regs, const TargetRegisterInfo &TRI) {
 1431   BitVector SRegs(Hexagon::NUM_TARGET_REGS);
 1452   BitVector Reserved = TRI->getReservedRegs(MF);
 1467   BitVector TmpSup(Hexagon::NUM_TARGET_REGS);
 1930                                                 BitVector &SavedRegs,
 2432   BitVector Regs(Hexagon::NUM_TARGET_REGS);
lib/Target/Hexagon/HexagonFrameLowering.h
   73   void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
  122       BitVector &DoneT, BitVector &DoneF, BitVector &Path) const;
  122       BitVector &DoneT, BitVector &DoneF, BitVector &Path) const;
  122       BitVector &DoneT, BitVector &DoneF, BitVector &Path) const;
lib/Target/Hexagon/HexagonGenInsert.cpp
   91   struct RegisterSet : private BitVector {
lib/Target/Hexagon/HexagonGenMux.cpp
  100       BitVector Defs, Uses;
  103       DefUseInfo(const BitVector &D, const BitVector &U) : Defs(D), Uses(U) {}
  103       DefUseInfo(const BitVector &D, const BitVector &U) : Defs(D), Uses(U) {}
  127     void getSubRegs(unsigned Reg, BitVector &SRs) const;
  128     void expandReg(unsigned Reg, BitVector &Set) const;
  129     void getDefsUses(const MachineInstr *MI, BitVector &Defs,
  130           BitVector &Uses) const;
  146 void HexagonGenMux::getSubRegs(unsigned Reg, BitVector &SRs) const {
  151 void HexagonGenMux::expandReg(unsigned Reg, BitVector &Set) const {
  158 void HexagonGenMux::getDefsUses(const MachineInstr *MI, BitVector &Defs,
  159       BitVector &Uses) const {
  175     BitVector &Set = MO.isDef() ? Defs : Uses;
  184   BitVector Defs(NR), Uses(NR);
lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
 1124     BitVector Picked(HwLen);
lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
  447       BitVector Used(ExtLen);
lib/Target/Hexagon/HexagonRegisterInfo.cpp
  130 BitVector HexagonRegisterInfo::getReservedRegs(const MachineFunction &MF)
  132   BitVector Reserved(getNumRegs());
lib/Target/Hexagon/HexagonRegisterInfo.h
   39   BitVector getReservedRegs(const MachineFunction &MF) const override;
lib/Target/Hexagon/HexagonSplitDouble.cpp
  225   BitVector DoubleRegs(NumRegs);
  232   BitVector FixedRegs(NumRegs);
lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
 1202   BitVector DeadDefs(Hexagon::NUM_TARGET_REGS);
lib/Target/Hexagon/RDFGraph.cpp
 1288   BitVector DoneDefs(TRI.getNumRegs());
 1317   BitVector DoneClobbers(TRI.getNumRegs());
lib/Target/Hexagon/RDFLiveness.cpp
  874   BitVector LiveIn(TRI.getNumRegs()), Live(TRI.getNumRegs());
lib/Target/Hexagon/RDFRegisters.cpp
   32   BitVector BadRC(TRI.getNumRegs());
   85     BitVector PU(TRI.getNumRegUnits());
  255     BitVector T(PRI.getMaskUnits(RR.Reg));
  334   BitVector Regs(PRI.getTRI().getNumRegs());
  341     BitVector AR(PRI.getTRI().getNumRegs());
lib/Target/Hexagon/RDFRegisters.h
  127     const BitVector &getMaskUnits(RegisterId MaskId) const {
  143       BitVector Units;
  225     BitVector Units;
lib/Target/Lanai/LanaiFrameLowering.cpp
  198                                               BitVector &SavedRegs,
lib/Target/Lanai/LanaiFrameLowering.h
   49   void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
lib/Target/Lanai/LanaiRegisterInfo.cpp
   42 BitVector LanaiRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
   43   BitVector Reserved(getNumRegs());
lib/Target/Lanai/LanaiRegisterInfo.h
   33   BitVector getReservedRegs(const MachineFunction &MF) const override;
lib/Target/MSP430/MSP430RegisterInfo.cpp
   73 BitVector MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
   74   BitVector Reserved(getNumRegs());
lib/Target/MSP430/MSP430RegisterInfo.h
   30   BitVector getReservedRegs(const MachineFunction &MF) const override;
lib/Target/Mips/Mips16FrameLowering.cpp
  163                                                BitVector &SavedRegs,
  169   const BitVector Reserved = RI.getReservedRegs(MF);
lib/Target/Mips/Mips16FrameLowering.h
   40   void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
lib/Target/Mips/Mips16InstrInfo.cpp
  220   const BitVector Reserved = RI.getReservedRegs(MF);
  250   const BitVector Reserved = RI.getReservedRegs(*MF);
  354   BitVector Candidates =
  382   BitVector Available = rs.getRegsAvailable(&Mips::CPU16RegsRegClass);
lib/Target/Mips/MipsDelaySlotFiller.cpp
  130     bool checkRegDefsUses(BitVector &NewDefs, BitVector &NewUses, unsigned Reg,
  130     bool checkRegDefsUses(BitVector &NewDefs, BitVector &NewUses, unsigned Reg,
  134     bool isRegInSet(const BitVector &RegSet, unsigned Reg) const;
  137     BitVector Defs, Uses;
  378   BitVector CallerSavedRegs(TRI.getNumRegs(), true);
  392   BitVector AllocSet = TRI.getAllocatableSet(MF);
  414   BitVector NewDefs(TRI.getNumRegs()), NewUses(TRI.getNumRegs());
  430 bool RegDefsUses::checkRegDefsUses(BitVector &NewDefs, BitVector &NewUses,
  430 bool RegDefsUses::checkRegDefsUses(BitVector &NewDefs, BitVector &NewUses,
  443 bool RegDefsUses::isRegInSet(const BitVector &RegSet, unsigned Reg) const {
lib/Target/Mips/MipsRegisterInfo.cpp
  149 BitVector MipsRegisterInfo::
  159   BitVector Reserved(getNumRegs());
lib/Target/Mips/MipsRegisterInfo.h
   57   BitVector getReservedRegs(const MachineFunction &MF) const override;
lib/Target/Mips/MipsSEFrameLowering.cpp
  854 static void setAliasRegs(MachineFunction &MF, BitVector &SavedRegs,
  862                                                BitVector &SavedRegs,
lib/Target/Mips/MipsSEFrameLowering.h
   40   void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
lib/Target/NVPTX/NVPTXRegisterInfo.cpp
  107 BitVector NVPTXRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
  108   BitVector Reserved(getNumRegs());
lib/Target/NVPTX/NVPTXRegisterInfo.h
   39   BitVector getReservedRegs(const MachineFunction &MF) const override;
lib/Target/PowerPC/PPCFrameLowering.cpp
  663   BitVector BV = RS.getRegsAvailable(Subtarget.isPPC64() ? &PPC::G8RCRegClass :
 1765                                             BitVector &SavedRegs,
 2144   BitVector BVAllocatable = TRI->getAllocatableSet(MF);
 2145   BitVector BVCalleeSaved(TRI->getNumRegs());
lib/Target/PowerPC/PPCFrameLowering.h
  108   void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
lib/Target/PowerPC/PPCRegisterInfo.cpp
  271 BitVector PPCRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
  272   BitVector Reserved(getNumRegs());
lib/Target/PowerPC/PPCRegisterInfo.h
   94   BitVector getReservedRegs(const MachineFunction &MF) const override;
lib/Target/RISCV/RISCVFrameLowering.cpp
  372                                               BitVector &SavedRegs,
lib/Target/RISCV/RISCVFrameLowering.h
   35   void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
lib/Target/RISCV/RISCVRegisterInfo.cpp
   68 BitVector RISCVRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
   70   BitVector Reserved(getNumRegs());
lib/Target/RISCV/RISCVRegisterInfo.h
   32   BitVector getReservedRegs(const MachineFunction &MF) const override;
lib/Target/RISCV/RISCVSubtarget.h
   49   BitVector UserReservedRegister;
lib/Target/Sparc/SparcFrameLowering.cpp
  376                                               BitVector &SavedRegs,
lib/Target/Sparc/SparcFrameLowering.h
   38   void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
lib/Target/Sparc/SparcRegisterInfo.cpp
   54 BitVector SparcRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
   55   BitVector Reserved(getNumRegs());
lib/Target/Sparc/SparcRegisterInfo.h
   32   BitVector getReservedRegs(const MachineFunction &MF) const override;
lib/Target/SystemZ/SystemZFrameLowering.cpp
   65                                                 BitVector &SavedRegs,
lib/Target/SystemZ/SystemZFrameLowering.h
   29   void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
lib/Target/SystemZ/SystemZISelLowering.cpp
 4892     BitVector UndefElements;
lib/Target/SystemZ/SystemZRegisterInfo.cpp
  222 BitVector
  224   BitVector Reserved(getNumRegs());
  385   BitVector PhysClobbered(getNumRegs());
lib/Target/SystemZ/SystemZRegisterInfo.h
   81   BitVector getReservedRegs(const MachineFunction &MF) const override;
lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
 1090     BitVector UsedInsts(NumVectorMemOps, false);
 1091     std::vector<BitVector> ValueVecs(Factor, BitVector(NumVectorMemOps, false));
lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
  222   BitVector UseEmpty(MRI.getNumVirtRegs());
lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h
   48   BitVector VRegStackified;
lib/Target/WebAssembly/WebAssemblyRegColoring.cpp
  134   BitVector UsedColors(SortedIntervals.size());
lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
   44 BitVector
   46   BitVector Reserved(getNumRegs());
lib/Target/WebAssembly/WebAssemblyRegisterInfo.h
   36   BitVector getReservedRegs(const MachineFunction &MF) const override;
lib/Target/X86/X86FrameLowering.cpp
 2222                                             BitVector &SavedRegs,
lib/Target/X86/X86FrameLowering.h
   76   void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
lib/Target/X86/X86ISelLowering.cpp
 8170   BitVector UndefElements;
lib/Target/X86/X86RegisterInfo.cpp
  519 BitVector X86RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
  520   BitVector Reserved(getNumRegs());
lib/Target/X86/X86RegisterInfo.h
  120   BitVector getReservedRegs(const MachineFunction &MF) const override;
lib/Target/XCore/XCoreFrameLowering.cpp
  535                                               BitVector &SavedRegs,
lib/Target/XCore/XCoreFrameLowering.h
   49     void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
lib/Target/XCore/XCoreRegisterInfo.cpp
  229 BitVector XCoreRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
  230   BitVector Reserved(getNumRegs());
lib/Target/XCore/XCoreRegisterInfo.h
   33   BitVector getReservedRegs(const MachineFunction &MF) const override;
lib/Transforms/Coroutines/CoroFrame.cpp
   83     BitVector Consumes;
   84     BitVector Kills;
  100   void dump(StringRef Label, BitVector const &BV) const;
  159                                                 BitVector const &BV) const {
  232         auto SavedConsumes = S.Consumes;
  233         auto SavedKills = S.Kills;
lib/Transforms/Scalar/LoopRerollPass.cpp
  400       using UsesTy = MapVector<Instruction *, BitVector>;
lib/Transforms/Scalar/NewGVN.cpp
  635   BitVector TouchedInstructions;
lib/Transforms/Utils/CtorUtils.cpp
   27 static void removeGlobalCtors(GlobalVariable *GCL, const BitVector &CtorsToRemove) {
  130   BitVector CtorsToRemove(NumCtors);
tools/clang/include/clang/Analysis/Analyses/CFGReachabilityAnalysis.h
   32   using ReachableSet = llvm::BitVector;
tools/clang/include/clang/Analysis/Analyses/PostOrderCFGView.h
   39     llvm::BitVector VisitedBlockIDs;
tools/clang/include/clang/Analysis/Analyses/ReachableCode.h
   61                                 llvm::BitVector &Reachable);
tools/clang/include/clang/Basic/SourceManager.h
  681   llvm::BitVector SLocEntryLoaded;
tools/clang/lib/Analysis/CFGReachabilityAnalysis.cpp
   44   llvm::BitVector visited(analyzed.size());
tools/clang/lib/Analysis/LiveVariables.cpp
   31   llvm::BitVector enqueuedBlocks;
  559   llvm::BitVector everAnalyzedBlock(cfg->getNumBlockIDs());
tools/clang/lib/Analysis/ReachableCode.cpp
  309                               llvm::BitVector &Reachable,
  376                                             llvm::BitVector &Reachable) {
  386     llvm::BitVector Visited;
  387     llvm::BitVector &Reachable;
  398     DeadCodeScan(llvm::BitVector &reachable, Preprocessor &PP, ASTContext &C)
  674                                 llvm::BitVector &Reachable) {
  687   llvm::BitVector reachable(cfg->getNumBlockIDs());
tools/clang/lib/Analysis/UninitializedValues.cpp
  224   llvm::BitVector enqueuedBlocks;
  839                        llvm::BitVector &wasAnalyzed,
  872   llvm::BitVector hadUse;
  928   llvm::BitVector previouslyVisited(cfg.getNumBlockIDs());
  930   llvm::BitVector wasAnalyzed(cfg.getNumBlockIDs(), false);
tools/clang/lib/CodeGen/CGStmt.cpp
 1998   llvm::BitVector ResultTypeRequiresCast;
tools/clang/lib/Sema/AnalysisBasedWarnings.cpp
  284   llvm::BitVector Queued(Body->getNumBlockIDs());
  321   llvm::BitVector Reachable(BodyCFG->getNumBlockIDs());
  403   llvm::BitVector live(cfg->getNumBlockIDs());
tools/clang/lib/Sema/JumpDiagnostics.cpp
  726   llvm::BitVector Reachable(Scopes.size(), false);
tools/clang/lib/StaticAnalyzer/Checkers/DeadStoresChecker.cpp
   69   llvm::BitVector reachable;
   91     llvm::BitVector::reference isReachable = reachable[block->getBlockID()];
tools/clang/tools/extra/clang-tidy/bugprone/BranchCloneCheck.cpp
  113     llvm::BitVector KnownAsClone(N);
tools/dsymutil/DwarfLinker.cpp
 2693   BitVector ProcessedFiles(NumObjects, false);
tools/llvm-exegesis/lib/Assembler.cpp
  157 BitVector getFunctionReservedRegs(const TargetMachine &TM) {
tools/llvm-exegesis/lib/Assembler.h
   41 BitVector getFunctionReservedRegs(const TargetMachine &TM);
tools/llvm-exegesis/lib/Latency.cpp
   43                             const BitVector &ForbiddenRegisters) {
   66                                        const BitVector &ForbiddenRegisters) {
   85                                 const BitVector &ForbiddenRegisters,
  156     const Instruction &Instr, const BitVector &ForbiddenRegisters) const {
tools/llvm-exegesis/lib/Latency.h
   32                         const BitVector &ForbiddenRegisters) const override;
tools/llvm-exegesis/lib/LlvmState.cpp
   40   BitVector ReservedRegs = getFunctionReservedRegs(getTargetMachine());
tools/llvm-exegesis/lib/MCInstrDescView.cpp
  157       const auto &AliasingBits = Op.getRegisterAliasing().aliasedBits();
  188 static bool anyCommonExcludingForbidden(const BitVector &A, const BitVector &B,
  188 static bool anyCommonExcludingForbidden(const BitVector &A, const BitVector &B,
  189                                         const BitVector &Forbidden) {
  204     const Instruction &OtherInstr, const BitVector &ForbiddenRegisters) const {
  217     const BitVector &ForbiddenRegisters) const {
  332     auto CommonRegisters = UseInstruction.AllUseRegs;
tools/llvm-exegesis/lib/MCInstrDescView.h
  115   bool hasAliasingRegisters(const BitVector &ForbiddenRegisters) const;
  119                                    const BitVector &ForbiddenRegisters) const;
  140   BitVector ImplDefRegs; // The set of aliased implicit def registers.
  141   BitVector ImplUseRegs; // The set of aliased implicit use registers.
  142   BitVector AllDefRegs;  // The set of all aliased def registers.
  143   BitVector AllUseRegs;  // The set of all aliased use registers.
tools/llvm-exegesis/lib/RegisterAliasing.cpp
   14 BitVector getAliasedBits(const MCRegisterInfo &RegInfo,
   15                          const BitVector &SourceBits) {
   16   BitVector AliasedBits(RegInfo.getNumRegs());
   32     const MCRegisterInfo &RegInfo, const BitVector &ReservedReg,
   49     const MCRegisterInfo &RegInfo, const BitVector &SourceBits) {
   61     const MCRegisterInfo &RegInfo, const BitVector &ReservedReg)
tools/llvm-exegesis/lib/RegisterAliasing.h
   28 BitVector getAliasedBits(const MCRegisterInfo &RegInfo,
   29                          const BitVector &SourceBits);
   44                           const BitVector &ReservedReg,
   51   const BitVector &sourceBits() const { return SourceBits; }
   54   const BitVector &aliasedBits() const { return AliasedBits; }
   68                                 const BitVector &OriginalBits);
   70   BitVector SourceBits;
   71   BitVector AliasedBits;
   79                                const BitVector &ReservedReg);
   82   const BitVector &emptyRegisters() const { return EmptyRegisters; }
   85   const BitVector &reservedRegisters() const { return ReservedReg; }
   98   const BitVector ReservedReg;
   99   const BitVector EmptyRegisters;
  107 inline void remove(BitVector &A, const BitVector &B) {
  107 inline void remove(BitVector &A, const BitVector &B) {
tools/llvm-exegesis/lib/SnippetGenerator.cpp
   42     const Instruction &Instr, const BitVector &ExtraForbiddenRegs) const {
   43   BitVector ForbiddenRegs = State.getRATC().reservedRegisters();
   54     const auto &ScratchRegAliases =
  100   BitVector DefinedRegs = State.getRATC().emptyRegisters();
  201 size_t randomBit(const BitVector &Vector) {
  219                              const BitVector &ForbiddenRegs,
tools/llvm-exegesis/lib/SnippetGenerator.h
   64                          const BitVector &ExtraForbiddenRegs) const;
   78                         const BitVector &ForbiddenRegisters) const = 0;
   91 size_t randomBit(const BitVector &Vector);
  101                              const BitVector &ForbiddenRegs,
tools/llvm-exegesis/lib/SnippetRepetitor.cpp
   42   BitVector getReservedRegs() const override {
   91   BitVector getReservedRegs() const override {
tools/llvm-exegesis/lib/SnippetRepetitor.h
   37   virtual BitVector getReservedRegs() const = 0;
tools/llvm-exegesis/lib/Target.cpp
   92                                         const BitVector &ForbiddenRegs) const {
  101     auto AllowedRegs = Op.getRegisterAliasing().sourceBits();
tools/llvm-exegesis/lib/Target.h
  116                                   const BitVector &ForbiddenRegs) const;
tools/llvm-exegesis/lib/Uops.cpp
  123     const BitVector &ForbiddenRegisters) {
  127   std::vector<BitVector> PossibleRegsForVar;
  132     BitVector PossibleRegs = Op.getRegisterAliasing().sourceBits();
  152       for (BitVector &OtherPossibleRegs : PossibleRegsForVar) {
  161     const Instruction &Instr, const BitVector &ForbiddenRegisters) const {
  191   BitVector Defs(State.getRegInfo().getNumRegs());
  194       auto PossibleRegisters = Op.getRegisterAliasing().sourceBits();
  204   const auto DefAliases = getAliasedBits(State.getRegInfo(), Defs);
  207       auto PossibleRegisters = Op.getRegisterAliasing().sourceBits();
tools/llvm-exegesis/lib/Uops.h
   30                         const BitVector &ForbiddenRegisters) const override;
tools/llvm-exegesis/lib/X86/Target.cpp
  189     const Instruction &Instr, const BitVector &ForbiddenRegisters,
  199   auto PossibleDestRegs =
  202   auto PossibleBaseRegs =
  205   auto PossibleIndexRegs =
  251                         const BitVector &ForbiddenRegisters) const override;
  257     const Instruction &Instr, const BitVector &ForbiddenRegisters) const {
  301                         const BitVector &ForbiddenRegisters) const override;
  308     const Instruction &Instr, const BitVector &ForbiddenRegisters) const {
  316     auto PossibleDestRegs =
  322           auto PossibleDestRegsNow = PossibleDestRegs;
  544                           const BitVector &ForbiddenRegs) const override;
  616     const BitVector &ForbiddenRegs) const {
tools/llvm-exegesis/llvm-exegesis.cpp
  209                  const BitVector &ForbiddenRegs) {
tools/llvm-pdbutil/PrettyClassLayoutGraphicalDumper.cpp
   44   const BitVector &UseMap = Layout.usedBytes();
tools/llvm-pdbutil/TypeReferenceTracker.cpp
   90   BitVector &TypeOrIdReferenced =
tools/llvm-pdbutil/TypeReferenceTracker.h
   58   BitVector TypeReferenced;
   59   BitVector IdReferenced;
tools/opt/Debugify.cpp
  235   BitVector MissingLines{OriginalNumLines, true};
  236   BitVector MissingVars{OriginalNumVars, true};
unittests/ADT/BitVectorTest.cpp
   22 typedef ::testing::Types<BitVector, SmallBitVector> BitVectorTestTypes;
  267 static bool SmallBitVectorIsSmallMode(const BitVector &) { return true; }
  306   BitVector Vec;
  384   BitVector Vec;
  817 static inline VecType createBitVector(uint32_t Size,
  819   VecType V;
  901   auto A = createBitVector<TypeParam>(300, {{1, 30}, {60, 95}, {200, 275}});
  904   auto B = A;
  909   auto Expected = createBitVector<TypeParam>(
 1056 static void testEmpty(const TypeParam &A) {
unittests/CodeGen/MachineInstrTest.cpp
   67   BitVector getReservedRegs(const MachineFunction &MF) const override {
unittests/IR/ConstantRangeTest.cpp
 1085     BitVector Results(1 << Bits);
unittests/tools/llvm-exegesis/X86/RegisterAliasingTest.cpp
   46   const BitVector NoReservedReg(RegInfo.getNumRegs());
   51   BitVector sum(RegInfo.getNumRegs());
   63   const BitVector NoReservedReg(RegInfo.getNumRegs());
unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp
  154   auto AllRegisters = State.getRATC().emptyRegisters();
  347   generateCodeTemplates(const Instruction &, const BitVector &) const override {
usr/include/c++/7.4.0/bits/alloc_traits.h
  387       using allocator_type = allocator<_Tp>;
  389       using value_type = _Tp;
  392       using pointer = _Tp*;
  395       using const_pointer = const _Tp*;
  474 	construct(allocator_type& __a, _Up* __p, _Args&&... __args)
  474 	construct(allocator_type& __a, _Up* __p, _Args&&... __args)
  475 	{ __a.construct(__p, std::forward<_Args>(__args)...); }
  486 	destroy(allocator_type& __a, _Up* __p)
usr/include/c++/7.4.0/bits/allocator.h
  108     class allocator: public __allocator_base<_Tp>
  113       typedef _Tp*       pointer;
  114       typedef const _Tp* const_pointer;
  115       typedef _Tp&       reference;
  116       typedef const _Tp& const_reference;
  117       typedef _Tp        value_type;
  137 	allocator(const allocator<_Tp1>&) throw() { }
usr/include/c++/7.4.0/bits/move.h
   46     inline _GLIBCXX_CONSTEXPR _Tp*
   47     __addressof(_Tp& __r) _GLIBCXX_NOEXCEPT
   72     constexpr _Tp&&
   73     forward(typename std::remove_reference<_Tp>::type& __t) noexcept
   83     constexpr _Tp&&
   84     forward(typename std::remove_reference<_Tp>::type&& __t) noexcept
   98     move(_Tp&& __t) noexcept
  104     : public __and_<__not_<is_nothrow_move_constructible<_Tp>>,
  105                     is_copy_constructible<_Tp>>::type { };
  184     typename enable_if<__and_<__not_<__is_tuple_like<_Tp>>,
  185 			      is_move_constructible<_Tp>,
  186 			      is_move_assignable<_Tp>>::value>::type
  187     swap(_Tp& __a, _Tp& __b)
  187     swap(_Tp& __a, _Tp& __b)
  198       _Tp __tmp = _GLIBCXX_MOVE(__a);
usr/include/c++/7.4.0/bits/ptr_traits.h
  126       typedef _Tp* pointer;
  128       typedef _Tp  element_type;
  141       pointer_to(__make_not_void<element_type>& __r) noexcept
  141       pointer_to(__make_not_void<element_type>& __r) noexcept
usr/include/c++/7.4.0/bits/stl_construct.h
   74     _Construct(_T1* __p, _Args&&... __args)
   74     _Construct(_T1* __p, _Args&&... __args)
   75     { ::new(static_cast<void*>(__p)) _T1(std::forward<_Args>(__args)...); }
   75     { ::new(static_cast<void*>(__p)) _T1(std::forward<_Args>(__args)...); }
   97     _Destroy(_Tp* __pointer)
  204 	     allocator<_Tp>&)
usr/include/c++/7.4.0/bits/stl_iterator.h
 1224     __make_move_if_noexcept_iterator(_Tp* __i)
usr/include/c++/7.4.0/bits/stl_iterator_base_types.h
  181       typedef _Tp                         value_type;
  183       typedef _Tp*                        pointer;
  184       typedef _Tp&                        reference;
  192       typedef _Tp                         value_type;
  194       typedef const _Tp*                  pointer;
  195       typedef const _Tp&                  reference;
usr/include/c++/7.4.0/bits/stl_map.h
  103       typedef _Tp					mapped_type;
  104       typedef std::pair<const _Key, _Tp>		value_type;
usr/include/c++/7.4.0/bits/stl_pair.h
  100 	return __and_<is_constructible<_T1, const _U1&>,
  100 	return __and_<is_constructible<_T1, const _U1&>,
  101 		      is_constructible<_T2, const _U2&>>::value;
  101 		      is_constructible<_T2, const _U2&>>::value;
  107 	return __and_<is_convertible<const _U1&, _T1>,
  107 	return __and_<is_convertible<const _U1&, _T1>,
  108 		      is_convertible<const _U2&, _T2>>::value;
  108 		      is_convertible<const _U2&, _T2>>::value;
  114 	return __and_<is_constructible<_T1, _U1&&>,
  114 	return __and_<is_constructible<_T1, _U1&&>,
  115 		      is_constructible<_T2, _U2&&>>::value;
  115 		      is_constructible<_T2, _U2&&>>::value;
  121 	return __and_<is_convertible<_U1&&, _T1>,
  121 	return __and_<is_convertible<_U1&&, _T1>,
  122 		      is_convertible<_U2&&, _T2>>::value;
  122 		      is_convertible<_U2&&, _T2>>::value;
  128 	using __do_converts = __and_<is_convertible<const _U1&, _T1>,
  128 	using __do_converts = __and_<is_convertible<const _U1&, _T1>,
  129 				  is_convertible<_U2&&, _T2>>;
  129 				  is_convertible<_U2&&, _T2>>;
  133 	return __and_<is_constructible<_T1, const _U1&>,
  133 	return __and_<is_constructible<_T1, const _U1&>,
  134 		      is_constructible<_T2, _U2&&>,
  134 		      is_constructible<_T2, _U2&&>,
  142 	using __do_converts = __and_<is_convertible<_U1&&, _T1>,
  142 	using __do_converts = __and_<is_convertible<_U1&&, _T1>,
  143 				  is_convertible<const _U2&, _T2>>;
  143 				  is_convertible<const _U2&, _T2>>;
  147 	return __and_<is_constructible<_T1, _U1&&>,
  147 	return __and_<is_constructible<_T1, _U1&&>,
  148 		      is_constructible<_T2, const _U2&&>,
  148 		      is_constructible<_T2, const _U2&&>,
  209     : private __pair_base<_T1, _T2>
  209     : private __pair_base<_T1, _T2>
  211       typedef _T1 first_type;    /// @c first_type is the first bound type
  212       typedef _T2 second_type;   /// @c second_type is the second bound type
  214       _T1 first;                 /// @c first is a copy of the first object
  215       _T2 second;                /// @c second is a copy of the second object
  252       using _PCCP = _PCC<true, _T1, _T2>;
  252       using _PCCP = _PCC<true, _T1, _T2>;
  260       constexpr pair(const _T1& __a, const _T2& __b)
  260       constexpr pair(const _T1& __a, const _T2& __b)
  269       explicit constexpr pair(const _T1& __a, const _T2& __b)
  269       explicit constexpr pair(const _T1& __a, const _T2& __b)
  283 			    _T1, _T2>;
  283 			    _T1, _T2>;
  311        constexpr pair(_U1&& __x, const _T2& __y)
  311        constexpr pair(_U1&& __x, const _T2& __y)
  318        explicit constexpr pair(_U1&& __x, const _T2& __y)
  325        constexpr pair(const _T1& __x, _U2&& __y)
  325        constexpr pair(const _T1& __x, _U2&& __y)
  326        : first(__x), second(std::forward<_U2>(__y)) { }
  332        explicit pair(const _T1& __x, _U2&& __y)
  341 	constexpr pair(_U1&& __x, _U2&& __y)
  341 	constexpr pair(_U1&& __x, _U2&& __y)
  342 	: first(std::forward<_U1>(__x)), second(std::forward<_U2>(__y)) { }
  342 	: first(std::forward<_U1>(__x)), second(std::forward<_U2>(__y)) { }
  379 		__and_<is_copy_assignable<_T1>,
  380 		       is_copy_assignable<_T2>>::value,
  390 		__and_<is_move_assignable<_T1>,
  391 		       is_move_assignable<_T2>>::value,
  402       typename enable_if<__and_<is_assignable<_T1&, const _U1&>,
  402       typename enable_if<__and_<is_assignable<_T1&, const _U1&>,
  403 				is_assignable<_T2&, const _U2&>>::value,
  403 				is_assignable<_T2&, const _U2&>>::value,
  405 	operator=(const pair<_U1, _U2>& __p)
  405 	operator=(const pair<_U1, _U2>& __p)
  413       typename enable_if<__and_<is_assignable<_T1&, _U1&&>,
  413       typename enable_if<__and_<is_assignable<_T1&, _U1&&>,
  414 				is_assignable<_T2&, _U2&&>>::value,
  414 				is_assignable<_T2&, _U2&&>>::value,
  416 	operator=(pair<_U1, _U2>&& __p)
  416 	operator=(pair<_U1, _U2>&& __p)
  495     swap(pair<_T1, _T2>& __x, pair<_T1, _T2>& __y)
  495     swap(pair<_T1, _T2>& __x, pair<_T1, _T2>& __y)
  522     constexpr pair<typename __decay_and_strip<_T1>::__type,
  523                    typename __decay_and_strip<_T2>::__type>
  524     make_pair(_T1&& __x, _T2&& __y)
  524     make_pair(_T1&& __x, _T2&& __y)
  526       typedef typename __decay_and_strip<_T1>::__type __ds_type1;
  527       typedef typename __decay_and_strip<_T2>::__type __ds_type2;
  529       return __pair_type(std::forward<_T1>(__x), std::forward<_T2>(__y));
  529       return __pair_type(std::forward<_T1>(__x), std::forward<_T2>(__y));
usr/include/c++/7.4.0/bits/stl_uninitialized.h
  204 			const _Tp& __x)
  244     uninitialized_fill_n(_ForwardIterator __first, _Size __n, const _Tp& __x)
  288 			   _ForwardIterator __result, allocator<_Tp>&)
  344 			     const _Tp& __x, _Allocator& __alloc)
  365 			     const _Tp& __x, allocator<_Tp2>&)
  365 			     const _Tp& __x, allocator<_Tp2>&)
usr/include/c++/7.4.0/bits/stl_vector.h
   77 	rebind<_Tp>::other _Tp_alloc_type;
  216     class vector : protected _Vector_base<_Tp, _Alloc>
  227       typedef _Vector_base<_Tp, _Alloc>			_Base;
  232       typedef _Tp					value_type;
  919       _Tp*
  923       const _Tp*
  962 	emplace_back(_Args&&... __args);
 1483 	_M_realloc_insert(iterator __position, _Args&&... __args);
 1561 	_Up*
 1562 	_M_data_ptr(_Up* __ptr) const _GLIBCXX_NOEXCEPT
usr/include/c++/7.4.0/bits/vector.tcc
  101 				     std::forward<_Args>(__args)...);
  105 	  _M_realloc_insert(end(), std::forward<_Args>(__args)...);
  418 				   std::forward<_Args>(__args)...);
usr/include/c++/7.4.0/ext/alloc_traits.h
  117       { typedef typename _Base_type::template rebind_alloc<_Tp> other; };
usr/include/c++/7.4.0/ext/new_allocator.h
   63       typedef _Tp*       pointer;
   64       typedef const _Tp* const_pointer;
   65       typedef _Tp&       reference;
   66       typedef const _Tp& const_reference;
   67       typedef _Tp        value_type;
   84 	new_allocator(const new_allocator<_Tp1>&) _GLIBCXX_USE_NOEXCEPT { }
  111 	return static_cast<_Tp*>(::operator new(__n * sizeof(_Tp)));
  130       { return size_t(-1) / sizeof(_Tp); }
  135 	construct(_Up* __p, _Args&&... __args)
  135 	construct(_Up* __p, _Args&&... __args)
  136 	{ ::new((void *)__p) _Up(std::forward<_Args>(__args)...); }
  136 	{ ::new((void *)__p) _Up(std::forward<_Args>(__args)...); }
  140 	destroy(_Up* __p) { __p->~_Up(); }
usr/include/c++/7.4.0/initializer_list
   50       typedef _E 		value_type;
   51       typedef const _E& 	reference;
   52       typedef const _E& 	const_reference;
   54       typedef const _E* 	iterator;
   55       typedef const _E* 	const_iterator;
usr/include/c++/7.4.0/type_traits
  215     : public __is_void_helper<typename remove_cv<_Tp>::type>::type
  326     : public __is_integral_helper<typename remove_cv<_Tp>::type>::type
  354     : public __is_floating_point_helper<typename remove_cv<_Tp>::type>::type
  381     : public __is_pointer_helper<typename remove_cv<_Tp>::type>::type
  567     : public __is_null_pointer_helper<typename remove_cv<_Tp>::type>::type
  581     : public __or_<is_lvalue_reference<_Tp>,
  582                    is_rvalue_reference<_Tp>>::type
  588     : public __or_<is_integral<_Tp>, is_floating_point<_Tp>>::type
  588     : public __or_<is_integral<_Tp>, is_floating_point<_Tp>>::type
  601     : public __not_<__or_<is_function<_Tp>, is_reference<_Tp>,
  601     : public __not_<__or_<is_function<_Tp>, is_reference<_Tp>,
  602                           is_void<_Tp>>>::type
  611     : public __or_<is_arithmetic<_Tp>, is_enum<_Tp>, is_pointer<_Tp>,
  611     : public __or_<is_arithmetic<_Tp>, is_enum<_Tp>, is_pointer<_Tp>,
  611     : public __or_<is_arithmetic<_Tp>, is_enum<_Tp>, is_pointer<_Tp>,
  612                    is_member_pointer<_Tp>, is_null_pointer<_Tp>>::type
  612                    is_member_pointer<_Tp>, is_null_pointer<_Tp>>::type
  631     : public __is_member_pointer_helper<typename remove_cv<_Tp>::type>::type
  638     : public __or_<is_object<_Tp>, is_reference<_Tp>>::type
  638     : public __or_<is_object<_Tp>, is_reference<_Tp>>::type
  762     typename add_rvalue_reference<_Tp>::type declval() noexcept;
  777     : public __and_<is_array<_Tp>, __not_<extent<_Tp>>>
  777     : public __and_<is_array<_Tp>, __not_<extent<_Tp>>>
  798       typedef decltype(__test<_Tp>(0)) type;
  811                remove_all_extents<_Tp>::type>::type
  825     : public __is_destructible_safe<_Tp>::type
  889       typedef decltype(__test<_Tp>(0)) type;
  894     : public __and_<__not_<is_void<_Tp>>,
  895                     __is_default_constructible_impl<_Tp>>
  915     : public __is_default_constructible_atom<_Tp>::type
  921     : public __is_default_constructible_safe<_Tp>::type
  984       typedef decltype(__test<_Tp, _Arg>(0)) type;
  989     : public __and_<is_destructible<_Tp>,
  990                     __is_direct_constructible_impl<_Tp, _Arg>>
 1072 			 __is_direct_constructible_ref_cast<_Tp, _Arg>,
 1073 			 __is_direct_constructible_new_safe<_Tp, _Arg>
 1079     : public __is_direct_constructible_new<_Tp, _Arg>::type
 1119     : public __is_direct_constructible<_Tp, _Arg>
 1130     : public __is_constructible_impl<_Tp, _Args...>::type
 1142     : public is_constructible<_Tp, const _Tp&>
 1142     : public is_constructible<_Tp, const _Tp&>
 1148     : public __is_copy_constructible_impl<_Tp>
 1160     : public is_constructible<_Tp, _Tp&&>
 1160     : public is_constructible<_Tp, _Tp&&>
 1166     : public __is_move_constructible_impl<_Tp>
 1215     : public __and_<is_constructible<_Tp, _Args...>,
 1216 		    __is_nt_constructible_impl<_Tp, _Args...>>
 1246     : public is_nothrow_constructible<_Tp, _Tp&&>
 1246     : public is_nothrow_constructible<_Tp, _Tp&&>
 1252     : public __is_nothrow_move_constructible_impl<_Tp>
 1286     : public is_assignable<_Tp&, const _Tp&>
 1286     : public is_assignable<_Tp&, const _Tp&>
 1292     : public __is_copy_assignable_impl<_Tp>
 1304     : public is_assignable<_Tp&, _Tp&&>
 1304     : public is_assignable<_Tp&, _Tp&&>
 1310     : public __is_move_assignable_impl<_Tp>
 1352     : public is_nothrow_assignable<_Tp&, _Tp&&>
 1352     : public is_nothrow_assignable<_Tp&, _Tp&&>
 1358     : public __is_nt_move_assignable_impl<_Tp>
 1377     static void __helper(const _Tp&);
 1380     static true_type __test(const _Tp&,
 1381                             decltype(__helper<const _Tp&>({}))* = 0);
 1390     typedef decltype(__test(declval<_Tp>())) type;
 1395       : public __is_implicitly_default_constructible_impl<_Tp>::type
 1400       : public __and_<is_default_constructible<_Tp>,
 1401                       __is_implicitly_default_constructible_safe<_Tp>>
 1526 	static void __test_aux(_To1);
 1538       typedef decltype(__test<_From, _To>(0)) type;
 1538       typedef decltype(__test<_From, _To>(0)) type;
 1545     : public __is_convertible_helper<_From, _To>::type
 1545     : public __is_convertible_helper<_From, _To>::type
 1554     { typedef _Tp     type; };
 1563     { typedef _Tp     type; };
 1574       remove_const<typename remove_volatile<_Tp>::type>::type     type;
 1629     { typedef _Tp   type; };
 1633     { typedef _Tp   type; };
 1659     { typedef _Tp&&   type; };
 1664     : public __add_rvalue_reference_helper<_Tp>
 1955     { typedef _Tp     type; };
 2104     { typedef typename remove_cv<_Up>::type __type; };
 2118       typedef typename remove_reference<_Tp>::type __remove_type;
 2131       typedef _Tp __type;
 2144 	typename decay<_Tp>::type>::__type __type;
 2171     { typedef _Iffalse type; };
 2574       typename remove_reference<_Tp>::type>::type>::type
 2579     typename enable_if<__and_<__not_<__is_tuple_like<_Tp>>,
 2580 			      is_move_constructible<_Tp>,
 2581 			      is_move_assignable<_Tp>>::value>::type
 2582     swap(_Tp&, _Tp&)
 2582     swap(_Tp&, _Tp&)
 2609           noexcept(swap(std::declval<_Tp&>(), std::declval<_Tp&>()))
 2609           noexcept(swap(std::declval<_Tp&>(), std::declval<_Tp&>()))
 2629       typedef decltype(__test<_Tp>(0)) type;
 2639     : public __is_nothrow_swappable_impl<_Tp>::type
utils/TableGen/CodeGenDAGPatterns.cpp
 4592   BitVector MatchedPatterns(NumOriginalPatterns);
 4593   std::vector<BitVector> MatchedPredicates(NumOriginalPatterns,
 4627     BitVector &Matches = MatchedPredicates[i];
 4651       BitVector &Matches = MatchedPredicates[i];
 4682       for (auto &P : MatchedPredicates)
utils/TableGen/CodeGenRegisters.cpp
  970     const BitVector &SC = RC.getSubClasses();
 1005   BitVector SuperRegRCsBV = BiggestSuperRegRC->getSubClasses();
 1014   std::vector<std::pair<CodeGenRegisterClass *, BitVector>> SuperRegClasses;
 1016     BitVector SuperRegClassesBV(RegClasses.size());
 1040       const BitVector &SuperRegClassBV = SuperRegClassPair.second;
 1069                                               BitVector &Out) const {
 1373   BitVector TopoSigs(getNumTopoSigs());
 1704                             BitVector &NormalRegs,
 1781       BitVector NormalRegs;
 2223   BitVector TopoSigs(getNumTopoSigs());
 2386 BitVector CodeGenRegBank::computeCoveredRegisters(ArrayRef<Record*> Regs) {
 2422   BitVector BV(Registers.size() + 1);
utils/TableGen/CodeGenRegisters.h
  297     BitVector SubClasses;
  323     BitVector TopoSigs;
  404                             BitVector &Out) const;
  415     const BitVector &getSubClasses() const { return SubClasses; }
  438     const BitVector &getTopoSigs() const { return TopoSigs; }
  778     BitVector computeCoveredRegisters(ArrayRef<Record*> Regs);
utils/TableGen/RegisterBankEmitter.cpp
  200       BitVector BV(RegisterClassHierarchy.getRegClasses().size());
utils/TableGen/RegisterInfoEmitter.cpp
  587                                 const BitVector &Bits,
  601   BitVector Values;
 1319     BitVector MaskBV(RegisterClasses.size());
 1549     BitVector Covered = RegBank.computeCoveredRegisters(*Regs);
 1643     const BitVector &SubClasses = RC.getSubClasses();
utils/unittest/googlemock/include/gmock/gmock-matchers.h
  206   bool operator()(const A& a, const B& b) const { return a == b; }
  206   bool operator()(const A& a, const B& b) const { return a == b; }
  519   static Matcher<T> Cast(const M& polymorphic_matcher_or_value) {
  536             internal::ImplicitlyConvertible<M, Matcher<T> >::value>());
  540   static Matcher<T> CastImpl(const M& value, BooleanConstant<false>) {
  547   static Matcher<T> CastImpl(const M& polymorphic_matcher_or_value,
  629   static inline Matcher<T> Cast(const M& polymorphic_matcher_or_value) {
  630     return internal::MatcherCastImpl<T, M>::Cast(polymorphic_matcher_or_value);
  667 inline Matcher<T> SafeMatcherCast(const M& polymorphic_matcher) {
  897   explicit ComparisonBase(const Rhs& rhs) : rhs_(rhs) {}
  907     explicit Impl(const Rhs& rhs) : rhs_(rhs) {}
  921     Rhs rhs_;
  924   Rhs rhs_;
  929 class EqMatcher : public ComparisonBase<EqMatcher<Rhs>, Rhs, AnyEq> {
  929 class EqMatcher : public ComparisonBase<EqMatcher<Rhs>, Rhs, AnyEq> {
  931   explicit EqMatcher(const Rhs& rhs)
 1838   explicit PredicateFormatterFromMatcher(M m) : matcher_(internal::move(m)) {}
 1844   AssertionResult operator()(const char* value_text, const T& x) const {
 1856     const Matcher<const T&> matcher = SafeMatcherCast<const T&>(matcher_);
 1856     const Matcher<const T&> matcher = SafeMatcherCast<const T&>(matcher_);
 1870   const M matcher_;
 1880 inline PredicateFormatterFromMatcher<M>
 1881 MakePredicateFormatterFromMatcher(M matcher) {
 3760 inline internal::EqMatcher<T> Eq(T x) { return internal::EqMatcher<T>(x); }
 3760 inline internal::EqMatcher<T> Eq(T x) { return internal::EqMatcher<T>(x); }
utils/unittest/googletest/include/gtest/gtest-printers.h
  140   static void PrintValue(const T& value, ::std::ostream* os) {
  205     ::std::basic_ostream<Char, CharTraits>& os, const T& x) {
  206   TypeWithoutFormatter<T,
  207       (internal::IsAProtocolMessage<T>::value ? kProtobuf :
  208        internal::ImplicitlyConvertible<const T&, internal::BiggestInt>::value ?
  223 void DefaultPrintNonContainerTo(const T& value, ::std::ostream* os) {
  276   static ::std::string Format(const ToPrint& value) {
  351     const T1& value, const T2& /* other_operand */) {
  351     const T1& value, const T2& /* other_operand */) {
  352   return FormatForComparison<T1, T2>::Format(value);
  352   return FormatForComparison<T1, T2>::Format(value);
  366 void UniversalPrint(const T& value, ::std::ostream* os);
  373                     const C& container, ::std::ostream* os) {
  439                     const T& value, ::std::ostream* os) {
  455 void PrintTo(const T& value, ::std::ostream* os) {
  478   DefaultPrintTo(IsContainerTest<T>(0), is_pointer<T>(), value, os);
  699   static void Print(const T& value, ::std::ostream* os) {
  784   static void Print(const T& value, ::std::ostream* os) {
  853 void UniversalPrint(const T& value, ::std::ostream* os) {
  856   typedef T T1;
  983   internal::UniversalTersePrinter<T>::Print(value, &ss);
utils/unittest/googletest/include/gtest/gtest.h
 1377                                    const T1& lhs, const T2& rhs) {
 1377                                    const T1& lhs, const T2& rhs) {
 1389                             const T1& lhs,
 1390                             const T2& rhs) {
 1419                                  const T1& lhs,
 1420                                  const T2& rhs) {
utils/unittest/googletest/include/gtest/internal/custom/raw-ostream.h
   29   static const T& printable(const T& V) { return V; }
   29   static const T& printable(const T& V) { return V; }
   35 auto printable(const T &V) -> decltype(StreamSwitch<T>::printable(V)) {
   35 auto printable(const T &V) -> decltype(StreamSwitch<T>::printable(V)) {
   37   return StreamSwitch<T>::printable(V);
utils/unittest/googletest/include/gtest/internal/gtest-internal.h
   94 ::std::string PrintToString(const T& value);
  830 struct AddReference { typedef T& type; };  // NOLINT
  863   static typename AddReference<From>::type MakeFrom();
utils/unittest/googletest/include/gtest/internal/gtest-type-util.h
  129   typedef T1 Head;
  806   typedef internal::Types2<T1, T2> type;
 3320   typedef typename Types<T1, T2, T3, T4, T5, T6, T7, T8, T9, T10, T11, T12,