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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Derived Classes
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc17974 struct AArch64GenInstrInfo : public TargetInstrInfo {
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc48041 struct AMDGPUGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/AMDGPU/R600GenInstrInfo.inc 1723 struct R600GenInstrInfo : public TargetInstrInfo {
gen/lib/Target/ARC/ARCGenInstrInfo.inc 1799 struct ARCGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/ARM/ARMGenInstrInfo.inc14467 struct ARMGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/AVR/AVRGenInstrInfo.inc 1213 struct AVRGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/BPF/BPFGenInstrInfo.inc 1088 struct BPFGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/Hexagon/HexagonGenInstrInfo.inc 9965 struct HexagonGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/Lanai/LanaiGenInstrInfo.inc 957 struct LanaiGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/MSP430/MSP430GenInstrInfo.inc 1731 struct MSP430GenInstrInfo : public TargetInstrInfo {
gen/lib/Target/Mips/MipsGenInstrInfo.inc10415 struct MipsGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/NVPTX/NVPTXGenInstrInfo.inc19068 struct NVPTXGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/PowerPC/PPCGenInstrInfo.inc 7511 struct PPCGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/RISCV/RISCVGenInstrInfo.inc 1719 struct RISCVGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/Sparc/SparcGenInstrInfo.inc 2413 struct SparcGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/SystemZ/SystemZGenInstrInfo.inc10453 struct SystemZGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/WebAssembly/WebAssemblyGenInstrInfo.inc 4239 struct WebAssemblyGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/X86/X86GenInstrInfo.inc49325 struct X86GenInstrInfo : public TargetInstrInfo {
gen/lib/Target/XCore/XCoreGenInstrInfo.inc 1359 struct XCoreGenInstrInfo : public TargetInstrInfo {
Declarations
include/llvm/CodeGen/DFAPacketizer.h 47 class TargetInstrInfo;
include/llvm/CodeGen/ExecutionDomainFix.h 35 class TargetInstrInfo;
include/llvm/CodeGen/FastISel.h 54 class TargetInstrInfo;
include/llvm/CodeGen/GlobalISel/InstructionSelector.h 41 class TargetInstrInfo;
include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h 32 class TargetInstrInfo;
include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h 33 class TargetInstrInfo;
include/llvm/CodeGen/GlobalISel/Utils.h 33 class TargetInstrInfo;
include/llvm/CodeGen/LiveIntervals.h 51 class TargetInstrInfo;
include/llvm/CodeGen/LiveRangeEdit.h 41 class TargetInstrInfo;
include/llvm/CodeGen/MachineInstr.h 52 class TargetInstrInfo;
include/llvm/CodeGen/MachineLoopUtils.h 15 class TargetInstrInfo;
include/llvm/CodeGen/MachineSSAUpdater.h 23 class TargetInstrInfo;
include/llvm/CodeGen/MachineScheduler.h 113 class TargetInstrInfo;
include/llvm/CodeGen/MachineTraceMetrics.h 68 class TargetInstrInfo;
include/llvm/CodeGen/MacroFusion.h 24 class TargetInstrInfo;
include/llvm/CodeGen/PseudoSourceValue.h 26 class TargetInstrInfo;
include/llvm/CodeGen/RegisterScavenging.h 30 class TargetInstrInfo;
include/llvm/CodeGen/ScheduleDAG.h 43 class TargetInstrInfo;
include/llvm/CodeGen/SwiftErrorValueTracking.h 33 class TargetInstrInfo;
include/llvm/CodeGen/TargetSchedule.h 28 class TargetInstrInfo;
include/llvm/CodeGen/TargetSubtargetInfo.h 49 class TargetInstrInfo;
include/llvm/CodeGen/VirtRegMap.h 31 class TargetInstrInfo;
lib/CodeGen/AggressiveAntiDepBreaker.h 35 class TargetInstrInfo;
lib/CodeGen/BranchFolding.h 31 class TargetInstrInfo;
lib/CodeGen/CriticalAntiDepBreaker.h 32 class TargetInstrInfo;
lib/CodeGen/SplitKit.h 43 class TargetInstrInfo;
lib/Target/AMDGPU/AMDGPURegisterInfo.h 24 class TargetInstrInfo;
lib/Target/ARC/ARCRegisterInfo.h 23 class TargetInstrInfo;
lib/Target/Hexagon/HexagonBlockRanges.h 27 class TargetInstrInfo;
lib/Target/Hexagon/RDFGraph.h 255 class TargetInstrInfo;
lib/Target/XCore/XCoreRegisterInfo.h 23 class TargetInstrInfo;
References
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc17974 struct AArch64GenInstrInfo : public TargetInstrInfo {
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc48041 struct AMDGPUGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/AMDGPU/R600GenInstrInfo.inc 1723 struct R600GenInstrInfo : public TargetInstrInfo {
gen/lib/Target/ARC/ARCGenInstrInfo.inc 1799 struct ARCGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/ARM/ARMGenInstrInfo.inc14467 struct ARMGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/AVR/AVRGenInstrInfo.inc 1213 struct AVRGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/BPF/BPFGenInstrInfo.inc 1088 struct BPFGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/Hexagon/HexagonGenInstrInfo.inc 9965 struct HexagonGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/Lanai/LanaiGenInstrInfo.inc 957 struct LanaiGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/MSP430/MSP430GenInstrInfo.inc 1731 struct MSP430GenInstrInfo : public TargetInstrInfo {
gen/lib/Target/Mips/MipsGenInstrInfo.inc10415 struct MipsGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/NVPTX/NVPTXGenInstrInfo.inc19068 struct NVPTXGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/PowerPC/PPCGenInstrInfo.inc 7511 struct PPCGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/RISCV/RISCVGenInstrInfo.inc 1719 struct RISCVGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/Sparc/SparcGenInstrInfo.inc 2413 struct SparcGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/SystemZ/SystemZGenInstrInfo.inc10453 struct SystemZGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/WebAssembly/WebAssemblyGenInstrInfo.inc 4239 struct WebAssemblyGenInstrInfo : public TargetInstrInfo {
gen/lib/Target/X86/X86GenInstrInfo.inc49325 struct X86GenInstrInfo : public TargetInstrInfo {
gen/lib/Target/XCore/XCoreGenInstrInfo.inc 1359 struct XCoreGenInstrInfo : public TargetInstrInfo {
include/llvm/CodeGen/DFAPacketizer.h 146 const TargetInstrInfo *TII;
include/llvm/CodeGen/ExecutionDomainFix.h 113 const TargetInstrInfo *TII;
include/llvm/CodeGen/FastISel.h 211 const TargetInstrInfo &TII;
include/llvm/CodeGen/GlobalISel/InstructionSelector.h 451 const int64_t *MatchTable, const TargetInstrInfo &TII,
483 const TargetInstrInfo &TII,
include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h 52 const int64_t *MatchTable, const TargetInstrInfo &TII,
include/llvm/CodeGen/GlobalISel/Legalizer.h 63 const TargetInstrInfo &TII);
include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h 42 const TargetInstrInfo *TII;
247 const TargetInstrInfo &getTII() {
include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h 545 const TargetInstrInfo &TII,
include/llvm/CodeGen/GlobalISel/Utils.h 46 const TargetInstrInfo &TII,
60 const TargetInstrInfo &TII,
78 const TargetInstrInfo &TII,
93 const TargetInstrInfo &TII,
include/llvm/CodeGen/LiveIntervals.h 58 const TargetInstrInfo* TII;
include/llvm/CodeGen/LiveRangeEdit.h 75 const TargetInstrInfo &TII;
include/llvm/CodeGen/MachineInstr.h 1315 const TargetInstrInfo *TII,
1332 const TargetInstrInfo *TII, const TargetRegisterInfo *TRI,
1346 const TargetInstrInfo *TII,
1489 Optional<unsigned> getSpillSize(const TargetInstrInfo *TII) const;
1492 Optional<unsigned> getFoldedSpillSize(const TargetInstrInfo *TII) const;
1495 Optional<unsigned> getRestoreSize(const TargetInstrInfo *TII) const;
1499 getFoldedRestoreSize(const TargetInstrInfo *TII) const;
1527 const TargetInstrInfo *TII = nullptr) const;
1531 const TargetInstrInfo *TII = nullptr) const;
1691 const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const;
include/llvm/CodeGen/MachineInstrBuilder.h 308 bool constrainAllUses(const TargetInstrInfo &TII,
include/llvm/CodeGen/MachineLoopUtils.h 37 const TargetInstrInfo *TII);
include/llvm/CodeGen/MachineMemOperand.h 298 const MachineFrameInfo *MFI, const TargetInstrInfo *TII) const;
include/llvm/CodeGen/MachinePipeliner.h 65 const TargetInstrInfo *TII = nullptr;
include/llvm/CodeGen/MachineRegisterInfo.h 956 const TargetInstrInfo &TII);
include/llvm/CodeGen/MachineSSAUpdater.h 51 const TargetInstrInfo *TII;
include/llvm/CodeGen/MachineScheduler.h 1069 createLoadClusterDAGMutation(const TargetInstrInfo *TII,
1073 createStoreClusterDAGMutation(const TargetInstrInfo *TII,
1077 createCopyConstrainDAGMutation(const TargetInstrInfo *TII,
include/llvm/CodeGen/MachineTraceMetrics.h 89 const TargetInstrInfo *TII = nullptr;
include/llvm/CodeGen/MacroFusion.h 30 using ShouldSchedulePredTy = std::function<bool(const TargetInstrInfo &TII,
include/llvm/CodeGen/ModuloSchedule.h 166 const TargetInstrInfo *TII;
172 std::unique_ptr<TargetInstrInfo::PipelinerLoopInfo> LoopInfo;
278 const TargetInstrInfo *TII;
include/llvm/CodeGen/PseudoSourceValue.h 61 explicit PseudoSourceValue(unsigned Kind, const TargetInstrInfo &TII);
97 explicit FixedStackPseudoSourceValue(int FI, const TargetInstrInfo &TII)
117 CallEntryPseudoSourceValue(unsigned Kind, const TargetInstrInfo &TII);
131 const TargetInstrInfo &TII);
145 ExternalSymbolPseudoSourceValue(const char *ES, const TargetInstrInfo &TII);
156 const TargetInstrInfo &TII;
166 PseudoSourceValueManager(const TargetInstrInfo &TII);
include/llvm/CodeGen/RegisterScavenging.h 36 const TargetInstrInfo *TII;
include/llvm/CodeGen/ResourcePriorityQueue.h 61 const TargetInstrInfo *TII;
include/llvm/CodeGen/ScheduleDAG.h 558 const TargetInstrInfo *TII; ///< Target instruction information
include/llvm/CodeGen/SelectionDAGISel.h 58 const TargetInstrInfo *TII;
include/llvm/CodeGen/SwiftErrorValueTracking.h 41 const TargetInstrInfo *TII;
include/llvm/CodeGen/TailDuplicator.h 37 const TargetInstrInfo *TII;
90 using RegSubRegPair = TargetInstrInfo::RegSubRegPair;
include/llvm/CodeGen/TargetInstrInfo.h 78 TargetInstrInfo(const TargetInstrInfo &) = delete;
79 TargetInstrInfo &operator=(const TargetInstrInfo &) = delete;
79 TargetInstrInfo &operator=(const TargetInstrInfo &) = delete;
1792 static inline TargetInstrInfo::RegSubRegPair getEmptyKey() {
1797 static inline TargetInstrInfo::RegSubRegPair getTombstoneKey() {
1804 static unsigned getHashValue(const TargetInstrInfo::RegSubRegPair &Val) {
1809 static bool isEqual(const TargetInstrInfo::RegSubRegPair &LHS,
1810 const TargetInstrInfo::RegSubRegPair &RHS) {
include/llvm/CodeGen/TargetSchedule.h 37 const TargetInstrInfo *TII = nullptr;
62 const TargetInstrInfo *getInstrInfo() const { return TII; }
include/llvm/CodeGen/TargetSubtargetInfo.h 95 virtual const TargetInstrInfo *getInstrInfo() const { return nullptr; }
include/llvm/CodeGen/VirtRegMap.h 43 const TargetInstrInfo *TII;
lib/CodeGen/AggressiveAntiDepBreaker.h 120 const TargetInstrInfo *TII;
lib/CodeGen/Analysis.cpp 738 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
lib/CodeGen/AsmPrinter/AsmPrinter.cpp 766 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
lib/CodeGen/AsmPrinter/DwarfDebug.cpp 703 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
lib/CodeGen/BranchFolding.cpp 178 const TargetInstrInfo *tii,
516 const TargetInstrInfo *TII) {
1343 static void copyDebugInfoToPredecessor(const TargetInstrInfo *TII,
1355 static void copyDebugInfoToSuccessor(const TargetInstrInfo *TII,
1374 static void salvageDebugInfoFromEmptyBlock(const TargetInstrInfo *TII,
lib/CodeGen/BranchFolding.h 49 bool OptimizeFunction(MachineFunction &MF, const TargetInstrInfo *tii,
126 const TargetInstrInfo *TII;
lib/CodeGen/BranchRelaxation.cpp 88 const TargetInstrInfo *TII;
lib/CodeGen/BreakFalseDeps.cpp 36 const TargetInstrInfo *TII;
lib/CodeGen/CFIInstrInserter.cpp 247 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
lib/CodeGen/CalcSpillWeights.cpp 88 const TargetInstrInfo &TII) {
lib/CodeGen/CriticalAntiDepBreaker.h 39 const TargetInstrInfo *TII;
lib/CodeGen/EarlyIfConversion.cpp 82 const TargetInstrInfo *TII;
701 const TargetInstrInfo *TII;
938 const TargetInstrInfo *TII;
lib/CodeGen/ExpandPostRAPseudos.cpp 33 const TargetInstrInfo *TII;
lib/CodeGen/GCRootLowering.cpp 60 const TargetInstrInfo *TII;
lib/CodeGen/GlobalISel/IRTranslator.cpp 1577 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
lib/CodeGen/GlobalISel/Utils.cpp 31 const TargetInstrInfo &TII,
42 MachineRegisterInfo &MRI, const TargetInstrInfo &TII,
72 MachineRegisterInfo &MRI, const TargetInstrInfo &TII,
112 const TargetInstrInfo &TII,
lib/CodeGen/IfConversion.cpp 191 const TargetInstrInfo *TII;
1466 const TargetInstrInfo *TII) {
lib/CodeGen/ImplicitNullChecks.cpp 163 const TargetInstrInfo *TII = nullptr;
462 using MachineBranchPredicate = TargetInstrInfo::MachineBranchPredicate;
lib/CodeGen/InlineSpiller.cpp 94 const TargetInstrInfo &TII;
167 const TargetInstrInfo &TII;
lib/CodeGen/LiveDebugValues.cpp 97 const TargetInstrInfo *TII;
lib/CodeGen/LiveDebugVariables.cpp 201 const TargetInstrInfo &TII,
315 const TargetInstrInfo &TII,
321 const TargetInstrInfo &TII,
362 LiveIntervals &LIS, const TargetInstrInfo &TII);
376 void emitDebugLabel(LiveIntervals &LIS, const TargetInstrInfo &TII);
1153 const TargetInstrInfo &TII,
1287 LiveIntervals &LIS, const TargetInstrInfo &TII,
1330 const TargetInstrInfo &TII) {
1338 const TargetInstrInfo &TII,
1379 void UserLabel::emitDebugLabel(LiveIntervals &LIS, const TargetInstrInfo &TII) {
1393 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
lib/CodeGen/MIRParser/MIParser.cpp 136 const auto *TII = Subtarget.getInstrInfo();
193 const auto *TII = Subtarget.getInstrInfo();
213 const auto *TII = Subtarget.getInstrInfo();
235 const auto *TII = Subtarget.getInstrInfo();
257 const auto *TII = Subtarget.getInstrInfo();
lib/CodeGen/MIRPrinter.cpp 711 const auto *TII = SubTarget.getInstrInfo();
lib/CodeGen/MachineBasicBlock.cpp 171 const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo();
186 const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo();
340 const TargetInstrInfo &TII = *getParent()->getSubtarget().getInstrInfo();
503 const TargetInstrInfo &TII = *getParent()->getSubtarget().getInstrInfo();
533 const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo();
840 const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo();
969 const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo();
1121 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
lib/CodeGen/MachineBlockPlacement.cpp 357 const TargetInstrInfo *TII;
lib/CodeGen/MachineCSE.cpp 65 const TargetInstrInfo *TII;
lib/CodeGen/MachineCombiner.cpp 62 const TargetInstrInfo *TII;
lib/CodeGen/MachineCopyPropagation.cpp 185 const TargetInstrInfo *TII;
lib/CodeGen/MachineFrameInfo.cpp 190 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
lib/CodeGen/MachineInstr.cpp 92 const TargetInstrInfo *&TII) {
832 const TargetInstrInfo *TII,
871 Register Reg, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII,
889 const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const {
901 const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const {
1194 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
1456 const TargetInstrInfo *TII) const {
1474 bool AddNewLine, const TargetInstrInfo *TII) const {
2159 MachineInstr::getSpillSize(const TargetInstrInfo *TII) const {
2170 MachineInstr::getFoldedSpillSize(const TargetInstrInfo *TII) const {
2178 MachineInstr::getRestoreSize(const TargetInstrInfo *TII) const {
2189 MachineInstr::getFoldedRestoreSize(const TargetInstrInfo *TII) const {
lib/CodeGen/MachineInstrBundle.cpp 131 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
lib/CodeGen/MachineLICM.cpp 94 const TargetInstrInfo *TII;
lib/CodeGen/MachineLoopUtils.cpp 29 const TargetInstrInfo *TII) {
lib/CodeGen/MachineOperand.cpp 404 const auto *TII = MF.getSubtarget().getInstrInfo();
415 static const char *getTargetFlagName(const TargetInstrInfo *TII, unsigned TF) {
500 static const char *getTargetMMOFlagName(const TargetInstrInfo &TII,
542 const auto *TII = MF->getSubtarget().getInstrInfo();
1073 const TargetInstrInfo *TII) const {
lib/CodeGen/MachineOutliner.cpp 737 const TargetInstrInfo &TII) {
1069 const TargetInstrInfo *TII =
1133 const TargetInstrInfo &TII = *STI.getInstrInfo();
1226 const TargetInstrInfo &TII = *STI.getInstrInfo();
1317 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
lib/CodeGen/MachineRegisterInfo.cpp 123 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
472 const TargetInstrInfo &TII) {
lib/CodeGen/MachineScheduler.cpp 471 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
1508 const TargetInstrInfo *TII;
1513 BaseMemOpClusterMutation(const TargetInstrInfo *tii,
1525 StoreClusterMutation(const TargetInstrInfo *tii,
1532 LoadClusterMutation(const TargetInstrInfo *tii, const TargetRegisterInfo *tri)
1541 createLoadClusterDAGMutation(const TargetInstrInfo *TII,
1548 createStoreClusterDAGMutation(const TargetInstrInfo *TII,
1647 CopyConstrain(const TargetInstrInfo *, const TargetRegisterInfo *) {}
1660 createCopyConstrainDAGMutation(const TargetInstrInfo *TII,
lib/CodeGen/MachineSink.cpp 85 const TargetInstrInfo *TII;
722 const TargetInstrInfo *TII,
724 using MachineBranchPredicate = TargetInstrInfo::MachineBranchPredicate;
766 const TargetInstrInfo &TII = *MI.getMF()->getSubtarget().getInstrInfo();
1083 const TargetRegisterInfo *TRI, const TargetInstrInfo *TII);
1224 const TargetInstrInfo *TII) {
1342 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
lib/CodeGen/MachineVerifier.cpp 95 const TargetInstrInfo *TII;
lib/CodeGen/MacroFusion.cpp 147 const TargetInstrInfo &TII = *DAG.TII;
lib/CodeGen/ModuloSchedule.cpp 1250 const TargetInstrInfo *TII;
1762 std::unique_ptr<TargetInstrInfo::PipelinerLoopInfo> Info =
lib/CodeGen/PHIElimination.cpp 263 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
lib/CodeGen/PeepholeOptimizer.cpp 100 using RegSubRegPair = TargetInstrInfo::RegSubRegPair;
101 using RegSubRegPairAndIdx = TargetInstrInfo::RegSubRegPairAndIdx;
154 const TargetInstrInfo *TII;
381 const TargetInstrInfo *TII;
419 const TargetInstrInfo *TII = nullptr)
755 insertPHI(MachineRegisterInfo &MRI, const TargetInstrInfo &TII,
954 const TargetInstrInfo &TII;
957 ExtractSubregRewriter(MachineInstr &MI, const TargetInstrInfo &TII)
1084 static Rewriter *getCopyRewriter(MachineInstr &MI, const TargetInstrInfo &TII) {
1111 getNewSource(MachineRegisterInfo *MRI, const TargetInstrInfo *TII,
1536 unsigned CommIdx = TargetInstrInfo::CommuteAnyOperandIndex;
lib/CodeGen/PostRAHazardRecognizer.cpp 69 const TargetInstrInfo *TII = Fn.getSubtarget().getInstrInfo();
lib/CodeGen/PostRASchedulerList.cpp 80 const TargetInstrInfo *TII;
lib/CodeGen/ProcessImplicitDefs.cpp 28 const TargetInstrInfo *TII;
lib/CodeGen/PrologEpilogInserter.cpp 298 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
536 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
563 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
1178 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
lib/CodeGen/PseudoSourceValue.cpp 27 PseudoSourceValue::PseudoSourceValue(unsigned Kind, const TargetInstrInfo &TII)
83 unsigned Kind, const TargetInstrInfo &TII)
100 const TargetInstrInfo &TII)
103 const char *ES, const TargetInstrInfo &TII)
107 const TargetInstrInfo &TIInfo)
lib/CodeGen/RegAllocFast.cpp 73 const TargetInstrInfo *TII;
lib/CodeGen/RegAllocGreedy.cpp 162 const TargetInstrInfo *TII;
2066 const TargetInstrInfo *TII, const TargetRegisterInfo *TRI,
3163 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
lib/CodeGen/RegisterCoalescer.cpp 127 const TargetInstrInfo* TII;
800 unsigned NewDstIdx = TargetInstrInfo::CommuteAnyOperandIndex;
lib/CodeGen/RenameIndependentSubregs.cpp 105 const TargetInstrInfo *TII;
lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp 285 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
lib/CodeGen/SelectionDAG/InstrEmitter.h 31 const TargetInstrInfo *TII;
lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp 426 const TargetInstrInfo *TII) {
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp 311 const TargetInstrInfo *TII,
442 const TargetInstrInfo *TII) {
490 const TargetInstrInfo *TII) {
1277 const TargetInstrInfo *TII) {
1736 const TargetInstrInfo *TII;
1756 const TargetInstrInfo *tii,
1879 const TargetInstrInfo *tii,
2839 const TargetInstrInfo *TII,
2874 const TargetInstrInfo *TII,
3135 const TargetInstrInfo *TII = STI.getInstrInfo();
3149 const TargetInstrInfo *TII = STI.getInstrInfo();
3163 const TargetInstrInfo *TII = STI.getInstrInfo();
3179 const TargetInstrInfo *TII = STI.getInstrInfo();
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp 112 const TargetInstrInfo *TII,
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 5494 const TargetInstrInfo *TII = DAG.getSubtarget().getInstrInfo();
6641 const TargetInstrInfo *TII = DAG.getSubtarget().getInstrInfo();
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp 66 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
469 const TargetInstrInfo *TII, LLVMContext &Ctx) {
lib/CodeGen/ShrinkWrap.cpp 198 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
lib/CodeGen/SplitKit.h 101 const TargetInstrInfo &TII;
264 const TargetInstrInfo &TII;
lib/CodeGen/StackSlotColoring.cpp 63 const TargetInstrInfo *TII;
lib/CodeGen/SwiftErrorValueTracking.cpp 224 const auto *TII = MF->getSubtarget().getInstrInfo();
lib/CodeGen/TargetInstrInfo.cpp 470 const TargetInstrInfo &TII) {
779 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
lib/CodeGen/TwoAddressInstructionPass.cpp 94 const TargetInstrInfo *TII;
407 static bool isCopyToReg(MachineInstr &MI, const TargetInstrInfo *TII,
471 const TargetInstrInfo *TII,
521 const TargetInstrInfo *TII,
lib/CodeGen/UnreachableBlockElim.cpp 194 const TargetInstrInfo *TII = F.getSubtarget().getInstrInfo();
lib/CodeGen/VirtRegMap.cpp 178 const TargetInstrInfo *TII;
lib/CodeGen/XRayInstrumentation.cpp 69 const TargetInstrInfo *TII,
81 const TargetInstrInfo *TII,
88 MachineFunction &MF, const TargetInstrInfo *TII,
124 MachineFunction &MF, const TargetInstrInfo *TII,
lib/Target/AArch64/AArch64A53Fix835769.cpp 80 const TargetInstrInfo *TII;
131 const TargetInstrInfo *TII) {
156 const TargetInstrInfo *TII) {
172 const TargetInstrInfo *TII) {
lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp 67 const TargetInstrInfo *TII;
274 static MachineInstr *insertCopy(const TargetInstrInfo *TII, MachineInstr &MI,
lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp 100 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
118 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
lib/Target/AArch64/AArch64CompressJumpTables.cpp 35 const TargetInstrInfo *TII;
lib/Target/AArch64/AArch64ConditionOptimizer.cpp 94 const TargetInstrInfo *TII;
lib/Target/AArch64/AArch64ConditionalCompares.cpp 139 const TargetInstrInfo *TII;
763 const TargetInstrInfo *TII;
lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp 39 const TargetInstrInfo *TII;
lib/Target/AArch64/AArch64FrameLowering.cpp 350 const TargetInstrInfo *TII = STI.getInstrInfo();
844 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
1286 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
1326 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
1950 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
2077 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
2359 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
lib/Target/AArch64/AArch64ISelLowering.cpp 1337 const TargetInstrInfo *TII = Subtarget->getInstrInfo();
12382 const TargetInstrInfo *TII = Subtarget->getInstrInfo();
lib/Target/AArch64/AArch64InstrInfo.cpp 1052 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
1480 const TargetInstrInfo *TII =
3984 const TargetInstrInfo *TII, MachineInstr &Root,
4063 const TargetInstrInfo *TII, MachineInstr &Root,
4106 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
lib/Target/AArch64/AArch64InstructionSelector.cpp 617 getRegClassesForCopy(MachineInstr &I, const TargetInstrInfo &TII,
642 static bool selectCopy(MachineInstr &I, const TargetInstrInfo &TII,
lib/Target/AArch64/AArch64MacroFusion.cpp 375 static bool shouldScheduleAdjacent(const TargetInstrInfo &TII,
lib/Target/AArch64/AArch64SIMDInstrOpt.cpp 69 const TargetInstrInfo *TII;
lib/Target/AArch64/AArch64SpeculationHardening.cpp 127 const TargetInstrInfo *TII;
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp 2661 unsigned CommuteIdx1 = TargetInstrInfo::CommuteAnyOperandIndex;
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp 758 buildEXP(const TargetInstrInfo &TII, MachineInstr *Insert, unsigned Tgt,
lib/Target/AMDGPU/AMDGPUMacroFusion.cpp 28 static bool shouldScheduleAdjacent(const TargetInstrInfo &TII_,
lib/Target/AMDGPU/GCNDPPCombine.cpp 70 using RegSubRegPair = TargetInstrInfo::RegSubRegPair;
lib/Target/AMDGPU/SIFixSGPRCopies.cpp 425 const TargetInstrInfo *TII) {
lib/Target/AMDGPU/SIFoldOperands.cpp 375 unsigned CommuteIdx0 = TargetInstrInfo::CommuteAnyOperandIndex;
376 unsigned CommuteIdx1 = TargetInstrInfo::CommuteAnyOperandIndex;
698 DenseMap<TargetInstrInfo::RegSubRegPair, Register> VGPRCopies;
699 SmallSetVector<TargetInstrInfo::RegSubRegPair, 32> SeenAGPRs;
702 TargetInstrInfo::RegSubRegPair CopyToVGPR;
lib/Target/AMDGPU/SIISelLowering.cpp 1991 const TargetInstrInfo *TII = Subtarget->getInstrInfo();
lib/Target/AMDGPU/SIInstrInfo.cpp 6372 TargetInstrInfo::RegSubRegPair getRegOrUndef(const MachineOperand &RegOpnd) {
6378 TargetInstrInfo::RegSubRegPair
6392 TargetInstrInfo::RegSubRegPair &RSR) {
6416 MachineInstr *llvm::getVRegSubRegDef(const TargetInstrInfo::RegSubRegPair &P,
lib/Target/AMDGPU/SIInstrInfo.h 1033 inline bool isOfRegClass(const TargetInstrInfo::RegSubRegPair &P,
1045 TargetInstrInfo::RegSubRegPair getRegSubRegPair(const MachineOperand &O) {
1051 TargetInstrInfo::RegSubRegPair getRegSequenceSubReg(MachineInstr &MI,
1057 MachineInstr *getVRegSubRegDef(const TargetInstrInfo::RegSubRegPair &P,
lib/Target/AMDGPU/SILowerSGPRSpills.cpp 91 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
123 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
lib/Target/AMDGPU/SIMachineFunctionInfo.h 52 AMDGPUPseudoSourceValue(unsigned Kind, const TargetInstrInfo &TII)
73 explicit AMDGPUBufferPseudoSourceValue(const TargetInstrInfo &TII)
84 explicit AMDGPUImagePseudoSourceValue(const TargetInstrInfo &TII)
94 explicit AMDGPUGWSResourcePseudoSourceValue(const TargetInstrInfo &TII)
lib/Target/AMDGPU/SIShrinkInstructions.cpp 422 static TargetInstrInfo::RegSubRegPair
525 TargetInstrInfo::RegSubRegPair X1, Y1;
lib/Target/ARC/ARCOptAddrMode.cpp 168 static bool isLoadStoreThatCanHandleDisplacement(const TargetInstrInfo *TII,
lib/Target/ARM/ARMBaseInstrInfo.cpp 2178 const TargetInstrInfo *TII) const {
lib/Target/ARM/ARMBaseInstrInfo.h 408 const TargetInstrInfo *TII) const;
lib/Target/ARM/ARMBaseRegisterInfo.cpp 463 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
644 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
lib/Target/ARM/ARMFastISel.cpp 114 const TargetInstrInfo &TII;
lib/Target/ARM/ARMFrameLowering.cpp 280 const TargetInstrInfo &TII,
979 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
1056 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
1170 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
1343 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
lib/Target/ARM/ARMISelLowering.cpp 1746 const TargetInstrInfo *TII = Subtarget->getInstrInfo();
2510 const TargetInstrInfo *TII) {
2635 const TargetInstrInfo *TII = Subtarget->getInstrInfo();
9342 const TargetInstrInfo *TII = Subtarget->getInstrInfo();
9466 const TargetInstrInfo *TII = Subtarget->getInstrInfo();
10013 const TargetInstrInfo *TII = Subtarget->getInstrInfo();
10258 const TargetInstrInfo &TII = *Subtarget->getInstrInfo();
10334 const TargetInstrInfo *TII = Subtarget->getInstrInfo();
10400 const TargetInstrInfo *TII = Subtarget->getInstrInfo();
17103 const TargetInstrInfo *TII = Subtarget->getInstrInfo();
lib/Target/ARM/ARMInstructionSelector.cpp 210 static bool selectCopy(MachineInstr &I, const TargetInstrInfo &TII,
lib/Target/ARM/ARMLoadStoreOptimizer.cpp 103 const TargetInstrInfo *TII;
2038 const TargetInstrInfo *TII;
lib/Target/ARM/ARMMacroFusion.cpp 51 static bool shouldScheduleAdjacent(const TargetInstrInfo &TII,
lib/Target/ARM/Thumb1FrameLowering.cpp 605 const TargetInstrInfo &TII = *STI.getInstrInfo();
816 const TargetInstrInfo &TII = *STI.getInstrInfo();
940 const TargetInstrInfo &TII = *STI.getInstrInfo();
lib/Target/ARM/Thumb2SizeReduction.cpp 768 unsigned CommOpIdx2 = TargetInstrInfo::CommuteAnyOperandIndex;
lib/Target/ARM/ThumbRegisterInfo.cpp 69 const TargetInstrInfo &TII = *STI.getInstrInfo();
88 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
lib/Target/AVR/AVRExpandPseudoInsts.cpp 51 const TargetInstrInfo *TII;
lib/Target/AVR/AVRFrameLowering.cpp 247 const TargetInstrInfo &TII = *STI.getInstrInfo();
287 const TargetInstrInfo &TII = *STI.getInstrInfo();
508 const TargetInstrInfo &TII = *STI.getInstrInfo();
lib/Target/AVR/AVRISelLowering.cpp 1443 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
1583 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
lib/Target/AVR/AVRInstrInfo.cpp 495 const TargetInstrInfo &TII = *STI.getInstrInfo();
lib/Target/AVR/AVRRegisterInfo.cpp 138 const TargetInstrInfo &TII = *TM.getSubtargetImpl()->getInstrInfo();
lib/Target/AVR/AVRRelaxMemOperations.cpp 46 const TargetInstrInfo *TII;
lib/Target/BPF/BPFISelLowering.cpp 566 const TargetInstrInfo &TII = *BB->getParent()->getSubtarget().getInstrInfo();
619 const TargetInstrInfo &TII = *BB->getParent()->getSubtarget().getInstrInfo();
lib/Target/BPF/BPFRegisterInfo.cpp 82 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
lib/Target/Hexagon/HexagonBlockRanges.h 169 const TargetInstrInfo &TII;
lib/Target/Hexagon/HexagonCFGOptimizer.cpp 82 const TargetInstrInfo *TII =
lib/Target/Hexagon/HexagonFixupHwLoops.cpp 170 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp 733 const TargetInstrInfo &TII = *G.getSubtarget().getInstrInfo();
lib/Target/Hexagon/HexagonInstrInfo.cpp 678 class HexagonPipelinerLoopInfo : public TargetInstrInfo::PipelinerLoopInfo {
754 std::unique_ptr<TargetInstrInfo::PipelinerLoopInfo>
1330 CrashPseudoSourceValue(const TargetInstrInfo &TII)
lib/Target/Hexagon/HexagonMachineScheduler.cpp 264 const TargetInstrInfo *TII = STI.getInstrInfo();
lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp 68 const TargetInstrInfo *TII = HST.getInstrInfo();
lib/Target/Hexagon/RDFGraph.cpp 651 DataFlowGraph::DataFlowGraph(MachineFunction &mf, const TargetInstrInfo &tii,
lib/Target/Hexagon/RDFGraph.h 415 TargetOperandInfo(const TargetInstrInfo &tii) : TII(tii) {}
422 const TargetInstrInfo &TII;
645 DataFlowGraph(MachineFunction &mf, const TargetInstrInfo &tii,
662 const TargetInstrInfo &getTII() const { return TII; }
870 const TargetInstrInfo &TII;
lib/Target/Lanai/LanaiDelaySlotFiller.cpp 37 const TargetInstrInfo *TII;
lib/Target/Lanai/LanaiMemAluCombiner.cpp 85 const TargetInstrInfo *TII;
lib/Target/Lanai/LanaiRegisterInfo.cpp 143 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
lib/Target/MSP430/MSP430FrameLowering.cpp 191 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
217 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
lib/Target/MSP430/MSP430ISelLowering.cpp 1415 const TargetInstrInfo &TII = *F->getSubtarget().getInstrInfo();
1550 const TargetInstrInfo &TII = *BB->getParent()->getSubtarget().getInstrInfo();
lib/Target/MSP430/MSP430InstrInfo.cpp 313 const TargetInstrInfo &TII = *MF->getSubtarget().getInstrInfo();
lib/Target/MSP430/MSP430RegisterInfo.cpp 133 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
lib/Target/Mips/Mips16ISelDAGToDAG.cpp 73 const TargetInstrInfo &TII = *Subtarget->getInstrInfo();
lib/Target/Mips/Mips16ISelLowering.cpp 515 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
578 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
644 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
710 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
727 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
760 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
779 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
lib/Target/Mips/Mips16RegisterInfo.cpp 63 const TargetInstrInfo &TII = *MBB.getParent()->getSubtarget().getInstrInfo();
lib/Target/Mips/MipsFastISel.cpp 139 const TargetInstrInfo &TII;
lib/Target/Mips/MipsISelLowering.cpp 1265 const TargetInstrInfo &TII,
1427 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
1541 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
1579 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
1733 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
1788 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
4422 const TargetInstrInfo *TII =
4498 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
lib/Target/Mips/MipsMachineFunction.cpp 69 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
lib/Target/Mips/MipsOptimizePICCall.cpp 153 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
lib/Target/Mips/MipsSEFrameLowering.cpp 798 const TargetInstrInfo &TII = *STI.getInstrInfo();
lib/Target/Mips/MipsSEISelLowering.cpp 3037 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
3106 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
3171 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
3217 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
3246 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
3282 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
3328 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
3442 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
3477 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
3511 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
3566 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
3661 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
3766 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
3819 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
3848 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
lib/Target/NVPTX/NVPTXPeephole.cpp 108 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
lib/Target/PowerPC/PPCBranchCoalescing.cpp 150 const TargetInstrInfo *TII;
lib/Target/PowerPC/PPCEarlyReturn.cpp 49 const TargetInstrInfo *TII;
lib/Target/PowerPC/PPCExpandISEL.cpp 48 const TargetInstrInfo *TII;
lib/Target/PowerPC/PPCFastISel.cpp 91 const TargetInstrInfo &TII;
lib/Target/PowerPC/PPCFrameLowering.cpp 339 static void HandleVRSaveUpdate(MachineInstr &MI, const TargetInstrInfo &TII) {
2311 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
lib/Target/PowerPC/PPCISelDAGToDAG.cpp 397 const TargetInstrInfo &TII = *PPCSubTarget->getInstrInfo();
432 const TargetInstrInfo &TII = *PPCSubTarget->getInstrInfo();
lib/Target/PowerPC/PPCISelLowering.cpp10304 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
10426 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
10613 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
10755 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
10879 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
15031 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
lib/Target/PowerPC/PPCInstrInfo.cpp 4159 class PPCPipelinerLoopInfo : public TargetInstrInfo::PipelinerLoopInfo {
4162 const TargetInstrInfo *TII;
4227 std::unique_ptr<TargetInstrInfo::PipelinerLoopInfo>
lib/Target/PowerPC/PPCInstrInfo.h 504 std::unique_ptr<TargetInstrInfo::PipelinerLoopInfo>
lib/Target/PowerPC/PPCRegisterInfo.cpp 504 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
623 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
650 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
695 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
738 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
818 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
868 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
894 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
996 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
1232 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
1258 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
lib/Target/PowerPC/PPCVSXCopy.cpp 49 const TargetInstrInfo *TII;
lib/Target/RISCV/RISCVISelLowering.cpp 1127 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
1157 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
1189 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
1287 const TargetInstrInfo &TII = *BB->getParent()->getSubtarget().getInstrInfo();
lib/Target/Sparc/DelaySlotFiller.cpp 109 const TargetInstrInfo *TII = Subtarget->getInstrInfo();
499 const TargetInstrInfo *TII = Subtarget->getInstrInfo();
lib/Target/Sparc/LeonPasses.cpp 42 const TargetInstrInfo &TII = *Subtarget->getInstrInfo();
129 const TargetInstrInfo &TII = *Subtarget->getInstrInfo();
lib/Target/Sparc/SparcISelLowering.cpp 3119 const TargetInstrInfo &TII = *Subtarget->getInstrInfo();
lib/Target/Sparc/SparcRegisterInfo.cpp 123 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
184 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
196 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
lib/Target/SystemZ/SystemZFrameLowering.cpp 139 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
233 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
lib/Target/SystemZ/SystemZISelLowering.cpp 6572 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp 333 const TargetInstrInfo &TII,
426 const TargetInstrInfo &TII = *Subtarget->getInstrInfo();
lib/Target/WebAssembly/WebAssemblyRegStackify.cpp 100 const TargetInstrInfo *TII,
747 Operand0 = TargetInstrInfo::CommuteAnyOperandIndex;
748 Operand1 = TargetInstrInfo::CommuteAnyOperandIndex;
lib/Target/X86/X86CallLowering.cpp 385 const TargetInstrInfo &TII = *STI.getInstrInfo();
lib/Target/X86/X86CmovConversion.cpp 115 const TargetInstrInfo *TII;
lib/Target/X86/X86DomainReassignment.cpp 93 const TargetInstrInfo *TII) const {
102 virtual bool convertInstr(MachineInstr *MI, const TargetInstrInfo *TII,
117 bool convertInstr(MachineInstr *MI, const TargetInstrInfo *TII,
139 const TargetInstrInfo *TII) const override {
151 bool convertInstr(MachineInstr *MI, const TargetInstrInfo *TII,
179 bool convertInstr(MachineInstr *MI, const TargetInstrInfo *TII,
216 const TargetInstrInfo *TII) const override {
267 bool convertInstr(MachineInstr *MI, const TargetInstrInfo *TII,
527 const TargetInstrInfo *TII) {
lib/Target/X86/X86FloatingPoint.cpp 86 const TargetInstrInfo *TII; // Machine instruction info.
lib/Target/X86/X86FrameLowering.cpp 533 const TargetInstrInfo &TII = *STI.getInstrInfo();
lib/Target/X86/X86ISelLowering.cpp29176 const TargetInstrInfo *TII) {
29293 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
29544 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
29666 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
29718 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
29873 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
30016 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
30150 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
30186 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
30202 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
30426 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
30469 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
30629 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
30805 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
31165 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
46182 const TargetInstrInfo *TII = Subtarget.getInstrInfo();
lib/Target/X86/X86InsertPrefetch.cpp 188 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
lib/Target/X86/X86InstrInfo.cpp 3906 static bool expandMOV32r1(MachineInstrBuilder &MIB, const TargetInstrInfo &TII,
3925 const TargetInstrInfo &TII,
3983 const TargetInstrInfo &TII) {
4004 static bool expandXorFP(MachineInstrBuilder &MIB, const TargetInstrInfo &TII) {
4634 const TargetInstrInfo &TII) {
4717 static MachineInstr *MakeM0Inst(const TargetInstrInfo &TII, unsigned Opcode,
lib/Target/X86/X86InstrInfo.h 299 TargetInstrInfo::MachineBranchPredicate &MBP,
lib/Target/X86/X86MacroFusion.cpp 180 static bool shouldScheduleAdjacent(const TargetInstrInfo &TII,
lib/Target/X86/X86VZeroUpper.cpp 102 const TargetInstrInfo *TII;
lib/Target/X86/X86WinAllocaExpander.cpp 59 const TargetInstrInfo *TII;
lib/Target/XCore/XCoreFrameLowering.cpp 424 const TargetInstrInfo &TII = *MF->getSubtarget().getInstrInfo();
457 const TargetInstrInfo &TII = *MF->getSubtarget().getInstrInfo();
lib/Target/XCore/XCoreISelLowering.cpp 1525 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
tools/llvm-exegesis/lib/Assembler.cpp 125 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
unittests/CodeGen/MachineInstrTest.cpp 114 const TargetInstrInfo *getInstrInfo() const override { return &TII; }
122 TargetInstrInfo TII;
usr/include/c++/7.4.0/bits/move.h 72 constexpr _Tp&&
83 constexpr _Tp&&
usr/include/c++/7.4.0/bits/std_function.h 299 _M_invoke(const _Any_data& __functor, _ArgTypes&&... __args)
628 using _Invoker_type = _Res (*)(const _Any_data&, _ArgTypes&&...);
usr/include/c++/7.4.0/bits/unique_ptr.h 824 make_unique(_Args&&... __args)
usr/include/c++/7.4.0/type_traits 1659 { typedef _Tp&& type; };