reference, declarationdefinition
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reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenGlobalISel.inc
  884   const MachineFunction &MF = *MI.getParent()->getParent();
gen/lib/Target/AMDGPU/AMDGPUGenGlobalISel.inc
  377   const MachineFunction &MF = *MI.getParent()->getParent();
gen/lib/Target/ARM/ARMGenGlobalISel.inc
  746   const MachineFunction &MF = *MI.getParent()->getParent();
gen/lib/Target/Mips/MipsGenGlobalISel.inc
  611   const MachineFunction &MF = *MI.getParent()->getParent();
gen/lib/Target/RISCV/RISCVGenGlobalISel.inc
  257   const MachineFunction &MF = *MI.getParent()->getParent();
gen/lib/Target/X86/X86GenGlobalISel.inc
  750   const MachineFunction &MF = *MI.getParent()->getParent();
include/llvm/ADT/ilist_node.h
  267     return static_cast<const NodeTy *>(this)->getParent();
include/llvm/Analysis/LoopInfo.h
  132     return contains(Inst->getParent());
include/llvm/Analysis/RegionInfo.h
  470   bool contains(const InstT *Inst) const { return contains(Inst->getParent()); }
include/llvm/CodeGen/MachineDominators.h
  134     const MachineBasicBlock *BBA = A->getParent(), *BBB = B->getParent();
  134     const MachineBasicBlock *BBA = A->getParent(), *BBB = B->getParent();
include/llvm/CodeGen/SlotIndexes.h
  426       const MachineBasicBlock *MBB = MI.getParent();
  443       const MachineBasicBlock *MBB = MI.getParent();
lib/CodeGen/AsmPrinter/AsmPrinter.cpp
  959   auto *MBB = MI.getParent();
lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
 2894   if (!isUsableDebugLoc(DL) && MI->getParent() != PrevInstBB) {
 2895     for (const auto &NextMI : *MI->getParent()) {
 2905   PrevInstBB = MI->getParent();
lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp
  314     PrevInstBB = CurMI->getParent();
lib/CodeGen/AsmPrinter/DwarfDebug.cpp
  550   auto *MBB = CallMI->getParent();
 1302   auto MBB = DbgValue->getParent();
 1315   if (LScopeBegin->getParent() != MBB)
 1339   if (LScopeEnd->getParent() != MBB)
 1687         (PrevInstBB && PrevInstBB != MI->getParent())) {
lib/CodeGen/BranchRelaxation.cpp
  179   const MachineBasicBlock *MBB = MI.getParent();
  290                     << printMBBReference(*MI.getParent()) << " to "
lib/CodeGen/GlobalISel/CSEInfo.cpp
  111     if (Node->MI->getParent() != MBB)
  269   addNodeIDMBB(MI->getParent());
lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp
   24   assert(A->getParent() == B->getParent() &&
   24   assert(A->getParent() == B->getParent() &&
   26   const MachineBasicBlock *BBA = A->getParent();
lib/CodeGen/GlobalISel/Localizer.cpp
  104   return InsertMBB == Def.getParent();
lib/CodeGen/GlobalISel/RegBankSelect.cpp
  343       assert(&MI != &(*MI.getParent()->getFirstTerminator()) &&
  413     assert(&MI == &(*MI.getParent()->getFirstTerminator()) &&
lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
  597   assert(MI.getParent() && MI.getMF() &&
lib/CodeGen/GlobalISel/Utils.cpp
  199                                     MI.getDebugLoc(), MI.getParent());
lib/CodeGen/LexicalScopes.cpp
  296     MBBs.insert(R.first->getParent());
lib/CodeGen/LiveDebugValues.cpp
  661   const MachineBasicBlock *MBB = MI.getParent();
  883       if (MI.getParent()->end() == NextI)
lib/CodeGen/LiveIntervals.cpp
  856   return getSpillWeight(isDef, isUse, MBFI, MI.getParent());
lib/CodeGen/LiveVariables.cpp
  731   if (Def && Def->getParent() == &MBB)
lib/CodeGen/MIRCanonicalizerPass.cpp
  147     for (auto &CurMI : *MI.getParent()) {
lib/CodeGen/MIRPrinter.cpp
  477     CallLocation.BlockNum = CallI->getParent()->getNumber();
  480         std::distance(CallI->getParent()->instr_begin(), CallI);
lib/CodeGen/MachineInstr.cpp
   80   if (const MachineBasicBlock *MBB = MI.getParent())
  656   return getParent()->getParent();
  834   assert(getParent() && "Can't have an MBB reference here!");
 1319   const MachineFrameInfo &MFI = getParent()->getParent()->getFrameInfo();
 2007   if (const MachineBasicBlock *MBB = getParent())
lib/CodeGen/MachineOperand.cpp
   42     if (const MachineBasicBlock *MBB = MI->getParent())
lib/CodeGen/MachineRegisterInfo.cpp
  573   const MachineBasicBlock &MBB = *MI.getParent();
lib/CodeGen/MachineScheduler.cpp
 1487             *BaseOp->getParent()->getParent()->getParent();
lib/CodeGen/MachineTraceMetrics.cpp
  772     const TraceBlockInfo &DefTBI = BlockInfo[DefMI->getParent()->getNumber()];
  795       BlockInfo[Dep.DefMI->getParent()->getNumber()];
  983   const MachineBasicBlock *DefMBB = DefMI->getParent();
 1174   assert(getBlockNum() == unsigned(MI.getParent()->getNumber()) &&
 1279   if (DefMI.getParent() == UseMI.getParent())
 1279   if (DefMI.getParent() == UseMI.getParent())
 1282   const TraceBlockInfo &DepTBI = TE.BlockInfo[DefMI.getParent()->getNumber()];
 1283   const TraceBlockInfo &TBI = TE.BlockInfo[UseMI.getParent()->getNumber()];
lib/CodeGen/MachineVerifier.cpp
  413       if (MBBI->getParent() != &*MFI) {
  502   report(msg, MI->getParent());
 1823     if (MI->isPHI() && !MO->getMBB()->isSuccessor(MI->getParent()))
 2042         BBInfo &MInfo = MBBInfoMap[MI->getParent()];
 2103   BBInfo &MInfo = MBBInfoMap[MI->getParent()];
lib/CodeGen/RegAllocFast.cpp
  284     if (UseInst.getParent() != MBB || ++C >= Limit) {
  303     if (DefInst.getParent() != MBB || ++C >= Limit) {
lib/CodeGen/RegAllocGreedy.cpp
 2888     Out.push_back(HintInfo(MBFI->getBlockFreq(Instr.getParent()), OtherReg,
lib/CodeGen/RegisterCoalescer.cpp
 2609         DefMI->getParent() != Indexes->getMBBFromIndex(V.OtherVNI->def)) {
 2612                  << printMBBReference(*DefMI->getParent())
 3538   const MachineBasicBlock *OrigBB = Copy.getParent();
 3547     if (&MI == &Copy || !MI.isCopyLike() || MI.getParent() != OrigBB)
lib/CodeGen/TargetInstrInfo.cpp
  688   const MachineBasicBlock *MBB = Inst.getParent();
  716          hasReassociableOperands(Inst, Inst.getParent()) &&
lib/Target/AArch64/AArch64AsmPrinter.cpp
  801   const MachineBasicBlock &MBB = *MI.getParent();
lib/Target/AArch64/AArch64InstrInfo.cpp
   76   const MachineBasicBlock &MBB = *MI.getParent();
 2380         FirstLdSt.getParent()->getParent()->getFrameInfo();
 3579     TargetOptions Options = Inst.getParent()->getParent()->getTarget().Options;
 3657     return Inst.getParent()->getParent()->getTarget().Options.UnsafeFPMath;
lib/Target/AArch64/AArch64InstructionSelector.cpp
 4016   auto &MBB = *MI.getParent();
 4637   const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
 4670   const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
lib/Target/AArch64/AArch64RegisterBankInfo.cpp
  270   const MachineFunction &MF = *MI.getParent()->getParent();
  421   const MachineFunction &MF = *MI.getParent()->getParent();
  522   const MachineFunction &MF = *MI.getParent()->getParent();
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
 2179   const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
  140         getLongBranchBlockExpr(*MO.getParent()->getParent(), MO));
  202     LLVMContext &C = MI->getParent()->getParent()->getFunction().getContext();
  266     LLVMContext &C = MI->getParent()->getParent()->getFunction().getContext();
  272     const MachineBasicBlock *MBB = MI->getParent();
  390     LLVMContext &C = MI->getParent()->getParent()->getFunction().getContext();
  396     const MachineBasicBlock *MBB = MI->getParent();
lib/Target/AMDGPU/AMDGPUMacroFusion.cpp
   44     const MachineBasicBlock &MBB = *FirstMI->getParent();
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
  341   const MachineFunction &MF = *MI.getParent()->getParent();
 1904   const MachineFunction &MF = *MI.getParent()->getParent();
 1923   const MachineFunction &MF = *MI.getParent()->getParent();
 1938   const MachineFunction &MF = *MI.getParent()->getParent();
 1974   const MachineFunction &MF = *MI.getParent()->getParent();
 2033   const MachineFunction &MF = *MI.getParent()->getParent();
 2113   const MachineFunction &MF = *MI.getParent()->getParent();
lib/Target/AMDGPU/GCNRegBankReassign.cpp
  407   MachineBasicBlock::const_instr_iterator B(MI.getParent()->instr_begin());
lib/Target/AMDGPU/GCNRegPressure.cpp
  356   MRI = &MI.getParent()->getParent()->getRegInfo();
  358   MBBEnd = MI.getParent()->end();
lib/Target/AMDGPU/GCNRegPressure.h
  243                      MI.getParent()->getParent()->getRegInfo());
  249                      MI.getParent()->getParent()->getRegInfo());
lib/Target/AMDGPU/R600InstrInfo.cpp
  204   const MachineFunction *MF = MI.getParent()->getParent();
  214   const MachineFunction *MF = MI.getParent()->getParent();
  888     if (MI.getParent()->begin() != MachineBasicBlock::const_iterator(MI))
lib/Target/AMDGPU/SIFixSGPRCopies.cpp
  154   const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
  216     if (MO.isDef() || UseMI->getParent() != MI.getParent() ||
  395   const MachineBasicBlock *MBBFrom = From->getParent();
  396   const MachineBasicBlock *MBBTo = To->getParent();
lib/Target/AMDGPU/SIInstrInfo.cpp
  330         = LdSt.getParent()->getParent()->getInfo<SIMachineFunctionInfo>();
  418   const MachineFunction &MF = *MI1.getParent()->getParent();
  476       FirstLdSt.getParent()->getParent()->getRegInfo();
 2596   const MachineFunction *MF = MO->getParent()->getParent()->getParent();
 2937   const MachineFunction *MF = MI.getParent()->getParent();
 3196   const MachineFunction *MF = MI.getParent()->getParent();
 3738     const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
 3809   const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
 3926     const MachineFunction *MF = MO.getParent()->getParent()->getParent();
 3951   const MachineFunction &MF = *MI.getParent()->getParent();
 5801   const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
 5971   MachineBasicBlock::const_instr_iterator E = MI.getParent()->instr_end();
 6037     const MachineFunction *MF = MI.getParent()->getParent();
 6458   auto *DefBB = DefMI.getParent();
 6462   if (UseMI.getParent() != DefBB)
 6490   auto *DefBB = DefMI.getParent();
lib/Target/AMDGPU/SIInstrInfo.h
  673     const MachineFunction &MF = *MI.getParent()->getParent();
  679     const MachineFunction &MF = *MI.getParent()->getParent();
  822                                    MI.getParent()->getParent()->getRegInfo().
lib/Target/AMDGPU/SILowerControlFlow.cpp
  159   auto SMBB = MI.getParent();
lib/Target/ARC/ARCInstrInfo.cpp
  405     const MachineFunction *MF = MI.getParent()->getParent();
lib/Target/ARC/ARCOptAddrMode.cpp
  151         const MachineBasicBlock *InstBB = MI->getParent();
lib/Target/ARM/ARMAsmPrinter.cpp
  210       const MachineFunction &MF = *MI->getParent()->getParent();
  420       const MachineFunction &MF = *MI->getParent()->getParent();
 1070   const MachineFunction &MF = *MI->getParent()->getParent();
 1243   const MachineFunction &MF = *MI->getParent()->getParent();
lib/Target/ARM/ARMBaseInstrInfo.cpp
  485     MachineBasicBlock::const_instr_iterator E = MI.getParent()->instr_end();
  665       MI.getParent()->getParent()->getInfo<ARMFunctionInfo>();
  701   const MachineBasicBlock &MBB = *MI.getParent();
  760   MachineBasicBlock::const_instr_iterator E = MI.getParent()->instr_end();
 1777     const MachineFunction *MF = MI0.getParent()->getParent();
 3194   if (Next != MI.getParent()->end() &&
 4050   MachineBasicBlock::const_instr_iterator E = MI.getParent()->instr_end();
 4312       const MachineFunction *MF = DefMI.getParent()->getParent();
 4637     MachineBasicBlock::const_instr_iterator E = MI.getParent()->instr_end();
lib/Target/ARM/ARMMCInstLower.cpp
  170   if (MI.getParent()->getParent()->getInfo<ARMFunctionInfo>()
lib/Target/ARM/ARMRegisterBankInfo.cpp
  224   const MachineFunction &MF = *MI.getParent()->getParent();
lib/Target/AVR/AVRInstrInfo.cpp
  492     const MachineFunction &MF = *MI.getParent()->getParent();
lib/Target/Hexagon/BitTracker.cpp
  774   const MachineBasicBlock *BA = InstA->getParent();
  775   const MachineBasicBlock *BB = InstB->getParent();
  786     MachineBasicBlock::const_iterator I = MI->getParent()->begin();
  799   int ThisN = PI.getParent()->getNumber();
  801     dbgs() << "Visit FI(" << printMBBReference(*PI.getParent()) << "): " << PI;
  819              << printMBBReference(*PI.getParent());
  845     dbgs() << "Visit MI(" << printMBBReference(*MI.getParent()) << "): " << MI;
  920   const MachineBasicBlock &B = *BI.getParent();
lib/Target/Hexagon/HexagonAsmPrinter.cpp
  129       const MachineFunction &MF = *MI->getParent()->getParent();
  269   const MachineFunction &MF = *MI.getParent()->getParent();
  750     const MachineBasicBlock* MBB = MI->getParent();
  760   const MachineFunction &MF = *MI->getParent()->getParent();
lib/Target/Hexagon/HexagonConstExtenders.cpp
  493     const MachineBasicBlock &MBB = *ED.getOp().getParent()->getParent();
 1508   assert(!DefI || MDT->dominates(DefI->getParent(), DomB));
 1972     const MachineBasicBlock *BA = MA->getParent();
 1973     const MachineBasicBlock *BB = MB->getParent();
lib/Target/Hexagon/HexagonConstPropagation.cpp
  620   const MachineBasicBlock *MB = PN.getParent();
  677   LLVM_DEBUG(dbgs() << "Visiting MI(" << printMBBReference(*MI.getParent())
  724   const MachineBasicBlock &B = *BrI.getParent();
lib/Target/Hexagon/HexagonGenInsert.cpp
  785   const MachineBasicBlock *FB = FromI->getParent(), *TB = ToI->getParent();
  785   const MachineBasicBlock *FB = FromI->getParent(), *TB = ToI->getParent();
lib/Target/Hexagon/HexagonInstrInfo.cpp
  341     const MachineBasicBlock *MBB = MI.getParent();
  359     const MachineBasicBlock *MBB = MI.getParent();
 1008   const MachineBasicBlock &B = *MI.getParent();
 3082   MachineBasicBlock::const_instr_iterator MIE = MII->getParent()->instr_end();
 3574   const MachineBasicBlock *Src = MI.getParent();
 3600     const MachineBasicBlock &B = *MI.getParent();
 4306     const MachineBasicBlock &MBB = *MI.getParent();
lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
  343   const MachineFunction &MF = *MI.getParent()->getParent();
 1095   const MachineFunction *MF = MI.getParent()->getParent();
 1830     auto *ThisBB = I.getParent();
lib/Target/Lanai/LanaiAsmPrinter.cpp
  199   MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
lib/Target/MSP430/MSP430InstrInfo.cpp
  312     const MachineFunction *MF = MI.getParent()->getParent();
lib/Target/Mips/MipsAsmPrinter.cpp
  253   MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
lib/Target/Mips/MipsBranchExpansion.cpp
  306   int ThisMBB = Br->getParent()->getNumber();
lib/Target/Mips/MipsDelaySlotFiller.cpp
  383   for (const MCPhysReg *R = TRI.getCalleeSavedRegs(MI.getParent()->getParent());
lib/Target/Mips/MipsInstrInfo.cpp
  582     const MachineFunction *MF = MI.getParent()->getParent();
lib/Target/Mips/MipsRegisterBankInfo.cpp
  404   const MachineFunction &MF = *MI.getParent()->getParent();
lib/Target/PowerPC/PPCAsmPrinter.cpp
  359   const MachineBasicBlock &MBB = *MI.getParent();
lib/Target/PowerPC/PPCBranchCoalescing.cpp
  462       if (DefInst->isPHI() && DefInst->getParent() == MI.getParent()) {
lib/Target/PowerPC/PPCInstrInfo.cpp
  182   if (!DefMI.getParent())
  191         &DefMI.getParent()->getParent()->getRegInfo();
 2014     const MachineFunction *MF = MI.getParent()->getParent();
 3514   const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
 3522   MachineBasicBlock::const_reverse_iterator E = MI.getParent()->rend();
 3996   const MachineFunction *MF = MI.getParent()->getParent();
 4014       if (MI.getParent()->getBasicBlock() ==
 4029         const MachineBasicBlock *MBB = MI.getParent();
lib/Target/PowerPC/PPCMCInstLower.cpp
  112   const MachineFunction *MF = MO.getParent()->getParent()->getParent();
  131     const MachineFunction *MF = MO.getParent()->getParent()->getParent();
lib/Target/RISCV/RISCVInstrInfo.cpp
  470     const MachineFunction &MF = *MI.getParent()->getParent();
lib/Target/Sparc/SparcAsmPrinter.cpp
  265   MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
lib/Target/SystemZ/SystemZAsmPrinter.cpp
  580   const MachineBasicBlock &MBB = *MI.getParent();
lib/Target/SystemZ/SystemZHazardRecognizer.cpp
  118   const MachineFunction &MF = *MI->getParent()->getParent();
lib/Target/SystemZ/SystemZInstrInfo.cpp
  334   const MachineFrameInfo &MFI = MI.getParent()->getParent()->getFrameInfo();
 1398     const MachineFunction *MF = MI.getParent()->getParent();
lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
   53     const MachineFunction &MF = *MO.getParent()->getParent()->getParent();
  227           *MI->getParent()->getParent()->getInfo<WebAssemblyFunctionInfo>();
  240               MI->getParent()->getParent()->getRegInfo();
lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
  318   assert(Def->getParent() == Insert->getParent());
  318   assert(Def->getParent() == Insert->getParent());
  324     const MachineBasicBlock *MBB = Def->getParent();
lib/Target/X86/X86InstrInfo.cpp
  139   const MachineFunction *MF = MI.getParent()->getParent();
  155     const MachineBasicBlock *MBB = MI.getParent();
  611       const MachineFunction &MF = *MI.getParent()->getParent();
  631       const MachineFunction &MF = *MI.getParent()->getParent();
 2415   const MachineFunction *MF = TailCall.getParent()->getParent();
 7555     return Inst.getParent()->getParent()->getTarget().Options.UnsafeFPMath;
lib/Target/X86/X86MCInstLower.cpp
 1593   const MachineBasicBlock *MBB = MBBI->getParent();
 1610       MI.getParent()->getParent()->getConstantPool()->getConstants();
lib/Target/X86/X86OptimizeLEAs.cpp
  314   assert(Last.getParent() == First.getParent() &&
  314   assert(Last.getParent() == First.getParent() &&
  335   const MachineFunction *MF = MI.getParent()->getParent();
lib/Target/X86/X86RegisterBankInfo.cpp
  146   const MachineFunction &MF = *MI.getParent()->getParent();
  162   const MachineFunction &MF = *MI.getParent()->getParent();
  279   const MachineFunction &MF = *MI.getParent()->getParent();
lib/Target/XCore/XCoreAsmPrinter.cpp
  189   const MachineFunction *MF = MI->getParent()->getParent();