|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/ARM/ARMGenSubtargetInfo.inc19968 && (Register::isPhysicalRegister(MI->getOperand(0).getReg()))
19972 && (Register::isPhysicalRegister(MI->getOperand(0).getReg()))
19976 && (Register::isPhysicalRegister(MI->getOperand(0).getReg()))
19980 && (Register::isPhysicalRegister(MI->getOperand(0).getReg()))
19984 && (Register::isPhysicalRegister(MI->getOperand(0).getReg()))
19988 && (Register::isPhysicalRegister(MI->getOperand(0).getReg()))
19992 && (Register::isPhysicalRegister(MI->getOperand(0).getReg()))
19996 && (Register::isPhysicalRegister(MI->getOperand(0).getReg()))
20000 && (Register::isPhysicalRegister(MI->getOperand(0).getReg()))
20010 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
20037 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
20040 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
20043 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
20046 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
20049 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
20052 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
20055 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
20058 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21453 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21480 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21483 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21486 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21489 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21492 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21495 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21498 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21501 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21511 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21538 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21541 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21544 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21547 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21550 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21553 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21556 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21559 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21716 && (Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21720 && (Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21724 && (Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21728 && (Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21732 && (Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21736 && (Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21740 && (Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21744 && (Register::isPhysicalRegister(MI->getOperand(0).getReg()))
21748 && (Register::isPhysicalRegister(MI->getOperand(0).getReg()))
22388 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
22415 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
22418 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
22421 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
22424 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
22427 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
22430 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
22433 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
22436 if ((Register::isPhysicalRegister(MI->getOperand(0).getReg()))
include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h 101 if (Register::isPhysicalRegister(MO.getReg())) {
include/llvm/CodeGen/MachineInstrBuilder.h 503 getRenamableRegState(Register::isPhysicalRegister(RegOp.getReg()) &&
include/llvm/CodeGen/Register.h 96 return isPhysicalRegister(Reg);
include/llvm/CodeGen/RegisterClassInfo.h 113 assert(Register::isPhysicalRegister(PhysReg));
include/llvm/CodeGen/TargetRegisterInfo.h 92 if (!Register::isPhysicalRegister(Reg))
101 if (!Register::isPhysicalRegister(Reg1) ||
102 !Register::isPhysicalRegister(Reg2))
lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp 299 if (Reg != SP && Register::isPhysicalRegister(Reg) &&
lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp 401 if (Register::isPhysicalRegister(Location.getReg()))
lib/CodeGen/AsmPrinter/DwarfDebug.cpp 591 Register::isPhysicalRegister(MO.getReg())) {
lib/CodeGen/AsmPrinter/DwarfExpression.cpp 101 if (!llvm::Register::isPhysicalRegister(MachineReg)) {
lib/CodeGen/BranchFolding.cpp 1854 if (Register::isPhysicalRegister(Reg)) {
1955 if (Register::isPhysicalRegister(Reg)) {
2077 if (Register::isPhysicalRegister(Reg)) {
lib/CodeGen/CalcSpillWeights.cpp 257 CopyHint(hint, hweight, Register::isPhysicalRegister(hint)));
lib/CodeGen/DeadMachineInstructionElim.cpp 79 if (Register::isPhysicalRegister(Reg)) {
144 if (Register::isPhysicalRegister(Reg)) {
163 if (Register::isPhysicalRegister(Reg)) {
lib/CodeGen/DetectDeadLanes.cpp 385 if (Register::isPhysicalRegister(MOReg)) {
lib/CodeGen/EarlyIfConversion.cpp 265 if (MO.isDef() && Register::isPhysicalRegister(Reg))
383 if (!Register::isPhysicalRegister(Reg))
lib/CodeGen/ExpandPostRAPseudos.cpp 90 assert(Register::isPhysicalRegister(DstReg) &&
92 assert(Register::isPhysicalRegister(InsReg) &&
lib/CodeGen/GlobalISel/RegBankSelect.cpp 157 Register::isPhysicalRegister(Dst)) &&
401 if (Register::isPhysicalRegister(Reg)) {
lib/CodeGen/GlobalISel/RegisterBankInfo.cpp 85 if (Register::isPhysicalRegister(Reg))
100 assert(Register::isPhysicalRegister(Reg) && "Reg must be a physreg");
491 if (Register::isPhysicalRegister(Reg)) {
lib/CodeGen/GlobalISel/Utils.cpp 133 if (Register::isPhysicalRegister(Reg))
172 if (Register::isPhysicalRegister(Reg) || !MRI.use_nodbg_empty(Reg))
257 if (Register::isPhysicalRegister(VReg))
lib/CodeGen/LiveDebugValues.cpp 816 Register::isPhysicalRegister(MO.getReg()) &&
lib/CodeGen/LiveDebugVariables.cpp 1175 Register::isPhysicalRegister(VRM.getPhys(VirtReg))) {
lib/CodeGen/LiveIntervals.cpp 189 float Weight = Register::isPhysicalRegister(reg) ? huge_valf : 0.0F;
1447 Register::isPhysicalRegister(MO->getReg()) &&
lib/CodeGen/LivePhysRegs.cpp 50 if (!Register::isPhysicalRegister(Reg))
64 if (!Register::isPhysicalRegister(Reg))
90 if (!Register::isPhysicalRegister(Reg))
298 assert(Register::isPhysicalRegister(Reg));
315 assert(Register::isPhysicalRegister(Reg));
lib/CodeGen/LiveRangeCalc.cpp 375 if (Register::isPhysicalRegister(PhysReg) && !MBB->isLiveIn(PhysReg)) {
lib/CodeGen/LiveRangeEdit.cpp 117 if (Register::isPhysicalRegister(MO.getReg())) {
352 if (MO.isReg() && Register::isPhysicalRegister(MO.getReg()))
lib/CodeGen/LiveRegUnits.cpp 51 if (!Register::isPhysicalRegister(Reg))
63 if (!Register::isPhysicalRegister(Reg))
74 if (!Register::isPhysicalRegister(Reg))
lib/CodeGen/LiveVariables.cpp 525 if (!(Register::isPhysicalRegister(MOReg) && MRI->isReserved(MOReg)))
533 if (Register::isPhysicalRegister(MOReg) && !MRI->isReserved(MOReg))
568 assert(Register::isPhysicalRegister(LI.PhysReg) &&
lib/CodeGen/MIRParser/MIParser.cpp 1082 assert(Register::isPhysicalRegister(Reg) && "expected phys reg");
lib/CodeGen/MachineBasicBlock.cpp 912 if (Register::isPhysicalRegister(Reg) ||
lib/CodeGen/MachineInstr.cpp 994 bool isPhys = Register::isPhysicalRegister(Reg);
1005 if (!Found && TRI && isPhys && Register::isPhysicalRegister(MOReg)) {
1142 if (Register::isPhysicalRegister(ToReg)) {
1787 bool isPhysReg = Register::isPhysicalRegister(IncomingReg);
1818 } else if (hasAliases && MO.isKill() && Register::isPhysicalRegister(Reg)) {
1852 if (!Register::isPhysicalRegister(Reg))
1866 bool isPhysReg = Register::isPhysicalRegister(Reg);
1883 Register::isPhysicalRegister(MOReg)) {
1934 if (Register::isPhysicalRegister(Reg)) {
lib/CodeGen/MachineInstrBundle.cpp 197 if (!MO.isDead() && Register::isPhysicalRegister(Reg)) {
319 assert(Register::isPhysicalRegister(Reg) &&
333 if (!MOReg || !Register::isPhysicalRegister(MOReg))
lib/CodeGen/MachineLICM.cpp 429 assert(Register::isPhysicalRegister(Reg) &&
1016 if (Register::isPhysicalRegister(Reg)) {
1135 if (Register::isPhysicalRegister(Reg))
1380 !Register::isPhysicalRegister(MO.getReg()) ||
1385 !Register::isPhysicalRegister(MO.getReg()))
lib/CodeGen/MachineOperand.cpp 117 assert(Register::isPhysicalRegister(getReg()) &&
135 assert(Register::isPhysicalRegister(getReg()) &&
767 if (Register::isPhysicalRegister(getReg()) && isRenamable())
lib/CodeGen/MachinePipeliner.cpp 2651 if (Register::isPhysicalRegister(SI.getReg()))
lib/CodeGen/MachineRegisterInfo.cpp 389 if (Register::isPhysicalRegister(ToReg)) {
520 assert(Register::isPhysicalRegister(PhysReg));
lib/CodeGen/MachineScheduler.cpp 2919 if (Register::isPhysicalRegister(MI->getOperand(ScheduledOper).getReg()))
2924 if (Register::isPhysicalRegister(MI->getOperand(UnscheduledOper).getReg()))
2934 if (Op.isReg() && !Register::isPhysicalRegister(Op.getReg())) {
3263 !Register::isPhysicalRegister(Dep.getReg()))
lib/CodeGen/MachineSink.cpp 448 if (Register::isPhysicalRegister(Reg))
644 if (Register::isPhysicalRegister(Reg)) {
882 if (Reg == 0 || !Register::isPhysicalRegister(Reg))
1257 if (MO.isReg() && Register::isPhysicalRegister(MO.getReg())) {
lib/CodeGen/MachineTraceMetrics.cpp 666 if (Register::isPhysicalRegister(Reg)) {
712 if (!Register::isPhysicalRegister(Reg))
906 if (!Register::isPhysicalRegister(Reg))
lib/CodeGen/MachineVerifier.cpp 125 if (Register::isPhysicalRegister(Reg))
800 if (!Register::isPhysicalRegister(LI.PhysReg)) {
960 if (MO->isReg() && Register::isPhysicalRegister(MO->getReg()))
1629 else if (Register::isPhysicalRegister(MO->getReg())) {
1633 else if (Register::isPhysicalRegister(MOTied.getReg()) &&
1685 if (Register::isPhysicalRegister(Reg)) {
1959 if (Register::isPhysicalRegister(Reg) && !isReserved(Reg)) {
2003 if (Register::isPhysicalRegister(Reg)) {
2025 if (!Register::isPhysicalRegister(MOP.getReg()))
2110 if (Register::isPhysicalRegister(*I) &&
2422 if (!Register::isPhysicalRegister(MOI->getReg()) ||
lib/CodeGen/ModuloSchedule.cpp 731 if (Register::isPhysicalRegister(reg)) {
lib/CodeGen/PeepholeOptimizer.cpp 421 if (!Register::isPhysicalRegister(Reg)) {
463 if (Register::isPhysicalRegister(DstReg) ||
464 Register::isPhysicalRegister(SrcReg))
612 Register::isPhysicalRegister(SrcReg) ||
613 (SrcReg2 != 0 && Register::isPhysicalRegister(SrcReg2)))
666 if (Register::isPhysicalRegister(Reg))
678 if (Register::isPhysicalRegister(CurSrcPair.Reg))
726 if (Register::isPhysicalRegister(CurSrcPair.Reg))
1173 if (Register::isPhysicalRegister(MODef.getReg()))
1224 assert(!Register::isPhysicalRegister(Def.Reg) &&
1283 if (Register::isPhysicalRegister(Def.Reg))
1435 return Register::isPhysicalRegister(Reg) && !MRI->isAllocatable(Reg);
2097 if (!Register::isPhysicalRegister(Reg) && OneRegSrc) {
lib/CodeGen/ProcessImplicitDefs.cpp 104 if (!Register::isPhysicalRegister(UserReg) ||
lib/CodeGen/RegAllocFast.cpp 459 assert(Register::isPhysicalRegister(PhysReg) && "Bad usePhysReg operand");
628 if (Register::isPhysicalRegister(Reg))
673 if (Register::isPhysicalRegister(Hint0) && MRI->isAllocatable(Hint0) &&
694 if (Register::isPhysicalRegister(Hint1) && MRI->isAllocatable(Hint1) &&
785 if ((!Hint || !Register::isPhysicalRegister(Hint)) &&
908 if (!Reg || !Register::isPhysicalRegister(Reg))
964 if (!Reg || !Register::isPhysicalRegister(Reg))
1006 assert(Register::isPhysicalRegister(i->PhysReg) && "Bad map value");
1142 if (!Reg || !Register::isPhysicalRegister(Reg))
1171 if (!Reg || !Register::isPhysicalRegister(Reg) || !MRI->isAllocatable(Reg))
1185 if (Register::isPhysicalRegister(Reg))
lib/CodeGen/RegAllocGreedy.cpp 2884 Register OtherPhysReg = Register::isPhysicalRegister(OtherReg)
2935 if (Register::isPhysicalRegister(Reg))
lib/CodeGen/RegisterCoalescer.cpp 409 if (Register::isPhysicalRegister(Src)) {
410 if (Register::isPhysicalRegister(Dst))
419 if (Register::isPhysicalRegister(Dst)) {
478 assert(!(Register::isPhysicalRegister(Dst) && DstSub) &&
486 if (Register::isPhysicalRegister(DstReg))
510 if (Register::isPhysicalRegister(DstReg)) {
511 if (!Register::isPhysicalRegister(Dst))
880 if (Register::isPhysicalRegister(NewReg))
1191 assert(!Register::isPhysicalRegister(Reg) &&
1212 if (Register::isPhysicalRegister(SrcReg))
1257 if (Register::isPhysicalRegister(DstReg)) {
1320 if (Register::isPhysicalRegister(MO.getReg()))
1339 Register::isPhysicalRegister(MO.getReg()));
1431 assert(Register::isPhysicalRegister(DstReg) &&
1483 if (Register::isPhysicalRegister(DstReg))
1654 bool DstIsPhys = Register::isPhysicalRegister(DstReg);
3468 if (Register::isPhysicalRegister(SrcReg) ||
3469 Register::isPhysicalRegister(DstReg))
3529 if (Register::isPhysicalRegister(DstReg) ||
3533 Register::isPhysicalRegister(SrcReg) || !isTerminalReg(DstReg, Copy, MRI))
3556 if (Register::isPhysicalRegister(OtherReg) ||
lib/CodeGen/RegisterScavenging.cpp 137 if (!Register::isPhysicalRegister(Reg) || isReserved(Reg))
208 if (!Register::isPhysicalRegister(Reg) || isReserved(Reg))
lib/CodeGen/ScheduleDAGInstrs.cpp 208 if (Register::isPhysicalRegister(Reg)) {
842 if (Register::isPhysicalRegister(Reg)) {
859 if (Register::isPhysicalRegister(Reg)) {
lib/CodeGen/SelectionDAG/InstrEmitter.cpp 74 if (Register::isPhysicalRegister(RN->getReg()))
222 assert(Register::isPhysicalRegister(VRBase));
505 if (R && Register::isPhysicalRegister(R->getReg())) {
651 if (!R || !Register::isPhysicalRegister(R->getReg())) {
1095 getImplRegState(Register::isPhysicalRegister(Reg)));
1104 getImplRegState(Register::isPhysicalRegister(Reg)));
lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp 501 if (Register::isPhysicalRegister(Reg))
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp 1381 if (Register::isPhysicalRegister(Reg))
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 9374 assert(!Register::isPhysicalRegister(Reg) && "Is a physreg");
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp 575 if (Register::isPhysicalRegister(Reg))
1654 if (!OPI2->isReg() || (!Register::isPhysicalRegister(OPI->getReg()) &&
1655 Register::isPhysicalRegister(OPI2->getReg())))
lib/CodeGen/ShrinkWrap.cpp 284 assert(Register::isPhysicalRegister(PhysReg) && "Unallocated register?!");
lib/CodeGen/StackMaps.cpp 151 assert(Register::isPhysicalRegister(MOI->getReg()) &&
lib/CodeGen/TargetInstrInfo.cpp 187 bool Reg1IsRenamable = Register::isPhysicalRegister(Reg1)
190 bool Reg2IsRenamable = Register::isPhysicalRegister(Reg2)
232 if (Register::isPhysicalRegister(Reg1))
234 if (Register::isPhysicalRegister(Reg2))
454 if (Register::isPhysicalRegister(LiveOp.getReg()))
932 if (Register::isPhysicalRegister(Reg)) {
lib/CodeGen/TargetRegisterInfo.cpp 191 assert(Register::isPhysicalRegister(reg) &&
412 if (!Register::isPhysicalRegister(Phys))
435 assert(Register::isPhysicalRegister(PhysReg) &&
475 if (Register::isPhysicalRegister(Reg)) {
lib/CodeGen/TwoAddressInstructionPass.cpp 421 IsSrcPhys = Register::isPhysicalRegister(SrcReg);
422 IsDstPhys = Register::isPhysicalRegister(DstReg);
477 if (Register::isPhysicalRegister(Reg) &&
482 if (Register::isPhysicalRegister(Reg))
538 IsDstPhys = Register::isPhysicalRegister(DstReg);
554 if (Register::isPhysicalRegister(Reg))
1107 } else if (Register::isPhysicalRegister(MOReg)) {
1156 if (Register::isPhysicalRegister(MOReg) && LiveDefs.count(MOReg))
1802 if (MI.getOperand(0).getSubReg() || Register::isPhysicalRegister(DstReg) ||
1852 if (LV && isKill && !Register::isPhysicalRegister(SrcReg))
lib/CodeGen/VirtRegMap.cpp 84 assert(virtReg.isVirtual() && Register::isPhysicalRegister(physReg));
112 if (Register::isPhysicalRegister(Hint.second))
lib/Target/AArch64/AArch64AsmPrinter.cpp 506 assert(Register::isPhysicalRegister(Reg));
lib/Target/AArch64/AArch64InstrInfo.cpp 1074 if (Register::isPhysicalRegister(Reg)) {
2398 if (Register::isPhysicalRegister(Reg))
2791 if (Register::isPhysicalRegister(SrcReg)) {
2921 if (Register::isPhysicalRegister(DestReg)) {
3272 if (IsSpill && DstMO.isUndef() && Register::isPhysicalRegister(SrcReg)) {
lib/Target/AArch64/AArch64InstructionSelector.cpp 569 (Register::isPhysicalRegister(SrcReg) && DstSize <= SrcSize) ||
606 if (!Register::isPhysicalRegister(I.getOperand(0).getReg()))
675 (!Register::isPhysicalRegister(I.getOperand(0).getReg()) &&
676 !Register::isPhysicalRegister(I.getOperand(1).getReg()))) &&
740 if (Register::isPhysicalRegister(DstReg))
3415 Register::isPhysicalRegister(CondDef->getOperand(1).getReg()))
lib/Target/AArch64/AArch64PBQPRegAlloc.cpp 165 if (Register::isPhysicalRegister(Rd) || Register::isPhysicalRegister(Ra)) {
165 if (Register::isPhysicalRegister(Rd) || Register::isPhysicalRegister(Ra)) {
167 << Register::isPhysicalRegister(Rd) << '\n');
169 << Register::isPhysicalRegister(Ra) << '\n');
lib/Target/AArch64/AArch64RegisterBankInfo.cpp 569 if ((Register::isPhysicalRegister(DstReg) ||
571 (Register::isPhysicalRegister(SrcReg) ||
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp 73 if (Register::isPhysicalRegister(Reg))
96 if (Register::isPhysicalRegister(Reg))
168 if (Register::isPhysicalRegister(MO.getReg()))
lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp 952 if (Register::isPhysicalRegister(NewRegister)) {
2235 if (Register::isPhysicalRegister(NewRegister)) {
lib/Target/AMDGPU/GCNNSAReassign.cpp 177 if (Register::isPhysicalRegister(Reg) || !VRM->isAssignedReg(Reg))
lib/Target/AMDGPU/GCNRegBankReassign.cpp 233 if (Register::isPhysicalRegister(Reg)) {
278 assert(Register::isPhysicalRegister(Reg));
423 if (Register::isPhysicalRegister(Reg) || !VRM->isAssignedReg(Reg))
lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp 61 if (Register::isPhysicalRegister(Reg))
lib/Target/AMDGPU/SIFixSGPRCopies.cpp 257 if (Register::isPhysicalRegister(CopyUse.getOperand(0).getReg()))
lib/Target/AMDGPU/SIFormMemoryClauses.cpp 147 if (Register::isPhysicalRegister(MO.getReg()) && MO.isRenamable())
155 if (LaneMask.all() || Register::isPhysicalRegister(Reg) ||
230 if (Register::isPhysicalRegister(Reg))
392 if (Register::isPhysicalRegister(Reg))
400 if (Register::isPhysicalRegister(Reg))
lib/Target/AMDGPU/SIISelLowering.cpp10256 Register::isPhysicalRegister(DestReg->getReg())) {
10837 if (Register::isPhysicalRegister(Reg))
lib/Target/AMDGPU/SIInstrInfo.cpp 2439 } else if ((Register::isPhysicalRegister(Src0->getReg()) &&
2457 } else if ((Register::isPhysicalRegister(Src1->getReg()) &&
3183 if (Register::isPhysicalRegister(SubReg.getReg()))
3382 } else if (Register::isPhysicalRegister(TiedMO.getReg()) &&
5057 if (Register::isPhysicalRegister(DstReg))
lib/Target/AMDGPU/SILoadStoreOptimizer.cpp 173 if (Register::isPhysicalRegister(AddrOp->getReg()))
566 else if (Op.readsReg() && Register::isPhysicalRegister(Op.getReg()))
598 (Use.isDef() && Register::isPhysicalRegister(Use.getReg()) &&
lib/Target/AMDGPU/SIPeepholeSDWA.cpp 577 if (Register::isPhysicalRegister(Src1->getReg()) ||
578 Register::isPhysicalRegister(Dst->getReg()))
616 if (Register::isPhysicalRegister(Src1->getReg()) ||
617 Register::isPhysicalRegister(Dst->getReg()))
680 if (Register::isPhysicalRegister(Src0->getReg()) ||
681 Register::isPhysicalRegister(Dst->getReg()))
709 if (Register::isPhysicalRegister(ValSrc->getReg()) ||
710 Register::isPhysicalRegister(Dst->getReg()))
lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp 98 if (Register::isPhysicalRegister(Reg))
128 if (Register::isPhysicalRegister(VirtReg))
lib/Target/AMDGPU/SIShrinkInstructions.cpp 396 if (Register::isPhysicalRegister(Reg) &&
397 Register::isPhysicalRegister(MO.getReg())) {
426 if (Register::isPhysicalRegister(Reg)) {
580 Register::isPhysicalRegister(MI.getOperand(0).getReg())) {
672 if (Src.isImm() && Register::isPhysicalRegister(Dst.getReg())) {
lib/Target/ARM/ARMAsmPrinter.cpp 207 assert(Register::isPhysicalRegister(Reg));
lib/Target/ARM/ARMBaseInstrInfo.cpp 1022 if (Register::isPhysicalRegister(Reg))
1342 if (Register::isPhysicalRegister(DestReg))
1388 if (Register::isPhysicalRegister(DestReg))
1412 if (Register::isPhysicalRegister(DestReg))
1432 if (Register::isPhysicalRegister(DestReg))
2201 if (Register::isPhysicalRegister(MO.getReg()))
5204 assert(Register::isPhysicalRegister(Reg) &&
lib/Target/ARM/ARMBaseRegisterInfo.cpp 331 if (Register::isPhysicalRegister(Paired)) {
lib/Target/ARM/ARMCallLowering.cpp 532 if (CalleeReg && !Register::isPhysicalRegister(CalleeReg)) {
lib/Target/ARM/ARMInstructionSelector.cpp 214 if (Register::isPhysicalRegister(DstReg))
lib/Target/ARM/MLxExpansionPass.cpp 90 if (Register::isPhysicalRegister(Reg))
118 if (Register::isPhysicalRegister(Reg) || !MRI->hasOneNonDBGUse(Reg))
128 if (Register::isPhysicalRegister(Reg) || !MRI->hasOneNonDBGUse(Reg))
142 if (Register::isPhysicalRegister(Reg))
lib/Target/ARM/Thumb1InstrInfo.cpp 83 (Register::isPhysicalRegister(SrcReg) && isARMLowRegister(SrcReg))) &&
87 (Register::isPhysicalRegister(SrcReg) && isARMLowRegister(SrcReg))) {
112 (Register::isPhysicalRegister(DestReg) && isARMLowRegister(DestReg))) &&
116 (Register::isPhysicalRegister(DestReg) && isARMLowRegister(DestReg))) {
lib/Target/ARM/Thumb2InstrInfo.cpp 213 if (Register::isPhysicalRegister(DestReg))
lib/Target/Hexagon/BitTracker.cpp 342 assert(Register::isPhysicalRegister(RR.Reg));
354 if (Register::isPhysicalRegister(RR.Reg))
715 assert(Register::isPhysicalRegister(Reg));
lib/Target/Hexagon/HexagonBitTracker.cpp 114 assert(Register::isPhysicalRegister(Reg));
1223 if (!Register::isPhysicalRegister(RS.Reg))
lib/Target/Hexagon/HexagonBlockRanges.cpp 271 if (Register::isPhysicalRegister(R.Reg)) {
324 if (Register::isPhysicalRegister(R.Reg) && Reserved[R.Reg])
341 if (Register::isPhysicalRegister(S.Reg) && Reserved[S.Reg])
377 assert(!Register::isPhysicalRegister(S.Reg) ||
386 assert(!Register::isPhysicalRegister(S.Reg) ||
lib/Target/Hexagon/HexagonCopyToCombine.cpp 229 assert(Register::isPhysicalRegister(Reg));
lib/Target/Hexagon/HexagonExpandCondsets.cpp 555 assert(Register::isPhysicalRegister(R));
589 assert(Register::isPhysicalRegister(RS.Reg));
lib/Target/Hexagon/HexagonInstrInfo.cpp 2106 if (Register::isPhysicalRegister(RegA))
2111 if (Register::isPhysicalRegister(RegB))
4103 if (DefMO.isReg() && Register::isPhysicalRegister(DefMO.getReg())) {
lib/Target/Hexagon/HexagonNewValueJump.cpp 293 if (secondReg && !Register::isPhysicalRegister(cmpOp2)) {
519 afterRA = Register::isPhysicalRegister(predReg);
lib/Target/Hexagon/HexagonSubtarget.cpp 233 Register::isPhysicalRegister(MI->getOperand(1).getReg())) {
246 } else if (MO.isDef() && Register::isPhysicalRegister(MO.getReg())) {
lib/Target/Hexagon/RDFCopy.cpp 48 assert(Register::isPhysicalRegister(DstR.Reg));
49 assert(Register::isPhysicalRegister(SrcR.Reg));
lib/Target/Hexagon/RDFGraph.cpp 966 Register::isPhysicalRegister(Reg));
1295 if (!R || !Register::isPhysicalRegister(R))
1340 if (!R || !Register::isPhysicalRegister(R) || DoneDefs.test(R))
1369 if (!R || !Register::isPhysicalRegister(R))
lib/Target/Hexagon/RDFLiveness.cpp 893 if (!Register::isPhysicalRegister(R))
902 if (!Register::isPhysicalRegister(R))
lib/Target/Hexagon/RDFRegisters.cpp 104 assert(isRegMaskId(Reg) || Register::isPhysicalRegister(Reg));
132 assert(Register::isPhysicalRegister(RA.Reg));
133 assert(Register::isPhysicalRegister(RB.Reg));
163 assert(Register::isPhysicalRegister(RR.Reg) && isRegMaskId(RM.Reg));
lib/Target/Lanai/LanaiInstrInfo.cpp 481 if (Register::isPhysicalRegister(MO.getReg()))
lib/Target/Mips/MipsInstructionSelector.cpp 90 if (Register::isPhysicalRegister(DstReg))
375 if (Register::isPhysicalRegister(DestReg))
lib/Target/Mips/MipsRegisterBankInfo.cpp 179 !Register::isPhysicalRegister(NonCopyInstr->getOperand(0).getReg()))
201 !Register::isPhysicalRegister(Ret->getOperand(0).getReg()) &&
215 !Register::isPhysicalRegister(Ret->getOperand(1).getReg()))
336 assert((Register::isPhysicalRegister(CopyInst->getOperand(Op).getReg())) &&
lib/Target/NVPTX/NVPTXAsmPrinter.cpp 2213 if (Register::isPhysicalRegister(MO.getReg())) {
lib/Target/PowerPC/PPCBranchCoalescing.cpp 344 Register::isPhysicalRegister(Op1.getReg())
lib/Target/PowerPC/PPCRegisterInfo.cpp 394 assert(Register::isPhysicalRegister(PhysReg));
lib/Target/SystemZ/SystemZRegisterInfo.cpp 173 Register::isPhysicalRegister(Reg) ? Reg : VRM->getPhys(Reg);
389 if (MO.isReg() && Register::isPhysicalRegister(MO.getReg())) {
lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp 716 if (!MO.isReg() || Register::isPhysicalRegister(MO.getReg()))
lib/Target/WebAssembly/WebAssemblyRegStackify.cpp 344 if (Register::isPhysicalRegister(Reg)) {
814 if (Register::isPhysicalRegister(Reg))
lib/Target/X86/X86CallFrameOptimization.cpp 339 if (!Register::isPhysicalRegister(Reg))
457 if (Register::isPhysicalRegister(Reg))
lib/Target/X86/X86DomainReassignment.cpp 223 if (Register::isPhysicalRegister(DstReg) &&
228 if (Register::isPhysicalRegister(SrcReg) &&
244 if (Register::isPhysicalRegister(MO.getReg()))
lib/Target/X86/X86InstrInfo.cpp 733 if (Register::isPhysicalRegister(SrcReg)) {
4561 if (MO.isUndef() && Register::isPhysicalRegister(MO.getReg())) {
4929 if (Register::isPhysicalRegister(DstReg))
7579 Register::isPhysicalRegister(Op2.getReg())));
lib/Target/X86/X86InstructionSelector.cpp 216 assert(Register::isPhysicalRegister(Reg));
240 if (Register::isPhysicalRegister(DstReg)) {
267 assert((!Register::isPhysicalRegister(SrcReg) || I.isCopy()) &&
272 (Register::isPhysicalRegister(SrcReg) &&
281 Register::isPhysicalRegister(SrcReg)) {
lib/Target/X86/X86OptimizeLEAs.cpp 201 (!MO1.isReg() || !Register::isPhysicalRegister(MO1.getReg()));