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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Declarations
include/llvm/CodeGen/MachineRegisterInfo.h 596 MachineInstr *getVRegDef(unsigned Reg) const;
References
include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h 109 MachineInstr *NewMI = MRI.getVRegDef(MO.getReg());
include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h 61 markInstAndDefDead(MI, *MRI.getVRegDef(SrcReg), DeadInsts);
79 auto *SrcMI = MRI.getVRegDef(SrcReg);
114 markInstAndDefDead(MI, *MRI.getVRegDef(SrcReg), DeadInsts);
120 auto *SrcMI = MRI.getVRegDef(SrcReg);
154 markInstAndDefDead(MI, *MRI.getVRegDef(SrcReg), DeadInsts);
170 auto *SrcMI = MRI.getVRegDef(SrcReg);
392 MachineInstr *MergeI = MRI.getVRegDef(Src);
500 MachineInstr *TmpDef = MRI.getVRegDef(PrevRegSrc);
include/llvm/CodeGen/GlobalISel/MIPatternMatch.h 127 MI = MRI.getVRegDef(Reg);
lib/CodeGen/EarlyIfConversion.cpp 271 MachineInstr *DefMI = MRI->getVRegDef(Reg);
lib/CodeGen/GlobalISel/CombinerHelper.cpp 117 MachineInstr *Def = MRI.getVRegDef(Reg);
768 MachineInstr *CmpMI = MRI.getVRegDef(BrCond->getOperand(0).getReg());
786 MachineInstr *CmpMI = MRI.getVRegDef(BrCond->getOperand(0).getReg());
lib/CodeGen/GlobalISel/GISelKnownBits.cpp 54 const MachineInstr &MI = *MRI.getVRegDef(R);
93 MachineInstr &MI = *MRI.getVRegDef(R);
316 MachineInstr *RHSMI = MRI.getVRegDef(MI.getOperand(2).getReg());
lib/CodeGen/GlobalISel/InstructionSelector.cpp 62 MachineInstr *RootI = MRI.getVRegDef(Root.getReg());
67 MachineInstr *RHSI = MRI.getVRegDef(RHS.getReg());
lib/CodeGen/GlobalISel/Utils.cpp 244 while ((MI = MRI.getVRegDef(VReg)) && !IsConstantOpcode(MI->getOpcode()) &&
297 MachineInstr *MI = MRI.getVRegDef(VReg);
305 auto *DefMI = MRI.getVRegDef(Reg);
314 DefMI = MRI.getVRegDef(SrcReg);
391 const MachineInstr *DefMI = MRI.getVRegDef(Val);
lib/CodeGen/LiveVariables.cpp 133 assert(MRI->getVRegDef(reg) && "Register use before def!");
168 if (MBB == MRI->getVRegDef(reg)->getParent()) return;
179 MarkVirtRegAliveInBlock(VRInfo, MRI->getVRegDef(reg)->getParent(), *PI);
594 MarkVirtRegAliveInBlock(getVarInfo(*I),MRI->getVRegDef(*I)->getParent(),
658 if (VirtRegInfo[Reg].Kills[j] == MRI->getVRegDef(Reg))
730 const MachineInstr *Def = MRI.getVRegDef(Reg);
lib/CodeGen/MachineCSE.cpp 174 MachineInstr *DefMI = MRI->getVRegDef(Reg);
lib/CodeGen/MachineLICM.cpp 1041 assert(MRI->getVRegDef(Reg) &&
1046 if (CurLoop->contains(MRI->getVRegDef(Reg)))
lib/CodeGen/MachinePipeliner.cpp 2070 MachineInstr *BaseDef = MRI.getVRegDef(BaseReg);
2073 BaseDef = MRI.getVRegDef(BaseReg);
2108 MachineInstr *Phi = MRI.getVRegDef(BaseReg);
2117 MachineInstr *PrevDef = MRI.getVRegDef(PrevReg);
2188 MachineInstr *Def = MRI.getVRegDef(Reg);
2194 Def = MRI.getVRegDef(Def->getOperand(i).getReg());
2248 MachineInstr *Def = MRI.getVRegDef(BaseOpS->getReg());
2254 MachineInstr *LoopDef = MRI.getVRegDef(LoopVal);
2599 SUnit *UseSU = SSD->getSUnit(MRI.getVRegDef(LoopVal));
2622 MachineInstr *Phi = MRI.getVRegDef(MO.getReg());
lib/CodeGen/MachineSSAUpdater.cpp 329 return InstrIsPHI(Updater->MRI->getVRegDef(Val));
lib/CodeGen/MachineSink.cpp 217 MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
459 MachineInstr *DefMI = MRI->getVRegDef(Reg);
lib/CodeGen/MachineTraceMetrics.cpp 770 const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg);
1031 unsigned &Height = Heights[MTM.MRI->getVRegDef(LI.Reg)];
1135 const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg);
lib/CodeGen/ModuloSchedule.cpp 399 int LoopValStage = Schedule.getStage(MRI.getVRegDef(LoopVal));
450 MachineInstr *InstOp1 = MRI.getVRegDef(PhiOp1);
458 InstOp1 = MRI.getVRegDef(PhiOp1);
472 if (MachineInstr *InstOp1 = MRI.getVRegDef(PhiOp1))
476 MachineInstr *PhiInst = MRI.getVRegDef(LoopVal);
643 if (MachineInstr *InstOp2 = MRI.getVRegDef(PhiOp2))
654 if (MachineInstr *InstOp1 = MRI.getVRegDef(PhiOp1)) {
800 MachineInstr *MI = MRI.getVRegDef(LCDef);
925 MachineInstr *BaseDef = MRI.getVRegDef(BaseReg);
928 BaseDef = MRI.getVRegDef(BaseReg);
1039 MachineInstr *Def = MRI.getVRegDef(reg);
1060 MachineInstr *Def = MRI.getVRegDef(Reg);
1066 Def = MRI.getVRegDef(Def->getOperand(i).getReg());
1079 MachineInstr *LoopInst = MRI.getVRegDef(LoopVal);
1116 unsigned PhiStage = (unsigned)Schedule.getStage(MRI.getVRegDef(PhiDef));
1117 unsigned LoopStage = (unsigned)Schedule.getStage(MRI.getVRegDef(LoopVal));
1198 MachineInstr *Use = MRI.getVRegDef(LoopVal);
1472 MachineInstr *MI = MRI.getVRegDef(R);
1530 MachineInstr *MI = MRI.getVRegDef(MO->getReg());
1563 MRI.getVRegDef(MO->getReg())->getParent() == BB;
lib/CodeGen/OptimizePHIs.cpp 115 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg);
122 SrcMI = MRI->getVRegDef(SrcReg);
lib/CodeGen/PHIElimination.cpp 410 if (MachineInstr *DefMI = MRI->getVRegDef(SrcReg))
lib/CodeGen/PeepholeOptimizer.cpp 422 Def = MRI.getVRegDef(Reg);
lib/CodeGen/RegisterCoalescer.cpp 2033 CopyMI = MRI->getVRegDef(SrcReg);
2052 MachineInstr &DestMI = *MRI->getVRegDef(SrcReg);
lib/CodeGen/SelectionDAG/FastISel.cpp 470 LastLocalValue = MRI.getVRegDef(Reg);
lib/CodeGen/SelectionDAG/InstrEmitter.cpp 510 DefMI = MRI->getVRegDef(Reg);
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp 578 MachineInstr *Def = RegInfo->getVRegDef(Reg);
593 MachineInstr *Def = RegInfo->getVRegDef(LDI->second);
lib/CodeGen/TailDuplicator.cpp 192 MachineInstr *DefMI = MRI->getVRegDef(VReg);
lib/CodeGen/TargetRegisterInfo.cpp 498 const MachineInstr *MI = MRI->getVRegDef(SrcReg);
lib/Target/AArch64/AArch64InstrInfo.cpp 419 const MachineInstr *DefMI = MRI.getVRegDef(VReg);
437 const MachineInstr *DefMI = MRI.getVRegDef(VReg);
4790 MachineInstr *DefMI = MRI->getVRegDef(VReg);
4799 DefMI = MRI->getVRegDef(CopyVReg);
lib/Target/AArch64/AArch64InstructionSelector.cpp 957 MachineInstr *CCMI = MRI.getVRegDef(CondReg);
959 CCMI = MRI.getVRegDef(CCMI->getOperand(1).getReg());
1178 auto *AmtMI = MRI.getVRegDef(ShiftReg);
1765 auto *PtrMI = MRI.getVRegDef(PtrReg);
1776 PtrMI = MRI.getVRegDef(Ptr2Reg);
3401 MachineInstr *CondDef = MRI.getVRegDef(I.getOperand(1).getReg());
3418 CondDef = MRI.getVRegDef(CondDef->getOperand(1).getReg());
4286 MachineInstr *Gep = MRI.getVRegDef(Root.getReg());
4350 MachineInstr *RootDef = MRI.getVRegDef(Root.getReg());
4357 MachineInstr *RHS = MRI.getVRegDef(OffImm.getReg());
4391 MachineInstr *RootDef = MRI.getVRegDef(Root.getReg());
4405 MachineInstr *LHSDef = MRI.getVRegDef(LHS.getReg());
4406 MachineInstr *RHSDef = MRI.getVRegDef(RHS.getReg());
4467 MachineInstr *ShiftInst = MRI.getVRegDef(Root.getReg());
4618 MachineInstr *ExtInst = MRI.getVRegDef(ExtReg);
lib/Target/AArch64/AArch64LegalizerInfo.cpp 668 auto *CstMI = MRI.getVRegDef(AmtReg);
lib/Target/AArch64/AArch64RegisterBankInfo.cpp 699 MachineInstr *DefMI = MRI.getVRegDef(VReg);
749 MachineInstr *DefMI = MRI.getVRegDef(VReg);
823 MachineInstr *DefMI = MRI.getVRegDef(VReg);
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp 1783 MachineInstr *MI = MRI->getVRegDef(Src);
1788 MI = MRI->getVRegDef(Src);
1963 const MachineInstr *OpDef = MRI->getVRegDef(Root.getReg());
2043 if (const MachineInstr *RootDef = MRI->getVRegDef(Root.getReg())) {
2047 const MachineInstr *LHSDef = MRI->getVRegDef(LHS.getReg());
2048 const MachineInstr *RHSDef = MRI->getVRegDef(RHS.getReg());
2137 const MachineInstr *RootDef = MRI->getVRegDef(Root.getReg());
2149 const MachineInstr *LHSDef = MRI->getVRegDef(LHS.getReg());
2150 const MachineInstr *RHSDef = MRI->getVRegDef(RHS.getReg());
lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp 1818 if (!MRI.getVRegDef(LiveIn)) {
lib/Target/AMDGPU/R600ISelLowering.cpp 340 MachineInstr * defInstr = MRI.getVRegDef(maskedRegister);
lib/Target/AMDGPU/SIFixSGPRCopies.cpp 641 MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
719 MachineInstr *DefMI = MRI->getVRegDef(MO->getReg());
812 MachineInstr *Def = MRI->getVRegDef(InputReg);
lib/Target/AMDGPU/SIFoldOperands.cpp 951 MachineInstr *Def = MRI.getVRegDef(Op.getReg());
1300 MachineInstr *Def = MRI->getVRegDef(ClampSrc->getReg());
1424 MachineInstr *Def = MRI->getVRegDef(RegOp->getReg());
lib/Target/AMDGPU/SIInstrInfo.cpp 4295 MachineInstr *Def = MRI.getVRegDef(OpReg);
6423 auto *DefInst = MRI.getVRegDef(RSR.Reg);
6434 DefInst = MRI.getVRegDef(RSR.Reg);
6442 DefInst = MRI.getVRegDef(RSR.Reg);
lib/Target/ARC/ARCOptAddrMode.cpp 408 MachineInstr *OpDef = MRI->getVRegDef(O.getReg());
lib/Target/ARM/A15SDOptimizer.cpp 157 MachineInstr *MI = MRI->getVRegDef(SReg);
252 MachineInstr *DPRMI = MRI->getVRegDef(MI->getOperand(1).getReg());
253 MachineInstr *SPRMI = MRI->getVRegDef(MI->getOperand(2).getReg());
304 MachineInstr *Def = MRI->getVRegDef(OpReg);
347 MachineInstr *Def = MRI->getVRegDef(MI->getOperand(1).getReg());
376 MachineInstr *NewMI = MRI->getVRegDef(Reg);
384 MachineInstr *NewMI = MRI->getVRegDef(MI->getOperand(1).getReg());
607 MachineInstr *Def = MRI->getVRegDef(*I);
lib/Target/ARM/ARMBaseInstrInfo.cpp 1809 MachineInstr *Def0 = MRI->getVRegDef(Addr0);
1810 MachineInstr *Def1 = MRI->getVRegDef(Addr1);
2183 MachineInstr *MI = MRI.getVRegDef(Reg);
lib/Target/ARM/ARMISelLowering.cpp 2517 MachineInstr *Def = MRI->getVRegDef(VR);
lib/Target/ARM/MLxExpansionPass.cpp 94 MachineInstr *DefMI = MRI->getVRegDef(Reg);
101 DefMI = MRI->getVRegDef(Reg);
107 DefMI = MRI->getVRegDef(Reg);
146 MachineInstr *DefMI = MRI->getVRegDef(Reg);
157 DefMI = MRI->getVRegDef(SrcReg);
165 DefMI = MRI->getVRegDef(Reg);
171 DefMI = MRI->getVRegDef(Reg);
lib/Target/BPF/BPFMIPeephole.cpp 80 MachineInstr *DefInsn = MRI->getVRegDef(MovMI->getOperand(1).getReg());
95 MachineInstr *PhiDef = MRI->getVRegDef(opnd.getReg());
140 MachineInstr *SllMI = MRI->getVRegDef(ShfReg);
154 MachineInstr *MovMI = MRI->getVRegDef(SllMI->getOperand(1).getReg());
380 MI2 = MRI->getVRegDef(SrcReg);
390 DefMI = MRI->getVRegDef(SrcReg);
397 DefMI = MRI->getVRegDef(SrcReg);
423 MachineInstr *PhiDef = MRI->getVRegDef(opnd.getReg());
lib/Target/Hexagon/HexagonBitSimplify.cpp 2263 MachineInstr *DefS = MRI.getVRegDef(S);
2287 MachineInstr *DefI = MRI.getVRegDef(Op0.getReg());
2659 MachineInstr *InpDef = MRI.getVRegDef(SR.Reg);
3274 const MachineInstr *DefPrehR = MRI->getVRegDef(F->PR.Reg);
lib/Target/Hexagon/HexagonConstExtenders.cpp 1504 const MachineInstr *DefI = Rs.isVReg() ? MRI->getVRegDef(Rs.Reg) : nullptr;
lib/Target/Hexagon/HexagonEarlyIfConv.cpp 407 const MachineInstr *DefI = MRI->getVRegDef(R);
479 const MachineInstr *Def1 = MRI->getVRegDef(RA.getReg());
480 const MachineInstr *Def3 = MRI->getVRegDef(RB.getReg());
lib/Target/Hexagon/HexagonGenInsert.cpp 1020 const MachineInstr *DefI = MRI->getVRegDef(R);
1072 MachineInstr *DefVR = MRI->getVRegDef(VR);
1153 const MachineInstr *DefV = MRI->getVRegDef(VR);
1157 const MachineInstr *DefS = MRI->getVRegDef(SR);
1158 const MachineInstr *DefI = MRI->getVRegDef(IR);
1346 const MachineInstr *DefI = MRI->getVRegDef(I->first);
1410 MachineInstr *MI = MRI->getVRegDef(I->first);
1444 MachineInstr *DefI = MRI->getVRegDef(I->first);
lib/Target/Hexagon/HexagonGenPredicate.cpp 232 MachineInstr *DefI = MRI->getVRegDef(Reg.R);
254 MachineInstr *DefI = MRI->getVRegDef(Reg.R);
328 const MachineInstr *DefI = MRI->getVRegDef(PR.R);
lib/Target/Hexagon/HexagonHardwareLoops.cpp 439 MachineInstr *DI = MRI->getVRegDef(PhiOpReg);
447 if (MRI->getVRegDef(IndReg) == Phi && checkForImmediate(Opnd2, V)) {
465 MachineInstr *PredI = MRI->getVRegDef(PredR);
501 IVOp = MRI->getVRegDef(F->first);
604 MachineInstr *IV_Phi = MRI->getVRegDef(IVReg);
650 MachineInstr *CondI = MRI->getVRegDef(PredReg);
698 MachineBasicBlock *DefBB = MRI->getVRegDef(R)->getParent();
704 OldInsts.push_back(MRI->getVRegDef(R));
708 MachineBasicBlock *DefBB = MRI->getVRegDef(R)->getParent();
714 OldInsts.push_back(MRI->getVRegDef(R));
737 const MachineInstr *StartValInstr = MRI->getVRegDef(Start->getReg());
743 const MachineInstr *EndValInstr = MRI->getVRegDef(End->getReg());
928 const MachineInstr *EndValInstr = MRI->getVRegDef(End->getReg());
1212 MachineInstr *TCDef = MRI->getVRegDef(TripCount->getReg());
1376 MachineInstr *Def = MRI->getVRegDef(MO->getReg());
1437 MachineInstr *Def = MRI->getVRegDef(Reg);
1514 MachineInstr *DI = MRI->getVRegDef(R);
1586 MachineInstr *DI = MRI->getVRegDef(R);
1638 MachineInstr *DI = MRI->getVRegDef(PhiReg);
1646 if (MRI->getVRegDef(IndReg) == Phi && checkForImmediate(Opnd2, V)) {
1706 MachineInstr *PredDef = MRI->getVRegDef(P);
1771 << ") = " << *(MRI->getVRegDef(I->first)));
1775 IndI = MRI->getVRegDef(I->first);
1779 << ") = " << *(MRI->getVRegDef(MO.getReg())));
1783 nonIndI = MRI->getVRegDef(MO.getReg());
1827 MachineInstr *BumpI = MRI->getVRegDef(I->first);
lib/Target/Hexagon/HexagonNewValueJump.cpp 294 MachineInstr *def = MRI.getVRegDef(cmpOp2);
lib/Target/Hexagon/HexagonSplitDouble.cpp 235 MachineInstr *DefI = MRI->getVRegDef(R);
405 const MachineInstr *DefI = MRI->getVRegDef(Reg);
427 MachineInstr *DefI = MRI->getVRegDef(DR);
508 const MachineInstr *CmpI = MRI->getVRegDef(PR);
510 CmpI = MRI->getVRegDef(CmpI->getOperand(1).getReg());
1139 MachineInstr *DefI = MRI->getVRegDef(DR);
lib/Target/Hexagon/HexagonVExtract.cpp 77 MachineInstr *DI = MRI.getVRegDef(ExtIdxR);
127 MachineInstr *DefI = MRI.getVRegDef(VecR);
lib/Target/Lanai/LanaiInstrInfo.cpp 463 MachineInstr *MI = MRI.getVRegDef(Reg);
lib/Target/Mips/MipsInstructionSelector.cpp 401 MachineInstr *Addr = MRI.getVRegDef(I.getOperand(1).getReg());
403 MachineInstr *Offset = MRI.getVRegDef(Addr->getOperand(2).getReg());
lib/Target/Mips/MipsOptimizePICCall.cpp 281 MachineInstr *DefMI = MRI.getVRegDef(Reg);
lib/Target/Mips/MipsRegisterBankInfo.cpp 190 MachineInstr *DefMI = MRI.getVRegDef(Reg);
216 Ret = MRI.getVRegDef(Ret->getOperand(1).getReg());
lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp 140 MachineInstr &TexHandleDef = *MRI.getVRegDef(Op.getReg());
lib/Target/PowerPC/PPCBranchCoalescing.cpp 361 MachineInstr *Op1Def = MRI->getVRegDef(Op1.getReg());
362 MachineInstr *Op2Def = MRI->getVRegDef(Op2.getReg());
461 MachineInstr *DefInst = MRI->getVRegDef(Use.getReg());
lib/Target/PowerPC/PPCInstrInfo.cpp 2359 DefMI = MRI->getVRegDef(TrueReg);
4055 const MachineInstr *SrcMI = MRI->getVRegDef(SrcReg);
4079 const MachineInstr *SrcMI = MRI->getVRegDef(SrcReg);
4108 const MachineInstr *SrcMI = MRI->getVRegDef(SrcReg);
4135 const MachineInstr *MISrc1 = MRI->getVRegDef(SrcReg1);
4136 const MachineInstr *MISrc2 = MRI->getVRegDef(SrcReg2);
lib/Target/PowerPC/PPCMIPeephole.cpp 155 return MRI->getVRegDef(Reg);
348 MachineInstr *DefMI = MRI->getVRegDef(TrueReg1);
361 MachineInstr *LoadMI = MRI->getVRegDef(DefReg);
448 MachineInstr *DefMI = MRI->getVRegDef(TrueReg);
458 MachineInstr *Splt = MRI->getVRegDef(ConvReg);
511 MachineInstr *DefMI = MRI->getVRegDef(TrueReg);
523 MachineInstr *P1 = MRI->getVRegDef(DefsReg1);
524 MachineInstr *P2 = MRI->getVRegDef(DefsReg2);
572 MachineInstr *SrcMI = MRI->getVRegDef(NarrowReg);
616 MachineInstr *SrcMI = MRI->getVRegDef(NarrowReg);
685 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg);
691 ImpDefMI = MRI->getVRegDef(SrcMI->getOperand(1).getReg());
692 SubRegMI = MRI->getVRegDef(SrcMI->getOperand(2).getReg());
699 SrcMI = MRI->getVRegDef(CopyReg);
921 MachineInstr *Inst = MRI->getVRegDef(SrcReg);
955 MachineInstr *CMPI = MRI->getVRegDef(CndReg);
1013 MachineInstr *CMPI = MRI->getVRegDef(BI->getOperand(1).getReg());
1016 MachineInstr *Inst = MRI->getVRegDef(CMPI->getOperand(I).getReg());
1112 MachineInstr *CMPI1 = MRI->getVRegDef(BI1->getOperand(1).getReg());
1115 MachineInstr *CMPI2 = MRI->getVRegDef(BI2->getOperand(1).getReg());
1282 MachineInstr *Inst = MRI->getVRegDef(CMPI2->getOperand(I).getReg());
1339 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg);
1419 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg);
lib/Target/PowerPC/PPCReduceCRLogicals.cpp 67 MachineInstr *DefMI = MRI->getVRegDef(MI.getOperand(i - 1).getReg());
540 MachineInstr *Copy = MRI->getVRegDef(Reg);
564 return MRI->getVRegDef(CopySrc);
lib/Target/PowerPC/PPCVSXSwapRemoval.cpp 557 MachineInstr *MI = MRI->getVRegDef(SrcReg);
617 MachineInstr* DefMI = MRI->getVRegDef(Reg);
699 MachineInstr *DefMI = MRI->getVRegDef(UseReg);
776 MachineInstr *DefMI = MRI->getVRegDef(UseReg);
lib/Target/RISCV/RISCVMergeBaseOffset.cpp 146 MachineInstr &OffsetTail = *MRI->getVRegDef(Reg);
155 *MRI->getVRegDef(OffsetTail.getOperand(1).getReg());
lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp 173 MachineInstr *Def = MRI.getVRegDef(Reg);
lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp 77 MachineInstr *Def = MRI.getVRegDef(Cond);
lib/Target/X86/X86CallFrameOptimization.cpp 618 MachineInstr &DefMI = *MRI->getVRegDef(Reg);
lib/Target/X86/X86DomainReassignment.cpp 559 MachineInstr *DefMI = MRI->getVRegDef(CurReg);
lib/Target/X86/X86FlagsCopyLowering.cpp 370 MachineInstr &CopyDefI = *MRI->getVRegDef(VOp.getReg());
lib/Target/X86/X86ISelLowering.cpp 4237 MachineInstr *Def = MRI->getVRegDef(VR);
lib/Target/X86/X86InstrInfo.cpp 3838 DefMI = MRI->getVRegDef(FoldAsLoadDefReg);
lib/Target/X86/X86InstructionSelector.cpp 533 X86SelectAddress(*MRI.getVRegDef(I.getOperand(1).getReg()), MRI, AM);
1095 MachineInstr *Def = MRI.getVRegDef(CarryInReg);
1098 Def = MRI.getVRegDef(CarryInReg);
1290 if (Index == 0 && MRI.getVRegDef(SrcReg)->isImplicitDef()) {
unittests/CodeGen/GlobalISel/CSETest.cpp 64 EXPECT_EQ(&*MIBCst, MRI->getVRegDef(Splat0->getOperand(1).getReg()));
69 EXPECT_EQ(&*MIBFP0, MRI->getVRegDef(FSplat->getOperand(1).getReg()));
unittests/CodeGen/GlobalISel/KnownBitsTest.cpp 20 MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
40 MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
68 MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
84 MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
111 MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);