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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
include/llvm/CodeGen/MachineInstr.h 880 return mayLoad(Type) || mayStore(Type);
include/llvm/CodeGen/ScheduleDAG.h 387 ((SU->getInstr()->mayStore() && this->getInstr()->mayLoad()) ? 1 : 0);
include/llvm/CodeGen/TargetInstrInfo.h 1624 assert((MIa.mayLoad() || MIa.mayStore()) &&
1626 assert((MIb.mayLoad() || MIb.mayStore()) &&
lib/CodeGen/BranchFolding.cpp 503 else if (I->mayLoad() || I->mayStore())
872 if (MBBICommon->mayLoad() || MBBICommon->mayStore())
lib/CodeGen/ImplicitNullChecks.cpp 327 if (!(PrevMI->mayStore() || PrevMI->mayLoad()))
330 if (!(MI.mayStore() || PrevMI->mayStore()))
330 if (!(MI.mayStore() || PrevMI->mayStore()))
335 return MI.mayStore() ? AR_WillAliasEverything : AR_MayAlias;
337 return PrevMI->mayStore() ? AR_WillAliasEverything : AR_MayAlias;
374 if (!((MI.mayLoad() || MI.mayStore()) && !MI.isPredicable() &&
633 MI->mayStore() ? FaultMaps::FaultingLoadStore : FaultMaps::FaultingLoad;
lib/CodeGen/InlineSpiller.cpp 451 if (!MI.isCopy() && !MI.mayStore())
lib/CodeGen/LiveRangeShrink.cpp 134 if (MI.mayStore())
lib/CodeGen/MIRVRegNamerUtils.cpp 71 if (!MI->mayStore() && !MI->isBranch() && !DoesMISideEffect)
275 if (candidate->mayStore() || candidate->isBranch())
290 if (!candidate->mayStore() && !candidate->isBranch())
lib/CodeGen/MachineCSE.cpp 405 if (MI->mayStore() || MI->isCall() || MI->isTerminator() ||
lib/CodeGen/MachineInstr.cpp 1168 if (mayStore() || isCall() || isPHI() ||
1199 if (!mayStore() && !Other.mayStore())
1199 if (!mayStore() && !Other.mayStore())
1289 if (!mayStore() &&
1381 return mayStore() || isCall() || hasUnmodeledSideEffects();
lib/CodeGen/MachineLICM.cpp 377 if (!MI->mayStore())
917 if (!MI.mayStore() || MI.hasUnmodeledSideEffects() ||
970 if (UseMI.mayStore() && isInvariantStore(UseMI, TRI, MRI))
1445 if (MI->mayStore())
lib/CodeGen/MachinePipeliner.cpp 677 } else if (MI.mayStore()) {
1175 if (!SUnits[i].getInstr()->mayStore() ||
2229 if (!DI->mayStore() || !SI->mayLoad())
lib/CodeGen/MachineScheduler.cpp 1604 (!IsLoad && !SU.getInstr()->mayStore()))
lib/CodeGen/MachineVerifier.cpp 1508 if ((*I)->isStore() && !MI->mayStore())
1834 bool stores = MI->mayStore();
lib/CodeGen/ScheduleDAGInstrs.cpp 919 if (!MI.mayStore() &&
934 if (MI.mayStore()) {
lib/CodeGen/StackColoring.cpp 1006 bool TouchesMemory = I.mayLoad() || I.mayStore();
1090 if (!I.mayLoad() && !I.mayStore())
lib/CodeGen/TargetInstrInfo.cpp 587 NewMI->mayStore()) &&
909 if (MI.isNotDuplicable() || MI.mayStore() || MI.mayRaiseFPException() ||
lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp 1083 if (!MIa.mayStore() && !MIb.mayStore())
1083 if (!MIa.mayStore() && !MIb.mayStore())
1135 if (MI.mayStore() && isMatchingStore(LoadMI, MI) &&
1155 if (MI.mayStore() && mayAlias(LoadMI, MI, AA))
lib/Target/AArch64/AArch64RegisterInfo.cpp 349 if (!MI->mayLoad() && !MI->mayStore())
lib/Target/AMDGPU/AMDGPUSubtarget.cpp 730 if (!MI2.mayLoad() && !MI2.mayStore()) {
lib/Target/AMDGPU/GCNHazardRecognizer.cpp 188 if ((MI->mayLoad() || MI->mayStore()) && checkMAILdStHazards(MI) > 0)
299 if (MI->mayLoad() || MI->mayStore())
527 if (MEM->mayStore())
670 if (!MI.mayStore())
lib/Target/AMDGPU/SIAddIMGInit.cpp 78 if (TII->isMIMG(Opcode) && !MI.mayStore()) {
lib/Target/AMDGPU/SIFormMemoryClauses.cpp 112 if (!MI.mayLoad() || MI.mayStore())
lib/Target/AMDGPU/SIInsertWaitcnts.cpp 538 if (TII->isDS(Inst) && (Inst.mayStore() || Inst.mayLoad())) {
547 if (Inst.mayStore()) {
579 if (Inst.mayStore()) {
591 if (Inst.mayStore()) {
600 if (Inst.mayStore()) {
604 if (Inst.mayStore()) {
656 if (TII->isDS(Inst) && Inst.mayStore()) {
1010 if (MI.mayStore()) {
1212 assert(Inst.mayLoad() || Inst.mayStore());
1245 (TII->isMIMG(Inst) && !Inst.mayLoad() && !Inst.mayStore()))
1247 else if (Inst.mayStore())
1251 (Inst.mayStore() || AMDGPU::getAtomicNoRetOp(Inst.getOpcode()) != -1)) {
lib/Target/AMDGPU/SIInstrInfo.cpp 301 assert(LdSt.mayStore());
2545 assert((MIa.mayLoad() || MIa.mayStore()) &&
2547 assert((MIb.mayLoad() || MIb.mayStore()) &&
2752 if (MI.mayStore() && isSMRD(MI))
3391 if (isMIMG(MI.getOpcode()) && !MI.mayStore()) {
3623 if (MI.mayStore()) {
5956 if (!MI.mayStore())
lib/Target/AMDGPU/SILoadStoreOptimizer.cpp 578 return !(A->mayStore() || B->mayStore()) || !A->mayAlias(AA, *B, true);
578 return !(A->mayStore() || B->mayStore()) || !A->mayAlias(AA, *B, true);
1520 if (!(MI.mayLoad() ^ MI.mayStore()))
lib/Target/AMDGPU/SIMemoryLegalizer.cpp 579 if (!(MI->mayLoad() && !MI->mayStore()))
593 if (!(!MI->mayLoad() && MI->mayStore()))
640 if (!(MI->mayLoad() && MI->mayStore()))
669 assert(MI->mayLoad() && !MI->mayStore());
703 assert(MI->mayLoad() ^ MI->mayStore());
903 assert(MI->mayLoad() && !MI->mayStore());
944 assert(MI->mayLoad() ^ MI->mayStore());
1137 assert(MI->mayLoad() && !MI->mayStore());
1182 assert(!MI->mayLoad() && MI->mayStore());
1247 assert(MI->mayLoad() && MI->mayStore());
lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp 349 if (I->mayStore() || I->isBarrier() || I->isCall() ||
lib/Target/AMDGPU/SIRegisterInfo.cpp 559 bool IsStore = MI->mayStore();
582 bool IsStore = MI->mayStore();
lib/Target/AMDGPU/SIWholeQuadMode.cpp 435 (MI.isTerminator() || (TII->usesVM_CNT(MI) && MI.mayStore()))) {
lib/Target/ARC/ARCInstrInfo.cpp 427 if (!MI.mayLoad() && !MI.mayStore())
lib/Target/ARC/ARCOptAddrMode.cpp 188 assert((Ldst.mayLoad() || Ldst.mayStore()) && "LD/ST instruction expected");
294 if (Ldst->mayStore() && Ldst->getOperand(0).isReg()) {
394 bool IsStore = Ldst->mayStore();
398 if (MI->mayStore() || MI->isCall() || MI->isInlineAsm() ||
422 bool IsStore = Ldst->mayStore();
429 if (MI->mayStore() || MI->isCall() || MI->isInlineAsm() ||
443 bool IsStore = Ldst.mayStore();
472 if (!MI->mayLoad() && !MI->mayStore())
lib/Target/ARM/ARMAsmPrinter.cpp 1092 if (MI->mayStore()) {
lib/Target/ARM/ARMBaseInstrInfo.cpp 171 bool isLoad = !MI.mayStore();
1258 if (MI.mayStore() && hasStoreToStackSlot(MI, Accesses) &&
lib/Target/ARM/ARMFrameLowering.cpp 1311 assert(MI->mayStore() && "Expecting spill instruction");
1317 assert(MI->mayStore() && "Expecting spill instruction");
1321 assert(MI->mayStore() && "Expecting spill instruction");
lib/Target/ARM/ARMHazardRecognizer.cpp 23 if (MI->mayStore())
lib/Target/ARM/ARMLoadStoreOptimizer.cpp 2116 if (I->mayStore() || (!isLd && I->mayLoad()))
lib/Target/ARM/ARMOptimizeBarriersPass.cpp 44 MI->mayStore() ||
lib/Target/ARM/MLxExpansionPass.cpp 186 if (MI->mayStore())
lib/Target/ARM/ThumbRegisterInfo.cpp 535 } else if (MI.mayStore()) {
lib/Target/Hexagon/HexagonBitSimplify.cpp 2713 if (MI->mayStore()) {
lib/Target/Hexagon/HexagonConstExtenders.cpp 1112 if (!ED.UseMI->mayLoad() && !ED.UseMI->mayStore())
1146 bool IsStore = MI.mayStore();
1641 if ((MI.mayLoad() || MI.mayStore()) && !isStoreImmediate(ExtOpc)) {
1685 if (MI.mayStore())
1796 if (MI.mayLoad() || MI.mayStore()) {
1811 if (MI.mayStore())
1846 if (MI.mayLoad() || MI.mayStore()) {
1940 assert(MI.mayStore());
lib/Target/Hexagon/HexagonEarlyIfConv.cpp 680 return MI->mayStore() && HII->isPredicable(const_cast<MachineInstr&>(*MI));
685 if (MI->mayLoad() || MI->mayStore())
lib/Target/Hexagon/HexagonExpandCondsets.cpp 724 if (MI->hasUnmodeledSideEffects() || MI->mayStore())
821 bool IsLoad = TheI.mayLoad(), IsStore = TheI.mayStore();
838 bool L = MI->mayLoad(), S = MI->mayStore();
1043 if (DefI->mayLoad() || DefI->mayStore())
lib/Target/Hexagon/HexagonFrameLowering.cpp 2249 assert(SI.mayStore() && "Unexpected start instruction");
lib/Target/Hexagon/HexagonHazardRecognizer.cpp 157 if (TII->isHVXVec(*MI) && !MI->mayLoad() && !MI->mayStore())
lib/Target/Hexagon/HexagonInstrInfo.cpp 2148 if (MI.mayLoad() || MI.mayStore() || MI.isCompare())
2221 if (!I.mayLoad() && !I.mayStore())
2953 if (Second.mayStore() && First.getOpcode() == Hexagon::S2_allocframe) {
3050 if (MI.mayStore() && !Subtarget.useNewValueStores())
3198 } else if (MI.mayStore()) {
lib/Target/Hexagon/HexagonNewValueJump.cpp 202 if (MII->mayStore())
lib/Target/Hexagon/HexagonSplitDouble.cpp 162 if (MI->mayLoad() || MI->mayStore())
lib/Target/Hexagon/HexagonStoreWidening.cpp 273 if (MI->mayLoad() || MI->mayStore()) {
lib/Target/Hexagon/HexagonSubtarget.cpp 148 bool IsStoreMI1 = MI1.mayStore();
158 if ((IsStoreMI1 && MI2.mayStore()) || (IsLoadMI1 && MI2.mayLoad())) {
274 if (!L0.mayLoad() || L0.mayStore() ||
287 if (!L1.mayLoad() || L1.mayStore() ||
lib/Target/Hexagon/HexagonVLIWPacketizer.cpp 357 if (HII->isHVXVec(MI) && MI.mayStore())
666 if (PacketSU->getInstr()->mayStore())
1109 if (HII.isNewValueStore(MI) && MJ.mayStore())
1288 bool StoreI = I.mayStore(), StoreJ = J.mayStore();
1288 bool StoreI = I.mayStore(), StoreJ = J.mayStore();
1373 if (PI->getOpcode() == Hexagon::S2_allocframe || PI->mayStore() ||
1515 bool LoadJ = J.mayLoad(), StoreJ = J.mayStore();
1516 bool LoadI = I.mayLoad(), StoreI = I.mayStore();
1680 if (MJ->mayStore() && !HII->isNewValueStore(*MJ))
lib/Target/Hexagon/HexagonVectorPrint.cpp 116 if (MI.mayStore() && MI.getNumOperands() >= 3 && MI.getOperand(2).isReg()) {
122 if (MI.mayStore() && MI.getNumOperands() >= 4 && MI.getOperand(3).isReg()) {
lib/Target/Hexagon/RDFDeadCode.cpp 59 if (MI->mayStore() || MI->isBranch() || MI->isCall() || MI->isReturn())
lib/Target/Lanai/LanaiDelaySlotFiller.cpp 192 if (MI->mayStore()) {
lib/Target/Mips/MipsDelaySlotFiller.cpp 452 if (!MI.mayStore() && !MI.mayLoad())
461 SeenStore |= MI.mayStore();
474 if (MI.mayStore())
500 HasHazard |= updateDefsUses(VT, MI.mayStore());
505 HasHazard = MI.mayStore() && (OrigSeenLoad || OrigSeenStore);
509 SeenNoObjStore |= MI.mayStore();
lib/Target/Sparc/DelaySlotFiller.cpp 243 if (candidate->mayStore()) {
lib/Target/SystemZ/SystemZInstrInfo.cpp 84 if (MI->mayStore()) {
lib/Target/WebAssembly/WebAssemblyRegStackify.cpp 182 if (MI.mayStore()) {
lib/Target/X86/X86CallFrameOptimization.cpp 332 if (MI->isCall() || MI->mayStore())
lib/Target/X86/X86FlagsCopyLowering.cpp 724 if (Cond != X86::COND_INVALID && !MI.mayStore() &&
1026 if (!SetCCI.mayStore()) {