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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
include/llvm/CodeGen/LiveRegUnits.h 119 if (Units.test(*Unit))
include/llvm/CodeGen/MachineRegisterInfo.h 880 return !reservedRegsFrozen() || ReservedRegs.test(PhysReg);
898 return getReservedRegs().test(PhysReg.id());
lib/CodeGen/AggressiveAntiDepBreaker.cpp 180 if (!IsReturnBlock && !Pristine.test(Reg))
674 if (!RenameRegisterMap[Reg].test(NewReg)) {
865 } else if (ExcludeRegs && ExcludeRegs->test(AntiDepReg)) {
lib/CodeGen/BranchFolding.cpp 243 if (!JTIsLive.test(i)) {
lib/CodeGen/CriticalAntiDepBreaker.cpp 90 if (!IsReturnBlock && !Pristine.test(Reg))
243 if (!KeepRegs.test(Reg)) {
285 bool Keep = KeepRegs.test(Reg);
565 else if (KeepRegs.test(AntiDepReg))
lib/CodeGen/DeadMachineInstructionElim.cpp 81 if (LivePhysRegs.test(Reg) || MRI->isReserved(Reg))
lib/CodeGen/DetectDeadLanes.cpp 113 if (WorklistMembers.test(RegIdx))
215 if (DefinedByCopy.test(MORegIdx))
292 if (!DefinedByCopy.test(DefRegIdx))
477 if (!DefinedByCopy.test(DefRegIdx))
lib/CodeGen/EarlyIfConversion.cpp 397 if (ClobberedRegUnits.test(*Units))
lib/CodeGen/GlobalISel/RegisterBank.cpp 62 return ContainedRegClasses.test(RC.getID());
lib/CodeGen/GlobalMerge.cpp 354 if (UsedGlobalSets[UGSIdx].Globals.test(GI)) {
lib/CodeGen/LiveDebugValues.cpp 1008 if (CalleeSavedRegs.test(*RAI))
lib/CodeGen/LiveRangeCalc.cpp 232 assert(Seen.test(MBB->getNumber()));
388 if (Seen.test(Pred->getNumber())) {
503 bool needPHI = !IDom || !Seen.test(IDom->getBlock()->getNumber());
lib/CodeGen/LiveRegMatrix.cpp 160 return !RegMaskUsable.empty() && (!PhysReg || !RegMaskUsable.test(PhysReg));
lib/CodeGen/MachineLICM.cpp 433 if (Reg && (PhysRegDefs.test(Reg) || PhysRegClobbers.test(Reg)))
433 if (Reg && (PhysRegDefs.test(Reg) || PhysRegClobbers.test(Reg)))
462 if (PhysRegDefs.test(*AS))
470 if (PhysRegClobbers.test(Reg))
550 if (!PhysRegClobbers.test(Def) && !TermRegs.test(Def)) {
550 if (!PhysRegClobbers.test(Def) && !TermRegs.test(Def)) {
557 if (PhysRegDefs.test(Reg) ||
558 PhysRegClobbers.test(Reg)) {
lib/CodeGen/MachinePipeliner.cpp 1167 if (!Added.test(N)) {
1180 if (!Added.test(N)) {
1189 if (!Added.test(OD.second)) {
1215 } else if (!Blocked.test(W)) {
1245 if (Blocked.test(W->NodeNum))
lib/CodeGen/MachineRegisterInfo.cpp 588 if (UsedPhysRegMask.test(PhysReg))
602 if (UsedPhysRegMask.test(PhysReg))
lib/CodeGen/MachineScheduler.cpp 1231 if (!ScheduledTrees.test(SubtreeID)) {
3480 if (ScheduledTrees->test(SchedTreeA) != ScheduledTrees->test(SchedTreeB))
3480 if (ScheduledTrees->test(SchedTreeA) != ScheduledTrees->test(SchedTreeB))
3481 return ScheduledTrees->test(SchedTreeB);
lib/CodeGen/MachineVerifier.cpp 216 return Reg < regsReserved.size() && regsReserved.test(Reg);
221 !regsReserved.test(Reg);
lib/CodeGen/ModuloSchedule.cpp 1726 if (RMIStage != -1 && !AvailableStages[MI->getParent()].test(RMIStage))
1738 LiveStages[MI->getParent()].test(Stage))
lib/CodeGen/PrologEpilogInserter.cpp 393 if (SavedRegs.test(Reg))
739 if (!StackBytesFree.test(FreeStart + Byte)) {
lib/CodeGen/RegAllocFast.cpp 267 if (MayLiveAcrossBlocks.test(Register::virtReg2Index(VirtReg))) {
296 if (MayLiveAcrossBlocks.test(Register::virtReg2Index(VirtReg)))
lib/CodeGen/RegAllocGreedy.cpp 1331 if (!Todo.test(Block))
1742 if (!Todo.test(Number))
lib/CodeGen/RegAllocPBQP.cpp 619 if (!RegMaskOverlaps.empty() && !RegMaskOverlaps.test(PReg))
lib/CodeGen/RegUsageInfoCollector.cpp 157 if (SavedRegs.test(PReg))
163 if (!SavedRegs.test(*AI))
170 if (UsedPhysRegsMask.test(PReg))
210 if (SavedRegs.test(Reg)) {
lib/CodeGen/RegisterClassInfo.cpp 113 if (Reserved.test(PhysReg))
lib/CodeGen/RegisterCoalescer.cpp 2012 !RegMaskUsable.test(DstReg)) {
lib/CodeGen/RegisterScavenging.cpp 351 if (Candidates.test(Survivor))
lib/CodeGen/SafeStackColoring.cpp 132 if (BlockInfo.End.test(M.AllocaNo))
136 if (BlockInfo.Begin.test(M.AllocaNo))
220 if (BlockInfo.LiveIn.test(AllocaNo)) {
232 assert(!Started.test(AllocaNo) || Start[AllocaNo] == BBStart);
233 if (!Started.test(AllocaNo)) {
239 assert(!Ended.test(AllocaNo));
240 if (Started.test(AllocaNo)) {
249 if (Started.test(AllocaNo))
303 if (!InterestingAllocas.test(I))
lib/CodeGen/ScheduleDAG.cpp 591 if (!Visited.test(s) && Node2Index[s] < UpperBound) {
633 if (!Visited.test(s) && Node2Index[s] < UpperBound) {
666 if (!VisitedBack.test(s) && Visited.test(s)) {
666 if (!VisitedBack.test(s) && Visited.test(s)) {
688 if (Visited.test(w)) {
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 5487 else if (!IsInPrologue && FuncInfo.DescribedArgs.test(ArgNo))
lib/CodeGen/SpillPlacement.cpp 228 if (ActiveNodes->test(n))
lib/CodeGen/SplitKit.h 206 bool isThroughBlock(unsigned MBB) const { return ThroughBlocks.test(MBB); }
lib/CodeGen/StackColoring.cpp 479 if (ConservativeSlots.test(Slot))
535 dbgs() << BV.test(I) << " ";
590 if (!InterestingSlots.test(Slot))
610 if (InterestingSlots.test(Slot) && applyFirstUse(Slot)) {
686 if (! BetweenStartEnd.test(Slot)) {
729 if (BlockInfo.Begin.test(Slot)) {
745 if (BlockInfo.End.test(Slot)) {
lib/DebugInfo/MSF/MSFBuilder.cpp 168 if (!FreeBlocks.test(Block))
328 (BI < Layout.SB->NumBlocks) ? Layout.FreePageMap.test(BI) : true;
lib/Target/AArch64/AArch64FrameLowering.cpp 2204 bool RegUsed = SavedRegs.test(Reg);
2219 !SavedRegs.test(PairedReg)) {
lib/Target/AMDGPU/GCNRegBankReassign.cpp 319 if (RegsUsed.test(Reg + I))
338 if (RegsUsed.test(StartBit + Reg + I))
lib/Target/AMDGPU/SILowerSGPRSpills.cpp 207 if (SavedRegs.test(Reg)) {
lib/Target/AMDGPU/SIRegisterInfo.h 216 return SGPRPressureSets.test(SetID) && !VGPRPressureSets.test(SetID) &&
216 return SGPRPressureSets.test(SetID) && !VGPRPressureSets.test(SetID) &&
217 !AGPRPressureSets.test(SetID);
220 return VGPRPressureSets.test(SetID) && !SGPRPressureSets.test(SetID) &&
220 return VGPRPressureSets.test(SetID) && !SGPRPressureSets.test(SetID) &&
221 !AGPRPressureSets.test(SetID);
224 return AGPRPressureSets.test(SetID) && !SGPRPressureSets.test(SetID) &&
224 return AGPRPressureSets.test(SetID) && !SGPRPressureSets.test(SetID) &&
225 !VGPRPressureSets.test(SetID);
lib/Target/ARM/ARMBaseRegisterInfo.cpp 213 if (Reserved.test(*SI))
224 return !getReservedRegs(MF).test(PhysReg);
lib/Target/ARM/ARMFrameLowering.cpp 831 assert(!MFI.getPristineRegs(MF).test(ARM::R4) &&
1619 if (!SavedRegs.test(ARM::D8 + NumSpills))
1708 if (SavedRegs.test(Reg)) {
1946 if (SavedRegs.test(Reg)) {
1962 if (SavedRegs.test(ARM::R7)) {
1976 if (SavedRegs.test(Reg)) {
1990 if (SavedRegs.test(ARM::LR)) {
2130 AFI->setLRIsSpilled(SavedRegs.test(ARM::LR));
lib/Target/ARM/Thumb1FrameLowering.cpp 515 assert(!MFI.getPristineRegs(MF).test(ARM::R4) &&
588 if (PopFriendly.test(Reg)) {
lib/Target/Hexagon/HexagonBitSimplify.cpp 129 return BitVector::test(Idx);
lib/Target/Hexagon/HexagonGenInsert.cpp 145 return BitVector::test(Idx);
lib/Target/Hexagon/HexagonISelLoweringHVX.cpp 462 if (!Used.test(I))
lib/Target/Hexagon/RDFGraph.cpp 1312 assert(!DoneDefs.test(R));
1340 if (!R || !Register::isPhysicalRegister(R) || DoneDefs.test(R))
1355 if (DoneClobbers.test(R))
lib/Target/Hexagon/RDFRegisters.cpp 247 if (Units.test(P.first))
262 if (!Units.test(P.first))
358 if (Units.test(P.first))
lib/Target/Mips/MipsDelaySlotFiller.cpp 336 assert(MF.getSubtarget().getRegisterInfo()->getAllocatableSet(MF).test(R) &&
446 if (RegSet.test(*AI))
lib/Target/PowerPC/PPCFrameLowering.cpp 1830 (SavedRegs.test(PPC::CR2) ||
1831 SavedRegs.test(PPC::CR3) ||
1832 SavedRegs.test(PPC::CR4))) {
lib/Target/PowerPC/PPCRegisterInfo.cpp 211 bool SaveR2 = !getReservedRegs(*MF).test(PPC::X2);
407 return (getReservedRegs(MF).test(PPC::X2));
lib/Target/SystemZ/SystemZFrameLowering.cpp 106 if (SystemZ::GR64BitRegClass.contains(Reg) && SavedRegs.test(Reg)) {
lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h 113 return VRegStackified.test(I);
lib/Transforms/Scalar/LoopRerollPass.cpp 1081 while (I != In.end() && (I->second.test(Val) == 0 ||
lib/Transforms/Utils/CtorUtils.cpp 32 if (!CtorsToRemove.test(I))
tools/clang/include/clang/Analysis/Analyses/PostOrderCFGView.h 58 if (VisitedBlockIDs.test(Block->getBlockID()))
68 return VisitedBlockIDs.test(Block->getBlockID());
tools/clang/lib/Sema/JumpDiagnostics.cpp 763 if (Reachable.test(Scope)) {
tools/llvm-exegesis/lib/MCInstrDescView.cpp 196 if (AIndex == BIndex && !Forbidden.test(AIndex))
tools/llvm-exegesis/lib/SnippetGenerator.cpp 60 ScratchRegAliases.test(Op.getImplicitReg()))
118 if (Reg > 0 && !DefinedRegs.test(Reg)) {
tools/llvm-pdbutil/TypeReferenceTracker.cpp 92 if (RefTI.isSimple() || TypeOrIdReferenced.test(RefTI.toArrayIndex()))
tools/llvm-pdbutil/TypeReferenceTracker.h 39 TypeReferenced.test(TI.toArrayIndex());
unittests/ADT/BitVectorTest.cpp 76 EXPECT_TRUE(Vec.test(i));
106 EXPECT_TRUE(Vec.test(i));
464 EXPECT_TRUE(A.test(4));
465 EXPECT_TRUE(A.test(5));
466 EXPECT_TRUE(A.test(7));
467 EXPECT_TRUE(A.test(18));
476 EXPECT_FALSE(A.test(2));
477 EXPECT_FALSE(A.test(7));
478 EXPECT_TRUE(A.test(4));
479 EXPECT_TRUE(A.test(5));
487 EXPECT_TRUE(A.test(2));
488 EXPECT_TRUE(A.test(7));
510 EXPECT_TRUE(Small.test(0));
533 EXPECT_TRUE(Big.test(0));
556 EXPECT_TRUE(Small.test(0));
557 EXPECT_TRUE(Small.test(1));
558 EXPECT_TRUE(Small.test(2));
559 EXPECT_TRUE(Small.test(16));
579 EXPECT_TRUE(Big.test(0));
580 EXPECT_TRUE(Big.test(1));
581 EXPECT_TRUE(Big.test(2));
582 EXPECT_TRUE(Big.test(16));
602 EXPECT_TRUE(Small.test(1));
603 EXPECT_TRUE(Small.test(2));
604 EXPECT_TRUE(Small.test(16));
624 EXPECT_TRUE(Big.test(1));
625 EXPECT_TRUE(Big.test(2));
626 EXPECT_TRUE(Big.test(16));
646 EXPECT_TRUE(Small.test(1));
666 EXPECT_TRUE(Big.test(2));
667 EXPECT_TRUE(Big.test(16));
745 EXPECT_FALSE(A.test(0));
749 EXPECT_FALSE(A.test(0));
750 EXPECT_TRUE(A.test(31));
836 EXPECT_TRUE(A.test(2));
837 EXPECT_TRUE(A.test(3));
838 EXPECT_TRUE(A.test(8));
839 EXPECT_TRUE(A.test(9));
942 EXPECT_FALSE(A.test(0));
943 EXPECT_TRUE( A.test(1));
944 EXPECT_TRUE( A.test(23));
945 EXPECT_TRUE( A.test(254));
946 EXPECT_FALSE(A.test(255));
953 EXPECT_TRUE( B.test(0));
954 EXPECT_FALSE(B.test(1));
955 EXPECT_FALSE(B.test(23));
956 EXPECT_FALSE(B.test(254));
957 EXPECT_TRUE( B.test(255));
964 EXPECT_TRUE(C.test(0));
965 EXPECT_FALSE( C.test(1));
966 EXPECT_FALSE( C.test(2));
973 EXPECT_FALSE(D.test(0));
974 EXPECT_TRUE( D.test(1));
975 EXPECT_TRUE( D.test(2));
982 EXPECT_FALSE(E.test(0));
983 EXPECT_TRUE( E.test(1));
984 EXPECT_TRUE( E.test(32));
985 EXPECT_FALSE(E.test(33));
unittests/DebugInfo/MSF/MSFBuilderTest.cpp 387 EXPECT_FALSE(L.FreePageMap.test(2 + I * 4096));
388 EXPECT_FALSE(L.FreePageMap.test(1 + I * 4096));
unittests/tools/llvm-exegesis/X86/TargetTest.cpp 141 EXPECT_TRUE(State.getRATC().reservedRegisters().test(X86::AH));
utils/TableGen/CodeGenRegisters.cpp 954 if (RC.SubClasses.test(SubRC.EnumValue))
1377 if (TopoSigs.test(Reg1.getTopoSig()))
1708 if (NormalRegs.test(Reg->EnumValue))
utils/TableGen/CodeGenRegisters.h 374 return SubClasses.test(RC->EnumValue);
utils/TableGen/RegisterBankEmitter.cpp 202 if (BV.test(RC->EnumValue)) {
utils/TableGen/RegisterInfoEmitter.cpp 594 Value |= Bits.test(i + j) << j;
1645 if (!SubClasses.test(SRC.EnumValue))