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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
include/llvm/ADT/APInt.h 1646 return std::min(unsigned(llvm::countTrailingZeros(U.VAL)), BitWidth);
include/llvm/ADT/BitVector.h 229 return i * BITWORD_SIZE + countTrailingZeros(Copy);
include/llvm/ADT/SmallBitVector.h 232 return countTrailingZeros(Bits);
281 return countTrailingZeros(Bits);
include/llvm/ADT/SparseBitVector.h 130 return i * BITWORD_SIZE + countTrailingZeros(Bits[i]);
161 return WordPos * BITWORD_SIZE + countTrailingZeros(Copy);
166 return i * BITWORD_SIZE + countTrailingZeros(Bits[i]);
include/llvm/CodeGen/ExecutionDomainFix.h 96 return countTrailingZeros(AvailableDomains);
include/llvm/CodeGen/TargetRegisterInfo.h 1081 unsigned Offset = countTrailingZeros(CurrentChunk);
include/llvm/ExecutionEngine/JITLink/JITLink.h 151 P2Align = Alignment ? countTrailingZeros(Alignment) : 0;
165 P2Align = Alignment ? countTrailingZeros(Alignment) : 0;
include/llvm/Support/MathExtras.h 243 return countTrailingZeros(Val, ZB_Undefined);
518 return countTrailingZeros<T>(~Value, ZB);
lib/Analysis/ValueTracking.cpp 1298 Known.Zero.setLowBits(countTrailingZeros(Align));
1326 countTrailingZeros(Offset));
1339 unsigned(countTrailingZeros(TypeSize) +
1726 Known.Zero.setLowBits(countTrailingZeros(Align->value()));
lib/CodeGen/ExecutionDomainFix.cpp 321 unsigned domain = countTrailingZeros(available);
lib/CodeGen/SelectionDAG/DAGCombiner.cpp14729 unsigned NotMaskTZ = countTrailingZeros(NotMask);
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 2697 ShiftOp, DAG.getConstant(countTrailingZeros(B.Mask), dl, VT),
lib/CodeGen/TargetRegisterInfo.cpp 244 return TRI->getRegClass(I + countTrailingZeros(Common));
lib/DebugInfo/DWARF/DWARFDie.cpp 43 uint64_t Shift = countTrailingZeros(Val);
lib/LTO/LTOModule.cpp 418 uint32_t attr = align ? countTrailingZeros(align) : 0;
lib/Object/ELFObjectFile.cpp 74 1ULL << countTrailingZeros(uintptr_t(Obj.getBufferStart()));
lib/Support/APInt.cpp 634 Count += llvm::countTrailingZeros(U.pVal[i]);
lib/Support/ScaledNumber.cpp 87 if (int Zeros = countTrailingZeros(Divisor)) {
lib/Target/AArch64/AArch64ExpandImm.cpp 274 unsigned TZ = countTrailingZeros(Imm);
lib/Target/AArch64/AArch64FrameLowering.cpp 1134 const unsigned NrBitsToZero = countTrailingZeros(Alignment);
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 2169 ShiftAmount = countTrailingZeros(NonZeroBits);
2414 unsigned LSB = countTrailingZeros(Mask1Imm);
lib/Target/AArch64/AArch64ISelLowering.cpp 8599 countTrailingZeros(DL.getTypeStoreSizeInBits(IdxTy).getFixedSize()) - 3;
lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp 3688 while(Imm > 0xFFFF && countTrailingZeros(Imm) >= 16) {
lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h 239 I = countTrailingZeros(Imm);
lib/Target/AMDGPU/AMDGPUCallLowering.cpp 683 countTrailingZeros(Info->getPSInputAddr(), ZB_Undefined));
lib/Target/AMDGPU/AMDGPUISelLowering.cpp 4166 unsigned Shift = countTrailingZeros<unsigned>(Mask);
lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp 1803 const unsigned Shift = countTrailingZeros<unsigned>(Mask);
lib/Target/AMDGPU/GCNRegBankReassign.cpp 379 ShiftedBank = (Bank + countTrailingZeros(LM)) % NUM_VGPR_BANKS;
385 (countTrailingZeros(LM) >> 1)) %
500 unsigned Shift = countTrailingZeros(LM);
507 unsigned Shift = countTrailingZeros(LM) >> 1;
lib/Target/AMDGPU/SIISelLowering.cpp 2084 countTrailingZeros(Info->getPSInputAddr(), ZB_Undefined));
10134 Comp = countTrailingZeros(Dmask);
lib/Target/AMDGPU/SILoadStoreOptimizer.cpp 666 unsigned AllowedBitsForMin = llvm::countTrailingZeros(MaxMask);
lib/Target/AMDGPU/SIModeRegister.cpp 195 unsigned Offset = countTrailingZeros<unsigned>(InstrMode.Mask);
lib/Target/AMDGPU/SIShrinkInstructions.cpp 341 NewImm = countTrailingZeros(Imm);
430 Sub = TRI.getSubRegFromChannel(I + countTrailingZeros(LM.getAsInteger()));
lib/Target/ARM/ARMBasicBlockInfo.h 83 Bits = countTrailingZeros(Size);
lib/Target/ARM/ARMFrameLowering.cpp 290 const unsigned NrBitsToZero = countTrailingZeros(Alignment);
lib/Target/ARM/ARMISelDAGToDAG.cpp 378 unsigned TZ = countTrailingZeros(And_imm);
2728 unsigned LSB = countTrailingZeros(And_imm);
lib/Target/ARM/ARMISelLowering.cpp11844 unsigned ShiftAmt = countTrailingZeros<uint64_t>(MulAmt);
11968 uint32_t C3 = countTrailingZeros(C1);
11980 uint32_t Trailing = countTrailingZeros(C1);
11994 uint32_t C3 = countTrailingZeros(C1);
12164 Val >>= countTrailingZeros(~Mask);
12192 unsigned amt = countTrailingZeros(Mask2);
12209 unsigned lsb = countTrailingZeros(Mask);
12228 unsigned LSB = countTrailingZeros(Mask);
12523 unsigned LSB = countTrailingZeros(~InvMask);
lib/Target/ARM/AsmParser/ARMAsmParser.cpp 267 return ITState.CurPosition == 4 - countTrailingZeros(ITState.Mask);
275 unsigned TZ = countTrailingZeros(ITState.Mask);
285 unsigned TZ = countTrailingZeros(ITState.Mask);
333 unsigned TZ = countTrailingZeros(ITState.Mask);
372 unsigned TZ = countTrailingZeros(VPTState.Mask);
lib/Target/ARM/Disassembler/ARMDisassembler.cpp 73 unsigned NumTZ = countTrailingZeros<uint8_t>(Mask);
112 unsigned NumTZ = countTrailingZeros<uint8_t>(Mask);
lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h 135 unsigned TZ = countTrailingZeros(Imm);
148 unsigned TZ2 = countTrailingZeros(Imm & ~63U);
216 return countTrailingZeros(Imm);
235 return countTrailingZeros(Imm);
323 unsigned RotAmt = countTrailingZeros(V);
lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp 742 int32_t lsb = countTrailingZeros(v);
1076 unsigned NumTZ = countTrailingZeros(Mask);
1660 unsigned NumTZ = countTrailingZeros(Mask);
lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp 1704 uint32_t lsb = countTrailingZeros(v);
1992 return countTrailingZeros((uint64_t)MO.getImm());
lib/Target/ARM/Thumb1FrameLowering.cpp 405 const unsigned NrBitsToZero = countTrailingZeros(MFI.getMaxAlignment());
lib/Target/Hexagon/HexagonBitTracker.cpp 334 unsigned L = countTrailingZeros(A);
lib/Target/Hexagon/HexagonConstExtenders.cpp 1728 uint32_t A = std::min<uint32_t>(R.Align, 1u << countTrailingZeros(UD));
lib/Target/Hexagon/HexagonISelDAGToDAG.cpp 1126 uint32_t TZ = countTrailingZeros(Mask);
lib/Target/Hexagon/HexagonISelLowering.cpp 1684 unsigned HaveAlign = Addr != 0 ? 1u << countTrailingZeros(Addr) : NeedAlign;
lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp 103 unsigned Cttz = countTrailingZeros(Units);
lib/Target/Mips/MipsAnalyzeImmediate.cpp 46 unsigned Shamt = countTrailingZeros(Imm);
lib/Target/Mips/MipsISelLowering.cpp 105 Pos = countTrailingZeros(I);
lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp 3474 NumZeros = countTrailingZeros(MaskVal);
lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp 303 return 7 - countTrailingZeros<uint64_t>(Imm.Val);
lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp 315 unsigned Zeros = countTrailingZeros(Imm);
lib/Target/PowerPC/PPCFastISel.cpp 2151 Shift = countTrailingZeros<uint64_t>(Imm);
lib/Target/PowerPC/PPCISelDAGToDAG.cpp 797 Shift = countTrailingZeros<uint64_t>(Imm);
896 Shift = countTrailingZeros<uint64_t>(Imm);
lib/Target/RISCV/RISCVFrameLowering.cpp 217 unsigned ShiftAmount = countTrailingZeros(MaxAlignment);
lib/Target/SystemZ/SystemZISelLowering.cpp 2260 uint64_t Low = uint64_t(1) << countTrailingZeros(Mask);
lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp 204 assert((1u << countTrailingZeros(Alignment)) == Alignment &&
lib/Target/X86/X86FloatingPoint.cpp 901 unsigned KReg = countTrailingZeros(Kills);
902 unsigned DReg = countTrailingZeros(Defs);
926 unsigned KReg = countTrailingZeros(Kills);
934 unsigned DReg = countTrailingZeros(Defs);
1660 unsigned FPReg = countTrailingZeros(FPKills);
lib/Target/X86/X86ISelDAGToDAG.cpp 1712 unsigned MaskTZ = countTrailingZeros(Mask);
1811 unsigned AMShiftAmt = countTrailingZeros(Mask);
5018 unsigned TrailingZeros = countTrailingZeros(Mask);
lib/Target/X86/X86ISelLowering.cpp 9699 unsigned Idx = countTrailingZeros(NonZeros);
9763 unsigned Idx = countTrailingZeros(NonZeros);
9832 unsigned Idx = countTrailingZeros(NonZeros);
33099 unsigned RootMaskSizeLog2 = countTrailingZeros(RootMask.size());
33100 unsigned OpMaskSizeLog2 = countTrailingZeros(OpMask.size());
33111 unsigned RootRatioLog2 = countTrailingZeros(RootRatio);
33112 unsigned OpRatioLog2 = countTrailingZeros(OpRatio);
38002 unsigned ScaleShift = countTrailingZeros(MulAmt);
lib/Transforms/IPO/LowerTypeTests.cpp 168 BSI.AlignLog2 = countTrailingZeros(Mask, ZB_Undefined);
lib/Transforms/IPO/WholeProgramDevirt.cpp 192 countTrailingZeros(uint8_t(~BitsUsed), ZB_Undefined);
lib/Transforms/Instrumentation/AddressSanitizer.cpp 1244 size_t Res = countTrailingZeros(TypeSize / 8);
lib/Transforms/Instrumentation/HWAddressSanitizer.cpp 578 size_t Res = countTrailingZeros(TypeSize / 8);
lib/Transforms/Instrumentation/ThreadSanitizer.cpp 732 size_t Idx = countTrailingZeros(TypeSize / 8);
lib/Transforms/Scalar/LoopStrengthReduce.cpp 4257 countTrailingZeros<uint64_t>(NewF.BaseOffset))
lib/Transforms/Utils/SimplifyCFG.cpp 5595 Shift = std::min(Shift, countTrailingZeros((uint64_t)V));
tools/clang/lib/Lex/Lexer.cpp 2543 CurPtr += llvm::countTrailingZeros<unsigned>(cmp) + 1;
tools/clang/lib/StaticAnalyzer/Checkers/PaddingChecker.cpp 270 llvm::countTrailingZeros((unsigned long long)NewOffset.getQuantity());
tools/lld/ELF/InputFiles.cpp 1145 ret = 1ULL << countTrailingZeros((uint64_t)sym.st_value);
tools/lld/ELF/SyntheticSections.cpp 2650 size_t shift = 32 - countTrailingZeros(numShards);
tools/lld/ELF/SyntheticSections.h 880 return hash >> (31 - llvm::countTrailingZeros(numShards));
tools/lld/lib/Driver/DarwinLdDriver.cpp 533 uint16_t align = 1 << llvm::countTrailingZeros(alignValue);
tools/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp 604 uint32_t TZ = llvm::countTrailingZeros(ITMask);
tools/lldb/source/Symbol/CompactUnwindInfo.cpp 585 EXTRACT_BITS(unwind_info.encoding, UNWIND_PERSONALITY_MASK);
669 EXTRACT_BITS(unwind_info.encoding, UNWIND_PERSONALITY_MASK);
764 EXTRACT_BITS(function_info.encoding, UNWIND_X86_64_RBP_FRAME_OFFSET);
767 EXTRACT_BITS(function_info.encoding, UNWIND_X86_64_RBP_FRAME_REGISTERS);
801 uint32_t stack_size = EXTRACT_BITS(function_info.encoding,
803 uint32_t register_count = EXTRACT_BITS(
805 uint32_t permutation = EXTRACT_BITS(
810 uint32_t stack_adjust = EXTRACT_BITS(
815 uint32_t offset_to_subl_insn = EXTRACT_BITS(
1035 EXTRACT_BITS(function_info.encoding, UNWIND_X86_EBP_FRAME_OFFSET);
1038 EXTRACT_BITS(function_info.encoding, UNWIND_X86_EBP_FRAME_REGISTERS);
1067 EXTRACT_BITS(function_info.encoding, UNWIND_X86_FRAMELESS_STACK_SIZE);
1068 uint32_t register_count = EXTRACT_BITS(
1070 uint32_t permutation = EXTRACT_BITS(
1075 uint32_t stack_adjust = EXTRACT_BITS(function_info.encoding,
1081 EXTRACT_BITS(function_info.encoding, UNWIND_X86_FRAMELESS_STACK_SIZE);
1328 (EXTRACT_BITS(function_info.encoding,
1458 uint32_t stack_adjust = (EXTRACT_BITS(function_info.encoding,
1517 EXTRACT_BITS(function_info.encoding, UNWIND_ARM_FRAME_D_REG_COUNT_MASK);
tools/llvm-lipo/llvm-lipo.cpp 128 countTrailingZeros(Is64Bit ? O.getSegment64LoadCommand(LC).vmaddr
tools/llvm-mca/Views/BottleneckAnalysis.cpp 75 Index += countTrailingZeros(RR.second);
tools/llvm-mca/Views/ResourcePressureView.cpp 61 R2VIndex += countTrailingZeros(RR.second);
tools/llvm-objdump/ELFDump.cpp 241 countTrailingZeros<uint64_t>(Phdr.p_align))
unittests/Support/MathExtrasTest.cpp 21 EXPECT_EQ(8u, countTrailingZeros(Z8));
22 EXPECT_EQ(16u, countTrailingZeros(Z16));
23 EXPECT_EQ(32u, countTrailingZeros(Z32));
24 EXPECT_EQ(64u, countTrailingZeros(Z64));
30 EXPECT_EQ(1u, countTrailingZeros(NZ8));
31 EXPECT_EQ(1u, countTrailingZeros(NZ16));
32 EXPECT_EQ(1u, countTrailingZeros(NZ32));
33 EXPECT_EQ(1u, countTrailingZeros(NZ64));