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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
include/llvm/MC/MCInstrDesc.h 612 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
lib/CodeGen/AggressiveAntiDepBreaker.cpp 408 if (i < MI.getDesc().getNumOperands())
492 if (i < MI.getDesc().getNumOperands())
lib/CodeGen/CriticalAntiDepBreaker.cpp 194 if (i < MI.getDesc().getNumOperands())
311 if (i < MI.getDesc().getNumOperands())
lib/CodeGen/ExecutionDomainFix.cpp 260 e = mi->getDesc().getNumOperands();
291 e = mi->getDesc().getNumOperands();
lib/CodeGen/GlobalISel/LegalizerInfo.cpp 482 for (unsigned i = 0; i < MI.getDesc().getNumOperands(); ++i) {
lib/CodeGen/MachineInstr.cpp 122 if (unsigned NumOps = MCID->getNumOperands() +
234 OpNo < MCID->getNumOperands() || isDebugOp) &&
700 unsigned NumOperands = MCID->getNumOperands();
1400 for (unsigned i = MI.getDesc().getNumOperands(), e = MI.getNumOperands();
lib/CodeGen/MachineLICM.cpp 850 for (unsigned i = 0, e = MI->getDesc().getNumOperands(); i != e; ++i) {
1223 for (unsigned i = 0, e = MI.getDesc().getNumOperands(); i != e; ++i) {
lib/CodeGen/MachineVerifier.cpp 926 for (unsigned I = 0, E = std::min(MCID.getNumOperands(), NumOps);
965 if (MI->getNumOperands() < MCID.getNumOperands())
976 if (MI->getNumOperands() < MCID.getNumOperands())
1130 assert(MCID.getNumOperands() == 2 && "Expected 2 operands G_*{EXT,TRUNC}");
1482 if (MI->getNumOperands() < MCID.getNumOperands()) {
1484 errs() << MCID.getNumOperands() << " operands expected, but "
1609 } else if (MONum < MCID.getNumOperands()) {
1614 !(MI->isVariadic() && MONum == MCID.getNumOperands()-1)) {
1664 if (OtherIdx < MCID.getNumOperands()) {
1690 if (MONum < MCID.getNumOperands()) {
1761 MONum < MCID.getNumOperands() &&
1790 if (MONum < MCID.getNumOperands()) {
lib/CodeGen/PeepholeOptimizer.cpp 1354 for (unsigned i = 0, e = MI.getDesc().getNumOperands(); i != e; ++i) {
lib/CodeGen/RegisterCoalescer.cpp 1312 CopyMI->getDesc().getNumOperands());
1313 for (unsigned I = CopyMI->getDesc().getNumOperands(),
1333 for (unsigned i = NewMI.getDesc().getNumOperands(),
lib/CodeGen/ScheduleDAGInstrs.cpp 239 bool ImplicitPseudoDef = (OperIdx >= DefMIDesc->getNumOperands() &&
267 (UseMIDesc && UseOp >= ((int)UseMIDesc->getNumOperands()) &&
lib/CodeGen/SelectionDAG/FastISel.cpp 841 for (unsigned I = 0, E = MCID.getNumOperands(); I < E; ++I)
lib/CodeGen/SelectionDAG/InstrEmitter.cpp 134 if (i+II.getNumDefs() < II.getNumOperands()) {
304 bool isOptDef = IIOpNum < MCID.getNumOperands() &&
313 if (IIOpNum < II->getNumOperands())
397 bool Imp = II && (IIOpNum >= II->getNumOperands() && !II->isVariadic());
830 countOperands(Node, II.getNumOperands() - NumDefs, NumImpUses);
835 assert(NumMIOperands >= II.getNumOperands() &&
838 assert(NumMIOperands >= II.getNumOperands() &&
839 NumMIOperands <= II.getNumOperands() + II.getNumImplicitDefs() +
lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp 255 for (unsigned i = 0; i != MCID.getNumOperands(); ++i) {
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp 1035 for (unsigned i = 0; i != MCID.getNumOperands(); ++i) {
2821 unsigned NumOps = MCID.getNumOperands() - NumRes;
3066 unsigned NumOps = MCID.getNumOperands() - NumRes;
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp 213 for (unsigned I = 0; I != MCID.getNumOperands(); ++I) {
450 for (unsigned i = 0; i != MCID.getNumOperands(); ++i) {
lib/CodeGen/TargetInstrInfo.cpp 48 if (OpNum >= MCID.getNumOperands())
lib/CodeGen/TwoAddressInstructionPass.cpp 1211 unsigned OpsNum = MI->getDesc().getNumOperands();
1251 OpsNum = MI->getDesc().getNumOperands();
lib/MCA/InstrBuilder.cpp 235 const MCOperand &Op = MCI.getOperand(MCDesc.getNumOperands() - 1);
302 unsigned NumVariadicOps = MCI.getNumOperands() - MCDesc.getNumOperands();
369 Write.OpIndex = MCDesc.getNumOperands() - 1;
394 for (unsigned I = 0, OpIndex = MCDesc.getNumOperands();
420 unsigned NumExplicitUses = MCDesc.getNumOperands() - MCDesc.getNumDefs();
425 unsigned NumVariadicOps = MCI.getNumOperands() - MCDesc.getNumOperands();
465 for (unsigned I = 0, OpIndex = MCDesc.getNumOperands();
lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp 95 for (unsigned i = Desc.getNumOperands(), e = OldMI.getNumOperands(); i != e;
lib/Target/AArch64/AArch64InstrInfo.cpp 1583 assert(MI.getDesc().getNumOperands() == 3 &&
1612 assert(MI.getDesc().getNumOperands() == 4 &&
1619 assert(MI.getDesc().getNumOperands() == 4 &&
1642 assert(MI.getDesc().getNumOperands() == 3 && MI.getOperand(0).isReg() &&
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp 568 if (OpIdx >= Desc.getNumOperands())
lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp 454 unsigned DescNumOps = MCII->get(Opc).getNumOperands();
lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp 315 for (unsigned i = 0, e = Desc.getNumOperands(); i < e; ++i) {
lib/Target/AMDGPU/SIFoldOperands.cpp 488 if (!OpInfo || UseOpIdx >= Desc.getNumOperands())
930 unsigned NumOps = Desc.getNumOperands() +
lib/Target/AMDGPU/SIInstrInfo.cpp 138 return MI.getNumOperands() == MI.getDesc().getNumOperands();
1496 MovRelDesc.getNumOperands() + MovRelDesc.getNumImplicitUses();
2259 unsigned NumOps = MI.getDesc().getNumOperands() +
3206 Desc.getNumOperands() != MI.getNumExplicitOperands()) {
3234 for (int i = 0, e = Desc.getNumOperands(); i != e; ++i) {
3576 const unsigned StaticNumOps = Desc.getNumOperands() +
3811 if (MI.isVariadic() || OpNo >= Desc.getNumOperands() ||
lib/Target/AMDGPU/SIInstrInfo.h 1024 if (OpNum >= TID.getNumOperands())
lib/Target/AMDGPU/SIShrinkInstructions.cpp 172 for (unsigned i = MI.getDesc().getNumOperands() +
lib/Target/ARM/ARMBaseInstrInfo.cpp 170 unsigned NumOps = MCID.getNumOperands();
2261 for (unsigned i = 1, e = DefDesc.getNumOperands();
3217 unsigned NumOps = DefMCID.getNumOperands();
3227 unsigned NumOps = UseMCID.getNumOperands();
3679 unsigned NumRegs = MI.getNumOperands() - Desc.getNumOperands();
3715 unsigned NumRegs = MI.getNumOperands() - Desc.getNumOperands() + 1;
3752 int RegNo = (int)(DefIdx+1) - DefMCID.getNumOperands() + 1;
3801 return MI.getNumOperands() + 1 - MI.getDesc().getNumOperands();
3809 int RegNo = (int)(DefIdx+1) - DefMCID.getNumOperands() + 1;
3844 int RegNo = (int)(UseIdx+1) - UseMCID.getNumOperands() + 1;
3884 int RegNo = (int)(UseIdx+1) - UseMCID.getNumOperands() + 1;
3917 if (DefIdx < DefMCID.getNumDefs() && UseIdx < UseMCID.getNumOperands())
4008 if (ItinData->hasPipelineForwarding(DefClass, DefMCID.getNumOperands()-1,
4952 for (unsigned i = MI.getDesc().getNumOperands(); i; --i)
4971 for (unsigned i = MI.getDesc().getNumOperands(); i; --i)
5004 for (unsigned i = MI.getDesc().getNumOperands(); i; --i)
5039 for (unsigned i = MI.getDesc().getNumOperands(); i; --i)
lib/Target/ARM/ARMConstantIslandPass.cpp 591 unsigned NumOps = MI->getDesc().getNumOperands();
2170 unsigned NumOps = MCID.getNumOperands();
2364 unsigned NumOps = MCID.getNumOperands();
lib/Target/ARM/ARMExpandPseudoInsts.cpp 95 for (unsigned i = Desc.getNumOperands(), e = OldMI.getNumOperands();
672 unsigned Lane = MI.getOperand(MI.getDesc().getNumOperands() - 3).getImm();
lib/Target/ARM/ARMISelLowering.cpp10737 assert(MCID->getNumOperands() ==
10738 MI.getDesc().getNumOperands() + 5 - MI.getDesc().getSize()
10749 for (unsigned c = MCID->getNumOperands() - 4; c--;) {
10768 ccOutIdx = MCID->getNumOperands() - 1;
10770 ccOutIdx = MCID->getNumOperands() - 1;
10782 for (unsigned i = MCID->getNumOperands(), e = MI.getNumOperands(); i != e;
lib/Target/ARM/ARMLoadStoreOptimizer.cpp 219 unsigned NumOperands = MI.getDesc().getNumOperands();
472 return (MI->getNumOperands() - MI->getDesc().getNumOperands() + 1) * 4;
475 return (MI->getNumOperands() - MI->getDesc().getNumOperands() + 1) * 8;
507 MBBI->getOperand(MBBI->getDesc().getNumOperands() - 3);
524 MBBI->getOperand(MBBI->getDesc().getNumOperands() - 3);
1550 assert(TII->get(Opcode).getNumOperands() == 6 &&
1551 TII->get(NewOpc).getNumOperands() == 7 &&
lib/Target/ARM/AsmParser/ARMAsmParser.cpp 7337 for (unsigned i = 0, e = MCID.getNumOperands(); i != e; ++i) {
lib/Target/ARM/Thumb2ITBlockPass.cpp 173 MI->getOperand(MCID.getNumOperands() - 1).getReg() == ARM::CPSR)
lib/Target/ARM/Thumb2InstrInfo.cpp 711 for (unsigned i = 0, e = MCID.getNumOperands(); i != e; ++i)
lib/Target/ARM/Thumb2SizeReduction.cpp 647 MI->getOperand(MCID.getNumOperands()-1).getReg() == ARM::CPSR)
807 unsigned NumOps = MCID.getNumOperands();
829 unsigned NumOps = MCID.getNumOperands();
866 for (unsigned i = 0, e = MCID.getNumOperands(); i != e; ++i) {
899 unsigned NumOps = MCID.getNumOperands();
936 unsigned NumOps = MCID.getNumOperands();
lib/Target/Hexagon/HexagonBitSimplify.cpp 626 if (OpN == D.getNumOperands()-1)
lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.cpp 92 for (unsigned i = MCID.getNumDefs(); i < MCID.getNumOperands(); ++i)
182 for (unsigned i = MCID.getNumDefs(); i < MCID.getNumOperands(); ++i)
lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp 821 for (auto I = Desc.getNumDefs(), N = Desc.getNumOperands(); I != N; ++I)
lib/Target/Lanai/LanaiDelaySlotFiller.cpp 230 unsigned E = MI->isCall() || MI->isReturn() ? MCID.getNumOperands()
lib/Target/Lanai/LanaiInstrInfo.cpp 518 for (unsigned i = 1, e = DefDesc.getNumOperands();
lib/Target/Mips/AsmParser/MipsAsmParser.cpp 1807 assert(MCID.getNumOperands() == 3 && "unexpected number of operands");
1837 assert(MCID.getNumOperands() == 2 && "unexpected number of operands");
1853 assert(MCID.getNumOperands() == 3 && "unexpected number of operands");
1866 assert(MCID.getNumOperands() == 2 && "unexpected number of operands");
1877 assert(MCID.getNumOperands() == 2 && "unexpected number of operands");
1890 assert(MCID.getNumOperands() == 2 && "unexpected number of operands");
1923 assert(MCID.getNumOperands() == 3 && "unexpected number of operands");
1941 assert(MCID.getNumOperands() == 3 && "unexpected number of operands");
2072 for (unsigned i = 0; i < MCID.getNumOperands(); i++) {
2106 for (unsigned i = 0; i < MCID.getNumOperands(); i++) {
3490 assert(getInstDesc(Inst.getOpcode()).getNumOperands() == 1 &&
lib/Target/Mips/MipsAsmPrinter.cpp 166 for (unsigned int I = MI.getDesc().getNumOperands(), E = MI.getNumOperands();
lib/Target/Mips/MipsBranchExpansion.cpp 226 for (unsigned I = 0, E = Br.getDesc().getNumOperands(); I < E; ++I) {
342 for (unsigned I = 0, E = Br->getDesc().getNumOperands(); I < E; ++I) {
712 assert(I.Br->getDesc().getNumOperands() == 1);
lib/Target/Mips/MipsDelaySlotFiller.cpp 351 update(MI, 0, MI.getDesc().getNumOperands());
361 update(MI, MI.getDesc().getNumOperands(), MI.getNumOperands());
lib/Target/Mips/MipsInstrInfo.cpp 650 for (unsigned J = 0, E = I->getDesc().getNumOperands(); J < E; ++J) {
658 for (unsigned J = I->getDesc().getNumOperands(), E = I->getNumOperands();
667 for (unsigned J = 0, E = I->getDesc().getNumOperands(); J < E; ++J) {
lib/Target/PowerPC/PPCInstrInfo.cpp 1020 if (MCID.getNumOperands() == 3)
1353 assert(UseIdx < UseMCID.getNumOperands() && "No operand description for Reg");
lib/Target/PowerPC/PPCPreEmitPeephole.cpp 179 if (MCID.getNumOperands() == 3 &&
188 else if (MCID.getNumOperands() == 2 &&
lib/Target/SystemZ/SystemZHazardRecognizer.cpp 122 for (unsigned OpIdx = 0; OpIdx < MID.getNumOperands(); OpIdx++) {
lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp 56 if (Desc.getNumOperands() == 0 && MI->getNumOperands() > 0)
58 for (auto I = Desc.getNumOperands(), E = MI->getNumOperands(); I < E; ++I) {
64 I != Desc.getNumOperands()))
lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCCodeEmitter.cpp 90 if (I < Desc.getNumOperands()) {
lib/Target/X86/MCTargetDesc/X86BaseInfo.h 723 unsigned NumOps = Desc.getNumOperands();
lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp 750 unsigned NumOps = Desc.getNumOperands();
1224 unsigned NumOps = Desc.getNumOperands();
lib/Target/X86/X86CallFrameOptimization.cpp 562 unsigned NumOps = DefMov->getDesc().getNumOperands();
lib/Target/X86/X86FastISel.cpp 646 ValReg = constrainOperandRegClass(Desc, ValReg, Desc.getNumOperands() - 1);
lib/Target/X86/X86FlagsCopyLowering.cpp 849 CMovI.getOperand(CMovI.getDesc().getNumOperands() - 1)
lib/Target/X86/X86FloatingPoint.cpp 1115 unsigned NumOps = MI.getDesc().getNumOperands();
1176 unsigned NumOps = MI.getDesc().getNumOperands();
1287 unsigned NumOperands = MI.getDesc().getNumOperands();
1383 unsigned NumOperands = MI.getDesc().getNumOperands();
lib/Target/X86/X86InstrInfo.cpp 1807 unsigned OpNo = MI.getDesc().getNumOperands() - 1;
2189 MI.getOperand(MI.getDesc().getNumOperands() - 1).getImm());
2199 MI.getOperand(MI.getDesc().getNumOperands() - 1).getImm());
2210 MI.getOperand(MI.getDesc().getNumOperands() - 1).getImm());
3823 Op.first->getOperand(Op.first->getDesc().getNumOperands() - 1)
3879 assert(Desc.getNumOperands() == 3 && "Expected two-addr instruction.");
3900 assert(Desc.getNumOperands() == 3 && "Expected two-addr instruction.");
4671 unsigned NumOps = MI.getDesc().getNumOperands() - 2;
4844 unsigned NumOps = MI.getDesc().getNumOperands();
5204 unsigned NumOps = LoadMI.getDesc().getNumOperands();
6591 unsigned NumOperands = MI.getDesc().getNumOperands();
6694 unsigned NumOperands = MI.getDesc().getNumOperands();
tools/llvm-cfi-verify/lib/FileAnalysis.cpp 351 e = InstrDesc.getNumOperands(); i != e; i++) {
tools/llvm-exegesis/lib/MCInstrDescView.cpp 102 for (; OpIndex < Description->getNumOperands(); ++OpIndex) {