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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc 1065 extern const LaneBitmask AArch64LaneMaskLists[] = {
1066 /* 0 */ LaneBitmask(0x00000000), LaneBitmask::getAll(),
1067 /* 2 */ LaneBitmask(0x00000080), LaneBitmask(0x00000001), LaneBitmask::getAll(),
1068 /* 5 */ LaneBitmask(0x00000080), LaneBitmask(0x00000200), LaneBitmask(0x00000100), LaneBitmask(0x00000001), LaneBitmask::getAll(),
1069 /* 10 */ LaneBitmask(0x00000080), LaneBitmask(0x00000200), LaneBitmask(0x00000001), LaneBitmask::getAll(),
1070 /* 14 */ LaneBitmask(0x00000400), LaneBitmask(0x00000001), LaneBitmask::getAll(),
1071 /* 17 */ LaneBitmask(0x00000400), LaneBitmask(0x00001000), LaneBitmask(0x00000800), LaneBitmask(0x00000001), LaneBitmask::getAll(),
1072 /* 22 */ LaneBitmask(0x00000400), LaneBitmask(0x00001000), LaneBitmask(0x00000001), LaneBitmask::getAll(),
1073 /* 26 */ LaneBitmask(0x00002000), LaneBitmask(0x00000008), LaneBitmask::getAll(),
1074 /* 29 */ LaneBitmask(0x00000020), LaneBitmask(0x00000010), LaneBitmask::getAll(),
1075 /* 32 */ LaneBitmask(0x00000010), LaneBitmask(0x00000020), LaneBitmask::getAll(),
1076 /* 35 */ LaneBitmask(0x00000001), LaneBitmask(0x00000040), LaneBitmask::getAll(),
1077 /* 38 */ LaneBitmask(0x00004000), LaneBitmask(0x00000001), LaneBitmask(0x00008000), LaneBitmask(0x00000040), LaneBitmask::getAll(),
1078 /* 43 */ LaneBitmask(0x00004000), LaneBitmask(0x00040000), LaneBitmask(0x00010000), LaneBitmask(0x00000001), LaneBitmask(0x00008000), LaneBitmask(0x00080000), LaneBitmask(0x00020000), LaneBitmask(0x00000040), LaneBitmask::getAll(),
1079 /* 52 */ LaneBitmask(0x00004000), LaneBitmask(0x00040000), LaneBitmask(0x00000001), LaneBitmask(0x00008000), LaneBitmask(0x00080000), LaneBitmask(0x00000040), LaneBitmask::getAll(),
1080 /* 59 */ LaneBitmask(0x00000200), LaneBitmask(0x00000100), LaneBitmask(0x00000001), LaneBitmask(0x00000080), LaneBitmask::getAll(),
1081 /* 64 */ LaneBitmask(0x00000200), LaneBitmask(0x00000001), LaneBitmask(0x00000080), LaneBitmask::getAll(),
1082 /* 68 */ LaneBitmask(0x00000001), LaneBitmask(0x00000080), LaneBitmask(0x00000200), LaneBitmask(0x00000100), LaneBitmask::getAll(),
1083 /* 73 */ LaneBitmask(0x00000100), LaneBitmask(0x00000001), LaneBitmask(0x00000080), LaneBitmask(0x00000200), LaneBitmask::getAll(),
1084 /* 78 */ LaneBitmask(0x00001000), LaneBitmask(0x00000800), LaneBitmask(0x00000001), LaneBitmask(0x00000400), LaneBitmask::getAll(),
1085 /* 83 */ LaneBitmask(0x00001000), LaneBitmask(0x00000001), LaneBitmask(0x00000400), LaneBitmask::getAll(),
1086 /* 87 */ LaneBitmask(0x00000001), LaneBitmask(0x00000400), LaneBitmask(0x00001000), LaneBitmask(0x00000800), LaneBitmask::getAll(),
1087 /* 92 */ LaneBitmask(0x00000800), LaneBitmask(0x00000001), LaneBitmask(0x00000400), LaneBitmask(0x00001000), LaneBitmask::getAll(),
1088 /* 97 */ LaneBitmask(0x00000008), LaneBitmask(0x00002000), LaneBitmask::getAll(),
1089 /* 100 */ LaneBitmask(0x00000001), LaneBitmask(0x00004000), LaneBitmask(0x00000040), LaneBitmask(0x00008000), LaneBitmask::getAll(),
1090 /* 105 */ LaneBitmask(0x00040000), LaneBitmask(0x00010000), LaneBitmask(0x00000001), LaneBitmask(0x00004000), LaneBitmask(0x00080000), LaneBitmask(0x00020000), LaneBitmask(0x00000040), LaneBitmask(0x00008000), LaneBitmask::getAll(),
1091 /* 114 */ LaneBitmask(0x00040000), LaneBitmask(0x00000001), LaneBitmask(0x00004000), LaneBitmask(0x00080000), LaneBitmask(0x00000040), LaneBitmask(0x00008000), LaneBitmask::getAll(),
1092 /* 121 */ LaneBitmask(0x00000001), LaneBitmask(0x00004000), LaneBitmask(0x00040000), LaneBitmask(0x00010000), LaneBitmask(0x00000040), LaneBitmask(0x00008000), LaneBitmask(0x00080000), LaneBitmask(0x00020000), LaneBitmask::getAll(),
1093 /* 130 */ LaneBitmask(0x00010000), LaneBitmask(0x00000001), LaneBitmask(0x00004000), LaneBitmask(0x00040000), LaneBitmask(0x00020000), LaneBitmask(0x00000040), LaneBitmask(0x00008000), LaneBitmask(0x00080000), LaneBitmask::getAll(),
1094 /* 139 */ LaneBitmask(0x00000001), LaneBitmask(0x00004000), LaneBitmask(0x00040000), LaneBitmask(0x00000040), LaneBitmask(0x00008000), LaneBitmask(0x00080000), LaneBitmask::getAll(),
5031 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
5031 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
5032 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
5032 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
5194 static const LaneBitmask SubRegIndexLaneMaskTable[] = {
5195 LaneBitmask::getAll(),
8960 LaneBitmask Mask;
8964 { LaneBitmask(0xFFFFFFFF), 0 }, { LaneBitmask::getNone(), 0 }, // Sequence 0
8965 { LaneBitmask(0xFFFFFFFF), 7 }, { LaneBitmask::getNone(), 0 }, // Sequence 2
8966 { LaneBitmask(0xFFFFFFFF), 9 }, { LaneBitmask::getNone(), 0 }, // Sequence 4
8967 { LaneBitmask(0xFFFFFFFF), 8 }, { LaneBitmask::getNone(), 0 }, // Sequence 6
8968 { LaneBitmask(0xFFFFFFFF), 1 }, { LaneBitmask::getNone(), 0 }, // Sequence 8
8969 { LaneBitmask(0xFFFFFFFF), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 10
8970 { LaneBitmask(0xFFFFFFFF), 10 }, { LaneBitmask::getNone(), 0 }, // Sequence 12
8971 { LaneBitmask(0xFFFFFFFF), 12 }, { LaneBitmask::getNone(), 0 }, // Sequence 14
8972 { LaneBitmask(0xFFFFFFFF), 11 }, { LaneBitmask::getNone(), 0 }, // Sequence 16
8973 { LaneBitmask(0xFFFFFFFF), 3 }, { LaneBitmask::getNone(), 0 }, // Sequence 18
8974 { LaneBitmask(0xFFFFFFFF), 4 }, { LaneBitmask::getNone(), 0 }, // Sequence 20
8975 { LaneBitmask(0xFFFFFFFF), 5 }, { LaneBitmask::getNone(), 0 }, // Sequence 22
8976 { LaneBitmask(0x00000001), 14 }, { LaneBitmask(0x00000040), 9 }, { LaneBitmask::getNone(), 0 }, // Sequence 24
8977 { LaneBitmask(0x00000001), 18 }, { LaneBitmask(0x00000040), 13 }, { LaneBitmask::getNone(), 0 }, // Sequence 27
8978 { LaneBitmask(0x00000001), 16 }, { LaneBitmask(0x00000040), 11 }, { LaneBitmask::getNone(), 0 }, // Sequence 30
8979 { LaneBitmask(0xFFFFFFFF), 6 }, { LaneBitmask::getNone(), 0 }, // Sequence 33
8980 { LaneBitmask(0xFFFFFFFF), 13 }, { LaneBitmask::getNone(), 0 }, // Sequence 35
8981 { LaneBitmask(0xFFFFFFFF), 14 }, { LaneBitmask::getNone(), 0 }, // Sequence 37
8982 { LaneBitmask(0xFFFFFFFF), 15 }, { LaneBitmask::getNone(), 0 }, // Sequence 39
8983 { LaneBitmask(0xFFFFFFFF), 16 }, { LaneBitmask::getNone(), 0 }, // Sequence 41
8984 { LaneBitmask(0xFFFFFFFF), 17 }, { LaneBitmask::getNone(), 0 }, // Sequence 43
8985 { LaneBitmask(0xFFFFFFFF), 18 }, { LaneBitmask::getNone(), 0 }, // Sequence 45
8986 { LaneBitmask(0xFFFFFFFF), 19 }, { LaneBitmask::getNone(), 0 }, // Sequence 47
8987 { LaneBitmask(0x00000001), 7 }, { LaneBitmask(0x00000080), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 49
8988 { LaneBitmask(0x00000001), 7 }, { LaneBitmask(0x00000080), 2 }, { LaneBitmask(0x00000200), 31 }, { LaneBitmask::getNone(), 0 }, // Sequence 52
8989 { LaneBitmask(0x00000001), 9 }, { LaneBitmask(0x00000080), 1 }, { LaneBitmask::getNone(), 0 }, // Sequence 56
8990 { LaneBitmask(0x00000001), 0 }, { LaneBitmask(0x00000080), 3 }, { LaneBitmask::getNone(), 0 }, // Sequence 59
8991 { LaneBitmask(0x00000001), 0 }, { LaneBitmask(0x00000380), 3 }, { LaneBitmask::getNone(), 0 }, // Sequence 62
8992 { LaneBitmask(0x00000001), 0 }, { LaneBitmask(0x00000280), 3 }, { LaneBitmask::getNone(), 0 }, // Sequence 65
8993 { LaneBitmask(0x00000001), 10 }, { LaneBitmask(0x00000400), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 68
8994 { LaneBitmask(0x00000001), 10 }, { LaneBitmask(0x00000400), 2 }, { LaneBitmask(0x00001000), 31 }, { LaneBitmask::getNone(), 0 }, // Sequence 71
8995 { LaneBitmask(0x00000001), 12 }, { LaneBitmask(0x00000400), 1 }, { LaneBitmask::getNone(), 0 }, // Sequence 75
8996 { LaneBitmask(0x00000001), 10 }, { LaneBitmask(0x00000080), 5 }, { LaneBitmask::getNone(), 0 }, // Sequence 78
8997 { LaneBitmask(0x00000001), 10 }, { LaneBitmask(0x00000080), 5 }, { LaneBitmask(0x00000200), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 81
8998 { LaneBitmask(0x00000001), 12 }, { LaneBitmask(0x00000080), 4 }, { LaneBitmask::getNone(), 0 }, // Sequence 85
8999 { LaneBitmask(0x00000010), 31 }, { LaneBitmask(0x00000020), 8 }, { LaneBitmask::getNone(), 0 }, // Sequence 88
9000 { LaneBitmask(0x00000001), 0 }, { LaneBitmask(0x00000080), 7 }, { LaneBitmask::getNone(), 0 }, // Sequence 91
9001 { LaneBitmask(0x00000001), 0 }, { LaneBitmask(0x00000400), 4 }, { LaneBitmask::getNone(), 0 }, // Sequence 94
9002 { LaneBitmask(0x00000001), 0 }, { LaneBitmask(0x00000080), 7 }, { LaneBitmask(0x00000100), 8 }, { LaneBitmask(0x00000200), 9 }, { LaneBitmask::getNone(), 0 }, // Sequence 97
9003 { LaneBitmask(0x00000001), 0 }, { LaneBitmask(0x00000080), 7 }, { LaneBitmask(0x00000200), 9 }, { LaneBitmask::getNone(), 0 }, // Sequence 102
9004 { LaneBitmask(0x00000001), 0 }, { LaneBitmask(0x00000400), 4 }, { LaneBitmask(0x00000800), 5 }, { LaneBitmask(0x00001000), 6 }, { LaneBitmask::getNone(), 0 }, // Sequence 106
9005 { LaneBitmask(0x00000001), 0 }, { LaneBitmask(0x00000400), 4 }, { LaneBitmask(0x00001000), 6 }, { LaneBitmask::getNone(), 0 }, // Sequence 111
9006 { LaneBitmask(0x00000001), 14 }, { LaneBitmask(0x00000040), 9 }, { LaneBitmask(0x0000C000), 4 }, { LaneBitmask::getNone(), 0 }, // Sequence 115
9007 { LaneBitmask(0x00000001), 14 }, { LaneBitmask(0x00000040), 9 }, { LaneBitmask(0x0000C000), 4 }, { LaneBitmask(0x000C0000), 30 }, { LaneBitmask::getNone(), 0 }, // Sequence 119
9008 { LaneBitmask(0x00000001), 18 }, { LaneBitmask(0x00000040), 13 }, { LaneBitmask(0x0000C000), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 124
9009 { LaneBitmask(0x00000001), 14 }, { LaneBitmask(0x00000080), 11 }, { LaneBitmask::getNone(), 0 }, // Sequence 128
9010 { LaneBitmask(0x00000001), 14 }, { LaneBitmask(0x00000080), 11 }, { LaneBitmask(0x00000200), 7 }, { LaneBitmask::getNone(), 0 }, // Sequence 131
9011 { LaneBitmask(0x00000001), 14 }, { LaneBitmask(0x00000400), 8 }, { LaneBitmask::getNone(), 0 }, // Sequence 135
9012 { LaneBitmask(0x00000001), 14 }, { LaneBitmask(0x00000400), 8 }, { LaneBitmask(0x00001000), 4 }, { LaneBitmask::getNone(), 0 }, // Sequence 138
9013 { LaneBitmask(0x00000001), 18 }, { LaneBitmask(0x00000080), 9 }, { LaneBitmask::getNone(), 0 }, // Sequence 142
9014 { LaneBitmask(0x00000001), 18 }, { LaneBitmask(0x00000400), 6 }, { LaneBitmask::getNone(), 0 } // Sequence 145
9118 LaneBitmask AArch64GenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
9118 LaneBitmask AArch64GenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
9120 LaneBitmask Result;
9122 LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger();
9124 Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S)));
9131 LaneBitmask AArch64GenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
9131 LaneBitmask AArch64GenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
9134 LaneBitmask Result;
9136 LaneBitmask::Type M = LaneMask.getAsInteger();
9138 Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S)));
20339 extern const LaneBitmask AArch64LaneMaskLists[];
gen/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc 4679 extern const LaneBitmask AMDGPULaneMaskLists[] = {
4680 /* 0 */ LaneBitmask(0x00000000), LaneBitmask::getAll(),
4681 /* 2 */ LaneBitmask(0x00000002), LaneBitmask(0x00000001), LaneBitmask::getAll(),
4682 /* 5 */ LaneBitmask(0x00000001), LaneBitmask(0x00000002), LaneBitmask::getAll(),
4683 /* 8 */ LaneBitmask(0x00000001), LaneBitmask(0x00000002), LaneBitmask(0x00000004), LaneBitmask::getAll(),
4684 /* 12 */ LaneBitmask(0x00000001), LaneBitmask(0x00000002), LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask::getAll(),
4685 /* 17 */ LaneBitmask(0x00000001), LaneBitmask(0x00000002), LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000010), LaneBitmask::getAll(),
4686 /* 23 */ LaneBitmask(0x00000001), LaneBitmask(0x00000002), LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000010), LaneBitmask(0x00000020), LaneBitmask(0x00000040), LaneBitmask(0x00000080), LaneBitmask::getAll(),
4687 /* 32 */ LaneBitmask(0x00000001), LaneBitmask(0x00000002), LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000010), LaneBitmask(0x00000020), LaneBitmask(0x00000040), LaneBitmask(0x00000080), LaneBitmask(0x00000100), LaneBitmask(0x00000200), LaneBitmask(0x00000400), LaneBitmask(0x00000800), LaneBitmask(0x00001000), LaneBitmask(0x00002000), LaneBitmask(0x00004000), LaneBitmask(0x00008000), LaneBitmask::getAll(),
4688 /* 49 */ LaneBitmask(0x00000001), LaneBitmask(0x00000002), LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000010), LaneBitmask(0x00000020), LaneBitmask(0x00000040), LaneBitmask(0x00000080), LaneBitmask(0x00000100), LaneBitmask(0x00000200), LaneBitmask(0x00000400), LaneBitmask(0x00000800), LaneBitmask(0x00001000), LaneBitmask(0x00002000), LaneBitmask(0x00004000), LaneBitmask(0x00008000), LaneBitmask(0x00010000), LaneBitmask(0x00020000), LaneBitmask(0x00040000), LaneBitmask(0x00080000), LaneBitmask(0x00100000), LaneBitmask(0x00200000), LaneBitmask(0x00400000), LaneBitmask(0x00800000), LaneBitmask(0x01000000), LaneBitmask(0x02000000), LaneBitmask(0x04000000), LaneBitmask(0x08000000), LaneBitmask(0x10000000), LaneBitmask(0x20000000), LaneBitmask(0x40000000), LaneBitmask(0x80000000), LaneBitmask::getAll(),
17304 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
17304 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
17305 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
17305 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
17484 static const LaneBitmask SubRegIndexLaneMaskTable[] = {
17485 LaneBitmask::getAll(),
25536 LaneBitmask Mask;
25540 { LaneBitmask(0xFFFFFFFF), 0 }, { LaneBitmask::getNone(), 0 }, // Sequence 0
25541 { LaneBitmask(0xFFFFFFFF), 1 }, { LaneBitmask::getNone(), 0 }, // Sequence 2
25542 { LaneBitmask(0xFFFFFFFF), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 4
25543 { LaneBitmask(0xFFFFFFFF), 3 }, { LaneBitmask::getNone(), 0 }, // Sequence 6
25544 { LaneBitmask(0xFFFFFFFF), 4 }, { LaneBitmask::getNone(), 0 }, // Sequence 8
25545 { LaneBitmask(0xFFFFFFFF), 5 }, { LaneBitmask::getNone(), 0 }, // Sequence 10
25546 { LaneBitmask(0xFFFFFFFF), 6 }, { LaneBitmask::getNone(), 0 }, // Sequence 12
25547 { LaneBitmask(0xFFFFFFFF), 7 }, { LaneBitmask::getNone(), 0 }, // Sequence 14
25548 { LaneBitmask(0xFFFFFFFF), 8 }, { LaneBitmask::getNone(), 0 }, // Sequence 16
25549 { LaneBitmask(0xFFFFFFFF), 9 }, { LaneBitmask::getNone(), 0 }, // Sequence 18
25550 { LaneBitmask(0xFFFFFFFF), 10 }, { LaneBitmask::getNone(), 0 }, // Sequence 20
25551 { LaneBitmask(0xFFFFFFFF), 11 }, { LaneBitmask::getNone(), 0 }, // Sequence 22
25552 { LaneBitmask(0xFFFFFFFF), 12 }, { LaneBitmask::getNone(), 0 }, // Sequence 24
25553 { LaneBitmask(0xFFFFFFFF), 13 }, { LaneBitmask::getNone(), 0 }, // Sequence 26
25554 { LaneBitmask(0xFFFFFFFF), 14 }, { LaneBitmask::getNone(), 0 }, // Sequence 28
25555 { LaneBitmask(0xFFFFFFFF), 15 }, { LaneBitmask::getNone(), 0 }, // Sequence 30
25556 { LaneBitmask(0xFFFFFFFF), 16 }, { LaneBitmask::getNone(), 0 }, // Sequence 32
25557 { LaneBitmask(0xFFFFFFFF), 17 }, { LaneBitmask::getNone(), 0 }, // Sequence 34
25558 { LaneBitmask(0xFFFFFFFF), 18 }, { LaneBitmask::getNone(), 0 }, // Sequence 36
25559 { LaneBitmask(0xFFFFFFFF), 19 }, { LaneBitmask::getNone(), 0 }, // Sequence 38
25560 { LaneBitmask(0xFFFFFFFF), 20 }, { LaneBitmask::getNone(), 0 }, // Sequence 40
25561 { LaneBitmask(0xFFFFFFFF), 21 }, { LaneBitmask::getNone(), 0 }, // Sequence 42
25562 { LaneBitmask(0xFFFFFFFF), 22 }, { LaneBitmask::getNone(), 0 }, // Sequence 44
25563 { LaneBitmask(0xFFFFFFFF), 23 }, { LaneBitmask::getNone(), 0 }, // Sequence 46
25564 { LaneBitmask(0xFFFFFFFF), 24 }, { LaneBitmask::getNone(), 0 }, // Sequence 48
25565 { LaneBitmask(0xFFFFFFFF), 25 }, { LaneBitmask::getNone(), 0 }, // Sequence 50
25566 { LaneBitmask(0xFFFFFFFF), 26 }, { LaneBitmask::getNone(), 0 }, // Sequence 52
25567 { LaneBitmask(0xFFFFFFFF), 27 }, { LaneBitmask::getNone(), 0 }, // Sequence 54
25568 { LaneBitmask(0xFFFFFFFF), 28 }, { LaneBitmask::getNone(), 0 }, // Sequence 56
25569 { LaneBitmask(0xFFFFFFFF), 29 }, { LaneBitmask::getNone(), 0 }, // Sequence 58
25570 { LaneBitmask(0xFFFFFFFF), 30 }, { LaneBitmask::getNone(), 0 }, // Sequence 60
25571 { LaneBitmask(0xFFFFFFFF), 31 }, { LaneBitmask::getNone(), 0 } // Sequence 62
25768 LaneBitmask AMDGPUGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
25768 LaneBitmask AMDGPUGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
25770 LaneBitmask Result;
25772 LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger();
25774 Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S)));
25781 LaneBitmask AMDGPUGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
25781 LaneBitmask AMDGPUGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
25784 LaneBitmask Result;
25786 LaneBitmask::Type M = LaneMask.getAsInteger();
25788 Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S)));
48700 extern const LaneBitmask AMDGPULaneMaskLists[];
gen/lib/Target/AMDGPU/R600GenRegisterInfo.inc 1905 extern const LaneBitmask R600LaneMaskLists[] = {
1906 /* 0 */ LaneBitmask(0x00000000), LaneBitmask::getAll(),
1907 /* 2 */ LaneBitmask(0x00000001), LaneBitmask(0x00000002), LaneBitmask::getAll(),
1908 /* 5 */ LaneBitmask(0x00000008), LaneBitmask(0x00000001), LaneBitmask(0x00000002), LaneBitmask(0x00000004), LaneBitmask::getAll(),
1909 /* 10 */ LaneBitmask(0x00000001), LaneBitmask(0x00000002), LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask::getAll(),
8791 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
8791 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
8792 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
8792 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
8878 static const LaneBitmask SubRegIndexLaneMaskTable[] = {
8879 LaneBitmask::getAll(),
11440 LaneBitmask Mask;
11444 { LaneBitmask(0xFFFFFFFF), 0 }, { LaneBitmask::getNone(), 0 }, // Sequence 0
11445 { LaneBitmask(0xFFFFFFFF), 1 }, { LaneBitmask::getNone(), 0 }, // Sequence 2
11446 { LaneBitmask(0xFFFFFFFF), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 4
11447 { LaneBitmask(0xFFFFFFFF), 3 }, { LaneBitmask::getNone(), 0 }, // Sequence 6
11448 { LaneBitmask(0xFFFFFFFF), 4 }, { LaneBitmask::getNone(), 0 }, // Sequence 8
11449 { LaneBitmask(0xFFFFFFFF), 5 }, { LaneBitmask::getNone(), 0 }, // Sequence 10
11450 { LaneBitmask(0xFFFFFFFF), 6 }, { LaneBitmask::getNone(), 0 }, // Sequence 12
11451 { LaneBitmask(0xFFFFFFFF), 7 }, { LaneBitmask::getNone(), 0 }, // Sequence 14
11452 { LaneBitmask(0xFFFFFFFF), 8 }, { LaneBitmask::getNone(), 0 }, // Sequence 16
11453 { LaneBitmask(0xFFFFFFFF), 9 }, { LaneBitmask::getNone(), 0 }, // Sequence 18
11454 { LaneBitmask(0xFFFFFFFF), 10 }, { LaneBitmask::getNone(), 0 }, // Sequence 20
11455 { LaneBitmask(0xFFFFFFFF), 11 }, { LaneBitmask::getNone(), 0 }, // Sequence 22
11456 { LaneBitmask(0xFFFFFFFF), 12 }, { LaneBitmask::getNone(), 0 }, // Sequence 24
11457 { LaneBitmask(0xFFFFFFFF), 13 }, { LaneBitmask::getNone(), 0 }, // Sequence 26
11458 { LaneBitmask(0xFFFFFFFF), 14 }, { LaneBitmask::getNone(), 0 }, // Sequence 28
11459 { LaneBitmask(0xFFFFFFFF), 15 }, { LaneBitmask::getNone(), 0 } // Sequence 30
11480 LaneBitmask R600GenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
11480 LaneBitmask R600GenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
11482 LaneBitmask Result;
11484 LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger();
11486 Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S)));
11493 LaneBitmask R600GenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
11493 LaneBitmask R600GenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
11496 LaneBitmask Result;
11498 LaneBitmask::Type M = LaneMask.getAsInteger();
11500 Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S)));
12344 extern const LaneBitmask R600LaneMaskLists[];
gen/lib/Target/ARC/ARCGenRegisterInfo.inc 92 extern const LaneBitmask ARCLaneMaskLists[] = {
93 /* 0 */ LaneBitmask(0x00000000), LaneBitmask::getAll(),
561 static const LaneBitmask SubRegIndexLaneMaskTable[] = {
562 LaneBitmask::getAll(),
776 extern const LaneBitmask ARCLaneMaskLists[];
gen/lib/Target/ARM/ARMGenRegisterInfo.inc 901 extern const LaneBitmask ARMLaneMaskLists[] = {
902 /* 0 */ LaneBitmask(0x00000000), LaneBitmask::getAll(),
903 /* 2 */ LaneBitmask(0x00000002), LaneBitmask(0x00000001), LaneBitmask::getAll(),
904 /* 5 */ LaneBitmask(0x00000001), LaneBitmask(0x00000002), LaneBitmask::getAll(),
905 /* 8 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask::getAll(),
906 /* 11 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000010), LaneBitmask(0x00000020), LaneBitmask::getAll(),
907 /* 16 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000030), LaneBitmask::getAll(),
908 /* 20 */ LaneBitmask(0x0000000C), LaneBitmask(0x00000030), LaneBitmask::getAll(),
909 /* 23 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000040), LaneBitmask(0x00000080), LaneBitmask::getAll(),
910 /* 28 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000010), LaneBitmask(0x00000020), LaneBitmask(0x00000040), LaneBitmask(0x00000080), LaneBitmask::getAll(),
911 /* 35 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x000000C0), LaneBitmask::getAll(),
912 /* 39 */ LaneBitmask(0x0000000C), LaneBitmask(0x000000C0), LaneBitmask::getAll(),
913 /* 42 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000010), LaneBitmask(0x00000020), LaneBitmask(0x000000C0), LaneBitmask::getAll(),
914 /* 48 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000030), LaneBitmask(0x000000C0), LaneBitmask::getAll(),
915 /* 53 */ LaneBitmask(0x0000000C), LaneBitmask(0x00000030), LaneBitmask(0x000000C0), LaneBitmask::getAll(),
916 /* 57 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000010), LaneBitmask(0x00000020), LaneBitmask(0x00000040), LaneBitmask(0x00000080), LaneBitmask(0x00000100), LaneBitmask(0x00000200), LaneBitmask::getAll(),
917 /* 66 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000010), LaneBitmask(0x00000020), LaneBitmask(0x00000040), LaneBitmask(0x00000080), LaneBitmask(0x00000300), LaneBitmask::getAll(),
918 /* 74 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000010), LaneBitmask(0x00000020), LaneBitmask(0x000000C0), LaneBitmask(0x00000300), LaneBitmask::getAll(),
919 /* 81 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000030), LaneBitmask(0x000000C0), LaneBitmask(0x00000300), LaneBitmask::getAll(),
920 /* 87 */ LaneBitmask(0x0000000C), LaneBitmask(0x00000030), LaneBitmask(0x000000C0), LaneBitmask(0x00000300), LaneBitmask::getAll(),
921 /* 92 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000040), LaneBitmask(0x00000080), LaneBitmask(0x00000400), LaneBitmask(0x00000800), LaneBitmask::getAll(),
922 /* 99 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000040), LaneBitmask(0x00000080), LaneBitmask(0x00000C00), LaneBitmask::getAll(),
923 /* 105 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x000000C0), LaneBitmask(0x00000C00), LaneBitmask::getAll(),
924 /* 110 */ LaneBitmask(0x0000000C), LaneBitmask(0x000000C0), LaneBitmask(0x00000C00), LaneBitmask::getAll(),
925 /* 114 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000040), LaneBitmask(0x00000080), LaneBitmask(0x00000400), LaneBitmask(0x00000800), LaneBitmask(0x00004000), LaneBitmask(0x00008000), LaneBitmask::getAll(),
926 /* 123 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000040), LaneBitmask(0x00000080), LaneBitmask(0x00000400), LaneBitmask(0x00000800), LaneBitmask(0x0000C000), LaneBitmask::getAll(),
927 /* 131 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000040), LaneBitmask(0x00000080), LaneBitmask(0x00000C00), LaneBitmask(0x0000C000), LaneBitmask::getAll(),
928 /* 138 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x000000C0), LaneBitmask(0x00000C00), LaneBitmask(0x0000C000), LaneBitmask::getAll(),
929 /* 144 */ LaneBitmask(0x0000000C), LaneBitmask(0x000000C0), LaneBitmask(0x00000C00), LaneBitmask(0x0000C000), LaneBitmask::getAll(),
930 /* 149 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000010), LaneBitmask(0x00000020), LaneBitmask(0x00000040), LaneBitmask(0x00000080), LaneBitmask(0x00000100), LaneBitmask(0x00000200), LaneBitmask(0x00000400), LaneBitmask(0x00000800), LaneBitmask(0x00001000), LaneBitmask(0x00002000), LaneBitmask(0x00004000), LaneBitmask(0x00008000), LaneBitmask(0x00010000), LaneBitmask(0x00020000), LaneBitmask::getAll(),
931 /* 166 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000010), LaneBitmask(0x00000020), LaneBitmask(0x00000040), LaneBitmask(0x00000080), LaneBitmask(0x00000100), LaneBitmask(0x00000200), LaneBitmask(0x00000400), LaneBitmask(0x00000800), LaneBitmask(0x00001000), LaneBitmask(0x00002000), LaneBitmask(0x0000C000), LaneBitmask(0x00030000), LaneBitmask::getAll(),
932 /* 181 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000010), LaneBitmask(0x00000020), LaneBitmask(0x00000040), LaneBitmask(0x00000080), LaneBitmask(0x00000100), LaneBitmask(0x00000200), LaneBitmask(0x00000C00), LaneBitmask(0x00003000), LaneBitmask(0x0000C000), LaneBitmask(0x00030000), LaneBitmask::getAll(),
933 /* 194 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000010), LaneBitmask(0x00000020), LaneBitmask(0x000000C0), LaneBitmask(0x00000300), LaneBitmask(0x00000C00), LaneBitmask(0x00003000), LaneBitmask(0x0000C000), LaneBitmask(0x00030000), LaneBitmask::getAll(),
934 /* 205 */ LaneBitmask(0x0000000C), LaneBitmask(0x00000030), LaneBitmask(0x000000C0), LaneBitmask(0x00000300), LaneBitmask(0x00000C00), LaneBitmask(0x00003000), LaneBitmask(0x0000C000), LaneBitmask(0x00030000), LaneBitmask::getAll(),
3583 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
3583 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
3584 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
3584 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
3762 static const LaneBitmask SubRegIndexLaneMaskTable[] = {
3763 LaneBitmask::getAll(),
8456 LaneBitmask Mask;
8460 { LaneBitmask(0xFFFFFFFF), 0 }, { LaneBitmask::getNone(), 0 }, // Sequence 0
8461 { LaneBitmask(0xFFFFFFFF), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 2
8462 { LaneBitmask(0xFFFFFFFF), 4 }, { LaneBitmask::getNone(), 0 }, // Sequence 4
8463 { LaneBitmask(0xFFFFFFFF), 6 }, { LaneBitmask::getNone(), 0 }, // Sequence 6
8464 { LaneBitmask(0xFFFFFFFF), 8 }, { LaneBitmask::getNone(), 0 }, // Sequence 8
8465 { LaneBitmask(0xFFFFFFFF), 10 }, { LaneBitmask::getNone(), 0 }, // Sequence 10
8466 { LaneBitmask(0xFFFFFFFF), 12 }, { LaneBitmask::getNone(), 0 }, // Sequence 12
8467 { LaneBitmask(0xFFFFFFFF), 14 }, { LaneBitmask::getNone(), 0 }, // Sequence 14
8468 { LaneBitmask(0xFFFFFFFF), 1 }, { LaneBitmask::getNone(), 0 }, // Sequence 16
8469 { LaneBitmask(0xFFFFFFFF), 3 }, { LaneBitmask::getNone(), 0 }, // Sequence 18
8470 { LaneBitmask(0xFFFFFFFF), 5 }, { LaneBitmask::getNone(), 0 }, // Sequence 20
8471 { LaneBitmask(0xFFFFFFFF), 7 }, { LaneBitmask::getNone(), 0 }, // Sequence 22
8472 { LaneBitmask(0xFFFFFFFF), 9 }, { LaneBitmask::getNone(), 0 }, // Sequence 24
8473 { LaneBitmask(0xFFFFFFFF), 11 }, { LaneBitmask::getNone(), 0 }, // Sequence 26
8474 { LaneBitmask(0xFFFFFFFF), 13 }, { LaneBitmask::getNone(), 0 }, // Sequence 28
8475 { LaneBitmask(0xFFFFFFFF), 15 }, { LaneBitmask::getNone(), 0 }, // Sequence 30
8476 { LaneBitmask(0xFFFFFFFF), 16 }, { LaneBitmask::getNone(), 0 }, // Sequence 32
8477 { LaneBitmask(0xFFFFFFFF), 17 }, { LaneBitmask::getNone(), 0 } // Sequence 34
8538 LaneBitmask ARMGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
8538 LaneBitmask ARMGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
8540 LaneBitmask Result;
8542 LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger();
8544 Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S)));
8551 LaneBitmask ARMGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
8551 LaneBitmask ARMGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
8554 LaneBitmask Result;
8556 LaneBitmask::Type M = LaneMask.getAsInteger();
8558 Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S)));
15934 extern const LaneBitmask ARMLaneMaskLists[];
gen/lib/Target/AVR/AVRGenRegisterInfo.inc 185 extern const LaneBitmask AVRLaneMaskLists[] = {
186 /* 0 */ LaneBitmask(0x00000000), LaneBitmask::getAll(),
187 /* 2 */ LaneBitmask(0x00000002), LaneBitmask(0x00000001), LaneBitmask::getAll(),
858 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
858 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
859 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
859 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
924 static const LaneBitmask SubRegIndexLaneMaskTable[] = {
925 LaneBitmask::getAll(),
1446 LaneBitmask Mask;
1450 { LaneBitmask(0xFFFFFFFF), 0 }, { LaneBitmask::getNone(), 0 }, // Sequence 0
1451 { LaneBitmask(0xFFFFFFFF), 1 }, { LaneBitmask::getNone(), 0 } // Sequence 2
1458 LaneBitmask AVRGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
1458 LaneBitmask AVRGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
1460 LaneBitmask Result;
1462 LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger();
1464 Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S)));
1471 LaneBitmask AVRGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
1471 LaneBitmask AVRGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
1474 LaneBitmask Result;
1476 LaneBitmask::Type M = LaneMask.getAsInteger();
1478 Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S)));
1676 extern const LaneBitmask AVRLaneMaskLists[];
gen/lib/Target/BPF/BPFGenRegisterInfo.inc 95 extern const LaneBitmask BPFLaneMaskLists[] = {
96 /* 0 */ LaneBitmask(0x00000000), LaneBitmask::getAll(),
97 /* 2 */ LaneBitmask(0x00000001), LaneBitmask::getAll(),
388 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
388 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
389 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
389 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
438 static const LaneBitmask SubRegIndexLaneMaskTable[] = {
439 LaneBitmask::getAll(),
539 LaneBitmask Mask;
543 { LaneBitmask(0xFFFFFFFF), 0 }, { LaneBitmask::getNone(), 0 } // Sequence 0
549 LaneBitmask BPFGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
549 LaneBitmask BPFGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
551 LaneBitmask Result;
553 LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger();
555 Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S)));
562 LaneBitmask BPFGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
562 LaneBitmask BPFGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
565 LaneBitmask Result;
567 LaneBitmask::Type M = LaneMask.getAsInteger();
569 Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S)));
662 extern const LaneBitmask BPFLaneMaskLists[];
gen/lib/Target/Hexagon/HexagonGenRegisterInfo.inc 448 extern const LaneBitmask HexagonLaneMaskLists[] = {
449 /* 0 */ LaneBitmask(0x00000000), LaneBitmask(0x00000000), LaneBitmask(0x00000000), LaneBitmask(0x00000000), LaneBitmask::getAll(),
450 /* 5 */ LaneBitmask(0x00000004), LaneBitmask(0x00000000), LaneBitmask::getAll(),
451 /* 8 */ LaneBitmask(0x00000002), LaneBitmask(0x00000001), LaneBitmask::getAll(),
452 /* 11 */ LaneBitmask(0x00000001), LaneBitmask(0x00000002), LaneBitmask::getAll(),
453 /* 14 */ LaneBitmask(0x00000001), LaneBitmask(0x00000002), LaneBitmask(0x00000002), LaneBitmask(0x00000002), LaneBitmask(0x00000002), LaneBitmask::getAll(),
454 /* 20 */ LaneBitmask(0x00000010), LaneBitmask(0x00000008), LaneBitmask::getAll(),
455 /* 23 */ LaneBitmask(0x00000010), LaneBitmask(0x00000008), LaneBitmask(0x00000040), LaneBitmask(0x00000020), LaneBitmask::getAll(),
2273 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
2273 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
2274 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
2274 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
2355 static const LaneBitmask SubRegIndexLaneMaskTable[] = {
2356 LaneBitmask::getAll(),
3192 LaneBitmask Mask;
3196 { LaneBitmask(0xFFFFFFFF), 0 }, { LaneBitmask::getNone(), 0 }, // Sequence 0
3197 { LaneBitmask(0xFFFFFFFF), 1 }, { LaneBitmask::getNone(), 0 }, // Sequence 2
3198 { LaneBitmask(0xFFFFFFFF), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 4
3199 { LaneBitmask(0xFFFFFFFF), 3 }, { LaneBitmask::getNone(), 0 }, // Sequence 6
3200 { LaneBitmask(0xFFFFFFFF), 4 }, { LaneBitmask::getNone(), 0 }, // Sequence 8
3201 { LaneBitmask(0xFFFFFFFF), 5 }, { LaneBitmask::getNone(), 0 }, // Sequence 10
3202 { LaneBitmask(0xFFFFFFFF), 6 }, { LaneBitmask::getNone(), 0 } // Sequence 12
3216 LaneBitmask HexagonGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
3216 LaneBitmask HexagonGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
3218 LaneBitmask Result;
3220 LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger();
3222 Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S)));
3229 LaneBitmask HexagonGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
3229 LaneBitmask HexagonGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
3232 LaneBitmask Result;
3234 LaneBitmask::Type M = LaneMask.getAsInteger();
3236 Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S)));
3639 extern const LaneBitmask HexagonLaneMaskLists[];
gen/lib/Target/Lanai/LanaiGenRegisterInfo.inc 127 extern const LaneBitmask LanaiLaneMaskLists[] = {
128 /* 0 */ LaneBitmask(0x00000000), LaneBitmask::getAll(),
129 /* 2 */ LaneBitmask(0x00000001), LaneBitmask::getAll(),
569 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
569 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
570 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
570 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
619 static const LaneBitmask SubRegIndexLaneMaskTable[] = {
620 LaneBitmask::getAll(),
759 LaneBitmask Mask;
763 { LaneBitmask(0xFFFFFFFF), 0 }, { LaneBitmask::getNone(), 0 } // Sequence 0
769 LaneBitmask LanaiGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
769 LaneBitmask LanaiGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
771 LaneBitmask Result;
773 LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger();
775 Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S)));
782 LaneBitmask LanaiGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
782 LaneBitmask LanaiGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
785 LaneBitmask Result;
787 LaneBitmask::Type M = LaneMask.getAsInteger();
789 Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S)));
888 extern const LaneBitmask LanaiLaneMaskLists[];
gen/lib/Target/MSP430/MSP430GenRegisterInfo.inc 109 extern const LaneBitmask MSP430LaneMaskLists[] = {
110 /* 0 */ LaneBitmask(0x00000000), LaneBitmask::getAll(),
111 /* 2 */ LaneBitmask(0x00000001), LaneBitmask::getAll(),
313 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
313 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
314 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
314 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
363 static const LaneBitmask SubRegIndexLaneMaskTable[] = {
364 LaneBitmask::getAll(),
472 LaneBitmask Mask;
476 { LaneBitmask(0xFFFFFFFF), 0 }, { LaneBitmask::getNone(), 0 } // Sequence 0
482 LaneBitmask MSP430GenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
482 LaneBitmask MSP430GenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
484 LaneBitmask Result;
486 LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger();
488 Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S)));
495 LaneBitmask MSP430GenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
495 LaneBitmask MSP430GenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
498 LaneBitmask Result;
500 LaneBitmask::Type M = LaneMask.getAsInteger();
502 Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S)));
595 extern const LaneBitmask MSP430LaneMaskLists[];
gen/lib/Target/Mips/MipsGenRegisterInfo.inc 676 extern const LaneBitmask MipsLaneMaskLists[] = {
677 /* 0 */ LaneBitmask(0x00000000), LaneBitmask::getAll(),
678 /* 2 */ LaneBitmask(0x00000001), LaneBitmask::getAll(),
679 /* 4 */ LaneBitmask(0x00000002), LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000010), LaneBitmask(0x00000020), LaneBitmask::getAll(),
680 /* 10 */ LaneBitmask(0x00000001), LaneBitmask(0x00000040), LaneBitmask::getAll(),
3811 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
3811 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
3812 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
3812 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
3938 static const LaneBitmask SubRegIndexLaneMaskTable[] = {
3939 LaneBitmask::getAll(),
6171 LaneBitmask Mask;
6175 { LaneBitmask(0xFFFFFFFF), 0 }, { LaneBitmask::getNone(), 0 }, // Sequence 0
6176 { LaneBitmask(0xFFFFFFFF), 1 }, { LaneBitmask::getNone(), 0 }, // Sequence 2
6177 { LaneBitmask(0xFFFFFFFF), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 4
6178 { LaneBitmask(0xFFFFFFFF), 3 }, { LaneBitmask::getNone(), 0 }, // Sequence 6
6179 { LaneBitmask(0xFFFFFFFF), 4 }, { LaneBitmask::getNone(), 0 }, // Sequence 8
6180 { LaneBitmask(0xFFFFFFFF), 5 }, { LaneBitmask::getNone(), 0 }, // Sequence 10
6181 { LaneBitmask(0xFFFFFFFF), 6 }, { LaneBitmask::getNone(), 0 } // Sequence 12
6197 LaneBitmask MipsGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
6197 LaneBitmask MipsGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
6199 LaneBitmask Result;
6201 LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger();
6203 Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S)));
6210 LaneBitmask MipsGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
6210 LaneBitmask MipsGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
6213 LaneBitmask Result;
6215 LaneBitmask::Type M = LaneMask.getAsInteger();
6217 Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S)));
7331 extern const LaneBitmask MipsLaneMaskLists[];
gen/lib/Target/NVPTX/NVPTXGenRegisterInfo.inc 163 extern const LaneBitmask NVPTXLaneMaskLists[] = {
164 /* 0 */ LaneBitmask(0x00000000), LaneBitmask::getAll(),
823 static const LaneBitmask SubRegIndexLaneMaskTable[] = {
824 LaneBitmask::getAll(),
1296 extern const LaneBitmask NVPTXLaneMaskLists[];
gen/lib/Target/PowerPC/PPCGenRegisterInfo.inc 484 extern const LaneBitmask PPCLaneMaskLists[] = {
485 /* 0 */ LaneBitmask(0x00000000), LaneBitmask::getAll(),
486 /* 2 */ LaneBitmask(0x00000001), LaneBitmask::getAll(),
487 /* 4 */ LaneBitmask(0x00000002), LaneBitmask::getAll(),
488 /* 6 */ LaneBitmask(0x00000010), LaneBitmask(0x00000008), LaneBitmask(0x00000004), LaneBitmask(0x00000020), LaneBitmask::getAll(),
3845 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
3845 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
3846 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
3846 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
3935 static const LaneBitmask SubRegIndexLaneMaskTable[] = {
3936 LaneBitmask::getAll(),
5175 LaneBitmask Mask;
5179 { LaneBitmask(0xFFFFFFFF), 0 }, { LaneBitmask::getNone(), 0 }, // Sequence 0
5180 { LaneBitmask(0xFFFFFFFF), 1 }, { LaneBitmask::getNone(), 0 }, // Sequence 2
5181 { LaneBitmask(0xFFFFFFFF), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 4
5182 { LaneBitmask(0xFFFFFFFF), 3 }, { LaneBitmask::getNone(), 0 }, // Sequence 6
5183 { LaneBitmask(0xFFFFFFFF), 4 }, { LaneBitmask::getNone(), 0 }, // Sequence 8
5184 { LaneBitmask(0xFFFFFFFF), 5 }, { LaneBitmask::getNone(), 0 } // Sequence 10
5195 LaneBitmask PPCGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
5195 LaneBitmask PPCGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
5197 LaneBitmask Result;
5199 LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger();
5201 Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S)));
5208 LaneBitmask PPCGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
5208 LaneBitmask PPCGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
5211 LaneBitmask Result;
5213 LaneBitmask::Type M = LaneMask.getAsInteger();
5215 Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S)));
5645 extern const LaneBitmask PPCLaneMaskLists[];
gen/lib/Target/RISCV/RISCVGenRegisterInfo.inc 188 extern const LaneBitmask RISCVLaneMaskLists[] = {
189 /* 0 */ LaneBitmask(0x00000000), LaneBitmask::getAll(),
190 /* 2 */ LaneBitmask(0x00000001), LaneBitmask::getAll(),
1116 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
1116 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
1117 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
1117 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
1178 static const LaneBitmask SubRegIndexLaneMaskTable[] = {
1179 LaneBitmask::getAll(),
1613 LaneBitmask Mask;
1617 { LaneBitmask(0xFFFFFFFF), 0 }, { LaneBitmask::getNone(), 0 } // Sequence 0
1623 LaneBitmask RISCVGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
1623 LaneBitmask RISCVGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
1625 LaneBitmask Result;
1627 LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger();
1629 Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S)));
1636 LaneBitmask RISCVGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
1636 LaneBitmask RISCVGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
1639 LaneBitmask Result;
1641 LaneBitmask::Type M = LaneMask.getAsInteger();
1643 Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S)));
1791 extern const LaneBitmask RISCVLaneMaskLists[];
gen/lib/Target/Sparc/SparcGenRegisterInfo.inc 449 extern const LaneBitmask SparcLaneMaskLists[] = {
450 /* 0 */ LaneBitmask(0x00000000), LaneBitmask::getAll(),
451 /* 2 */ LaneBitmask(0x00000001), LaneBitmask(0x00000002), LaneBitmask::getAll(),
452 /* 5 */ LaneBitmask(0x00000001), LaneBitmask(0x00000002), LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask::getAll(),
453 /* 10 */ LaneBitmask(0x00000003), LaneBitmask(0x0000000C), LaneBitmask::getAll(),
1889 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
1889 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
1890 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
1890 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
1955 static const LaneBitmask SubRegIndexLaneMaskTable[] = {
1956 LaneBitmask::getAll(),
2504 LaneBitmask Mask;
2508 { LaneBitmask(0xFFFFFFFF), 0 }, { LaneBitmask::getNone(), 0 }, // Sequence 0
2509 { LaneBitmask(0xFFFFFFFF), 1 }, { LaneBitmask::getNone(), 0 }, // Sequence 2
2510 { LaneBitmask(0xFFFFFFFF), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 4
2511 { LaneBitmask(0xFFFFFFFF), 3 }, { LaneBitmask::getNone(), 0 } // Sequence 6
2522 LaneBitmask SparcGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
2522 LaneBitmask SparcGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
2524 LaneBitmask Result;
2526 LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger();
2528 Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S)));
2535 LaneBitmask SparcGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
2535 LaneBitmask SparcGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
2538 LaneBitmask Result;
2540 LaneBitmask::Type M = LaneMask.getAsInteger();
2542 Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S)));
2756 extern const LaneBitmask SparcLaneMaskLists[];
gen/lib/Target/SystemZ/SystemZGenRegisterInfo.inc 334 extern const LaneBitmask SystemZLaneMaskLists[] = {
335 /* 0 */ LaneBitmask(0x00000000), LaneBitmask::getAll(),
336 /* 2 */ LaneBitmask(0x00000002), LaneBitmask(0x00000001), LaneBitmask::getAll(),
337 /* 5 */ LaneBitmask(0x00000004), LaneBitmask(0x00000002), LaneBitmask(0x00000008), LaneBitmask(0x00000001), LaneBitmask::getAll(),
1783 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
1783 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
1784 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
1784 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
1860 static const LaneBitmask SubRegIndexLaneMaskTable[] = {
1861 LaneBitmask::getAll(),
2590 LaneBitmask Mask;
2594 { LaneBitmask(0xFFFFFFFF), 0 }, { LaneBitmask::getNone(), 0 }, // Sequence 0
2595 { LaneBitmask(0x00000001), 1 }, { LaneBitmask(0x00000008), 31 }, { LaneBitmask::getNone(), 0 }, // Sequence 2
2596 { LaneBitmask(0xFFFFFFFF), 1 }, { LaneBitmask::getNone(), 0 }, // Sequence 5
2597 { LaneBitmask(0xFFFFFFFF), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 7
2598 { LaneBitmask(0xFFFFFFFF), 3 }, { LaneBitmask::getNone(), 0 } // Sequence 9
2609 LaneBitmask SystemZGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
2609 LaneBitmask SystemZGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
2611 LaneBitmask Result;
2613 LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger();
2615 Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S)));
2622 LaneBitmask SystemZGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
2622 LaneBitmask SystemZGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
2625 LaneBitmask Result;
2627 LaneBitmask::Type M = LaneMask.getAsInteger();
2629 Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S)));
2922 extern const LaneBitmask SystemZLaneMaskLists[];
gen/lib/Target/WebAssembly/WebAssemblyGenRegisterInfo.inc 73 extern const LaneBitmask WebAssemblyLaneMaskLists[] = {
74 /* 0 */ LaneBitmask(0x00000000), LaneBitmask::getAll(),
313 static const LaneBitmask SubRegIndexLaneMaskTable[] = {
314 LaneBitmask::getAll(),
549 extern const LaneBitmask WebAssemblyLaneMaskLists[];
gen/lib/Target/X86/X86GenRegisterInfo.inc 571 extern const LaneBitmask X86LaneMaskLists[] = {
572 /* 0 */ LaneBitmask(0x00000000), LaneBitmask::getAll(),
573 /* 2 */ LaneBitmask(0x00000002), LaneBitmask(0x00000001), LaneBitmask::getAll(),
574 /* 5 */ LaneBitmask(0x00000001), LaneBitmask(0x00000004), LaneBitmask::getAll(),
575 /* 8 */ LaneBitmask(0x00000002), LaneBitmask(0x00000001), LaneBitmask(0x00000008), LaneBitmask::getAll(),
576 /* 12 */ LaneBitmask(0x00000001), LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask::getAll(),
577 /* 16 */ LaneBitmask(0x00000007), LaneBitmask(0x00000008), LaneBitmask::getAll(),
578 /* 19 */ LaneBitmask(0x00000010), LaneBitmask(0x00000020), LaneBitmask::getAll(),
579 /* 22 */ LaneBitmask(0x00000040), LaneBitmask::getAll(),
4313 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
4313 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
4314 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
4314 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
4497 static const LaneBitmask SubRegIndexLaneMaskTable[] = {
4498 LaneBitmask::getAll(),
8119 LaneBitmask Mask;
8123 { LaneBitmask(0xFFFFFFFF), 0 }, { LaneBitmask::getNone(), 0 }, // Sequence 0
8124 { LaneBitmask(0xFFFFFFFF), 1 }, { LaneBitmask::getNone(), 0 }, // Sequence 2
8125 { LaneBitmask(0xFFFFFFFF), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 4
8126 { LaneBitmask(0xFFFFFFFF), 3 }, { LaneBitmask::getNone(), 0 }, // Sequence 6
8127 { LaneBitmask(0xFFFFFFFF), 4 }, { LaneBitmask::getNone(), 0 }, // Sequence 8
8128 { LaneBitmask(0xFFFFFFFF), 5 }, { LaneBitmask::getNone(), 0 }, // Sequence 10
8129 { LaneBitmask(0xFFFFFFFF), 6 }, { LaneBitmask::getNone(), 0 } // Sequence 12
8144 LaneBitmask X86GenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
8144 LaneBitmask X86GenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
8146 LaneBitmask Result;
8148 LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger();
8150 Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S)));
8157 LaneBitmask X86GenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
8157 LaneBitmask X86GenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
8160 LaneBitmask Result;
8162 LaneBitmask::Type M = LaneMask.getAsInteger();
8164 Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S)));
9881 extern const LaneBitmask X86LaneMaskLists[];
gen/lib/Target/XCore/XCoreGenRegisterInfo.inc 73 extern const LaneBitmask XCoreLaneMaskLists[] = {
74 /* 0 */ LaneBitmask(0x00000000), LaneBitmask::getAll(),
380 static const LaneBitmask SubRegIndexLaneMaskTable[] = {
381 LaneBitmask::getAll(),
534 extern const LaneBitmask XCoreLaneMaskLists[];
include/llvm/ADT/ArrayRef.h 43 using iterator = const T *;
44 using const_iterator = const T *;
50 const T *Data = nullptr;
66 /*implicit*/ ArrayRef(const T &OneElt)
70 /*implicit*/ ArrayRef(const T *data, size_t length)
74 ArrayRef(const T *begin, const T *end)
74 ArrayRef(const T *begin, const T *end)
81 /*implicit*/ ArrayRef(const SmallVectorTemplateCommon<T, U> &Vec)
87 /*implicit*/ ArrayRef(const std::vector<T, A> &Vec)
92 /*implicit*/ constexpr ArrayRef(const std::array<T, N> &Arr)
97 /*implicit*/ constexpr ArrayRef(const T (&Arr)[N]) : Data(Arr), Length(N) {}
100 /*implicit*/ ArrayRef(const std::initializer_list<T> &Vec)
145 const T *data() const { return Data; }
151 const T &front() const {
157 const T &back() const {
163 template <typename Allocator> ArrayRef<T> copy(Allocator &A) {
178 ArrayRef<T> slice(size_t N, size_t M) const {
184 ArrayRef<T> slice(size_t N) const { return slice(N, size() - N); }
187 ArrayRef<T> drop_front(size_t N = 1) const {
193 ArrayRef<T> drop_back(size_t N = 1) const {
200 template <class PredicateT> ArrayRef<T> drop_while(PredicateT Pred) const {
206 template <class PredicateT> ArrayRef<T> drop_until(PredicateT Pred) const {
211 ArrayRef<T> take_front(size_t N = 1) const {
218 ArrayRef<T> take_back(size_t N = 1) const {
226 template <class PredicateT> ArrayRef<T> take_while(PredicateT Pred) const {
232 template <class PredicateT> ArrayRef<T> take_until(PredicateT Pred) const {
239 const T &operator[](size_t Index) const {
249 typename std::enable_if<std::is_same<U, T>::value, ArrayRef<T>>::type &
257 typename std::enable_if<std::is_same<U, T>::value, ArrayRef<T>>::type &
263 std::vector<T> vec() const {
270 operator std::vector<T>() const {
468 ArrayRef<T> makeArrayRef(const SmallVectorImpl<T> &Vec) {
468 ArrayRef<T> makeArrayRef(const SmallVectorImpl<T> &Vec) {
474 ArrayRef<T> makeArrayRef(const SmallVector<T, N> &Vec) {
474 ArrayRef<T> makeArrayRef(const SmallVector<T, N> &Vec) {
include/llvm/ADT/DenseMap.h 40 struct DenseMapPair : public std::pair<KeyT, ValueT> {
45 ValueT &getSecond() { return std::pair<KeyT, ValueT>::second; }
46 const ValueT &getSecond() const { return std::pair<KeyT, ValueT>::second; }
66 using mapped_type = ValueT;
69 using iterator = DenseMapIterator<KeyT, ValueT, KeyInfoT, BucketT>;
71 DenseMapIterator<KeyT, ValueT, KeyInfoT, BucketT, true>;
185 ValueT lookup(const_arg_type_t<KeyT> Val) const {
195 std::pair<iterator, bool> insert(const std::pair<KeyT, ValueT> &KV) {
202 std::pair<iterator, bool> insert(std::pair<KeyT, ValueT> &&KV) {
249 std::pair<iterator, bool> insert_as(std::pair<KeyT, ValueT> &&KV,
299 ValueT &operator[](const KeyT &Key) {
311 ValueT &operator[](KeyT &&Key) {
380 ::new (&DestBucket->getSecond()) ValueT(std::move(B->getSecond()));
392 const DenseMapBase<OtherBaseT, KeyT, ValueT, KeyInfoT, BucketT> &other) {
400 is_trivially_copyable<ValueT>::value)
410 ValueT(other.getBuckets()[i].getSecond());
520 ::new (&TheBucket->getSecond()) ValueT(std::forward<ValueArgs>(Values)...);
526 ValueT &&Value, LookupKeyT &Lookup) {
684 class DenseMap : public DenseMapBase<DenseMap<KeyT, ValueT, KeyInfoT, BucketT>,
685 KeyT, ValueT, KeyInfoT, BucketT> {
690 using BaseT = DenseMapBase<DenseMap, KeyT, ValueT, KeyInfoT, BucketT>;
1163 using ConstIterator = DenseMapIterator<KeyT, ValueT, KeyInfoT, Bucket, true>;
1199 const DenseMapIterator<KeyT, ValueT, KeyInfoT, Bucket, IsConstSrc> &I)
include/llvm/ADT/STLExtras.h 1186 auto find(R &&Range, const T &Val) -> decltype(adl_begin(Range)) {
include/llvm/ADT/SmallVector.h 75 AlignedCharArrayUnion<T> FirstEl;
114 using value_type = T;
115 using iterator = T *;
116 using const_iterator = const T *;
121 using reference = T &;
122 using const_reference = const T &;
123 using pointer = T *;
124 using const_pointer = const T *;
259 class SmallVectorTemplateBase<T, true> : public SmallVectorTemplateCommon<T> {
264 static void destroy_range(T *, T *) {}
264 static void destroy_range(T *, T *) {}
286 T1 *I, T1 *E, T2 *Dest,
286 T1 *I, T1 *E, T2 *Dest,
286 T1 *I, T1 *E, T2 *Dest,
287 typename std::enable_if<std::is_same<typename std::remove_const<T1>::type,
288 T2>::value>::type * = nullptr) {
294 memcpy(reinterpret_cast<void *>(Dest), I, (E - I) * sizeof(T));
299 void grow(size_t MinSize = 0) { this->grow_pod(MinSize, sizeof(T)); }
302 void push_back(const T &Elt) {
315 class SmallVectorImpl : public SmallVectorTemplateBase<T> {
316 using SuperClass = SmallVectorTemplateBase<T>;
357 void resize(size_type N, const T &NV) {
374 LLVM_NODISCARD T pop_back_val() {
397 void append(size_type NumInputs, const T &Elt) {
405 void append(std::initializer_list<T> IL) {
412 void assign(size_type NumElts, const T &Elt) {
429 void assign(std::initializer_list<T> IL) {
467 iterator insert(iterator I, T &&Elt) {
497 iterator insert(iterator I, const T &Elt) {
526 iterator insert(iterator I, size_type NumToInsert, const T &Elt) {
606 T *OldEnd = this->end();
621 T *OldEnd = this->end();
627 for (T *J = I; NumOverwritten > 0; --NumOverwritten) {
637 void insert(iterator I, std::initializer_list<T> IL) {
820 AlignedCharArrayUnion<T> InlineElts[N];
837 class SmallVector : public SmallVectorImpl<T>, SmallVectorStorage<T, N> {
837 class SmallVector : public SmallVectorImpl<T>, SmallVectorStorage<T, N> {
846 explicit SmallVector(size_t Size, const T &Value = T())
865 SmallVector(std::initializer_list<T> IL) : SmallVectorImpl<T>(N) {
884 SmallVector(SmallVectorImpl<T> &&RHS) : SmallVectorImpl<T>(N) {
include/llvm/CodeGen/LiveInterval.h 689 LaneBitmask LaneMask;
692 SubRange(LaneBitmask LaneMask) : LaneMask(LaneMask) {}
695 SubRange(LaneBitmask LaneMask, const LiveRange &Other,
775 LaneBitmask LaneMask) {
784 LaneBitmask LaneMask,
820 LaneBitmask LaneMask,
839 void refineSubRanges(BumpPtrAllocator &Allocator, LaneBitmask LaneMask,
include/llvm/CodeGen/LiveIntervals.h 477 LaneBitmask LaneMask);
487 LaneBitmask LaneMask = LaneBitmask::getAll());
include/llvm/CodeGen/LiveRangeCalc.h 172 void extendToUses(LiveRange &LR, unsigned Reg, LaneBitmask LaneMask,
223 extendToUses(LR, PhysReg, LaneBitmask::getAll());
include/llvm/CodeGen/LiveRegUnits.h 94 void addRegMasked(MCPhysReg Reg, LaneBitmask Mask) {
96 LaneBitmask UnitMask = (*Unit).second;
include/llvm/CodeGen/MachineBasicBlock.h 74 LaneBitmask LaneMask;
76 RegisterMaskPair(MCPhysReg PhysReg, LaneBitmask LaneMask)
316 LaneBitmask LaneMask = LaneBitmask::getAll()) {
316 LaneBitmask LaneMask = LaneBitmask::getAll()) {
338 LaneBitmask LaneMask = LaneBitmask::getAll());
338 LaneBitmask LaneMask = LaneBitmask::getAll());
342 LaneBitmask LaneMask = LaneBitmask::getAll()) const;
342 LaneBitmask LaneMask = LaneBitmask::getAll()) const;
include/llvm/CodeGen/MachineRegisterInfo.h 960 LaneBitmask getMaxLaneMaskForVReg(unsigned Reg) const;
include/llvm/CodeGen/RegisterPressure.h 41 LaneBitmask LaneMask;
43 RegisterMaskPair(unsigned RegUnit, LaneBitmask LaneMask)
264 LaneBitmask LaneMask;
266 IndexMaskPair(unsigned Index, LaneBitmask LaneMask)
295 LaneBitmask contains(unsigned Reg) const {
299 return LaneBitmask::getNone();
305 LaneBitmask insert(RegisterMaskPair Pair) {
309 LaneBitmask PrevMask = InsertRes.first->LaneMask;
313 return LaneBitmask::getNone();
318 LaneBitmask erase(RegisterMaskPair Pair) {
322 return LaneBitmask::getNone();
323 LaneBitmask PrevMask = I->LaneMask;
551 void increaseRegPressure(unsigned RegUnit, LaneBitmask PreviousMask,
552 LaneBitmask NewMask);
553 void decreaseRegPressure(unsigned RegUnit, LaneBitmask PreviousMask,
554 LaneBitmask NewMask);
564 LaneBitmask getLastUsedLanes(unsigned RegUnit, SlotIndex Pos) const;
565 LaneBitmask getLiveLanesAt(unsigned RegUnit, SlotIndex Pos) const;
566 LaneBitmask getLiveThroughAt(unsigned RegUnit, SlotIndex Pos) const;
include/llvm/CodeGen/RegisterScavenging.h 186 void setRegUsed(Register Reg, LaneBitmask LaneMask = LaneBitmask::getAll());
186 void setRegUsed(Register Reg, LaneBitmask LaneMask = LaneBitmask::getAll());
include/llvm/CodeGen/ScheduleDAGInstrs.h 54 LaneBitmask LaneMask;
57 VReg2SUnit(unsigned VReg, LaneBitmask LaneMask, SUnit *SU)
69 VReg2SUnitOperIdx(unsigned VReg, LaneBitmask LaneMask,
377 LaneBitmask getLaneMaskForMO(const MachineOperand &MO) const;
include/llvm/CodeGen/TargetRegisterInfo.h 54 const LaneBitmask LaneMask;
203 LaneBitmask getLaneMask() const {
240 const LaneBitmask *SubRegIndexLaneMasks;
243 LaneBitmask CoveringLanes;
252 const LaneBitmask *SRILaneMasks,
253 LaneBitmask CoveringLanes,
348 LaneBitmask getSubRegIndexLaneMask(unsigned SubIdx) const {
376 LaneBitmask getCoveringLanes() const { return CoveringLanes; }
579 LaneBitmask composeSubRegIndexLaneMask(unsigned IdxA,
580 LaneBitmask Mask) const {
593 LaneBitmask reverseComposeSubRegIndexLaneMask(unsigned IdxA,
594 LaneBitmask LaneMask) const {
611 virtual LaneBitmask
612 composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const {
616 virtual LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned,
617 LaneBitmask) const {
include/llvm/MC/LaneBitmask.h 48 constexpr bool operator== (LaneBitmask M) const { return Mask == M.Mask; }
49 constexpr bool operator!= (LaneBitmask M) const { return Mask != M.Mask; }
50 constexpr bool operator< (LaneBitmask M) const { return Mask < M.Mask; }
55 constexpr LaneBitmask operator~() const {
58 constexpr LaneBitmask operator|(LaneBitmask M) const {
58 constexpr LaneBitmask operator|(LaneBitmask M) const {
61 constexpr LaneBitmask operator&(LaneBitmask M) const {
61 constexpr LaneBitmask operator&(LaneBitmask M) const {
64 LaneBitmask &operator|=(LaneBitmask M) {
64 LaneBitmask &operator|=(LaneBitmask M) {
68 LaneBitmask &operator&=(LaneBitmask M) {
68 LaneBitmask &operator&=(LaneBitmask M) {
82 static constexpr LaneBitmask getNone() { return LaneBitmask(0); }
83 static constexpr LaneBitmask getAll() { return ~LaneBitmask(0); }
84 static constexpr LaneBitmask getLane(unsigned Lane) {
93 inline Printable PrintLaneMask(LaneBitmask LaneMask) {
95 OS << format(LaneBitmask::FormatStr, LaneMask.getAsInteger());
include/llvm/MC/MCRegisterInfo.h 156 const LaneBitmask *RegUnitMaskSequences; // Pointer to lane mask sequences
242 const LaneBitmask *RUMS,
590 const LaneBitmask *MaskListIter;
604 std::pair<unsigned,LaneBitmask> operator*() const {
include/llvm/Support/AlignOf.h 30 T t;
39 template <typename T> union SizerImpl<T> { char arr[sizeof(T)]; };
50 llvm::detail::SizerImpl<T, Ts...>)];
include/llvm/Support/type_traits.h 91 T t;
122 static auto get(F*) -> decltype(std::declval<F &>() = std::declval<const F &>(), std::true_type{});
122 static auto get(F*) -> decltype(std::declval<F &>() = std::declval<const F &>(), std::true_type{});
122 static auto get(F*) -> decltype(std::declval<F &>() = std::declval<const F &>(), std::true_type{});
130 static auto get(F*) -> decltype(std::declval<F &>() = std::declval<F &&>(), std::true_type{});
130 static auto get(F*) -> decltype(std::declval<F &>() = std::declval<F &&>(), std::true_type{});
130 static auto get(F*) -> decltype(std::declval<F &>() = std::declval<F &&>(), std::true_type{});
145 std::is_copy_constructible<detail::trivial_helper<T>>::value;
147 !std::is_copy_constructible<T>::value;
151 std::is_move_constructible<detail::trivial_helper<T>>::value;
153 !std::is_move_constructible<T>::value;
157 is_copy_assignable<detail::trivial_helper<T>>::value;
159 !is_copy_assignable<T>::value;
163 is_move_assignable<detail::trivial_helper<T>>::value;
165 !is_move_assignable<T>::value;
169 std::is_destructible<detail::trivial_helper<T>>::value;
lib/CodeGen/DetectDeadLanes.cpp 53 LaneBitmask UsedLanes;
54 LaneBitmask DefinedLanes;
75 void addUsedLanesOnOperand(const MachineOperand &MO, LaneBitmask UsedLanes);
80 void transferUsedLanesStep(const MachineInstr &MI, LaneBitmask UsedLanes);
86 LaneBitmask DefinedLanes);
91 LaneBitmask transferDefinedLanes(const MachineOperand &Def, unsigned OpNum,
92 LaneBitmask DefinedLanes) const;
96 LaneBitmask transferUsedLanes(const MachineInstr &MI, LaneBitmask UsedLanes,
96 LaneBitmask transferUsedLanes(const MachineInstr &MI, LaneBitmask UsedLanes,
101 LaneBitmask determineInitialDefinedLanes(unsigned Reg);
102 LaneBitmask determineInitialUsedLanes(unsigned Reg);
194 LaneBitmask UsedLanes) {
208 LaneBitmask PrevUsedLanes = MORegInfo.UsedLanes;
220 LaneBitmask UsedLanes) {
224 LaneBitmask UsedOnMO = transferUsedLanes(MI, UsedLanes, MO);
229 LaneBitmask DetectDeadLanes::transferUsedLanes(const MachineInstr &MI,
230 LaneBitmask UsedLanes,
247 LaneBitmask MO2UsedLanes =
255 LaneBitmask MO1UsedLanes;
275 LaneBitmask DefinedLanes) {
301 LaneBitmask PrevDefinedLanes = RegInfo.DefinedLanes;
310 LaneBitmask DetectDeadLanes::transferDefinedLanes(const MachineOperand &Def,
311 unsigned OpNum, LaneBitmask DefinedLanes) const {
352 LaneBitmask DetectDeadLanes::determineInitialDefinedLanes(unsigned Reg) {
356 return LaneBitmask::getAll();
368 return LaneBitmask::getNone();
376 LaneBitmask DefinedLanes;
384 LaneBitmask MODefinedLanes;
386 MODefinedLanes = LaneBitmask::getAll();
388 MODefinedLanes = LaneBitmask::getAll();
410 return LaneBitmask::getNone();
417 LaneBitmask DetectDeadLanes::determineInitialUsedLanes(unsigned Reg) {
418 LaneBitmask UsedLanes = LaneBitmask::getNone();
418 LaneBitmask UsedLanes = LaneBitmask::getNone();
461 LaneBitmask Mask = TRI->getSubRegIndexLaneMask(SubReg);
481 LaneBitmask UsedLanes = transferUsedLanes(MI, DefRegInfo.UsedLanes, MO);
lib/CodeGen/LiveInterval.cpp 884 LaneBitmask LaneMask,
925 BumpPtrAllocator &Allocator, LaneBitmask LaneMask,
928 LaneBitmask ToApply = LaneMask;
930 LaneBitmask SRMask = SR.LaneMask;
931 LaneBitmask Matching = SRMask & LaneMask;
968 LaneBitmask LaneMask,
972 LaneBitmask VRegMask = MRI.getMaxLaneMaskForVReg(reg);
980 LaneBitmask DefMask = TRI.getSubRegIndexLaneMask(SubReg);
981 LaneBitmask UndefMask = VRegMask & ~DefMask;
1080 LaneBitmask Mask;
1081 LaneBitmask MaxMask = MRI != nullptr ? MRI->getMaxLaneMaskForVReg(reg)
1082 : LaneBitmask::getAll();
lib/CodeGen/LiveIntervals.cpp 362 unsigned Reg, LaneBitmask LaneMask) {
489 extendSegmentsToUses(NewLR, WorkList, Reg, LaneBitmask::getNone());
558 LaneBitmask LaneMask = TRI->getSubRegIndexLaneMask(SubReg);
759 LaneBitmask DefinedLanesMask;
762 DefinedLanesMask = LaneBitmask::getNone();
775 DefinedLanesMask = LaneBitmask::getAll();
783 LaneBitmask UseMask = TRI->getSubRegIndexLaneMask(MO.getSubReg());
996 LaneBitmask LaneMask = SubReg ? TRI.getSubRegIndexLaneMask(SubReg)
1004 updateRange(LI, Reg, LaneBitmask::getNone());
1012 updateRange(*LR, *Units, LaneBitmask::getNone());
1021 void updateRange(LiveRange &LR, unsigned Reg, LaneBitmask LaneMask) {
1218 void handleMoveUp(LiveRange &LR, unsigned Reg, LaneBitmask LaneMask) {
1401 LaneBitmask LaneMask) {
1518 LaneBitmask Mask = TRI->getSubRegIndexLaneMask(SubReg);
lib/CodeGen/LivePhysRegs.cpp 160 LaneBitmask Mask = LI.LaneMask;
lib/CodeGen/LiveRangeCalc.cpp 88 LaneBitmask SubMask = SubReg != 0 ? TRI.getSubRegIndexLaneMask(SubReg)
93 LaneBitmask ClassMask = MRI->getMaxLaneMaskForVReg(Reg);
127 extendToUses(LI, Reg, LaneBitmask::getAll());
144 extendToUses(MainRange, LI.reg, LaneBitmask::getAll(), &LI);
156 void LiveRangeCalc::extendToUses(LiveRange &LR, unsigned Reg, LaneBitmask Mask,
179 LaneBitmask SLM = TRI.getSubRegIndexLaneMask(SubReg);
lib/CodeGen/LiveRangeEdit.cpp 251 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubReg);
lib/CodeGen/LiveRegMatrix.cpp 85 LaneBitmask Mask = (*Units).second;
lib/CodeGen/MIRParser/MIParser.cpp 709 LaneBitmask Mask = LaneBitmask::getAll();
709 LaneBitmask Mask = LaneBitmask::getAll();
715 static_assert(sizeof(LaneBitmask::Type) == sizeof(unsigned),
717 LaneBitmask::Type V;
lib/CodeGen/MachineBasicBlock.cpp 448 void MachineBasicBlock::removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) {
466 bool MachineBasicBlock::isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) const {
483 LaneBitmask LaneMask = I->LaneMask;
lib/CodeGen/MachinePipeliner.cpp 1571 LaneBitmask::getNone()));
1576 LaneBitmask::getNone()));
lib/CodeGen/MachineRegisterInfo.cpp 499 LaneBitmask MachineRegisterInfo::getMaxLaneMaskForVReg(unsigned Reg) const {
lib/CodeGen/MachineScheduler.cpp 962 VRegUses.insert(VReg2SUnit(Reg, LaneBitmask::getNone(), &SU));
lib/CodeGen/MachineVerifier.cpp 251 LaneBitmask LaneMask) const;
257 void report_context_lanemask(LaneBitmask LaneMask) const;
266 LaneBitmask LaneMask = LaneBitmask::getNone());
266 LaneBitmask LaneMask = LaneBitmask::getNone());
270 LaneBitmask LaneMask = LaneBitmask::getNone());
270 LaneBitmask LaneMask = LaneBitmask::getNone());
281 LaneBitmask);
284 LaneBitmask);
286 LaneBitmask LaneMask = LaneBitmask::getNone());
286 LaneBitmask LaneMask = LaneBitmask::getNone());
527 LaneBitmask LaneMask) const {
562 void MachineVerifier::report_context_lanemask(LaneBitmask LaneMask) const {
1875 LaneBitmask LaneMask) {
1897 bool SubRangeCheck, LaneBitmask LaneMask) {
1976 LaneBitmask MOMask = SubRegIdx != 0
1979 LaneBitmask LiveInMask;
2079 LaneBitmask MOMask = SubRegIdx != 0
2366 LaneBitmask LaneMask) {
2458 unsigned Reg, LaneBitmask LaneMask)
2559 LaneBitmask SLM = Sub != 0 ? TRI->getSubRegIndexLaneMask(Sub)
2560 : LaneBitmask::getAll();
2672 LaneBitmask LaneMask) {
2685 LaneBitmask Mask;
2686 LaneBitmask MaxMask = MRI->getMaxLaneMaskForVReg(Reg);
lib/CodeGen/RegisterCoalescer.cpp 135 LaneBitmask ShrinkMask;
228 LaneBitmask LaneMask, CoalescerPair &CP);
233 LaneBitmask LaneMask, const CoalescerPair &CP);
919 LaneBitmask Mask = MRI->getMaxLaneMaskForVReg(IntA.reg);
922 LaneBitmask Mask = MRI->getMaxLaneMaskForVReg(IntB.reg);
926 LaneBitmask MaskA;
1387 LaneBitmask MaxMask = MRI->getMaxLaneMaskForVReg(DstReg);
1411 LaneBitmask DstMask = TRI->getSubRegIndexLaneMask(NewIdx);
1534 LaneBitmask SrcMask = TRI->getSubRegIndexLaneMask(SrcSubIdx);
1573 LaneBitmask DstMask = TRI->getSubRegIndexLaneMask(DstSubIdx);
1592 LaneBitmask UseMask = TRI->getSubRegIndexLaneMask(MO.getSubReg());
1627 LaneBitmask Mask = TRI->getSubRegIndexLaneMask(SubRegIdx);
1708 LaneBitmask Mask = MRI->getMaxLaneMaskForVReg(DstInt->reg);
1861 ShrinkMask = LaneBitmask::getNone();
2177 const LaneBitmask LaneMask;
2233 LaneBitmask WriteLanes;
2237 LaneBitmask ValidLanes;
2283 LaneBitmask computeWriteLanes(const MachineInstr *DefMI, bool &Redef) const;
2320 taintExtent(unsigned ValNo, LaneBitmask TaintedLanes, JoinVals &Other,
2321 SmallVectorImpl<std::pair<SlotIndex, LaneBitmask>> &TaintExtent);
2325 bool usesLanes(const MachineInstr &MI, unsigned, unsigned, LaneBitmask) const;
2336 JoinVals(LiveRange &LR, unsigned Reg, unsigned SubIdx, LaneBitmask LaneMask,
2362 void pruneSubRegValues(LiveInterval &LI, LaneBitmask &ShrinkMask);
2390 LaneBitmask JoinVals::computeWriteLanes(const MachineInstr *DefMI, bool &Redef)
2392 LaneBitmask L;
2430 LaneBitmask SMask = TRI->composeSubRegIndexLaneMask(SubIdx, S.LaneMask);
2487 V.WriteLanes = LaneBitmask::getAll();
2495 LaneBitmask Lanes = SubRangeJoin ? LaneBitmask::getLane(0)
2495 LaneBitmask Lanes = SubRangeJoin ? LaneBitmask::getLane(0)
2503 V.WriteLanes = V.ValidLanes = LaneBitmask::getLane(0);
2505 V.ValidLanes = LaneBitmask::getNone();
2757 OtherV.ValidLanes = LaneBitmask::getAll();
2784 taintExtent(unsigned ValNo, LaneBitmask TaintedLanes, JoinVals &Other,
2785 SmallVectorImpl<std::pair<SlotIndex, LaneBitmask>> &TaintExtent) {
2824 LaneBitmask Lanes) const {
2858 LaneBitmask TaintedLanes = V.WriteLanes & OtherV.ValidLanes;
2859 SmallVector<std::pair<SlotIndex, LaneBitmask>, 8> TaintExtent;
3018 void JoinVals::pruneSubRegValues(LiveInterval &LI, LaneBitmask &ShrinkMask) {
3210 LaneBitmask LaneMask,
3274 LaneBitmask LaneMask,
3307 JoinVals RHSVals(RHS, CP.getSrcReg(), CP.getSrcIdx(), LaneBitmask::getNone(),
3309 JoinVals LHSVals(LHS, CP.getDstReg(), CP.getDstIdx(), LaneBitmask::getNone(),
3334 LaneBitmask Mask = DstIdx == 0 ? CP.getNewRC()->getLaneMask()
3342 LaneBitmask Mask = TRI->composeSubRegIndexLaneMask(DstIdx, R.LaneMask);
3352 LaneBitmask Mask = SrcIdx == 0 ? CP.getNewRC()->getLaneMask()
3358 LaneBitmask Mask = TRI->composeSubRegIndexLaneMask(SrcIdx, R.LaneMask);
3732 LaneBitmask MaxMask = MRI->getMaxLaneMaskForVReg(Reg);
lib/CodeGen/RegisterPressure.cpp 52 LaneBitmask PrevMask, LaneBitmask NewMask) {
52 LaneBitmask PrevMask, LaneBitmask NewMask) {
66 LaneBitmask PrevMask, LaneBitmask NewMask) {
66 LaneBitmask PrevMask, LaneBitmask NewMask) {
156 LaneBitmask PreviousMask,
157 LaneBitmask NewMask) {
171 LaneBitmask PreviousMask,
172 LaneBitmask NewMask) {
367 LaneBitmask::getNone(), Pair.LaneMask);
371 static LaneBitmask getRegLanes(ArrayRef<RegisterMaskPair> RegUnits,
377 return LaneBitmask::getNone();
401 RegUnits.push_back(RegisterMaskPair(RegUnit, LaneBitmask::getNone()));
403 I->LaneMask = LaneBitmask::getNone();
421 static LaneBitmask getLanesWithProperty(const LiveIntervals &LIS,
423 SlotIndex Pos, LaneBitmask SafeDefault,
427 LaneBitmask Result;
435 : LaneBitmask::getAll();
445 return Property(*LR, Pos) ? LaneBitmask::getAll() : LaneBitmask::getNone();
445 return Property(*LR, Pos) ? LaneBitmask::getAll() : LaneBitmask::getNone();
449 static LaneBitmask getLiveLanesAt(const LiveIntervals &LIS,
454 LaneBitmask::getAll(),
523 addRegLanes(RegUnits, RegisterMaskPair(Reg, LaneBitmask::getAll()));
526 addRegLanes(RegUnits, RegisterMaskPair(*Units, LaneBitmask::getAll()));
555 LaneBitmask LaneMask = SubRegIdx != 0
561 addRegLanes(RegUnits, RegisterMaskPair(*Units, LaneBitmask::getAll()));
604 LaneBitmask LiveAfter = getLiveLanesAt(LIS, MRI, true, I->RegUnit,
613 LaneBitmask ActualDef = I->LaneMask & LiveAfter;
622 LaneBitmask LiveBefore = getLiveLanesAt(LIS, MRI, true, I->RegUnit,
624 LaneBitmask LaneMask = I->LaneMask & LiveBefore;
637 LaneBitmask LiveAfter = getLiveLanesAt(LIS, MRI, true, RegUnit,
707 LaneBitmask PrevMask = LiveRegs.insert(P);
708 LaneBitmask NewMask = PrevMask | P.LaneMask;
721 LaneBitmask PrevMask;
722 LaneBitmask NewMask;
724 PrevMask = LaneBitmask::getNone();
746 LaneBitmask LiveMask = LiveRegs.contains(Reg);
747 LaneBitmask BumpedMask = LiveMask | P.LaneMask;
752 LaneBitmask LiveMask = LiveRegs.contains(Reg);
753 LaneBitmask BumpedMask = LiveMask | P.LaneMask;
775 LaneBitmask PreviousMask = LiveRegs.erase(Def);
776 LaneBitmask NewMask = PreviousMask & ~Def.LaneMask;
778 LaneBitmask LiveOut = Def.LaneMask & ~PreviousMask;
782 increaseSetPressure(CurrSetPressure, *MRI, Reg, LaneBitmask::getNone(),
805 LaneBitmask PreviousMask = LiveRegs.insert(Use);
806 LaneBitmask NewMask = PreviousMask | Use.LaneMask;
833 LaneBitmask LiveOut = getLiveThroughAt(Reg, SlotIdx);
915 LaneBitmask LiveMask = LiveRegs.contains(Reg);
916 LaneBitmask LiveIn = Use.LaneMask & ~LiveMask;
924 LaneBitmask LastUseMask = getLastUsedLanes(Reg, SlotIdx);
934 LaneBitmask PreviousMask = LiveRegs.insert(Def);
935 LaneBitmask NewMask = PreviousMask | Def.LaneMask;
1064 LaneBitmask LiveLanes = LiveRegs.contains(Reg);
1065 LaneBitmask UseLanes = getRegLanes(RegOpers.Uses, Reg);
1066 LaneBitmask DefLanes = P.LaneMask;
1067 LaneBitmask LiveAfter = (LiveLanes & ~DefLanes) | UseLanes;
1073 LaneBitmask LiveLanes = LiveRegs.contains(Reg);
1074 LaneBitmask LiveAfter = LiveLanes | P.LaneMask;
1222 static LaneBitmask findUseBetween(unsigned Reg, LaneBitmask LastUseMask,
1222 static LaneBitmask findUseBetween(unsigned Reg, LaneBitmask LastUseMask,
1234 LaneBitmask UseMask = TRI.getSubRegIndexLaneMask(SubRegIdx);
1237 return LaneBitmask::getNone();
1243 LaneBitmask RegPressureTracker::getLiveLanesAt(unsigned RegUnit,
1247 LaneBitmask::getAll(),
1253 LaneBitmask RegPressureTracker::getLastUsedLanes(unsigned RegUnit,
1257 Pos.getBaseIndex(), LaneBitmask::getNone(),
1264 LaneBitmask RegPressureTracker::getLiveThroughAt(unsigned RegUnit,
1268 LaneBitmask::getNone(),
1298 LaneBitmask LastUseMask = getLastUsedLanes(Reg, SlotIdx);
1312 LaneBitmask LiveMask = LiveRegs.contains(Reg);
1313 LaneBitmask NewMask = LiveMask & ~LastUseMask;
1321 LaneBitmask LiveMask = LiveRegs.contains(Reg);
1322 LaneBitmask NewMask = LiveMask | Def.LaneMask;
lib/CodeGen/RegisterScavenging.cpp 52 void RegScavenger::setRegUsed(Register Reg, LaneBitmask LaneMask) {
lib/CodeGen/RenameIndependentSubregs.cpp 182 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx);
226 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx);
lib/CodeGen/ScheduleDAGInstrs.cpp 361 LaneBitmask ScheduleDAGInstrs::getLaneMaskForMO(const MachineOperand &MO) const
367 return LaneBitmask::getAll();
393 LaneBitmask DefLaneMask;
394 LaneBitmask KillLaneMask;
400 KillLaneMask = IsKill ? LaneBitmask::getAll() : DefLaneMask;
418 DefLaneMask = LaneBitmask::getAll();
419 KillLaneMask = LaneBitmask::getAll();
429 LaneBitmask LaneMask = I->LaneMask;
467 LaneBitmask LaneMask = DefLaneMask;
490 LaneBitmask OverlapMask = V2SU.LaneMask & LaneMask;
491 LaneBitmask NonOverlapMask = V2SU.LaneMask & ~LaneMask;
514 LaneBitmask LaneMask = TrackLaneMasks ? getLaneMaskForMO(MO)
515 : LaneBitmask::getAll();
522 LaneBitmask PrevDefLaneMask = V2SU.LaneMask;
lib/CodeGen/SplitKit.cpp 407 LiveInterval::SubRange &SplitEditor::getSubRangeForMask(LaneBitmask LM,
438 LaneBitmask LM;
529 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubIdx);
539 LaneBitmask LaneMask, MachineBasicBlock &MBB,
566 LaneBitmask SubRegMask = TRI.getSubRegIndexLaneMask(Idx);
594 LaneBitmask LanesLeft = LaneMask & ~(TRI.getSubRegIndexLaneMask(BestIdx));
599 LaneBitmask SubRegMask = TRI.getSubRegIndexLaneMask(Idx);
656 LaneBitmask LaneMask;
658 LaneMask = LaneBitmask::getNone();
662 LaneMask = LaneBitmask::getAll();
1242 LiveRange &LR, LaneBitmask LM,
1276 extendPHIRange(B, LRC, LI, LaneBitmask::getAll(), /*Undefs=*/{});
1377 LaneBitmask LM = Sub != 0 ? TRI.getSubRegIndexLaneMask(Sub)
lib/CodeGen/SplitKit.h 351 LiveInterval::SubRange &getSubRangeForMask(LaneBitmask LM, LiveInterval &LI);
418 LiveRange &LR, LaneBitmask LM,
434 SlotIndex buildCopy(unsigned FromReg, unsigned ToReg, LaneBitmask LaneMask,
lib/CodeGen/TargetRegisterInfo.cpp 45 const LaneBitmask *SRILaneMasks,
46 LaneBitmask SRICoveringLanes,
lib/CodeGen/VirtRegMap.cpp 292 LaneBitmask LaneMask;
365 LaneBitmask UseMask = TRI->getSubRegIndexLaneMask(SubRegIdx);
lib/Target/AMDGPU/GCNRegPressure.cpp 98 LaneBitmask PrevMask,
99 LaneBitmask NewMask,
110 const auto MaxMask = MRI.getMaxLaneMaskForVReg(Reg);
198 static LaneBitmask getDefRegMask(const MachineOperand &MO,
210 static LaneBitmask getUsedRegMask(const MachineOperand &MO,
218 auto MaxMask = MRI.getMaxLaneMaskForVReg(MO.getReg());
219 if (MaxMask == LaneBitmask::getLane(0)) // cannot have subregs
239 auto const UsedMask = getUsedRegMask(MO, MRI, LIS);
256 LaneBitmask llvm::getLiveLaneMask(unsigned Reg,
260 LaneBitmask LiveMask;
283 auto LiveMask = getLiveLaneMask(Reg, SI, LIS, MRI);
324 auto LiveMask = LiveRegs[U.RegUnit];
338 auto &LiveMask = I->second;
339 auto PrevMask = LiveMask;
346 auto &LiveMask = LiveRegs[U.RegUnit];
347 auto PrevMask = LiveMask;
383 auto PrevMask = It.second;
389 auto PrevMask = It.second;
390 It.second = LaneBitmask::getNone();
412 auto &LiveMask = LiveRegs[Reg];
413 auto PrevMask = LiveMask;
lib/Target/AMDGPU/GCNRegPressure.h 60 LaneBitmask PrevMask,
61 LaneBitmask NewMask,
100 using LiveRegSet = DenseMap<unsigned, LaneBitmask>;
187 LaneBitmask getLiveLaneMask(unsigned Reg,
257 Res.inc(RM.first, LaneBitmask::getNone(), RM.second, MRI);
lib/Target/AMDGPU/SIFormMemoryClauses.cpp 40 typedef DenseMap<unsigned, std::pair<unsigned, LaneBitmask>> RegUse;
64 void forAllLanes(unsigned Reg, LaneBitmask LaneMask, Callable Func) const;
153 void SIFormMemoryClauses::forAllLanes(unsigned Reg, LaneBitmask LaneMask,
168 LaneBitmask SubRegMask = TRI->getSubRegIndexLaneMask(Idx);
182 LaneBitmask MaskA = TRI->getSubRegIndexLaneMask(A);
183 LaneBitmask MaskB = TRI->getSubRegIndexLaneMask(B);
192 LaneBitmask SubRegMask = TRI->getSubRegIndexLaneMask(Idx);
233 LaneBitmask Mask = TRI->getSubRegIndexLaneMask(MO.getSubReg());
272 LaneBitmask Mask = Register::isVirtualRegister(Reg)
274 : LaneBitmask::getAll();
lib/Target/AMDGPU/SIRegisterInfo.cpp 1876 LaneBitmask SubLanes = SubReg ? getSubRegIndexLaneMask(SubReg)
lib/Target/AMDGPU/SIShrinkInstructions.cpp 401 LaneBitmask Overlap = TRI.getSubRegIndexLaneMask(SubReg) &
429 LaneBitmask LM = TRI.getSubRegIndexLaneMask(Sub);
lib/Target/Hexagon/HexagonExpandCondsets.cpp 198 LaneBitmask getLaneMask(unsigned Reg, unsigned Sub);
203 void updateDeadsInRange(unsigned Reg, LaneBitmask LM, LiveRange &Range);
287 LaneBitmask HexagonExpandCondsets::getLaneMask(unsigned Reg, unsigned Sub) {
323 LaneBitmask SLM = getLaneMask(Reg, Op.getSubReg());
365 void HexagonExpandCondsets::updateDeadsInRange(unsigned Reg, LaneBitmask LM,
378 LaneBitmask SLM = getLaneMask(DR, DSR);
379 LaneBitmask A = SLM & LM;
lib/Target/Hexagon/RDFGraph.cpp 977 return RegisterRef(PRI.getRegMaskId(Op.getRegMask()), LaneBitmask::getAll());
982 LaneBitmask M = AR.Mask & BR.Mask;
lib/Target/Hexagon/RDFGraph.h 431 struct LaneMaskIndex : private IndexedSet<LaneBitmask> {
434 LaneBitmask getLaneMaskForIndex(uint32_t K) const {
435 return K == 0 ? LaneBitmask::getAll() : get(K);
438 uint32_t getIndexForLaneMask(LaneBitmask LM) {
443 uint32_t getIndexForLaneMask(LaneBitmask LM) const {
lib/Target/Hexagon/RDFLiveness.cpp 518 for (std::pair<NodeId,LaneBitmask> I : Uses) {
648 for (std::pair<NodeId,LaneBitmask> V : T.second) {
649 LaneBitmask M = R.Mask & V.second;
773 for (std::pair<NodeId,LaneBitmask> P : RS.second) {
783 LaneBitmask TM = TA.makeRegRef().Mask;
866 LaneBitmask M = TRI.getSubRegIndexLaneMask(S.getSubRegIndex());
1094 LaneBitmask M;
lib/Target/Hexagon/RDFLiveness.h 49 using NodeRef = std::pair<NodeId, LaneBitmask>;
lib/Target/Hexagon/RDFRegisters.cpp 56 UnitInfos[U].Mask = LaneBitmask::getAll();
60 std::pair<uint32_t,LaneBitmask> P = *I;
69 UI.Mask = LaneBitmask::getAll();
140 std::pair<RegisterId,LaneBitmask> PA = *UMA;
146 std::pair<RegisterId,LaneBitmask> PB = *UMB;
169 if (RR.Mask == LaneBitmask::getAll())
180 LaneBitmask M = RR.Mask;
182 LaneBitmask SM = TRI.getSubRegIndexLaneMask(SI.getSubRegIndex());
232 LaneBitmask RCM = RI.RegClass ? RI.RegClass->LaneMask
233 : LaneBitmask::getAll();
234 LaneBitmask M = TRI.reverseComposeSubRegIndexLaneMask(Idx, RR.Mask);
245 std::pair<uint32_t,LaneBitmask> P = *U;
260 std::pair<uint32_t,LaneBitmask> P = *U;
275 std::pair<uint32_t,LaneBitmask> P = *U;
355 LaneBitmask M;
357 std::pair<uint32_t,LaneBitmask> P = *I;
359 M |= P.second.none() ? LaneBitmask::getAll() : P.second;
lib/Target/Hexagon/RDFRegisters.h 39 T get(uint32_t Idx) const {
45 uint32_t insert(T Val) {
54 uint32_t find(T Val) const {
62 using const_iterator = typename std::vector<T>::const_iterator;
68 std::vector<T> Map;
73 LaneBitmask Mask = LaneBitmask::getNone();
73 LaneBitmask Mask = LaneBitmask::getNone();
76 explicit RegisterRef(RegisterId R, LaneBitmask M = LaneBitmask::getAll())
76 explicit RegisterRef(RegisterId R, LaneBitmask M = LaneBitmask::getAll())
77 : Reg(R), Mask(R != 0 ? M : LaneBitmask::getNone()) {}
140 LaneBitmask Mask;
185 using MapType = std::map<RegisterId, LaneBitmask>;
231 PrintLaneMaskOpt(LaneBitmask M) : Mask(M) {}
232 LaneBitmask Mask;
usr/include/c++/7.4.0/bits/alloc_traits.h 387 using allocator_type = allocator<_Tp>;
389 using value_type = _Tp;
392 using pointer = _Tp*;
395 using const_pointer = const _Tp*;
474 construct(allocator_type& __a, _Up* __p, _Args&&... __args)
474 construct(allocator_type& __a, _Up* __p, _Args&&... __args)
486 destroy(allocator_type& __a, _Up* __p)
usr/include/c++/7.4.0/bits/allocator.h 108 class allocator: public __allocator_base<_Tp>
113 typedef _Tp* pointer;
114 typedef const _Tp* const_pointer;
115 typedef _Tp& reference;
116 typedef const _Tp& const_reference;
117 typedef _Tp value_type;
137 allocator(const allocator<_Tp1>&) throw() { }
usr/include/c++/7.4.0/bits/move.h 46 inline _GLIBCXX_CONSTEXPR _Tp*
47 __addressof(_Tp& __r) _GLIBCXX_NOEXCEPT
72 constexpr _Tp&&
73 forward(typename std::remove_reference<_Tp>::type& __t) noexcept
83 constexpr _Tp&&
84 forward(typename std::remove_reference<_Tp>::type&& __t) noexcept
98 move(_Tp&& __t) noexcept
104 : public __and_<__not_<is_nothrow_move_constructible<_Tp>>,
105 is_copy_constructible<_Tp>>::type { };
184 typename enable_if<__and_<__not_<__is_tuple_like<_Tp>>,
185 is_move_constructible<_Tp>,
186 is_move_assignable<_Tp>>::value>::type
187 swap(_Tp& __a, _Tp& __b)
187 swap(_Tp& __a, _Tp& __b)
198 _Tp __tmp = _GLIBCXX_MOVE(__a);
usr/include/c++/7.4.0/bits/stl_algo.h 3900 const _Tp& __val)
usr/include/c++/7.4.0/bits/stl_construct.h 74 _Construct(_T1* __p, _Args&&... __args)
74 _Construct(_T1* __p, _Args&&... __args)
75 { ::new(static_cast<void*>(__p)) _T1(std::forward<_Args>(__args)...); }
75 { ::new(static_cast<void*>(__p)) _T1(std::forward<_Args>(__args)...); }
204 allocator<_Tp>&)
usr/include/c++/7.4.0/bits/stl_function.h 121 typedef _Arg1 first_argument_type;
124 typedef _Arg2 second_argument_type;
381 struct less : public binary_function<_Tp, _Tp, bool>
381 struct less : public binary_function<_Tp, _Tp, bool>
385 operator()(const _Tp& __x, const _Tp& __y) const
385 operator()(const _Tp& __x, const _Tp& __y) const
usr/include/c++/7.4.0/bits/stl_iterator.h 1224 __make_move_if_noexcept_iterator(_Tp* __i)
usr/include/c++/7.4.0/bits/stl_iterator_base_types.h 123 typedef _Tp value_type;
181 typedef _Tp value_type;
183 typedef _Tp* pointer;
184 typedef _Tp& reference;
192 typedef _Tp value_type;
194 typedef const _Tp* pointer;
195 typedef const _Tp& reference;
usr/include/c++/7.4.0/bits/stl_map.h 103 typedef _Tp mapped_type;
104 typedef std::pair<const _Key, _Tp> value_type;
usr/include/c++/7.4.0/bits/stl_pair.h 101 is_constructible<_T2, const _U2&>>::value;
101 is_constructible<_T2, const _U2&>>::value;
108 is_convertible<const _U2&, _T2>>::value;
108 is_convertible<const _U2&, _T2>>::value;
115 is_constructible<_T2, _U2&&>>::value;
115 is_constructible<_T2, _U2&&>>::value;
122 is_convertible<_U2&&, _T2>>::value;
122 is_convertible<_U2&&, _T2>>::value;
129 is_convertible<_U2&&, _T2>>;
129 is_convertible<_U2&&, _T2>>;
134 is_constructible<_T2, _U2&&>,
134 is_constructible<_T2, _U2&&>,
143 is_convertible<const _U2&, _T2>>;
143 is_convertible<const _U2&, _T2>>;
148 is_constructible<_T2, const _U2&&>,
148 is_constructible<_T2, const _U2&&>,
209 : private __pair_base<_T1, _T2>
212 typedef _T2 second_type; /// @c second_type is the second bound type
215 _T2 second; /// @c second is a copy of the second object
252 using _PCCP = _PCC<true, _T1, _T2>;
260 constexpr pair(const _T1& __a, const _T2& __b)
269 explicit constexpr pair(const _T1& __a, const _T2& __b)
283 _T1, _T2>;
291 constexpr pair(const pair<_U1, _U2>& __p)
311 constexpr pair(_U1&& __x, const _T2& __y)
318 explicit constexpr pair(_U1&& __x, const _T2& __y)
325 constexpr pair(const _T1& __x, _U2&& __y)
341 constexpr pair(_U1&& __x, _U2&& __y)
360 constexpr pair(pair<_U1, _U2>&& __p)
362 second(std::forward<_U2>(__p.second)) { }
380 is_copy_assignable<_T2>>::value,
391 is_move_assignable<_T2>>::value,
403 is_assignable<_T2&, const _U2&>>::value,
403 is_assignable<_T2&, const _U2&>>::value,
405 operator=(const pair<_U1, _U2>& __p)
414 is_assignable<_T2&, _U2&&>>::value,
414 is_assignable<_T2&, _U2&&>>::value,
416 operator=(pair<_U1, _U2>&& __p)
454 operator<(const pair<_T1, _T2>& __x, const pair<_T1, _T2>& __y)
454 operator<(const pair<_T1, _T2>& __x, const pair<_T1, _T2>& __y)
524 make_pair(_T1&& __x, _T2&& __y)
usr/include/c++/7.4.0/bits/stl_uninitialized.h 144 const _Tp& __x)
182 const _Tp& __x)
288 _ForwardIterator __result, allocator<_Tp>&)
usr/include/c++/7.4.0/bits/stl_vector.h 77 rebind<_Tp>::other _Tp_alloc_type;
216 class vector : protected _Vector_base<_Tp, _Alloc>
227 typedef _Vector_base<_Tp, _Alloc> _Base;
232 typedef _Tp value_type;
919 _Tp*
923 const _Tp*
1483 _M_realloc_insert(iterator __position, _Args&&... __args);
usr/include/c++/7.4.0/ext/alloc_traits.h 117 { typedef typename _Base_type::template rebind_alloc<_Tp> other; };
usr/include/c++/7.4.0/ext/new_allocator.h 63 typedef _Tp* pointer;
64 typedef const _Tp* const_pointer;
65 typedef _Tp& reference;
66 typedef const _Tp& const_reference;
67 typedef _Tp value_type;
111 return static_cast<_Tp*>(::operator new(__n * sizeof(_Tp)));
130 { return size_t(-1) / sizeof(_Tp); }
135 construct(_Up* __p, _Args&&... __args)
135 construct(_Up* __p, _Args&&... __args)
136 { ::new((void *)__p) _Up(std::forward<_Args>(__args)...); }
140 destroy(_Up* __p) { __p->~_Up(); }
usr/include/c++/7.4.0/initializer_list 50 typedef _E value_type;
51 typedef const _E& reference;
52 typedef const _E& const_reference;
54 typedef const _E* iterator;
55 typedef const _E* const_iterator;
usr/include/c++/7.4.0/type_traits 215 : public __is_void_helper<typename remove_cv<_Tp>::type>::type
326 : public __is_integral_helper<typename remove_cv<_Tp>::type>::type
354 : public __is_floating_point_helper<typename remove_cv<_Tp>::type>::type
381 : public __is_pointer_helper<typename remove_cv<_Tp>::type>::type
567 : public __is_null_pointer_helper<typename remove_cv<_Tp>::type>::type
581 : public __or_<is_lvalue_reference<_Tp>,
582 is_rvalue_reference<_Tp>>::type
588 : public __or_<is_integral<_Tp>, is_floating_point<_Tp>>::type
588 : public __or_<is_integral<_Tp>, is_floating_point<_Tp>>::type
601 : public __not_<__or_<is_function<_Tp>, is_reference<_Tp>,
601 : public __not_<__or_<is_function<_Tp>, is_reference<_Tp>,
602 is_void<_Tp>>>::type
611 : public __or_<is_arithmetic<_Tp>, is_enum<_Tp>, is_pointer<_Tp>,
611 : public __or_<is_arithmetic<_Tp>, is_enum<_Tp>, is_pointer<_Tp>,
611 : public __or_<is_arithmetic<_Tp>, is_enum<_Tp>, is_pointer<_Tp>,
612 is_member_pointer<_Tp>, is_null_pointer<_Tp>>::type
612 is_member_pointer<_Tp>, is_null_pointer<_Tp>>::type
631 : public __is_member_pointer_helper<typename remove_cv<_Tp>::type>::type
638 : public __or_<is_object<_Tp>, is_reference<_Tp>>::type
638 : public __or_<is_object<_Tp>, is_reference<_Tp>>::type
762 typename add_rvalue_reference<_Tp>::type declval() noexcept;
777 : public __and_<is_array<_Tp>, __not_<extent<_Tp>>>
777 : public __and_<is_array<_Tp>, __not_<extent<_Tp>>>
798 typedef decltype(__test<_Tp>(0)) type;
811 remove_all_extents<_Tp>::type>::type
825 : public __is_destructible_safe<_Tp>::type
889 typedef decltype(__test<_Tp>(0)) type;
894 : public __and_<__not_<is_void<_Tp>>,
895 __is_default_constructible_impl<_Tp>>
915 : public __is_default_constructible_atom<_Tp>::type
921 : public __is_default_constructible_safe<_Tp>::type
984 typedef decltype(__test<_Tp, _Arg>(0)) type;
989 : public __and_<is_destructible<_Tp>,
990 __is_direct_constructible_impl<_Tp, _Arg>>
1072 __is_direct_constructible_ref_cast<_Tp, _Arg>,
1073 __is_direct_constructible_new_safe<_Tp, _Arg>
1079 : public __is_direct_constructible_new<_Tp, _Arg>::type
1119 : public __is_direct_constructible<_Tp, _Arg>
1130 : public __is_constructible_impl<_Tp, _Args...>::type
1142 : public is_constructible<_Tp, const _Tp&>
1142 : public is_constructible<_Tp, const _Tp&>
1148 : public __is_copy_constructible_impl<_Tp>
1160 : public is_constructible<_Tp, _Tp&&>
1160 : public is_constructible<_Tp, _Tp&&>
1166 : public __is_move_constructible_impl<_Tp>
1215 : public __and_<is_constructible<_Tp, _Args...>,
1216 __is_nt_constructible_impl<_Tp, _Args...>>
1246 : public is_nothrow_constructible<_Tp, _Tp&&>
1246 : public is_nothrow_constructible<_Tp, _Tp&&>
1252 : public __is_nothrow_move_constructible_impl<_Tp>
1286 : public is_assignable<_Tp&, const _Tp&>
1286 : public is_assignable<_Tp&, const _Tp&>
1292 : public __is_copy_assignable_impl<_Tp>
1304 : public is_assignable<_Tp&, _Tp&&>
1304 : public is_assignable<_Tp&, _Tp&&>
1310 : public __is_move_assignable_impl<_Tp>
1352 : public is_nothrow_assignable<_Tp&, _Tp&&>
1352 : public is_nothrow_assignable<_Tp&, _Tp&&>
1358 : public __is_nt_move_assignable_impl<_Tp>
1377 static void __helper(const _Tp&);
1380 static true_type __test(const _Tp&,
1381 decltype(__helper<const _Tp&>({}))* = 0);
1390 typedef decltype(__test(declval<_Tp>())) type;
1395 : public __is_implicitly_default_constructible_impl<_Tp>::type
1400 : public __and_<is_default_constructible<_Tp>,
1401 __is_implicitly_default_constructible_safe<_Tp>>
1526 static void __test_aux(_To1);
1538 typedef decltype(__test<_From, _To>(0)) type;
1545 : public __is_convertible_helper<_From, _To>::type
1554 { typedef _Tp type; };
1558 { typedef _Tp type; };
1563 { typedef _Tp type; };
1574 remove_const<typename remove_volatile<_Tp>::type>::type type;
1629 { typedef _Tp type; };
1633 { typedef _Tp type; };
1659 { typedef _Tp&& type; };
1664 : public __add_rvalue_reference_helper<_Tp>
1955 { typedef _Tp type; };
2104 { typedef typename remove_cv<_Up>::type __type; };
2131 typedef _Tp __type;
2574 typename remove_reference<_Tp>::type>::type>::type
utils/TableGen/CodeGenRegisters.cpp 105 LaneBitmask CodeGenSubRegIndex::computeLaneMask() const {
111 LaneMask = LaneBitmask::getAll();
114 LaneBitmask M;
1428 CoveringLanes = LaneBitmask::getAll();
1431 if (Bit > LaneBitmask::BitWidth) {
1436 Idx.LaneMask = LaneBitmask::getLane(Bit);
1439 Idx.LaneMask = LaneBitmask::getNone();
1461 MaskRolPair MaskRol = { LaneBitmask::getLane(0), (uint8_t)DstBit };
1475 LaneBitmask SrcMask = LaneBitmask::getLane(SrcBit);
1475 LaneBitmask SrcMask = LaneBitmask::getLane(SrcBit);
1476 if (NextBit < LaneBitmask::BitWidth-1)
1492 : LaneBitmask::BitWidth + Shift;
1496 SrcMask = LaneBitmask::getNone();
1510 LaneTransforms[0].Mask = LaneBitmask::getAll();
1516 MaskRolPair P = { LaneBitmask::getAll(), 0 };
1526 LaneBitmask Mask = Idx.computeLaneMask();
1535 LaneBitmask LaneMask;
1545 LaneMask = LaneBitmask::getLane(0);
2046 RegUnitLaneMasks(RegUnits.count(), LaneBitmask::getNone());
2059 LaneBitmask LaneMask = SubRegIndex->LaneMask;
utils/TableGen/CodeGenRegisters.h 51 LaneBitmask Mask;
72 mutable LaneBitmask LaneMask;
133 LaneBitmask computeLaneMask() const;
226 typedef SmallVector<LaneBitmask, 16> RegUnitLaneMaskList;
235 ArrayRef<LaneBitmask> getRegUnitLaneMasks() const {
335 LaneBitmask LaneMask;
783 LaneBitmask CoveringLanes;
utils/TableGen/RegisterInfoEmitter.cpp 633 typedef SmallVector<LaneBitmask, 4> MaskVec;
666 static void printMask(raw_ostream &OS, LaneBitmask Val) {
952 for (LaneBitmask M : LaneMaskVec) {