reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

include/llvm/CodeGen/BasicTTIImpl.h

 1444             Instruction::AShr, MulTy, TTI::OK_AnyValue,

include/llvm/IR/InstrTypes.h

  371   DEFINE_HELPERS(AShr, Exact)  // CreateExactAShr

include/llvm/IR/Instruction.h

  161     return Opcode >= Shl && Opcode <= AShr;
  171     return getOpcode() == AShr;

include/llvm/IR/Operator.h

  142            OpC == Instruction::AShr ||
  441   : public ConcreteOperator<PossiblyExactOperator, Instruction::AShr> {

include/llvm/IR/PatternMatch.h

  904 inline BinaryOp_match<LHS, RHS, Instruction::AShr> m_AShr(const LHS &L,
  906   return BinaryOp_match<LHS, RHS, Instruction::AShr>(L, R);
 1027     return Opcode == Instruction::LShr || Opcode == Instruction::AShr;

lib/Analysis/CFLGraph.h

  578       case Instruction::AShr:

lib/Analysis/DemandedBits.cpp

  213   case Instruction::AShr:

lib/Analysis/InstructionSimplify.cpp

 1344   if (Value *V = SimplifyRightShift(Instruction::AShr, Op0, Op1, isExact, Q,
 2952     case Instruction::AShr:
 4790   case Instruction::AShr:
 5307   case Instruction::AShr:

lib/Analysis/ObjCARCInstKind.cpp

  266     case Instruction::AShr:

lib/Analysis/ScalarEvolution.cpp

 4515   case Instruction::AShr:
 6391     case Instruction::AShr: {
 7591       OutOpCode = Instruction::AShr;
 7670   case Instruction::AShr: {

lib/Analysis/TargetTransformInfo.cpp

 1168   case Instruction::AShr:

lib/Analysis/ValueTracking.cpp

 1208   case Instruction::AShr: {
 2454     case Instruction::AShr: {
 4337   case Instruction::AShr:
 5455   case Instruction::AShr:

lib/AsmParser/LLLexer.cpp

  846   INSTKEYWORD(shl,   Shl);  INSTKEYWORD(lshr,  LShr); INSTKEYWORD(ashr,  AShr);

lib/AsmParser/LLParser.cpp

 3471                Opc == Instruction::LShr || Opc == Instruction::AShr) {
 3493     case Instruction::AShr:

lib/Bitcode/Reader/BitcodeReader.cpp

 1099     return IsFP ? -1 : Instruction::AShr;
 2553                      Opc == Instruction::AShr) {
 3911                    Opc == Instruction::AShr) {

lib/Bitcode/Writer/BitcodeWriter.cpp

  544   case Instruction::AShr: return bitc::BINOP_ASHR;

lib/CodeGen/CodeGenPrepare.cpp

 1569       if (ShiftI->getOpcode() == Instruction::AShr)
 1670       if (ShiftI->getOpcode() == Instruction::AShr)
 7017   if (BinOp && (BinOp->getOpcode() == Instruction::AShr ||
 7049   case Instruction::AShr:

lib/CodeGen/SelectionDAG/FastISel.cpp

 1826   case Instruction::AShr:

lib/CodeGen/TargetLoweringBase.cpp

 1606   case AShr:           return ISD::SRA;

lib/ExecutionEngine/Interpreter/Execution.cpp

 2094   case Instruction::AShr:

lib/FuzzMutate/Operations.cpp

   28   Ops.push_back(binOpDescriptor(1, Instruction::AShr));
  106   case Instruction::AShr:

lib/IR/ConstantFold.cpp

 1056     case Instruction::AShr:
 1206     case Instruction::AShr:
 1262       case Instruction::AShr:
 1275     case Instruction::AShr:
 1355     case Instruction::AShr:

lib/IR/ConstantRange.cpp

  799   case Instruction::AShr:

lib/IR/Constants.cpp

 1905   case Instruction::AShr:
 2334   return get(Instruction::AShr, C1, C2,
 2371     case Instruction::AShr: // X >> 0 = X

lib/IR/Instruction.cpp

  132   case Instruction::AShr:
  362   case AShr:           return "ashr";

lib/IR/Instructions.cpp

 2320   case AShr:

lib/IR/Verifier.cpp

 3207   case Instruction::AShr:

lib/Target/AArch64/AArch64FastISel.cpp

 1201             SI->getOpcode() == Instruction::AShr   )
 1284         case Instruction::AShr: ShiftType = AArch64_AM::ASR; break;
 4763     bool IsZExt = I->getOpcode() != Instruction::AShr;
 4795     case Instruction::AShr:
 4825   case Instruction::AShr:
 5170   case Instruction::AShr:

lib/Target/AArch64/AArch64TargetTransformInfo.cpp

  121   case Instruction::AShr:
  517       Cost += getArithmeticInstrCost(Instruction::AShr, Ty, Opd1Info, Opd2Info,
  538         int ShrCost = getArithmeticInstrCost(Instruction::AShr, Ty, Opd1Info,

lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp

  219   return I.getOpcode() == Instruction::AShr ||

lib/Target/ARM/ARMCodeGenPrepare.cpp

  186   return Opc == Instruction::AShr || Opc == Instruction::SDiv ||

lib/Target/ARM/ARMFastISel.cpp

 2881     case Instruction::AShr:

lib/Target/Hexagon/HexagonOptimizeSZextends.cpp

  106       if (!(Ashr && Ashr->getOpcode() == Instruction::AShr))

lib/Target/Mips/MipsFastISel.cpp

 1979   if (Opcode == Instruction::AShr || Opcode == Instruction::LShr) {
 2001     case Instruction::AShr:
 2024   case Instruction::AShr:
 2063   case Instruction::AShr:

lib/Target/PowerPC/PPCTargetTransformInfo.cpp

  157   case Instruction::AShr:
  454                 J->getOpcode() == Instruction::AShr ||

lib/Target/RISCV/RISCVTargetTransformInfo.cpp

   62   case Instruction::AShr:

lib/Target/SystemZ/SystemZTargetTransformInfo.cpp

  157   case Instruction::AShr:
  404         Opcode == Instruction::AShr) {

lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp

   57     case Instruction::AShr:

lib/Target/X86/X86FastISel.cpp

 1787     case Instruction::AShr: OpReg = X86::SAR8rCL; break;
 1797     case Instruction::AShr: OpReg = X86::SAR16rCL; break;
 1806     case Instruction::AShr: OpReg = X86::SAR32rCL; break;
 1815     case Instruction::AShr: OpReg = X86::SAR64rCL; break;
 3621   case Instruction::AShr:

lib/Target/X86/X86TargetTransformInfo.cpp

  258           2 * getArithmeticInstrCost(Instruction::AShr, Ty, Op1Info, Op2Info,
 3028   case Instruction::AShr:

lib/Target/XCore/XCoreLowerThreadLocal.cpp

   99     case Instruction::AShr:

lib/Transforms/InstCombine/InstCombineCasts.cpp

  182   case Instruction::AShr:
  402   case Instruction::AShr: {

lib/Transforms/InstCombine/InstCombineCompares.cpp

 1657       bool IsAshr = ShiftOpcode == Instruction::AShr;
 2189   bool IsAShr = Shr->getOpcode() == Instruction::AShr;
 2847     case Instruction::AShr:
 3991     case Instruction::AShr:

lib/Transforms/InstCombine/InstCombineInternal.h

  270       case Instruction::AShr: // 0 >> X = 0

lib/Transforms/InstCombine/InstCombineSelect.cpp

  254   case Instruction::AShr:
  272   case Instruction::AShr:

lib/Transforms/InstCombine/InstCombineShifts.cpp

  612   if (I.getOpcode() != Instruction::AShr &&
 1099   assert(OldAShr.getOpcode() == Instruction::AShr &&

lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp

  519   case Instruction::AShr: {

lib/Transforms/InstCombine/InstCombineVectorOps.cpp

 1163     case Instruction::AShr:
 1231     case Instruction::AShr:
 1329     case Instruction::AShr:

lib/Transforms/Instrumentation/PoisonChecking.cpp

  172   case Instruction::AShr:

lib/Transforms/Scalar/CorrelatedValuePropagation.cpp

  870       case Instruction::AShr:

lib/Transforms/Scalar/GVN.cpp

  511     case Instruction::AShr:

lib/Transforms/Scalar/GVNSink.cpp

  459     case Instruction::AShr:

lib/Transforms/Scalar/IndVarSimplify.cpp

 1104   case Instruction::AShr:

lib/Transforms/Scalar/LoopIdiomRecognize.cpp

 1457   if (DefX->getOpcode() == Instruction::AShr && !isKnownNonNegative(InitX, DL))
 1707     if (DefX->getOpcode() == Instruction::AShr)

lib/Transforms/Scalar/LoopRerollPass.cpp

  750     case Instruction::AShr:

lib/Transforms/Scalar/NewGVN.cpp

 2014     case Instruction::AShr:

lib/Transforms/Scalar/SCCP.cpp

 1587       case Instruction::AShr:

lib/Transforms/Scalar/SpeculativeExecution.cpp

  223     case Instruction::AShr:

lib/Transforms/Utils/Local.cpp

 1713     case Instruction::AShr:

lib/Transforms/Utils/LoopRotationUtils.cpp

  554     case Instruction::AShr: {

lib/Transforms/Vectorize/LoopVectorize.cpp

 4151   case Instruction::AShr:
 6196   case Instruction::AShr:
 6845     case Instruction::AShr:

lib/Transforms/Vectorize/SLPVectorizer.cpp

 2581     case Instruction::AShr:
 3095     case Instruction::AShr:
 3979     case Instruction::AShr:

tools/lldb/source/Expression/IRInterpreter.cpp

  575       case Instruction::AShr:
  706     case Instruction::AShr:
  779       case Instruction::AShr:

tools/llvm-stress/llvm-stress.cpp

  404     case 9: {Op = Instruction::AShr; break; }

unittests/Transforms/Utils/IntegerDivisionTest.cpp

   46   EXPECT_TRUE(BB->front().getOpcode() == Instruction::AShr);
  106   EXPECT_TRUE(BB->front().getOpcode() == Instruction::AShr);
  167   EXPECT_TRUE(BB->front().getOpcode() == Instruction::AShr);
  227   EXPECT_TRUE(BB->front().getOpcode() == Instruction::AShr);