reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/AggressiveAntiDepBreaker.cpp

  164       for (MCRegAliasIterator AI(LI.PhysReg, TRI, true); AI.isValid(); ++AI) {

lib/CodeGen/BranchFolding.cpp

  438       MCPhysReg Reg = P.PhysReg;

lib/CodeGen/CriticalAntiDepBreaker.cpp

   74       for (MCRegAliasIterator AI(LI.PhysReg, TRI, true); AI.isValid(); ++AI) {

lib/CodeGen/DeadMachineInstructionElim.cpp

  119         LivePhysRegs.set(LI.PhysReg);

lib/CodeGen/LiveIntervals.cpp

  328       for (MCRegUnitIterator Units(LI.PhysReg, TRI); Units.isValid(); ++Units) {

lib/CodeGen/LivePhysRegs.cpp

  159     MCPhysReg Reg = LI.PhysReg;

lib/CodeGen/LiveRegUnits.cpp

   88     LiveUnits.addRegMasked(LI.PhysReg, LI.LaneMask);

lib/CodeGen/LiveVariables.cpp

  568     assert(Register::isPhysicalRegister(LI.PhysReg) &&
  570     HandlePhysRegDef(LI.PhysReg, nullptr, Defs);
  607       if (!TRI->isInAllocatableClass(LI.PhysReg))
  609         LiveOuts.insert(LI.PhysReg);

lib/CodeGen/MIRPrinter.cpp

  676       OS << printReg(LI.PhysReg, &TRI);

lib/CodeGen/MachineBasicBlock.cpp

  399       OS << printReg(LI.PhysReg, TRI);
  450       LiveIns, [Reg](const RegisterMaskPair &LI) { return LI.PhysReg == Reg; });
  468       LiveIns, [Reg](const RegisterMaskPair &LI) { return LI.PhysReg == Reg; });
  475                return LI0.PhysReg < LI1.PhysReg;
  475                return LI0.PhysReg < LI1.PhysReg;
  482     unsigned PhysReg = I->PhysReg;
  484     for (J = std::next(I); J != LiveIns.end() && J->PhysReg == PhysReg; ++J)
  486     Out->PhysReg = PhysReg;
 1414         if (TRI->regsOverlap(LI.PhysReg, Reg))
 1469       if (TRI->regsOverlap(LI.PhysReg, Reg))

lib/CodeGen/MachineLICM.cpp

  512       for (MCRegAliasIterator AI(LI.PhysReg, TRI, true); AI.isValid(); ++AI)

lib/CodeGen/MachineVerifier.cpp

  626       if (isAllocatable(LI.PhysReg) && !MBB->isEHPad() &&
  629         report_context(LI.PhysReg);
  800       if (!Register::isPhysicalRegister(LI.PhysReg)) {
  804       for (MCSubRegIterator SubRegs(LI.PhysReg, TRI, /*IncludeSelf=*/true);

lib/CodeGen/ReachingDefAnalysis.cpp

   42       for (MCRegUnitIterator Unit(LI.PhysReg, TRI); Unit.isValid(); ++Unit) {

lib/CodeGen/RegAllocFast.cpp

 1256     if (MRI->isAllocatable(LI.PhysReg))
 1257       definePhysReg(MII, LI.PhysReg, regReserved);

lib/CodeGen/ScheduleDAGInstrs.cpp

  220         if (!Uses.contains(LI.PhysReg))
  221           Uses.insert(PhysRegSUOper(&ExitSU, -1, LI.PhysReg));

lib/Target/AArch64/AArch64CollectLOH.cpp

  517         int RegIdx = mapRegToGPRIndex(LI.PhysReg);

lib/Target/Hexagon/HexagonBlockRanges.cpp

  239     MCSubRegIndexIterator S(I.PhysReg, &TRI);
  241       Tmp.insert({I.PhysReg, 0});

lib/Target/Hexagon/HexagonCFGOptimizer.cpp

  228                 LayoutSucc->removeLiveIn(OrigLI.PhysReg);

lib/Target/Hexagon/RDFGraph.cpp

  901       LiveIns.insert(RegisterRef(I.PhysReg, I.LaneMask));

lib/Target/Hexagon/RDFLiveness.cpp

  813         LV.push_back(RegisterRef(I->PhysReg, I->LaneMask));
  840       T.push_back(I->PhysReg);
  860       MCSubRegIndexIterator S(I.PhysReg, &TRI);
  862         LV.set(I.PhysReg);

lib/Target/Mips/MipsDelaySlotFiller.cpp

  410         Uses.set(LI.PhysReg);

lib/Target/X86/X86FloatingPoint.cpp

  129         MCPhysReg Reg = I->PhysReg;

lib/Target/X86/X86FrameLowering.cpp

  198     unsigned Reg = RegMask.PhysReg;

unittests/tools/llvm-exegesis/X86/SnippetRepetitorTest.cpp

   66   return Field(&MachineBasicBlock::RegisterMaskPair::PhysReg, Eq(Reg));