reference, declarationdefinition
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reference to multiple definitions → definitions
unreferenced

References

include/llvm/CodeGen/MachineInstr.h
  880     return mayLoad(Type) || mayStore(Type);
include/llvm/CodeGen/ScheduleDAG.h
  387         ((SU->getInstr()->mayStore() && this->getInstr()->mayLoad()) ? 1 : 0);
include/llvm/CodeGen/TargetInstrInfo.h
 1624     assert((MIa.mayLoad() || MIa.mayStore()) &&
 1626     assert((MIb.mayLoad() || MIb.mayStore()) &&
lib/CodeGen/BranchFolding.cpp
  503     else if (I->mayLoad() || I->mayStore())
  872     if (MBBICommon->mayLoad() || MBBICommon->mayStore())
lib/CodeGen/EarlyIfConversion.cpp
  231     if (I->mayLoad()) {
lib/CodeGen/ImplicitNullChecks.cpp
  327   if (!(PrevMI->mayStore() || PrevMI->mayLoad()))
  374   if (!((MI.mayLoad() || MI.mayStore()) && !MI.isPredicable() &&
  631   if (MI->mayLoad())
lib/CodeGen/MachineCSE.cpp
  409   if (MI->mayLoad()) {
  774       MI->mayLoad() ||
lib/CodeGen/MachineInstr.cpp
 1169       (mayLoad() && hasOrderedMemoryRef())) {
 1183   if (mayLoad() && !isDereferenceableInvariantLoad(AA))
 1290       !mayLoad() &&
 1311   if (!mayLoad())
lib/CodeGen/MachineLICM.cpp
  890   assert(MI.mayLoad() && "Expected MI that loads!");
  992   if (I.mayLoad() && !mayLoadFromGOTOrConstantPool(I) &&
lib/CodeGen/MachinePipeliner.cpp
  632           (!MI.mayLoad() || !MI.isDereferenceableInvariantLoad(AA)));
  668     else if (MI.mayLoad()) {
 1178       if (PI.getKind() == SDep::Order && PI.getSUnit()->getInstr()->mayLoad()) {
 2229   if (!DI->mayStore() || !SI->mayLoad())
lib/CodeGen/MachineScheduler.cpp
 1603     if ((IsLoad && !SU.getInstr()->mayLoad()) ||
lib/CodeGen/MachineSink.cpp
  748   if (!(MI.mayLoad() && !MI.isPredicable()))
lib/CodeGen/MachineVerifier.cpp
 1506     if ((*I)->isLoad() && !MI->mayLoad())
 1835       bool loads = MI->mayLoad();
lib/CodeGen/PeepholeOptimizer.cpp
 1312   if (!MI.canFoldAsLoad() || !MI.mayLoad())
lib/CodeGen/ScheduleDAGInstrs.cpp
  872     if (SU->NumSuccs == 0 && SU->Latency > 1 && (HasVRegDef || MI.mayLoad())) {
  920         !(MI.mayLoad() && !MI.isDereferenceableInvariantLoad(AA)))
lib/CodeGen/StackColoring.cpp
 1006         bool TouchesMemory = I.mayLoad() || I.mayStore();
 1090       if (!I.mayLoad() && !I.mayStore())
lib/CodeGen/TargetInstrInfo.cpp
  590             NewMI->mayLoad()) &&
  919   if (MI.mayLoad() && !MI.isDereferenceableInvariantLoad(AA))
 1089   if (DefMI.mayLoad())
 1106     return MI.mayLoad() ? 2 : 1;
lib/CodeGen/TargetLoweringBase.cpp
 1075     assert(MIB->mayLoad() && "Folded a stackmap use to a non-load!");
lib/CodeGen/TwoAddressInstructionPass.cpp
 1348   if (MI.mayLoad() && !regBKilled) {
lib/Target/AArch64/AArch64ConditionalCompares.cpp
  414     if (I.mayLoad()) {
lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
 1221   bool MayLoad = FirstMI.mayLoad();
 1329             !(MI.mayLoad() &&
lib/Target/AArch64/AArch64RegisterInfo.cpp
  349   if (!MI->mayLoad() && !MI->mayStore())
lib/Target/AArch64/AArch64SpeculationHardening.cpp
  472     if (!MI.mayLoad())
lib/Target/AMDGPU/AMDGPUSubtarget.cpp
  730       if (!MI2.mayLoad() && !MI2.mayStore()) {
lib/Target/AMDGPU/GCNHazardRecognizer.cpp
  188   if ((MI->mayLoad() || MI->mayStore()) && checkMAILdStHazards(MI) > 0)
  299   if (MI->mayLoad() || MI->mayStore())
lib/Target/AMDGPU/SIFormMemoryClauses.cpp
  112   if (!MI.mayLoad() || MI.mayStore())
lib/Target/AMDGPU/SIInsertWaitcnts.cpp
  538     if (TII->isDS(Inst) && (Inst.mayStore() || Inst.mayLoad())) {
 1212     assert(Inst.mayLoad() || Inst.mayStore());
 1217       else if (Inst.mayLoad() &&
 1242     else if ((Inst.mayLoad() &&
 1245              (TII->isMIMG(Inst) && !Inst.mayLoad() && !Inst.mayStore()))
lib/Target/AMDGPU/SIInstrInfo.cpp
  298       if (LdSt.mayLoad())
 1544     if (!MI.mayLoad() || MI.hasUnmodeledSideEffects())
 2545   assert((MIa.mayLoad() || MIa.mayStore()) &&
 2547   assert((MIb.mayLoad() || MIb.mayStore()) &&
 5942   if (!MI.mayLoad())
lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
 1520   if (!(MI.mayLoad() ^ MI.mayStore()))
 1527   if (MI.mayLoad() && TII->getNamedOperand(MI, AMDGPU::OpName::vdata) != NULL)
lib/Target/AMDGPU/SIMemoryLegalizer.cpp
  579   if (!(MI->mayLoad() && !MI->mayStore()))
  593   if (!(!MI->mayLoad() && MI->mayStore()))
  640   if (!(MI->mayLoad() && MI->mayStore()))
  669   assert(MI->mayLoad() && !MI->mayStore());
  703   assert(MI->mayLoad() ^ MI->mayStore());
  903   assert(MI->mayLoad() && !MI->mayStore());
  944   assert(MI->mayLoad() ^ MI->mayStore());
 1137   assert(MI->mayLoad() && !MI->mayStore());
 1182   assert(!MI->mayLoad() && MI->mayStore());
 1247   assert(MI->mayLoad() && MI->mayStore());
lib/Target/ARC/ARCInstrInfo.cpp
  427   if (!MI.mayLoad() && !MI.mayStore())
lib/Target/ARC/ARCOptAddrMode.cpp
  188   assert((Ldst.mayLoad() || Ldst.mayStore()) && "LD/ST instruction expected");
  401     if (IsStore && MI->mayLoad())
  423   bool IsLoad = Ldst->mayLoad();
  432     if (IsStore && MI->mayLoad())
  472     if (!MI->mayLoad() && !MI->mayStore())
lib/Target/ARM/ARMBaseInstrInfo.cpp
 1501   if (MI.mayLoad() && hasLoadFromStackSlot(MI, Accesses) &&
 4655     return MI.mayLoad() ? 3 : 1;
lib/Target/ARM/ARMLoadStoreOptimizer.cpp
 2116     if (I->mayStore() || (!isLd && I->mayLoad()))
lib/Target/ARM/ARMOptimizeBarriersPass.cpp
   43   return !(MI->mayLoad() ||
lib/Target/ARM/ThumbRegisterInfo.cpp
  511   if (MI.mayLoad()) {
lib/Target/Hexagon/HexagonBitTracker.cpp
  207   if (MI.mayLoad()) {
 1062   assert(MI.mayLoad() && "A load that mayn't?");
lib/Target/Hexagon/HexagonConstExtenders.cpp
 1112   if (!ED.UseMI->mayLoad() && !ED.UseMI->mayStore())
 1145   bool IsLoad = MI.mayLoad();
 1641   if ((MI.mayLoad() || MI.mayStore()) && !isStoreImmediate(ExtOpc)) {
 1658       Shift = MI.getOperand(MI.mayLoad() ? 2 : 1).getImm();
 1675     if (MI.mayLoad())
 1796   if (MI.mayLoad() || MI.mayStore()) {
 1802     if (MI.mayLoad())
 1846   if (MI.mayLoad() || MI.mayStore()) {
 1935   assert(MI.mayLoad());
lib/Target/Hexagon/HexagonEarlyIfConv.cpp
  685   if (MI->mayLoad() || MI->mayStore())
lib/Target/Hexagon/HexagonExpandCondsets.cpp
  821   bool IsLoad = TheI.mayLoad(), IsStore = TheI.mayStore();
  838     bool L = MI->mayLoad(), S = MI->mayStore();
 1043   if (DefI->mayLoad() || DefI->mayStore())
lib/Target/Hexagon/HexagonFrameLowering.cpp
 2250         assert(EI.mayLoad() && "Unexpected end instruction");
lib/Target/Hexagon/HexagonHazardRecognizer.cpp
  103   if (UsesLoad && SU->isInstr() && SU->getInstr()->mayLoad())
  155   UsesLoad = MI->mayLoad();
  157   if (TII->isHVXVec(*MI) && !MI->mayLoad() && !MI->mayStore())
lib/Target/Hexagon/HexagonInstrInfo.cpp
 1876   if (MIa.mayLoad() && !isMemOp(MIa) && MIb.mayLoad() && !isMemOp(MIb))
 1876   if (MIa.mayLoad() && !isMemOp(MIa) && MIb.mayLoad() && !isMemOp(MIb))
 2148   if (MI.mayLoad() || MI.mayStore() || MI.isCompare())
 2221   if (!I.mayLoad() && !I.mayStore())
 3201   } else if (MI.mayLoad()) {
lib/Target/Hexagon/HexagonSplitDouble.cpp
  162   if (MI->mayLoad() || MI->mayStore())
  630   bool Load = MI->mayLoad();
lib/Target/Hexagon/HexagonStoreWidening.cpp
  273     if (MI->mayLoad() || MI->mayStore()) {
lib/Target/Hexagon/HexagonSubtarget.cpp
  149     bool IsLoadMI1 = MI1.mayLoad();
  158       if ((IsStoreMI1 && MI2.mayStore()) || (IsLoadMI1 && MI2.mayLoad())) {
  274     if (!L0.mayLoad() || L0.mayStore() ||
  287       if (!L1.mayLoad() || L1.mayStore() ||
lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
  677   if (HII->isPostIncrement(PacketMI) && PacketMI.mayLoad() &&
 1515       bool LoadJ = J.mayLoad(), StoreJ = J.mayStore();
 1516       bool LoadI = I.mayLoad(), StoreI = I.mayStore();
 1678     if (MJ->mayLoad())
lib/Target/Lanai/LanaiDelaySlotFiller.cpp
  186   if (MI->mayLoad()) {
lib/Target/Mips/MipsDelaySlotFiller.cpp
  452   if (!MI.mayStore() && !MI.mayLoad())
  460   SeenLoad |= MI.mayLoad();
  506   HasHazard |= MI.mayLoad() || OrigSeenStore;
  508   SeenNoObjLoad |= MI.mayLoad();
lib/Target/Mips/MipsOptimizePICCall.cpp
  287   if (!DefMI->mayLoad() || DefMI->getNumOperands() < 3)
lib/Target/PowerPC/PPCMachineScheduler.cpp
   32       SecondCand.SU->getInstr()->mayLoad()) {
   36   if (FirstCand.SU->getInstr()->mayLoad() &&
lib/Target/RISCV/RISCVFrameLowering.cpp
  280       if (I->mayLoad() && I->getOperand(0).isReg()) {
lib/Target/Sparc/DelaySlotFiller.cpp
  237   if (candidate->mayLoad()) {
lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
  178   if (MI.mayLoad() && !MI.isDereferenceableInvariantLoad(&AA))
lib/Target/X86/X86CmovConversion.cpp
  187         if (!llvm::any_of(Group, [&](MachineInstr *I) { return I->mayLoad(); }))
  294       if (CC != X86::COND_INVALID && (IncludeLoads || !I.mayLoad())) {
  310         if (I.mayLoad()) {
  660         return I->mayLoad() && X86::getCondFromCMov(*I) == CC;
  711     if (!MI.mayLoad()) {
lib/Target/X86/X86SpeculativeLoadHardening.cpp
  381       if (!MI.mayLoad())
  861       if (!MI.mayLoad())
 1689         if (!MI.mayLoad())
 2607   assert(!MI.mayLoad() && "Found a lingering loading instruction!");