reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/AsmPrinter/AsmPrinter.cpp

  984   if (!MF.getTarget().Options.EmitStackSizeSection)
 1682       MF.getTarget().Options.EmitStackSizeSection) {

lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp

  388       !DD->getCurrentFunction()->getTarget().Options.DisableFramePointerElim(
  394     if (Asm->MF->getTarget().getTargetTriple().isNVPTX()) {

lib/CodeGen/BranchFolding.cpp

  126   bool EnableTailMerge = !MF.getTarget().requiresStructuredCFG() &&

lib/CodeGen/GlobalISel/CallLowering.cpp

   68                     isInTailCallPosition(CS, MIRBuilder.getMF().getTarget());

lib/CodeGen/GlobalISel/CombinerHelper.cpp

  806   if (MF.getTarget().getTargetTriple().isOSDarwin())

lib/CodeGen/GlobalISel/IRTranslator.cpp

 1292     if (MF->getTarget().getOptLevel() == CodeGenOpt::None)
 1408     const TargetMachine &TM = MF->getTarget();
 1586   auto TII = MF->getTarget().getIntrinsicInfo();
 1799   if (MF->getTarget().getTargetTriple().isOSWindows())
 2246   const TargetMachine &TM = MF->getTarget();

lib/CodeGen/MIRParser/MIParser.cpp

 2221   const TargetIntrinsicInfo *TII = MF.getTarget().getIntrinsicInfo();

lib/CodeGen/MIRParser/MIRParser.cpp

  347   const LLVMTargetMachine &TM = MF.getTarget();
  462     const LLVMTargetMachine &TM = MF.getTarget();

lib/CodeGen/MIRPrinter.cpp

  224   const TargetMachine &TM = MF.getTarget();
  851     const TargetIntrinsicInfo *TII = MI.getMF()->getTarget().getIntrinsicInfo();

lib/CodeGen/MachineBasicBlock.cpp

 1116   if (MF->getTarget().requiresStructuredCFG())

lib/CodeGen/MachineBlockPlacement.cpp

  531     return TailDupPlacement && !F->getTarget().requiresStructuredCFG();
 3033   bool EnableTailMerge = !MF.getTarget().requiresStructuredCFG() &&

lib/CodeGen/MachineInstr.cpp

   97     IntrinsicInfo = MF->getTarget().getIntrinsicInfo();

lib/CodeGen/MachineOperand.cpp

  399     IntrinsicInfo = MF->getTarget().getIntrinsicInfo();

lib/CodeGen/MachineVerifier.cpp

  364   TM = &MF.getTarget();

lib/CodeGen/PrologEpilogInserter.cpp

  239   if (MF.getTarget().usesPhysRegsForPEI())
 1027   if (MF.getTarget().getOptLevel() != CodeGenOpt::None &&
 1028       MF.getTarget().Options.StackSymbolOrdering)
 1037       MF.getTarget().getOptLevel() != CodeGenOpt::None &&

lib/CodeGen/RegAllocGreedy.cpp

 3221                             MF->getTarget().getOptLevel());

lib/CodeGen/RegUsageInfoCollector.cpp

  104   const LLVMTargetMachine &TM = MF.getTarget();

lib/CodeGen/ScheduleDAG.cpp

   54     : TM(mf.getTarget()), TII(mf.getSubtarget().getInstrInfo()),

lib/CodeGen/SelectionDAG/FastISel.cpp

 1926       TM(FuncInfo.MF->getTarget()), DL(MF->getDataLayout()),

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

 5739   if (MF.getTarget().getTargetTriple().isOSDarwin())

lib/CodeGen/ShrinkWrap.cpp

  599            !MF.getTarget().getMCAsmInfo()->usesWindowsCFI() &&

lib/CodeGen/TailDuplicator.cpp

  600         (TailBB.getParent()->getTarget().getTargetTriple().isOSDarwin() ||

lib/CodeGen/TargetFrameLoweringImpl.cpp

   88   if (MF.getTarget().Options.EnableIPRA &&
  132     return MF.getTarget().getAllocaPointerSize();

lib/CodeGen/TwoAddressInstructionPass.cpp

 1668   const TargetMachine &TM = MF->getTarget();

lib/CodeGen/XRayInstrumentation.cpp

  208   switch (MF.getTarget().getTargetTriple().getArch()) {

lib/Target/AArch64/AArch64CallLowering.cpp

  466                              MF.getTarget().Options.GuaranteedTailCallOpt)) {
  723     const Triple &TT = MF.getTarget().getTargetTriple();
  734   if (MF.getTarget().Options.GuaranteedTailCallOpt)
  788   bool IsSibCall = !MF.getTarget().Options.GuaranteedTailCallOpt;
 1019                              MF.getTarget().Options.GuaranteedTailCallOpt)

lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp

  482     if (MF->getTarget().getCodeModel() == CodeModel::Tiny) {
  598     if (MF->getTarget().getTargetTriple().isOSFuchsia() &&
  599         MF->getTarget().getCodeModel() == CodeModel::Kernel)

lib/Target/AArch64/AArch64FrameLowering.cpp

  242   if (MFI.hasCalls() && MF.getTarget().Options.DisableFramePointerElim(MF))
  829   return MF.getTarget().getMCAsmInfo()->usesWindowsCFI() &&
  848                          !MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
 1051     switch (MF.getTarget().getCodeModel()) {

lib/Target/AArch64/AArch64ISelLowering.cpp

 3366   bool TailCallOpt = MF.getTarget().Options.GuaranteedTailCallOpt;
 3734   bool TailCallOpt = MF.getTarget().Options.GuaranteedTailCallOpt;

lib/Target/AArch64/AArch64InstrInfo.cpp

   78   const MCAsmInfo *MAI = MF->getTarget().getMCAsmInfo();
 1504   const TargetMachine &TM = MBB.getParent()->getTarget();
 1957   const MCAsmInfo *MAI = MI.getMF()->getTarget().getMCAsmInfo();
 3579     TargetOptions Options = Inst.getParent()->getParent()->getTarget().Options;
 3657     return Inst.getParent()->getParent()->getTarget().Options.UnsafeFPMath;

lib/Target/AArch64/AArch64PreLegalizerCombiner.cpp

  150       MF.getTarget().getOptLevel() != CodeGenOpt::None && !skipFunction(F);

lib/Target/AArch64/AArch64RegisterInfo.cpp

  325   if (MF.getTarget().Options.DisableFramePointerElim(MF) && MFI.adjustsStack())

lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

 1231     = static_cast<const AMDGPUTargetMachine &>(MF.getTarget());
 1891     MF.getTarget().Options.UnsafeFPMath || MI.getFlag(MachineInstr::FmArcp);
 1893   if (!MF.getTarget().Options.UnsafeFPMath && ResTy == S64)

lib/Target/AMDGPU/AMDGPUMachineFunction.cpp

   22   NoSignedZerosFPMath(MF.getTarget().Options.NoSignedZerosFPMath),

lib/Target/AMDGPU/AMDGPUSubtarget.cpp

  895   if (MF.getTarget().getTargetTriple().getArch() == Triple::amdgcn)

lib/Target/AMDGPU/SIFixSGPRCopies.cpp

  752   if (MF.getTarget().getOptLevel() > CodeGenOpt::None && EnableM0Merge)

lib/Target/AMDGPU/SIFrameLowering.cpp

 1151     MF.getTarget().Options.DisableFramePointerElim(MF);

lib/Target/AMDGPU/SIISelLowering.cpp

 2706   if (IsTailCall && MF.getTarget().Options.GuaranteedTailCallOpt) {
 2726     bool TailCallOpt = MF.getTarget().Options.GuaranteedTailCallOpt;

lib/Target/AMDGPU/SIInstrInfo.cpp

 6039     return getInlineAsmLength(AsmStr, *MF->getTarget().getMCAsmInfo(),

lib/Target/ARC/ARCFrameLowering.cpp

  495   bool HasFP = MF.getTarget().Options.DisableFramePointerElim(MF) ||

lib/Target/ARC/ARCInstrInfo.cpp

  407     return getInlineAsmLength(AsmStr, *MF->getTarget().getMCAsmInfo());

lib/Target/ARM/ARMAsmPrinter.cpp

  113   const TargetMachine& TM = MF.getTarget();

lib/Target/ARM/ARMBaseInstrInfo.cpp

  703   const MCAsmInfo *MAI = MF->getTarget().getMCAsmInfo();

lib/Target/ARM/ARMBaseRegisterInfo.cpp

  440   if (MF.getTarget().Options.DisableFramePointerElim(MF) && MFI.adjustsStack())

lib/Target/ARM/ARMFastISel.cpp

  129           TM(funcInfo.MF->getTarget()), TII(*Subtarget->getInstrInfo()),

lib/Target/ARM/ARMFrameLowering.cpp

  109   if (MF.getTarget().Options.DisableFramePointerElim(MF))
  363   const TargetMachine &TM = MF.getTarget();
 1879       if (MF.getTarget().Options.DisableFramePointerElim(MF) && !LRSpilled) {

lib/Target/ARM/ARMISelLowering.cpp

 3336       DAG.getMachineFunction().getTarget().Options.EnableFastISel)

lib/Target/ARM/ARMInstrInfo.cpp

   95   const TargetMachine &TM = MF.getTarget();

lib/Target/ARM/ARMSubtarget.h

  783             MF.getTarget().Options.DisableFramePointerElim(MF)) ||

lib/Target/ARM/Thumb1InstrInfo.cpp

  136   const TargetMachine &TM = MF.getTarget();

lib/Target/ARM/Thumb2InstrInfo.cpp

  224   if (MF.getTarget().isPositionIndependent())

lib/Target/AVR/AVRInstrInfo.cpp

  493     const AVRTargetMachine &TM = static_cast<const AVRTargetMachine&>(MF.getTarget());

lib/Target/AVR/AVRRegisterInfo.cpp

  137   const AVRTargetMachine &TM = (const AVRTargetMachine &)MF.getTarget();

lib/Target/Hexagon/HexagonCopyToCombine.cpp

  478     MF.getTarget().getOptLevel() <= CodeGenOpt::Default;

lib/Target/Hexagon/HexagonFrameLowering.cpp

  378            MF.getTarget().getOptLevel() == CodeGenOpt::None;
 1006   if (MF.getTarget().getOptLevel() == CodeGenOpt::None)
 1019     const TargetMachine &TM = MF.getTarget();
 1118   bool NoOpt = MF.getTarget().getOptLevel() == CodeGenOpt::None;
 1228     auto &HTM = static_cast<const HexagonTargetMachine&>(MF.getTarget());
 1293     auto &HTM = static_cast<const HexagonTargetMachine&>(MF.getTarget());
 2427     if (MF.getTarget().getOptLevel() > CodeGenOpt::Default)

lib/Target/Hexagon/HexagonInstrInfo.cpp

 4308     const MCAsmInfo *MAI = MF->getTarget().getMCAsmInfo();

lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp

   63   auto &HTM = static_cast<const HexagonTargetMachine&>(Fn.getTarget());

lib/Target/MSP430/MSP430FrameLowering.cpp

   31   return (MF.getTarget().Options.DisableFramePointerElim(MF) ||

lib/Target/MSP430/MSP430InstrInfo.cpp

  315                                   *MF->getTarget().getMCAsmInfo());

lib/Target/Mips/MipsBranchExpansion.cpp

  835   const TargetMachine &TM = MF.getTarget();

lib/Target/Mips/MipsCallLowering.cpp

  489       static_cast<const MipsTargetMachine &>(MF.getTarget());
  560       static_cast<const MipsTargetMachine &>(MF.getTarget());

lib/Target/Mips/MipsDelaySlotFiller.cpp

  221       TM = &F.getTarget();

lib/Target/Mips/MipsFastISel.cpp

  257       : FastISel(funcInfo, libInfo), TM(funcInfo.MF->getTarget()),

lib/Target/Mips/MipsFrameLowering.cpp

   97   return MF.getTarget().Options.DisableFramePointerElim(MF) ||

lib/Target/Mips/MipsISelLowering.cpp

  544       static_cast<const MipsTargetMachine &>(funcInfo.MF->getTarget());

lib/Target/Mips/MipsInstrInfo.cpp

  584     return getInlineAsmLength(AsmStr, *MF->getTarget().getMCAsmInfo());

lib/Target/Mips/MipsInstructionSelector.cpp

  344     if (MF.getTarget().isPositionIndependent()) {
  553     if (MF.getTarget().isPositionIndependent()) {
  609     if (MF.getTarget().isPositionIndependent()) {

lib/Target/Mips/MipsMachineFunction.cpp

   33   auto &TM = static_cast<const MipsTargetMachine &>(MF.getTarget());
   74       static_cast<const MipsTargetMachine &>(MF.getTarget()).getABI();
   97   if (!MF.getTarget().isPositionIndependent()) {
  154         static_cast<const MipsTargetMachine &>(MF.getTarget()).getABI().IsN64()

lib/Target/Mips/MipsRegisterInfo.cpp

  285       static_cast<const MipsTargetMachine &>(MF.getTarget()).getABI().IsN64();

lib/Target/Mips/MipsSEInstrInfo.cpp

  892   const TargetMachine &TM = MBB.getParent()->getTarget();

lib/Target/Mips/MipsSERegisterInfo.cpp

  155       static_cast<const MipsTargetMachine &>(MF.getTarget()).getABI();

lib/Target/NVPTX/NVPTXAsmPrinter.cpp

  203   LLVMTargetMachine &TM = const_cast<LLVMTargetMachine&>(MF->getTarget());
 1639     if (static_cast<const NVPTXTargetMachine &>(MF.getTarget()).is64Bit()) {

lib/Target/NVPTX/NVPTXFrameLowering.cpp

   48         static_cast<const NVPTXTargetMachine &>(MF.getTarget()).is64Bit();

lib/Target/NVPTX/NVPTXISelLowering.cpp

 4315   if (MF.getTarget().Options.AllowFPOpFusion == FPOpFusion::Fast)
 4323   if (MF.getTarget().Options.UnsafeFPMath)

lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp

  147         static_cast<const NVPTXTargetMachine &>(MF.getTarget());

lib/Target/PowerPC/PPCFastISel.cpp

   98         : FastISel(FuncInfo, LibInfo), TM(FuncInfo.MF->getTarget()),

lib/Target/PowerPC/PPCFrameLowering.cpp

  552   return MF.getTarget().Options.DisableFramePointerElim(MF) ||
  554     (MF.getTarget().Options.GuaranteedTailCallOpt &&
 1698     if (MF.getTarget().Options.GuaranteedTailCallOpt &&
 1822   if (MF.getTarget().Options.GuaranteedTailCallOpt &&
 1941   if (MF.getTarget().Options.GuaranteedTailCallOpt &&
 2312   if (MF.getTarget().Options.GuaranteedTailCallOpt &&

lib/Target/PowerPC/PPCInstrInfo.cpp

  276   if (!Root.getParent()->getParent()->getTarget().Options.UnsafeFPMath)
 2016     return getInlineAsmLength(AsmStr, *MF->getTarget().getMCAsmInfo());

lib/Target/RISCV/RISCVExpandPseudoInsts.cpp

  679   if (MF->getTarget().isPositionIndependent()) {

lib/Target/RISCV/RISCVFrameLowering.cpp

   30   return MF.getTarget().Options.DisableFramePointerElim(MF) ||

lib/Target/RISCV/RISCVInstrInfo.cpp

  384   const auto &TM = static_cast<const RISCVTargetMachine &>(MF->getTarget());
  471     const auto &TM = static_cast<const RISCVTargetMachine &>(MF.getTarget());

lib/Target/Sparc/SparcFrameLowering.cpp

  255   return MF.getTarget().Options.DisableFramePointerElim(MF) ||

lib/Target/SystemZ/SystemZFrameLowering.cpp

  516   return (MF.getTarget().Options.DisableFramePointerElim(MF) ||

lib/Target/SystemZ/SystemZInstrInfo.cpp

 1400     return getInlineAsmLength(AsmStr, *MF->getTarget().getMCAsmInfo());

lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp

 1279   const MCAsmInfo *MCAI = MF.getTarget().getMCAsmInfo();
 1358   const MCAsmInfo *MCAI = MF.getTarget().getMCAsmInfo();

lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp

   93   auto EHType = MF.getTarget().getMCAsmInfo()->getExceptionHandlingType();

lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp

  107   if (MF.getTarget().getMCAsmInfo()->getExceptionHandlingType() !=

lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp

   54     const TargetMachine &TM = MF.getTarget();
  199   const TargetMachine &TM = MI->getMF()->getTarget();

lib/Target/X86/X86FastISel.cpp

 2670     if (MF->getTarget().getMCAsmInfo()->usesWindowsCFI())

lib/Target/X86/X86FrameLowering.cpp

   85   return (MF.getTarget().Options.DisableFramePointerElim(MF) ||
  766   bool IsLargeCodeModel = MF.getTarget().getCodeModel() == CodeModel::Large;
  786   if (Is64Bit && MF.getTarget().getCodeModel() == CodeModel::Large) {
  990   bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
 1515   return !MF.getTarget().getMCAsmInfo()->usesWindowsCFI() || hasFP(MF);
 1605   bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
 1618       (!MF.getTarget().getTargetTriple().isOSDarwin() &&
 1619        !MF.getTarget().getTargetTriple().isOSWindows()) &&
 1784   bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
 2482   if (Is64Bit && MF.getTarget().getCodeModel() == CodeModel::Large) {
 2817     bool WindowsCFI = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();

lib/Target/X86/X86ISelLowering.cpp

 3340                          MF.getTarget().Options.GuaranteedTailCallOpt))
 3484                        MF.getTarget().Options.GuaranteedTailCallOpt)) {
 3618   bool IsGuaranteeTCO = MF.getTarget().Options.GuaranteedTailCallOpt ||
 4478                        MF.getTarget().Options.GuaranteedTailCallOpt);
24221   if (MF.getTarget().getMCAsmInfo()->usesWindowsCFI()) {
30534   bool UseImmLabel = (MF->getTarget().getCodeModel() == CodeModel::Small) &&
30898   bool UseImmLabel = (MF->getTarget().getCodeModel() == CodeModel::Small) &&

lib/Target/X86/X86InstrInfo.cpp

 3965   bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
 5298     if (MF.getTarget().getCodeModel() != CodeModel::Small &&
 5299         MF.getTarget().getCodeModel() != CodeModel::Kernel)
 5304     if (MF.getTarget().isPositionIndependent()) {
 6017           MF->getTarget().getCodeModel() == CodeModel::Medium ||
 6018           MF->getTarget().getCodeModel() == CodeModel::Large) &&
 7555     return Inst.getParent()->getParent()->getTarget().Options.UnsafeFPMath;
 7739         static_cast<const X86TargetMachine *>(&MF.getTarget());

lib/Target/X86/X86MCInstLower.cpp

  109     : Ctx(mf.getContext()), MF(mf), TM(mf.getTarget()), MAI(*TM.getMCAsmInfo()),

lib/Target/X86/X86RetpolineThunks.cpp

   95   TM = &MF.getTarget();;

lib/Target/X86/X86SpeculativeLoadHardening.cpp

 1106       if (MF.getTarget().getCodeModel() == CodeModel::Small &&
 1145     if (MF.getTarget().getCodeModel() == CodeModel::Small &&
 2497     if (MF.getTarget().getCodeModel() == CodeModel::Small &&
 2535   if (MF.getTarget().getCodeModel() == CodeModel::Small &&

lib/Target/XCore/XCoreFrameLowering.cpp

  219   return MF.getTarget().Options.DisableFramePointerElim(MF) ||

tools/llvm-exegesis/lib/Assembler.cpp

  137     : MF(MF), MCII(MF.getTarget().getMCInstrInfo()), Entry(addBasicBlock()),