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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc 884 const MachineFunction &MF = *MI.getParent()->getParent();
gen/lib/Target/AMDGPU/AMDGPUGenGlobalISel.inc 377 const MachineFunction &MF = *MI.getParent()->getParent();
gen/lib/Target/ARM/ARMGenGlobalISel.inc 746 const MachineFunction &MF = *MI.getParent()->getParent();
gen/lib/Target/Mips/MipsGenGlobalISel.inc 611 const MachineFunction &MF = *MI.getParent()->getParent();
gen/lib/Target/RISCV/RISCVGenGlobalISel.inc 257 const MachineFunction &MF = *MI.getParent()->getParent();
gen/lib/Target/X86/X86GenGlobalISel.inc 750 const MachineFunction &MF = *MI.getParent()->getParent();
include/llvm/ADT/ilist_node.h 267 return static_cast<const NodeTy *>(this)->getParent();
include/llvm/CodeGen/MachineOptimizationRemarkEmitter.h 35 MBB->getParent()->getFunction(), Loc),
lib/CodeGen/AsmPrinter/AsmPrinter.cpp 964 MBB->getReverseIterator() == MBB->getParent()->rbegin())
lib/CodeGen/AsmPrinter/DwarfCFIException.cpp 145 auto &F = MBB->getParent()->getFunction();
lib/CodeGen/AsmPrinter/WinException.cpp 178 const MachineFunction *MF = MBB->getParent();
lib/CodeGen/BranchRelaxation.cpp 72 const Align ParentAlign = MBB.getParent()->getAlignment();
lib/CodeGen/LiveDebugValues.cpp 663 int Offset = TFI->getFrameIndexReference(*MBB->getParent(), FI, Reg);
lib/CodeGen/LivePhysRegs.cpp 224 const MachineFunction &MF = *MBB.getParent();
235 const MachineFunction &MF = *MBB.getParent();
241 const MachineFunction &MF = *MBB.getParent();
248 const MachineFunction &MF = *MBB.getParent();
lib/CodeGen/LiveRangeCalc.cpp 590 const MachineFunction &MF = *MBB->getParent();
lib/CodeGen/LiveRegUnits.cpp 127 const MachineFunction &MF = *MBB.getParent();
144 const MachineFunction &MF = *MBB.getParent();
lib/CodeGen/MIRPrinter.cpp 592 const MachineFunction &MF = *MBB.getParent();
667 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
lib/CodeGen/MIRVRegNamerUtils.cpp 86 const MachineFunction &MF = *MBB->getParent();
lib/CodeGen/MachineBasicBlock.cpp 61 const MachineFunction *MF = getParent();
266 if (getParent())
267 Name = (getParent()->getName() + ":").str();
277 const MachineFunction *MF = getParent();
293 const MachineFunction *MF = getParent();
340 const TargetInstrInfo &TII = *getParent()->getSubtarget().getInstrInfo();
1112 const MachineFunction *MF = getParent();
1498 assert(getParent()->getProperties().hasProperty(
lib/CodeGen/MachineBlockFrequencyInfo.cpp 129 const MachineFunction *F = Node->getParent();
lib/CodeGen/MachineBlockPlacement.cpp 1259 if (!BB->getParent()->getFunction().hasProfileData())
lib/CodeGen/MachineInstr.cpp 81 if (const MachineFunction *MF = MBB->getParent())
656 return getParent()->getParent();
1319 const MachineFrameInfo &MFI = getParent()->getParent()->getFrameInfo();
2008 if (const MachineFunction *MF = MBB->getParent())
lib/CodeGen/MachineOperand.cpp 43 if (const MachineFunction *MF = MBB->getParent())
lib/CodeGen/MachineRegisterInfo.cpp 576 const MachineFunction &MF = *MBB.getParent();
lib/CodeGen/MachineScheduler.cpp 1487 *BaseOp->getParent()->getParent()->getParent();
lib/CodeGen/MachineVerifier.cpp 491 report(msg, MBB->getParent());
627 MBB->getIterator() != MBB->getParent()->begin()) {
lib/CodeGen/RegisterScavenging.cpp 584 const MachineFunction &MF = *MBB.getParent();
lib/CodeGen/TargetInstrInfo.cpp 671 const MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo();
689 const MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo();
lib/Target/AArch64/AArch64FrameLowering.cpp 413 const MachineFunction *MF = MBB.getParent();
lib/Target/AArch64/AArch64InstrInfo.cpp 77 const MachineFunction *MF = MBB.getParent();
502 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
2380 FirstLdSt.getParent()->getParent()->getFrameInfo();
3579 TargetOptions Options = Inst.getParent()->getParent()->getTarget().Options;
3657 return Inst.getParent()->getParent()->getTarget().Options.UnsafeFPMath;
lib/Target/AArch64/AArch64InstructionSelector.cpp 4017 auto &MF = *MBB.getParent();
4637 const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
4670 const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
lib/Target/AArch64/AArch64RegisterBankInfo.cpp 270 const MachineFunction &MF = *MI.getParent()->getParent();
421 const MachineFunction &MF = *MI.getParent()->getParent();
522 const MachineFunction &MF = *MI.getParent()->getParent();
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp 2179 const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
lib/Target/AMDGPU/AMDGPUMCInstLower.cpp 202 LLVMContext &C = MI->getParent()->getParent()->getFunction().getContext();
266 LLVMContext &C = MI->getParent()->getParent()->getFunction().getContext();
390 LLVMContext &C = MI->getParent()->getParent()->getFunction().getContext();
lib/Target/AMDGPU/AMDGPUMacroFusion.cpp 45 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp 341 const MachineFunction &MF = *MI.getParent()->getParent();
1904 const MachineFunction &MF = *MI.getParent()->getParent();
1923 const MachineFunction &MF = *MI.getParent()->getParent();
1938 const MachineFunction &MF = *MI.getParent()->getParent();
1974 const MachineFunction &MF = *MI.getParent()->getParent();
2033 const MachineFunction &MF = *MI.getParent()->getParent();
2113 const MachineFunction &MF = *MI.getParent()->getParent();
lib/Target/AMDGPU/GCNRegPressure.cpp 356 MRI = &MI.getParent()->getParent()->getRegInfo();
lib/Target/AMDGPU/GCNRegPressure.h 243 MI.getParent()->getParent()->getRegInfo());
249 MI.getParent()->getParent()->getRegInfo());
lib/Target/AMDGPU/R600InstrInfo.cpp 204 const MachineFunction *MF = MI.getParent()->getParent();
214 const MachineFunction *MF = MI.getParent()->getParent();
lib/Target/AMDGPU/SIFixSGPRCopies.cpp 154 const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
lib/Target/AMDGPU/SIInsertSkips.cpp 111 const MachineFunction *MF = From.getParent();
lib/Target/AMDGPU/SIInstrInfo.cpp 330 = LdSt.getParent()->getParent()->getInfo<SIMachineFunctionInfo>();
418 const MachineFunction &MF = *MI1.getParent()->getParent();
476 FirstLdSt.getParent()->getParent()->getRegInfo();
2125 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
2139 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
2596 const MachineFunction *MF = MO->getParent()->getParent()->getParent();
2937 const MachineFunction *MF = MI.getParent()->getParent();
3196 const MachineFunction *MF = MI.getParent()->getParent();
3738 const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
3809 const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
3926 const MachineFunction *MF = MO.getParent()->getParent()->getParent();
3951 const MachineFunction &MF = *MI.getParent()->getParent();
5801 const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
6037 const MachineFunction *MF = MI.getParent()->getParent();
lib/Target/AMDGPU/SIInstrInfo.h 673 const MachineFunction &MF = *MI.getParent()->getParent();
679 const MachineFunction &MF = *MI.getParent()->getParent();
822 MI.getParent()->getParent()->getRegInfo().
lib/Target/ARC/ARCInstrInfo.cpp 405 const MachineFunction *MF = MI.getParent()->getParent();
lib/Target/ARM/ARMAsmPrinter.cpp 210 const MachineFunction &MF = *MI->getParent()->getParent();
420 const MachineFunction &MF = *MI->getParent()->getParent();
1070 const MachineFunction &MF = *MI->getParent()->getParent();
1243 const MachineFunction &MF = *MI->getParent()->getParent();
lib/Target/ARM/ARMBaseInstrInfo.cpp 665 MI.getParent()->getParent()->getInfo<ARMFunctionInfo>();
702 const MachineFunction *MF = MBB.getParent();
1777 const MachineFunction *MF = MI0.getParent()->getParent();
4312 const MachineFunction *MF = DefMI.getParent()->getParent();
lib/Target/ARM/ARMMCInstLower.cpp 170 if (MI.getParent()->getParent()->getInfo<ARMFunctionInfo>()
lib/Target/ARM/ARMRegisterBankInfo.cpp 224 const MachineFunction &MF = *MI.getParent()->getParent();
lib/Target/ARM/Thumb1FrameLowering.cpp 559 if (!needPopSpecialFixUp(*MBB.getParent()))
lib/Target/AVR/AVRInstrInfo.cpp 492 const MachineFunction &MF = *MI.getParent()->getParent();
lib/Target/Hexagon/HexagonAsmPrinter.cpp 129 const MachineFunction &MF = *MI->getParent()->getParent();
269 const MachineFunction &MF = *MI.getParent()->getParent();
760 const MachineFunction &MF = *MI->getParent()->getParent();
lib/Target/Hexagon/HexagonConstExtenders.cpp 494 const MachineFunction &MF = *MBB.getParent();
lib/Target/Hexagon/HexagonConstPropagation.cpp 756 const MachineFunction &MF = *B.getParent();
834 if (NextI != MB->getParent()->end())
lib/Target/Hexagon/HexagonInstrInfo.cpp 4307 const MachineFunction *MF = MBB.getParent();
lib/Target/Hexagon/HexagonVLIWPacketizer.cpp 343 const MachineFunction &MF = *MI.getParent()->getParent();
1095 const MachineFunction *MF = MI.getParent()->getParent();
lib/Target/MSP430/MSP430InstrInfo.cpp 312 const MachineFunction *MF = MI.getParent()->getParent();
lib/Target/Mips/MipsDelaySlotFiller.cpp 383 for (const MCPhysReg *R = TRI.getCalleeSavedRegs(MI.getParent()->getParent());
lib/Target/Mips/MipsInstrInfo.cpp 582 const MachineFunction *MF = MI.getParent()->getParent();
lib/Target/Mips/MipsRegisterBankInfo.cpp 404 const MachineFunction &MF = *MI.getParent()->getParent();
lib/Target/PowerPC/PPCInstrInfo.cpp 191 &DefMI.getParent()->getParent()->getRegInfo();
768 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
2014 const MachineFunction *MF = MI.getParent()->getParent();
3514 const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
3996 const MachineFunction *MF = MI.getParent()->getParent();
lib/Target/PowerPC/PPCMCInstLower.cpp 112 const MachineFunction *MF = MO.getParent()->getParent()->getParent();
131 const MachineFunction *MF = MO.getParent()->getParent()->getParent();
lib/Target/RISCV/RISCVInstrInfo.cpp 470 const MachineFunction &MF = *MI.getParent()->getParent();
lib/Target/SystemZ/SystemZHazardRecognizer.cpp 118 const MachineFunction &MF = *MI->getParent()->getParent();
lib/Target/SystemZ/SystemZInstrInfo.cpp 334 const MachineFrameInfo &MFI = MI.getParent()->getParent()->getFrameInfo();
545 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
1398 const MachineFunction *MF = MI.getParent()->getParent();
lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp 53 const MachineFunction &MF = *MO.getParent()->getParent()->getParent();
227 *MI->getParent()->getParent()->getInfo<WebAssemblyFunctionInfo>();
240 MI->getParent()->getParent()->getRegInfo();
lib/Target/X86/X86FrameLowering.cpp 2906 assert(MBB.getParent() && "Block is not attached to a function!");
2907 const MachineFunction &MF = *MBB.getParent();
2912 assert(MBB.getParent() && "Block is not attached to a function!");
2921 if (canUseLEAForSPInEpilogue(*MBB.getParent()))
lib/Target/X86/X86InstrInfo.cpp 139 const MachineFunction *MF = MI.getParent()->getParent();
611 const MachineFunction &MF = *MI.getParent()->getParent();
631 const MachineFunction &MF = *MI.getParent()->getParent();
2415 const MachineFunction *MF = TailCall.getParent()->getParent();
2843 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
7555 return Inst.getParent()->getParent()->getTarget().Options.UnsafeFPMath;
lib/Target/X86/X86MCInstLower.cpp 1595 if (MBB == &MBB->getParent()->front())
1610 MI.getParent()->getParent()->getConstantPool()->getConstants();
lib/Target/X86/X86OptimizeLEAs.cpp 335 const MachineFunction *MF = MI.getParent()->getParent();
lib/Target/X86/X86RegisterBankInfo.cpp 146 const MachineFunction &MF = *MI.getParent()->getParent();
162 const MachineFunction &MF = *MI.getParent()->getParent();
279 const MachineFunction &MF = *MI.getParent()->getParent();
lib/Target/XCore/XCoreAsmPrinter.cpp 189 const MachineFunction *MF = MI->getParent()->getParent();