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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
tools/lld/ELF/ARMErrataFix.cpp 425 RelType patchRelType = R_ARM_THM_JUMP24;
455 RelType type;
tools/lld/ELF/Arch/AArch64.cpp 35 RelExpr getRelExpr(RelType type, const Symbol &s,
37 RelType getDynRel(RelType type) const override;
37 RelType getDynRel(RelType type) const override;
42 bool needsThunk(RelExpr expr, RelType type, const InputFile *file,
45 bool inBranchRange(RelType type, uint64_t src, uint64_t dst) const override;
46 bool usesOnlyLowPageBits(RelType type) const override;
47 void relocateOne(uint8_t *loc, RelType type, uint64_t val) const override;
48 RelExpr adjustRelaxExpr(RelType type, const uint8_t *data,
50 void relaxTlsGdToLe(uint8_t *loc, RelType type, uint64_t val) const override;
51 void relaxTlsGdToIe(uint8_t *loc, RelType type, uint64_t val) const override;
52 void relaxTlsIeToLe(uint8_t *loc, RelType type, uint64_t val) const override;
77 RelExpr AArch64::getRelExpr(RelType type, const Symbol &s,
156 RelExpr AArch64::adjustRelaxExpr(RelType type, const uint8_t *data,
166 bool AArch64::usesOnlyLowPageBits(RelType type) const {
184 RelType AArch64::getDynRel(RelType type) const {
184 RelType AArch64::getDynRel(RelType type) const {
232 bool AArch64::needsThunk(RelExpr expr, RelType type, const InputFile *file,
250 bool AArch64::inBranchRange(RelType type, uint64_t src, uint64_t dst) const {
305 void AArch64::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
451 void AArch64::relaxTlsGdToLe(uint8_t *loc, RelType type, uint64_t val) const {
481 void AArch64::relaxTlsGdToIe(uint8_t *loc, RelType type, uint64_t val) const {
512 void AArch64::relaxTlsIeToLe(uint8_t *loc, RelType type, uint64_t val) const {
tools/lld/ELF/Arch/AMDGPU.cpp 29 void relocateOne(uint8_t *loc, RelType type, uint64_t val) const override;
30 RelExpr getRelExpr(RelType type, const Symbol &s,
32 RelType getDynRel(RelType type) const override;
32 RelType getDynRel(RelType type) const override;
61 void AMDGPU::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
83 RelExpr AMDGPU::getRelExpr(RelType type, const Symbol &s,
105 RelType AMDGPU::getDynRel(RelType type) const {
105 RelType AMDGPU::getDynRel(RelType type) const {
tools/lld/ELF/Arch/ARM.cpp 30 RelExpr getRelExpr(RelType type, const Symbol &s,
32 RelType getDynRel(RelType type) const override;
32 RelType getDynRel(RelType type) const override;
33 int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override;
41 bool needsThunk(RelExpr expr, RelType type, const InputFile *file,
44 bool inBranchRange(RelType type, uint64_t src, uint64_t dst) const override;
45 void relocateOne(uint8_t *loc, RelType type, uint64_t val) const override;
83 RelExpr ARM::getRelExpr(RelType type, const Symbol &s,
147 RelType ARM::getDynRel(RelType type) const {
147 RelType ARM::getDynRel(RelType type) const {
264 bool ARM::needsThunk(RelExpr expr, RelType type, const InputFile *file,
335 bool ARM::inBranchRange(RelType type, uint64_t src, uint64_t dst) const {
378 void ARM::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
521 int64_t ARM::getImplicitAddend(const uint8_t *buf, RelType type) const {
tools/lld/ELF/Arch/AVR.cpp 47 RelExpr getRelExpr(RelType type, const Symbol &s,
49 void relocateOne(uint8_t *loc, RelType type, uint64_t val) const override;
55 RelExpr AVR::getRelExpr(RelType type, const Symbol &s,
60 void AVR::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
tools/lld/ELF/Arch/Hexagon.cpp 31 RelExpr getRelExpr(RelType type, const Symbol &s,
33 RelType getDynRel(RelType type) const override;
33 RelType getDynRel(RelType type) const override;
34 void relocateOne(uint8_t *loc, RelType type, uint64_t val) const override;
88 RelExpr Hexagon::getRelExpr(RelType type, const Symbol &s,
205 void Hexagon::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
320 RelType Hexagon::getDynRel(RelType type) const {
320 RelType Hexagon::getDynRel(RelType type) const {
tools/lld/ELF/Arch/MSP430.cpp 37 RelExpr getRelExpr(RelType type, const Symbol &s,
39 void relocateOne(uint8_t *loc, RelType type, uint64_t val) const override;
48 RelExpr MSP430::getRelExpr(RelType type, const Symbol &s,
63 void MSP430::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
tools/lld/ELF/Arch/Mips.cpp 29 RelExpr getRelExpr(RelType type, const Symbol &s,
31 int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override;
32 RelType getDynRel(RelType type) const override;
32 RelType getDynRel(RelType type) const override;
37 bool needsThunk(RelExpr expr, RelType type, const InputFile *file,
39 void relocateOne(uint8_t *loc, RelType type, uint64_t val) const override;
40 bool usesOnlyLowPageBits(RelType type) const override;
78 RelExpr MIPS<ELFT>::getRelExpr(RelType type, const Symbol &s,
189 template <class ELFT> RelType MIPS<ELFT>::getDynRel(RelType type) const {
189 template <class ELFT> RelType MIPS<ELFT>::getDynRel(RelType type) const {
347 bool MIPS<ELFT>::needsThunk(RelExpr expr, RelType type, const InputFile *file,
370 int64_t MIPS<ELFT>::getImplicitAddend(const uint8_t *buf, RelType type) const {
441 calculateMipsRelChain(uint8_t *loc, RelType type, uint64_t val) {
454 RelType type2 = (type >> 8) & 0xff;
455 RelType type3 = (type >> 16) & 0xff;
467 static bool isBranchReloc(RelType type) {
472 static bool isMicroBranchReloc(RelType type) {
478 static uint64_t fixupCrossModeJump(uint8_t *loc, RelType type, uint64_t val) {
527 void MIPS<ELFT>::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
715 template <class ELFT> bool MIPS<ELFT>::usesOnlyLowPageBits(RelType type) const {
tools/lld/ELF/Arch/PPC.cpp 27 RelExpr getRelExpr(RelType type, const Symbol &s,
29 RelType getDynRel(RelType type) const override;
29 RelType getDynRel(RelType type) const override;
39 bool needsThunk(RelExpr expr, RelType relocType, const InputFile *file,
42 bool inBranchRange(RelType type, uint64_t src, uint64_t dst) const override;
43 void relocateOne(uint8_t *loc, RelType type, uint64_t val) const override;
44 RelExpr adjustRelaxExpr(RelType type, const uint8_t *data,
46 int getTlsGdRelaxSkip(RelType type) const override;
47 void relaxTlsGdToIe(uint8_t *loc, RelType type, uint64_t val) const override;
48 void relaxTlsGdToLe(uint8_t *loc, RelType type, uint64_t val) const override;
49 void relaxTlsLdToLe(uint8_t *loc, RelType type, uint64_t val) const override;
50 void relaxTlsIeToLe(uint8_t *loc, RelType type, uint64_t val) const override;
171 bool PPC::needsThunk(RelExpr expr, RelType type, const InputFile *file,
184 bool PPC::inBranchRange(RelType type, uint64_t src, uint64_t dst) const {
191 RelExpr PPC::getRelExpr(RelType type, const Symbol &s,
244 RelType PPC::getDynRel(RelType type) const {
244 RelType PPC::getDynRel(RelType type) const {
250 static std::pair<RelType, uint64_t> fromDTPREL(RelType type, uint64_t val) {
250 static std::pair<RelType, uint64_t> fromDTPREL(RelType type, uint64_t val) {
268 void PPC::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
269 RelType newType;
336 RelExpr PPC::adjustRelaxExpr(RelType type, const uint8_t *data,
345 int PPC::getTlsGdRelaxSkip(RelType type) const {
359 void PPC::relaxTlsGdToIe(uint8_t *loc, RelType type, uint64_t val) const {
377 void PPC::relaxTlsGdToLe(uint8_t *loc, RelType type, uint64_t val) const {
392 void PPC::relaxTlsLdToLe(uint8_t *loc, RelType type, uint64_t val) const {
415 void PPC::relaxTlsIeToLe(uint8_t *loc, RelType type, uint64_t val) const {
tools/lld/ELF/Arch/PPC64.cpp 102 bool isPPC64SmallCodeModelTocReloc(RelType type) {
157 bool tryRelaxPPC64TocIndirection(RelType type, const Relocation &rel,
197 int getTlsGdRelaxSkip(RelType type) const override;
199 RelExpr getRelExpr(RelType type, const Symbol &s,
201 RelType getDynRel(RelType type) const override;
201 RelType getDynRel(RelType type) const override;
205 void relocateOne(uint8_t *loc, RelType type, uint64_t val) const override;
207 bool needsThunk(RelExpr expr, RelType type, const InputFile *file,
210 bool inBranchRange(RelType type, uint64_t src, uint64_t dst) const override;
211 RelExpr adjustRelaxExpr(RelType type, const uint8_t *data,
213 void relaxGot(uint8_t *loc, RelType type, uint64_t val) const override;
214 void relaxTlsGdToIe(uint8_t *loc, RelType type, uint64_t val) const override;
215 void relaxTlsGdToLe(uint8_t *loc, RelType type, uint64_t val) const override;
216 void relaxTlsLdToLe(uint8_t *loc, RelType type, uint64_t val) const override;
217 void relaxTlsIeToLe(uint8_t *loc, RelType type, uint64_t val) const override;
329 int PPC64::getTlsGdRelaxSkip(RelType type) const {
362 void PPC64::relaxGot(uint8_t *loc, RelType type, uint64_t val) const {
383 void PPC64::relaxTlsGdToLe(uint8_t *loc, RelType type, uint64_t val) const {
422 void PPC64::relaxTlsLdToLe(uint8_t *loc, RelType type, uint64_t val) const {
487 void PPC64::relaxTlsIeToLe(uint8_t *loc, RelType type, uint64_t val) const {
537 RelExpr PPC64::getRelExpr(RelType type, const Symbol &s,
637 RelType PPC64::getDynRel(RelType type) const {
637 RelType PPC64::getDynRel(RelType type) const {
678 static std::pair<RelType, uint64_t> toAddr16Rel(RelType type, uint64_t val) {
678 static std::pair<RelType, uint64_t> toAddr16Rel(RelType type, uint64_t val) {
750 static bool isTocOptType(RelType type) {
763 void PPC64::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
767 RelType originalType = type;
900 bool PPC64::needsThunk(RelExpr expr, RelType type, const InputFile *file,
930 bool PPC64::inBranchRange(RelType type, uint64_t src, uint64_t dst) const {
939 RelExpr PPC64::adjustRelaxExpr(RelType type, const uint8_t *data,
965 void PPC64::relaxTlsGdToIe(uint8_t *loc, RelType type, uint64_t val) const {
tools/lld/ELF/Arch/RISCV.cpp 32 RelType getDynRel(RelType type) const override;
32 RelType getDynRel(RelType type) const override;
33 RelExpr getRelExpr(RelType type, const Symbol &s,
35 void relocateOne(uint8_t *loc, RelType type, uint64_t val) const override;
179 RelType RISCV::getDynRel(RelType type) const {
179 RelType RISCV::getDynRel(RelType type) const {
184 RelExpr RISCV::getRelExpr(const RelType type, const Symbol &s,
239 void RISCV::relocateOne(uint8_t *loc, const RelType type,
tools/lld/ELF/Arch/SPARCV9.cpp 27 RelExpr getRelExpr(RelType type, const Symbol &s,
31 void relocateOne(uint8_t *loc, RelType type, uint64_t val) const override;
50 RelExpr SPARCV9::getRelExpr(RelType type, const Symbol &s,
78 void SPARCV9::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
tools/lld/ELF/Arch/X86.cpp 27 int getTlsGdRelaxSkip(RelType type) const override;
28 RelExpr getRelExpr(RelType type, const Symbol &s,
30 int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override;
32 RelType getDynRel(RelType type) const override;
32 RelType getDynRel(RelType type) const override;
38 void relocateOne(uint8_t *loc, RelType type, uint64_t val) const override;
40 RelExpr adjustRelaxExpr(RelType type, const uint8_t *data,
42 void relaxTlsGdToIe(uint8_t *loc, RelType type, uint64_t val) const override;
43 void relaxTlsGdToLe(uint8_t *loc, RelType type, uint64_t val) const override;
44 void relaxTlsIeToLe(uint8_t *loc, RelType type, uint64_t val) const override;
45 void relaxTlsLdToLe(uint8_t *loc, RelType type, uint64_t val) const override;
69 int X86::getTlsGdRelaxSkip(RelType type) const {
73 RelExpr X86::getRelExpr(RelType type, const Symbol &s,
159 RelExpr X86::adjustRelaxExpr(RelType type, const uint8_t *data,
186 RelType X86::getDynRel(RelType type) const {
186 RelType X86::getDynRel(RelType type) const {
241 int64_t X86::getImplicitAddend(const uint8_t *buf, RelType type) const {
264 void X86::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
322 void X86::relaxTlsGdToLe(uint8_t *loc, RelType type, uint64_t val) const {
337 void X86::relaxTlsGdToIe(uint8_t *loc, RelType type, uint64_t val) const {
354 void X86::relaxTlsIeToLe(uint8_t *loc, RelType type, uint64_t val) const {
391 void X86::relaxTlsLdToLe(uint8_t *loc, RelType type, uint64_t val) const {
tools/lld/ELF/Arch/X86_64.cpp 29 int getTlsGdRelaxSkip(RelType type) const override;
30 RelExpr getRelExpr(RelType type, const Symbol &s,
32 RelType getDynRel(RelType type) const override;
32 RelType getDynRel(RelType type) const override;
38 void relocateOne(uint8_t *loc, RelType type, uint64_t val) const override;
40 RelExpr adjustRelaxExpr(RelType type, const uint8_t *data,
42 void relaxGot(uint8_t *loc, RelType type, uint64_t val) const override;
43 void relaxTlsGdToIe(uint8_t *loc, RelType type, uint64_t val) const override;
44 void relaxTlsGdToLe(uint8_t *loc, RelType type, uint64_t val) const override;
45 void relaxTlsIeToLe(uint8_t *loc, RelType type, uint64_t val) const override;
46 void relaxTlsLdToLe(uint8_t *loc, RelType type, uint64_t val) const override;
73 int X86_64::getTlsGdRelaxSkip(RelType type) const { return 2; }
75 RelExpr X86_64::getRelExpr(RelType type, const Symbol &s,
173 RelType X86_64::getDynRel(RelType type) const {
173 RelType X86_64::getDynRel(RelType type) const {
180 void X86_64::relaxTlsGdToLe(uint8_t *loc, RelType type, uint64_t val) const {
220 void X86_64::relaxTlsGdToIe(uint8_t *loc, RelType type, uint64_t val) const {
261 void X86_64::relaxTlsIeToLe(uint8_t *loc, RelType type, uint64_t val) const {
302 void X86_64::relaxTlsLdToLe(uint8_t *loc, RelType type, uint64_t val) const {
350 void X86_64::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
404 RelExpr X86_64::adjustRelaxExpr(RelType type, const uint8_t *data,
498 void X86_64::relaxGot(uint8_t *loc, RelType type, uint64_t val) const {
tools/lld/ELF/InputSection.cpp 413 RelType type = rel.getType(config->isMips64EL);
497 static uint32_t getARMUndefinedRelativeWeakVA(RelType type, uint32_t a,
648 static uint64_t getRelocTargetVA(const InputFile *file, RelType type, int64_t a,
836 RelType type = rel.getType(config->isMips64EL);
930 RelType type = rel.type;
tools/lld/ELF/Relocations.cpp 133 static unsigned handleMipsTlsRelocation(RelType type, Symbol &sym,
158 handleTlsRelocation(RelType type, Symbol &sym, InputSectionBase &c,
298 static RelType getMipsPairType(RelType type, bool isLocal) {
298 static RelType getMipsPairType(RelType type, bool isLocal) {
368 static bool isStaticLinkTimeConstant(RelExpr e, RelType type, const Symbol &sym,
605 RelType type = rel.getType(config->isMips64EL);
633 RelType type = rel.getType(config->isMips64EL);
877 template <class RelTy> static RelType getMipsN32RelType(RelTy *&rel, RelTy *end) {
878 RelType type = 0;
935 RelType type) {
955 RelocationBaseSection *rel, RelType type, Symbol &sym) {
1027 static void processRelocAux(InputSectionBase &sec, RelExpr expr, RelType type,
1045 RelType rel = target->getDynRel(type);
1170 RelType type;
tools/lld/ELF/Relocations.h 105 RelType type;
tools/lld/ELF/SyntheticSections.cpp 1534 void RelocationBaseSection::addReloc(RelType dynType, InputSectionBase *isec,
1539 void RelocationBaseSection::addReloc(RelType dynType,
1543 RelType type) {
tools/lld/ELF/SyntheticSections.h 422 DynamicReloc(RelType type, const InputSectionBase *inputSec,
429 DynamicReloc(RelType type, const InputSectionBase *inputSec,
443 RelType type;
490 void addReloc(RelType dynType, InputSectionBase *isec, uint64_t offsetInSec,
494 void addReloc(RelType dynType, InputSectionBase *inputSec,
496 RelType type);
tools/lld/ELF/Target.cpp 39 std::string toString(elf::RelType type) {
126 int64_t TargetInfo::getImplicitAddend(const uint8_t *buf, RelType type) const {
130 bool TargetInfo::usesOnlyLowPageBits(RelType type) const { return false; }
132 bool TargetInfo::needsThunk(RelExpr expr, RelType type, const InputFile *file,
142 bool TargetInfo::inBranchRange(RelType type, uint64_t src, uint64_t dst) const {
150 RelExpr TargetInfo::adjustRelaxExpr(RelType type, const uint8_t *data,
155 void TargetInfo::relaxGot(uint8_t *loc, RelType type, uint64_t val) const {
159 void TargetInfo::relaxTlsGdToLe(uint8_t *loc, RelType type,
164 void TargetInfo::relaxTlsGdToIe(uint8_t *loc, RelType type,
169 void TargetInfo::relaxTlsIeToLe(uint8_t *loc, RelType type,
174 void TargetInfo::relaxTlsLdToLe(uint8_t *loc, RelType type,
tools/lld/ELF/Target.h 19 std::string toString(elf::RelType type);
29 virtual RelExpr getRelExpr(RelType type, const Symbol &s,
31 virtual RelType getDynRel(RelType type) const { return 0; }
31 virtual RelType getDynRel(RelType type) const { return 0; }
36 virtual int64_t getImplicitAddend(const uint8_t *buf, RelType type) const;
37 virtual int getTlsGdRelaxSkip(RelType type) const { return 1; }
55 virtual bool usesOnlyLowPageBits(RelType type) const;
59 virtual bool needsThunk(RelExpr expr, RelType relocType,
77 virtual bool inBranchRange(RelType type, uint64_t src,
80 virtual void relocateOne(uint8_t *loc, RelType type, uint64_t val) const = 0;
92 RelType copyRel;
93 RelType gotRel;
94 RelType noneRel;
95 RelType pltRel;
96 RelType relativeRel;
97 RelType iRelativeRel;
98 RelType symbolicRel;
99 RelType tlsDescRel;
100 RelType tlsGotRel;
101 RelType tlsModuleIndexRel;
102 RelType tlsOffsetRel;
124 virtual RelExpr adjustRelaxExpr(RelType type, const uint8_t *data,
126 virtual void relaxGot(uint8_t *loc, RelType type, uint64_t val) const;
127 virtual void relaxTlsGdToIe(uint8_t *loc, RelType type, uint64_t val) const;
128 virtual void relaxTlsGdToLe(uint8_t *loc, RelType type, uint64_t val) const;
129 virtual void relaxTlsIeToLe(uint8_t *loc, RelType type, uint64_t val) const;
130 virtual void relaxTlsLdToLe(uint8_t *loc, RelType type, uint64_t val) const;
168 bool tryRelaxPPC64TocIndirection(RelType type, const Relocation &rel,
183 bool isPPC64SmallCodeModelTocReloc(RelType type);
193 static inline void reportRangeError(uint8_t *loc, RelType type, const Twine &v,
207 inline void checkInt(uint8_t *loc, int64_t v, int n, RelType type) {
213 inline void checkUInt(uint8_t *loc, uint64_t v, int n, RelType type) {
219 inline void checkIntUInt(uint8_t *loc, uint64_t v, int n, RelType type) {
227 inline void checkAlignment(uint8_t *loc, uint64_t v, int n, RelType type) {
tools/lld/ELF/Thunks.cpp 802 static Thunk *addThunkAArch64(RelType type, Symbol &s) {
815 static Thunk *addThunkPreArmv7(RelType reloc, Symbol &s) {
835 static Thunk *addThunkV6M(RelType reloc, Symbol &s) {
849 static Thunk *addThunkArm(RelType reloc, Symbol &s) {
890 static Thunk *addThunkMips(RelType type, Symbol &s) {
904 static Thunk *addThunkPPC64(RelType type, Symbol &s) {