reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenGlobalISel.inc
 1359         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
 1444         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
 1507         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
 1511         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_ZEXT,
 1566         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
 1570         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_ZEXT,
 2019         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 2046         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 2074         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 2101         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 2321         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 2325         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
 2361         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 2398         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 2665         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 2692         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 2720         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 2747         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 3059         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 3063         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
 3120         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 3178         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 3365         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 3392         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 3420         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 3447         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 3759         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 3763         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
 3820         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 3878         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 4212         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
 4276         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
 4280         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_ZEXT,
 4340         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
 4404         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
 4408         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_ZEXT,
 4641         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 4645         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
 4682         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 4823         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 4827         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
 4885         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 5026         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 5030         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
 5088         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 5302         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 5352         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 5356         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
36303         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
36334         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
36365         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
36396         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
36625         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
36650         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
37564         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
37613         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
37710         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
37777         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
37874         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
37979         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
gen/lib/Target/ARM/ARMGenGlobalISel.inc
 1797         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 1826         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 1856         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 1885         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 1937         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 1941         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
 1981         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 2022         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 2235         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 2265         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 2296         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 2326         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 2484         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 2488         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
 2554         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 2621         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 2856         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 2886         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 2917         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 2947         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 3105         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 3109         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
 3175         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 3242         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 3813         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 3817         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
 3858         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 3972         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 3976         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
 4043         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 4179         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
 4183         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
 4250         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
include/llvm/CodeGen/GlobalISel/IRTranslator.h
  419     return translateCast(TargetOpcode::G_ZEXT, U, MIRBuilder);
include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
   35     case TargetOpcode::G_ZEXT:
   95     assert(MI.getOpcode() == TargetOpcode::G_ZEXT);
  190     assert(Opcode == TargetOpcode::G_ANYEXT || Opcode == TargetOpcode::G_ZEXT ||
  440     case TargetOpcode::G_ZEXT:
  466     case TargetOpcode::G_ZEXT:
include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
  270 inline UnaryOp_match<SrcTy, TargetOpcode::G_ZEXT> m_GZExt(const SrcTy &Src) {
  271   return UnaryOp_match<SrcTy, TargetOpcode::G_ZEXT>(Src);
lib/CodeGen/GlobalISel/CSEInfo.cpp
   50   case TargetOpcode::G_ZEXT:
lib/CodeGen/GlobalISel/CombinerHelper.cpp
  296         OpcodeForCandidate == TargetOpcode::G_ZEXT)
  298     else if (CurrentUse.ExtendOpcode == TargetOpcode::G_ZEXT &&
  400                                        : TargetOpcode::G_ZEXT;
  404         UseMI.getOpcode() == TargetOpcode::G_ZEXT ||
  453                                : Preferred.ExtendOpcode == TargetOpcode::G_ZEXT
lib/CodeGen/GlobalISel/GISelKnownBits.cpp
  348   case TargetOpcode::G_ZEXT:
lib/CodeGen/GlobalISel/Legalizer.cpp
   71   case TargetOpcode::G_ZEXT:
lib/CodeGen/GlobalISel/LegalizerHelper.cpp
  683   case TargetOpcode::G_ZEXT: {
  892     narrowScalarDst(MI, NarrowTy, 0, TargetOpcode::G_ZEXT);
  908     narrowScalarDst(MI, NarrowTy, 0, TargetOpcode::G_ZEXT);
 1425     auto LHSZext = MIRBuilder.buildInstr(TargetOpcode::G_ZEXT, {WideTy},
 1427     auto RHSZext = MIRBuilder.buildInstr(TargetOpcode::G_ZEXT, {WideTy},
 1559       widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_ZEXT);
 1582         TargetOpcode::G_SEXT : TargetOpcode::G_ZEXT;
 1590       widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_ZEXT);
 1600     widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ZEXT);
 1601     widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_ZEXT);
 1646     widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ZEXT);
 1669       TargetOpcode::G_ZEXT : TargetOpcode::G_ANYEXT;
 1744                                : TargetOpcode::G_ZEXT;
 1866     widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ZEXT);
 3009   case G_ZEXT:
lib/CodeGen/GlobalISel/LegalizerInfo.cpp
  254   setScalarAction(TargetOpcode::G_ZEXT, 1, {{1, Legal}});
lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
  429   return buildInstr(TargetOpcode::G_ZEXT, Res, Op);
  438     return TargetOpcode::G_ZEXT;
  454   assert((TargetOpcode::G_ANYEXT == ExtOpc || TargetOpcode::G_ZEXT == ExtOpc ||
  482   return buildExtOrTrunc(TargetOpcode::G_ZEXT, Res, Op);
 1001   case TargetOpcode::G_ZEXT:
lib/CodeGen/GlobalISel/Utils.cpp
  249     case TargetOpcode::G_ZEXT:
  283     case TargetOpcode::G_ZEXT:
lib/CodeGen/MachineVerifier.cpp
 1120   case TargetOpcode::G_ZEXT:
lib/Target/AArch64/AArch64CallLowering.cpp
  307             ExtendOp = TargetOpcode::G_ZEXT;
lib/Target/AArch64/AArch64InstructionSelector.cpp
 2057   case TargetOpcode::G_ZEXT:
 4516   if (Opc == TargetOpcode::G_ZEXT || Opc == TargetOpcode::G_ANYEXT) {
lib/Target/AArch64/AArch64LegalizerInfo.cpp
  371   getActionDefinitionsBuilder({G_ZEXT, G_SEXT, G_ANYEXT})
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
 1748   case TargetOpcode::G_ZEXT:
lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
  435   getActionDefinitionsBuilder({G_SEXT, G_ZEXT, G_ANYEXT})
lib/Target/ARM/ARMInstructionSelector.cpp
  348   if (Opc == G_ZEXT)
  863   case G_ZEXT: {
lib/Target/ARM/ARMLegalizerInfo.cpp
   84   getActionDefinitionsBuilder({G_SEXT, G_ZEXT, G_ANYEXT})
lib/Target/ARM/ARMRegisterBankInfo.cpp
  250   case G_ZEXT:
lib/Target/Mips/MipsLegalizerInfo.cpp
  113   getActionDefinitionsBuilder({G_ZEXT, G_SEXT})
lib/Target/X86/X86InstructionSelector.cpp
  357   case TargetOpcode::G_ZEXT:
  773   assert((I.getOpcode() == TargetOpcode::G_ZEXT) && "unexpected instruction");
lib/Target/X86/X86LegalizerInfo.cpp
  175     setAction({G_ZEXT, Ty}, Legal);
  237   for (unsigned extOp : {G_ZEXT, G_SEXT, G_ANYEXT}) {