reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/ARM/ARMGenGlobalISel.inc

 4808         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_LSHR,
 4831         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_LSHR,
 5718         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_LSHR,
 5758         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_LSHR,
 5809         GIM_CheckOpcode, /*MI*/4, TargetOpcode::G_LSHR,
 5849         GIM_CheckOpcode, /*MI*/4, TargetOpcode::G_LSHR,
 5960         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_LSHR,
 6001         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_LSHR,
 6212         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_LSHR,
 6253         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_LSHR,
 6562         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_LSHR,
 6597         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_LSHR,
 6766         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_LSHR,
 6801         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_LSHR,

gen/lib/Target/Mips/MipsGenGlobalISel.inc

12377         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_LSHR,
12511         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_LSHR,

include/llvm/CodeGen/GlobalISel/ConstantFoldingMIRBuilder.h

   37     case TargetOpcode::G_LSHR:

include/llvm/CodeGen/GlobalISel/IRTranslator.h

  426     return translateBinaryOp(TargetOpcode::G_LSHR, U, MIRBuilder);

include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h

 1291     return buildInstr(TargetOpcode::G_LSHR, {Dst}, {Src0, Src1}, Flags);

lib/CodeGen/GlobalISel/CSEInfo.cpp

   38   case TargetOpcode::G_LSHR:

lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp

  147   case TargetOpcode::G_LSHR:

lib/CodeGen/GlobalISel/GISelKnownBits.cpp

  309   case TargetOpcode::G_LSHR:
  331     case TargetOpcode::G_LSHR:

lib/CodeGen/GlobalISel/LegalizerHelper.cpp

  880   case TargetOpcode::G_LSHR:
 1506     MIRBuilder.buildInstr(TargetOpcode::G_LSHR)
 1577   case TargetOpcode::G_LSHR:
 3000   case G_LSHR:
 3078   } else if (MI.getOpcode() == TargetOpcode::G_LSHR) {
 3202   case TargetOpcode::G_LSHR:
 3213     if (MI.getOpcode() == TargetOpcode::G_LSHR) {
 3725           {Op, MIRBuilder.buildInstr(TargetOpcode::G_LSHR, {Ty},

lib/CodeGen/GlobalISel/MachineIRBuilder.cpp

  992   case TargetOpcode::G_LSHR: {

lib/CodeGen/GlobalISel/Utils.cpp

  356     case TargetOpcode::G_LSHR:

lib/Target/AArch64/AArch64InstructionSelector.cpp

  456       case TargetOpcode::G_LSHR:
  469       case TargetOpcode::G_LSHR:
 1162   case TargetOpcode::G_LSHR: {
 1864   case TargetOpcode::G_LSHR: {
 4445   case TargetOpcode::G_LSHR:

lib/Target/AArch64/AArch64LegalizerInfo.cpp

  120   getActionDefinitionsBuilder({G_LSHR, G_ASHR})
  634   case TargetOpcode::G_LSHR:
  663          MI.getOpcode() == TargetOpcode::G_LSHR ||

lib/Target/AArch64/AArch64RegisterBankInfo.cpp

  556   case TargetOpcode::G_LSHR:

lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

  890   auto &Shifts = getActionDefinitionsBuilder({G_SHL, G_LSHR, G_ASHR})

lib/Target/ARM/ARMInstructionSelector.cpp

 1057   case G_LSHR:

lib/Target/ARM/ARMLegalizerInfo.cpp

  102   getActionDefinitionsBuilder({G_ASHR, G_LSHR, G_SHL})

lib/Target/ARM/ARMRegisterBankInfo.cpp

  244   case G_LSHR:

lib/Target/Mips/MipsLegalizerInfo.cpp

  155   getActionDefinitionsBuilder({G_SHL, G_ASHR, G_LSHR})

lib/Target/Mips/MipsRegisterBankInfo.cpp

  451   case G_LSHR:

lib/Target/X86/X86LegalizerInfo.cpp

  160         {G_SHL, G_LSHR, G_ASHR})
  272     {G_SHL, G_LSHR, G_ASHR})

lib/Target/X86/X86RegisterBankInfo.cpp

  185   case TargetOpcode::G_LSHR:

unittests/CodeGen/GlobalISel/ConstantFoldingTest.cpp

  120       ConstantFoldBinOp(TargetOpcode::G_LSHR, MIBCst1->getOperand(0).getReg(),
  125       ConstantFoldBinOp(TargetOpcode::G_LSHR, MIBFCst1->getOperand(0).getReg(),