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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc25847 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
36306 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_AND,
36337 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_AND,
36368 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_AND,
36399 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_AND,
36427 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
36460 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
36493 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
36526 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
36559 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
36592 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
gen/lib/Target/AMDGPU/AMDGPUGenGlobalISel.inc 806 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
814 GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_AND,
842 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
850 GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_AND,
878 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
886 GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_AND,
914 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
922 GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_AND,
950 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
958 GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_AND,
986 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
994 GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_AND,
1022 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
1030 GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_AND,
1058 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
1066 GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_AND,
1094 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
1098 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_AND,
1130 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
1134 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_AND,
1166 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
1170 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_AND,
1202 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
1206 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_AND,
1238 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
1242 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_AND,
1274 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
1278 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_AND,
1310 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
1314 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_AND,
1346 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
1350 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_AND,
gen/lib/Target/ARM/ARMGenGlobalISel.inc 897 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
921 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
945 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
969 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
994 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
1018 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
1042 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
1066 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
5714 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
5754 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
5805 GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_AND,
5845 GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_AND,
5874 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
5889 GIM_CheckOpcode, /*MI*/4, TargetOpcode::G_AND,
5915 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
5930 GIM_CheckOpcode, /*MI*/4, TargetOpcode::G_AND,
5956 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
5971 GIM_CheckOpcode, /*MI*/4, TargetOpcode::G_AND,
5997 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
6012 GIM_CheckOpcode, /*MI*/4, TargetOpcode::G_AND,
6038 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
6053 GIM_CheckOpcode, /*MI*/4, TargetOpcode::G_AND,
6079 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
6094 GIM_CheckOpcode, /*MI*/4, TargetOpcode::G_AND,
6120 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
6126 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_AND,
6161 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
6167 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_AND,
6202 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
6208 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_AND,
6243 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
6249 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_AND,
6284 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
6290 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_AND,
6325 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
6331 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_AND,
6366 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
6372 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_AND,
6396 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
6402 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_AND,
6426 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
6432 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_AND,
6456 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
6462 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_AND,
6486 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
6521 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
6556 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
6591 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
6626 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
6661 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
6706 GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_AND,
6741 GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_AND,
6776 GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_AND,
6811 GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_AND,
6846 GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_AND,
6881 GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_AND,
gen/lib/Target/RISCV/RISCVGenGlobalISel.inc 9568 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
9591 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
9673 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
9736 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
9759 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
9841 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
9904 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
9927 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
10009 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
include/llvm/CodeGen/GlobalISel/ConstantFoldingMIRBuilder.h 35 case TargetOpcode::G_AND:
include/llvm/CodeGen/GlobalISel/IRTranslator.h 360 return translateBinaryOp(TargetOpcode::G_AND, U, MIRBuilder);
include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h 105 if (isInstUnsupported({TargetOpcode::G_AND, {DstTy}}) ||
include/llvm/CodeGen/GlobalISel/MIPatternMatch.h 230 inline BinaryOp_match<LHS, RHS, TargetOpcode::G_AND, true>
232 return BinaryOp_match<LHS, RHS, TargetOpcode::G_AND, true>(L, R);
include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h 1313 return buildInstr(TargetOpcode::G_AND, {Dst}, {Src0, Src1});
lib/CodeGen/GlobalISel/CSEInfo.cpp 36 case TargetOpcode::G_AND:
lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp 145 case TargetOpcode::G_AND:
lib/CodeGen/GlobalISel/GISelKnownBits.cpp 210 case TargetOpcode::G_AND: {
lib/CodeGen/GlobalISel/LegalizerHelper.cpp 865 case TargetOpcode::G_AND:
1437 TargetOpcode::G_AND, {WideTy},
1534 case TargetOpcode::G_AND:
2952 case G_AND:
3281 case TargetOpcode::G_AND:
3767 TargetOpcode::G_AND, {Ty},
lib/CodeGen/GlobalISel/MachineIRBuilder.cpp 969 case TargetOpcode::G_AND:
lib/CodeGen/GlobalISel/Utils.cpp 352 case TargetOpcode::G_AND:
lib/Target/AArch64/AArch64InstructionSelector.cpp 3554 LHSDef->getOpcode() == TargetOpcode::G_AND) {
4533 if (Opc != TargetOpcode::G_AND)
lib/Target/AArch64/AArch64LegalizerInfo.cpp 88 getActionDefinitionsBuilder({G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR})
lib/Target/AArch64/AArch64RegisterBankInfo.cpp 537 case TargetOpcode::G_AND:
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp 1684 case TargetOpcode::G_AND:
lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp 282 getActionDefinitionsBuilder({G_AND, G_OR, G_XOR})
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp 372 case TargetOpcode::G_AND:
lib/Target/ARM/ARMLegalizerInfo.cpp 89 getActionDefinitionsBuilder({G_MUL, G_AND, G_OR, G_XOR})
lib/Target/ARM/ARMRegisterBankInfo.cpp 241 case G_AND:
lib/Target/Mips/MipsLegalizerInfo.cpp 140 getActionDefinitionsBuilder({G_AND, G_OR, G_XOR})
lib/Target/Mips/MipsRegisterBankInfo.cpp 446 case G_AND:
lib/Target/X86/X86LegalizerInfo.cpp 74 for (unsigned BinOp : {G_SUB, G_MUL, G_AND, G_OR, G_XOR})
122 for (unsigned BinOp : {G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR})
219 for (unsigned BinOp : {G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR})
unittests/CodeGen/GlobalISel/ConstantFoldingTest.cpp 96 ConstantFoldBinOp(TargetOpcode::G_AND, MIBCst1->getOperand(0).getReg(),
101 ConstantFoldBinOp(TargetOpcode::G_AND, MIBCst2->getOperand(0).getReg(),
unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp 578 getActionDefinitionsBuilder(G_AND)
625 LI.getActionDefinitionsBuilder(TargetOpcode::G_AND)
unittests/CodeGen/GlobalISel/LegalizerInfoTest.cpp 258 LI.getActionDefinitionsBuilder(G_AND)
263 EXPECT_ACTION(NarrowScalar, 0, s16, LegalityQuery(G_AND, {s32}));
264 EXPECT_ACTION(NarrowScalar, 0, v2s16, LegalityQuery(G_AND, {v2s32}));
299 LI.getActionDefinitionsBuilder(G_AND)
305 EXPECT_ACTION(NarrowScalar, 0, s16, LegalityQuery(G_AND, {s32}));
306 EXPECT_ACTION(Unsupported, 0, LLT(), LegalityQuery(G_AND, {v2s32}));
330 LI.getActionDefinitionsBuilder(G_AND)
336 EXPECT_ACTION(WidenScalar, 0, s32, LegalityQuery(G_AND, {s5}));
337 EXPECT_ACTION(WidenScalar, 0, v2s32, LegalityQuery(G_AND, {v2s5}));
338 EXPECT_ACTION(WidenScalar, 0, s64, LegalityQuery(G_AND, {s33}));
339 EXPECT_ACTION(WidenScalar, 0, v2s64, LegalityQuery(G_AND, {v2s33}));
346 LI.getActionDefinitionsBuilder(G_AND)
351 EXPECT_ACTION(WidenScalar, 0, s32, LegalityQuery(G_AND, {s5}));
352 EXPECT_ACTION(WidenScalar, 0, s64, LegalityQuery(G_AND, {s33}));
355 EXPECT_ACTION(Unsupported, 0, LLT(), LegalityQuery(G_AND, {v2s5}));
356 EXPECT_ACTION(Unsupported, 0, LLT(), LegalityQuery(G_AND, {v2s33}));