reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

include/llvm/CodeGen/MachineBasicBlock.h
   42 class SlotIndexes;
include/llvm/CodeGen/MachineFunction.h
   70 class SlotIndexes;

References

include/llvm/CodeGen/LiveInterval.h
  451                   const SlotIndexes&) const;
  577     bool isZeroLength(SlotIndexes *Indexes) const {
  822                                const SlotIndexes &Indexes) const;
  841                          const SlotIndexes &Indexes,
include/llvm/CodeGen/LiveIntervals.h
   60     SlotIndexes* Indexes;
  211     SlotIndexes *getSlotIndexes() const {
include/llvm/CodeGen/LiveRangeCalc.h
   47   SlotIndexes *Indexes = nullptr;
  193   void reset(const MachineFunction *mf, SlotIndexes *SI,
  290                                  const SlotIndexes &Indexes);
include/llvm/CodeGen/MachineBasicBlock.h
  790   void print(raw_ostream &OS, const SlotIndexes * = nullptr,
  793              const SlotIndexes * = nullptr, bool IsStandalone = true) const;
include/llvm/CodeGen/MachineFunction.h
  607   void print(raw_ostream &OS, const SlotIndexes* = nullptr) const;
include/llvm/Pass.h
  213   AnalysisType &getAnalysisID(AnalysisID PI) const;
include/llvm/PassAnalysisSupport.h
   66     return addRequiredID(PassClass::ID);
   72     return addRequiredTransitiveID(PassClass::ID);
   89     Preserved.push_back(&PassClass::ID);
  108     Used.push_back(&PassClass::ID);
  201 AnalysisType *Pass::getAnalysisIfAvailable() const {
  204   const void *PI = &AnalysisType::ID;
  220 AnalysisType &Pass::getAnalysis() const {
  222   return getAnalysisID<AnalysisType>(&AnalysisType::ID);
  222   return getAnalysisID<AnalysisType>(&AnalysisType::ID);
include/llvm/PassSupport.h
   76 template <typename PassName> Pass *callDefaultCtor() { return new PassName(); }
lib/CodeGen/InterferenceCache.cpp
   56                              SlotIndexes *indexes,
lib/CodeGen/InterferenceCache.h
   60     SlotIndexes *Indexes = nullptr;
  103     void clear(MachineFunction *mf, SlotIndexes *indexes, LiveIntervals *lis) {
  172             SlotIndexes *indexes, LiveIntervals *lis,
lib/CodeGen/LiveInterval.cpp
  446                          const SlotIndexes &Indexes) const {
  885                                        const SlotIndexes &Indexes,
  927     const SlotIndexes &Indexes, const TargetRegisterInfo &TRI) {
  970                                          const SlotIndexes &Indexes) const {
lib/CodeGen/LiveIntervals.cpp
   95   AU.addPreserved<SlotIndexes>();
   96   AU.addRequiredTransitive<SlotIndexes>();
  131   Indexes = &getAnalysis<SlotIndexes>();
 1423     SlotIndexes *Indexes = LIS.getSlotIndexes();
lib/CodeGen/LiveRangeCalc.cpp
   52                           SlotIndexes *SI,
   64 static void createDeadDef(SlotIndexes &Indexes, VNInfo::Allocator &Alloc,
  589                                        const SlotIndexes &Indexes) {
lib/CodeGen/LiveStacks.cpp
   37   AU.addPreserved<SlotIndexes>();
   38   AU.addRequiredTransitive<SlotIndexes>();
lib/CodeGen/MachineBasicBlock.cpp
  275 void MachineBasicBlock::print(raw_ostream &OS, const SlotIndexes *Indexes,
  291                               const SlotIndexes *Indexes,
  889   SlotIndexes *Indexes = P.getAnalysisIfAvailable<SlotIndexes>();
  889   SlotIndexes *Indexes = P.getAnalysisIfAvailable<SlotIndexes>();
lib/CodeGen/MachineFunctionPrinterPass.cpp
   41     AU.addUsedIfAvailable<SlotIndexes>();
   49     MF.print(OS, getAnalysisIfAvailable<SlotIndexes>());
lib/CodeGen/MachinePipeliner.cpp
  350   SlotIndexes &Slots = *getAnalysis<LiveIntervals>().getSlotIndexes();
lib/CodeGen/MachineScheduler.cpp
  219   AU.addRequired<SlotIndexes>();
  220   AU.addPreserved<SlotIndexes>();
lib/CodeGen/MachineVerifier.cpp
  228     SlotIndexes *Indexes;
  343   for (SlotIndexes::MBBIndexIterator I = Indexes->MBBIndexBegin(),
  395     Indexes = PASS->getAnalysisIfAvailable<SlotIndexes>();
lib/CodeGen/PHIElimination.cpp
  140   AU.addPreserved<SlotIndexes>();
lib/CodeGen/RegAllocBasic.cpp
  178   AU.addPreserved<SlotIndexes>();
lib/CodeGen/RegAllocGreedy.cpp
  167   SlotIndexes *Indexes;
  612   AU.addRequired<SlotIndexes>();
  613   AU.addPreserved<SlotIndexes>();
 3232   Indexes = &getAnalysis<SlotIndexes>();
lib/CodeGen/RegAllocPBQP.cpp
  535   au.addRequired<SlotIndexes>();
  536   au.addPreserved<SlotIndexes>();
lib/CodeGen/RegisterCoalescer.cpp
  537   AU.addPreserved<SlotIndexes>();
  927     const SlotIndexes &Indexes = *LIS->getSlotIndexes();
 2061       SlotIndexes *Indexes = LIS->getSlotIndexes();
 2191   SlotIndexes *Indexes;
lib/CodeGen/RenameIndependentSubregs.cpp
   58     AU.addRequired<SlotIndexes>();
   59     AU.addPreserved<SlotIndexes>();
  303   const SlotIndexes &Indexes = *LIS->getSlotIndexes();
lib/CodeGen/SplitKit.cpp
  523   SlotIndexes &Indexes = *LIS.getSlotIndexes();
  546     SlotIndexes &Indexes = *LIS.getSlotIndexes();
 1450   const SlotIndexes &Indexes = *LIS.getSlotIndexes();
lib/CodeGen/StackColoring.cpp
  422   SlotIndexes *Indexes;
  526   AU.addRequired<SlotIndexes>();
 1140   Indexes = &getAnalysis<SlotIndexes>();
lib/CodeGen/StackSlotColoring.cpp
  105       AU.addRequired<SlotIndexes>();
  106       AU.addPreserved<SlotIndexes>();
lib/CodeGen/TwoAddressInstructionPass.cpp
  187     AU.addPreserved<SlotIndexes>();
lib/CodeGen/VirtRegMap.cpp
  180   SlotIndexes *Indexes;
  226   AU.addRequired<SlotIndexes>();
  227   AU.addPreserved<SlotIndexes>();
  240   Indexes = &getAnalysis<SlotIndexes>();
  287   for (SlotIndexes::MBBIndexIterator MBBI = Indexes->findMBBIndex(First);
  331       SlotIndexes::MBBIndexIterator I = Indexes->MBBIndexBegin();
lib/Target/AMDGPU/GCNRegPressure.h
  206   auto &SII = *LIS.getSlotIndexes();
lib/Target/AMDGPU/GCNSchedStrategy.cpp
  448     SlotIndexes *Ind = LIS->getSlotIndexes();
lib/Target/AMDGPU/SIFormMemoryClauses.cpp
  317   SlotIndexes *Ind = LIS->getSlotIndexes();
lib/Target/AMDGPU/SILowerControlFlow.cpp
  121     AU.addPreserved<SlotIndexes>();
lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
   61     AU.addPreserved<SlotIndexes>();
lib/Target/AMDGPU/SIWholeQuadMode.cpp
  204     AU.addPreserved<SlotIndexes>();
lib/Target/Hexagon/HexagonExpandCondsets.cpp
  155       AU.addPreserved<SlotIndexes>();
lib/Target/Hexagon/HexagonRegisterInfo.cpp
  254   const SlotIndexes &Indexes = *LIS.getSlotIndexes();
lib/Target/PowerPC/PPCTLSDynamicCall.cpp
  170       AU.addRequired<SlotIndexes>();
  171       AU.addPreserved<SlotIndexes>();
lib/Target/PowerPC/PPCVSXFMAMutate.cpp
  375       AU.addRequired<SlotIndexes>();
  376       AU.addPreserved<SlotIndexes>();
lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp
   62     AU.addPreserved<SlotIndexes>();
lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp
   44     AU.addPreserved<SlotIndexes>();
lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
   55     AU.addPreserved<SlotIndexes>();