|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
Derived Classes
lib/Target/Hexagon/HexagonISelLowering.cpp 114 class HexagonCCState : public CCState {
lib/Target/Mips/MipsCCState.h 20 class MipsCCState : public CCState {
lib/Target/PowerPC/PPCCCState.h 18 class PPCCCState : public CCState {
lib/Target/SystemZ/SystemZCallingConv.h 25 class SystemZCCState : public CCState {
Declarations
include/llvm/CodeGen/CallingConvLower.h 27 class CCState;
include/llvm/CodeGen/GlobalISel/CallLowering.h 30 class CCState;
include/llvm/CodeGen/TargetLowering.h 69 class CCState;
lib/Target/Mips/MipsISelLowering.h 43 class CCState;
References
gen/lib/Target/AArch64/AArch64GenCallingConv.inc 11 ISD::ArgFlagsTy ArgFlags, CCState &State);
14 ISD::ArgFlagsTy ArgFlags, CCState &State);
17 ISD::ArgFlagsTy ArgFlags, CCState &State);
20 ISD::ArgFlagsTy ArgFlags, CCState &State);
23 ISD::ArgFlagsTy ArgFlags, CCState &State);
26 ISD::ArgFlagsTy ArgFlags, CCState &State);
29 ISD::ArgFlagsTy ArgFlags, CCState &State);
32 ISD::ArgFlagsTy ArgFlags, CCState &State);
35 ISD::ArgFlagsTy ArgFlags, CCState &State);
38 ISD::ArgFlagsTy ArgFlags, CCState &State);
43 ISD::ArgFlagsTy ArgFlags, CCState &State) {
394 ISD::ArgFlagsTy ArgFlags, CCState &State) {
654 ISD::ArgFlagsTy ArgFlags, CCState &State) {
738 ISD::ArgFlagsTy ArgFlags, CCState &State) {
820 ISD::ArgFlagsTy ArgFlags, CCState &State) {
904 ISD::ArgFlagsTy ArgFlags, CCState &State) {
952 ISD::ArgFlagsTy ArgFlags, CCState &State) {
967 ISD::ArgFlagsTy ArgFlags, CCState &State) {
989 ISD::ArgFlagsTy ArgFlags, CCState &State) {
1198 ISD::ArgFlagsTy ArgFlags, CCState &State) {
gen/lib/Target/AMDGPU/AMDGPUGenCallingConv.inc 11 ISD::ArgFlagsTy ArgFlags, CCState &State);
14 ISD::ArgFlagsTy ArgFlags, CCState &State);
17 ISD::ArgFlagsTy ArgFlags, CCState &State);
20 ISD::ArgFlagsTy ArgFlags, CCState &State);
23 ISD::ArgFlagsTy ArgFlags, CCState &State);
28 ISD::ArgFlagsTy ArgFlags, CCState &State) {
46 ISD::ArgFlagsTy ArgFlags, CCState &State) {
157 ISD::ArgFlagsTy ArgFlags, CCState &State) {
197 ISD::ArgFlagsTy ArgFlags, CCState &State) {
243 ISD::ArgFlagsTy ArgFlags, CCState &State) {
gen/lib/Target/AMDGPU/R600GenCallingConv.inc 11 ISD::ArgFlagsTy ArgFlags, CCState &State);
16 ISD::ArgFlagsTy ArgFlags, CCState &State) {
gen/lib/Target/ARC/ARCGenCallingConv.inc 11 ISD::ArgFlagsTy ArgFlags, CCState &State);
14 ISD::ArgFlagsTy ArgFlags, CCState &State);
19 ISD::ArgFlagsTy ArgFlags, CCState &State) {
61 ISD::ArgFlagsTy ArgFlags, CCState &State) {
gen/lib/Target/ARM/ARMGenCallingConv.inc 11 ISD::ArgFlagsTy ArgFlags, CCState &State);
14 ISD::ArgFlagsTy ArgFlags, CCState &State);
17 ISD::ArgFlagsTy ArgFlags, CCState &State);
20 ISD::ArgFlagsTy ArgFlags, CCState &State);
23 ISD::ArgFlagsTy ArgFlags, CCState &State);
26 ISD::ArgFlagsTy ArgFlags, CCState &State);
29 ISD::ArgFlagsTy ArgFlags, CCState &State);
32 ISD::ArgFlagsTy ArgFlags, CCState &State);
35 ISD::ArgFlagsTy ArgFlags, CCState &State);
38 ISD::ArgFlagsTy ArgFlags, CCState &State);
41 ISD::ArgFlagsTy ArgFlags, CCState &State);
44 ISD::ArgFlagsTy ArgFlags, CCState &State);
49 ISD::ArgFlagsTy ArgFlags, CCState &State) {
123 ISD::ArgFlagsTy ArgFlags, CCState &State) {
228 ISD::ArgFlagsTy ArgFlags, CCState &State) {
319 ISD::ArgFlagsTy ArgFlags, CCState &State) {
421 ISD::ArgFlagsTy ArgFlags, CCState &State) {
500 ISD::ArgFlagsTy ArgFlags, CCState &State) {
515 ISD::ArgFlagsTy ArgFlags, CCState &State) {
603 ISD::ArgFlagsTy ArgFlags, CCState &State) {
665 ISD::ArgFlagsTy ArgFlags, CCState &State) {
708 ISD::ArgFlagsTy ArgFlags, CCState &State) {
789 ISD::ArgFlagsTy ArgFlags, CCState &State) {
881 ISD::ArgFlagsTy ArgFlags, CCState &State) {
gen/lib/Target/AVR/AVRGenCallingConv.inc 11 ISD::ArgFlagsTy ArgFlags, CCState &State);
14 ISD::ArgFlagsTy ArgFlags, CCState &State);
17 ISD::ArgFlagsTy ArgFlags, CCState &State);
20 ISD::ArgFlagsTy ArgFlags, CCState &State);
25 ISD::ArgFlagsTy ArgFlags, CCState &State) {
53 ISD::ArgFlagsTy ArgFlags, CCState &State) {
65 ISD::ArgFlagsTy ArgFlags, CCState &State) {
90 ISD::ArgFlagsTy ArgFlags, CCState &State) {
gen/lib/Target/BPF/BPFGenCallingConv.inc 11 ISD::ArgFlagsTy ArgFlags, CCState &State);
14 ISD::ArgFlagsTy ArgFlags, CCState &State);
17 ISD::ArgFlagsTy ArgFlags, CCState &State);
20 ISD::ArgFlagsTy ArgFlags, CCState &State);
25 ISD::ArgFlagsTy ArgFlags, CCState &State) {
63 ISD::ArgFlagsTy ArgFlags, CCState &State) {
97 ISD::ArgFlagsTy ArgFlags, CCState &State) {
119 ISD::ArgFlagsTy ArgFlags, CCState &State) {
gen/lib/Target/Hexagon/HexagonGenCallingConv.inc 11 ISD::ArgFlagsTy ArgFlags, CCState &State);
14 ISD::ArgFlagsTy ArgFlags, CCState &State);
17 ISD::ArgFlagsTy ArgFlags, CCState &State);
20 ISD::ArgFlagsTy ArgFlags, CCState &State);
23 ISD::ArgFlagsTy ArgFlags, CCState &State);
28 ISD::ArgFlagsTy ArgFlags, CCState &State) {
111 ISD::ArgFlagsTy ArgFlags, CCState &State) {
136 ISD::ArgFlagsTy ArgFlags, CCState &State) {
243 ISD::ArgFlagsTy ArgFlags, CCState &State) {
305 ISD::ArgFlagsTy ArgFlags, CCState &State) {
gen/lib/Target/Lanai/LanaiGenCallingConv.inc 11 ISD::ArgFlagsTy ArgFlags, CCState &State);
14 ISD::ArgFlagsTy ArgFlags, CCState &State);
17 ISD::ArgFlagsTy ArgFlags, CCState &State);
22 ISD::ArgFlagsTy ArgFlags, CCState &State) {
59 ISD::ArgFlagsTy ArgFlags, CCState &State) {
94 ISD::ArgFlagsTy ArgFlags, CCState &State) {
gen/lib/Target/MSP430/MSP430GenCallingConv.inc 11 ISD::ArgFlagsTy ArgFlags, CCState &State);
14 ISD::ArgFlagsTy ArgFlags, CCState &State);
19 ISD::ArgFlagsTy ArgFlags, CCState &State) {
48 ISD::ArgFlagsTy ArgFlags, CCState &State) {
gen/lib/Target/Mips/MipsGenCallingConv.inc 11 ISD::ArgFlagsTy ArgFlags, CCState &State);
14 ISD::ArgFlagsTy ArgFlags, CCState &State);
17 ISD::ArgFlagsTy ArgFlags, CCState &State);
20 ISD::ArgFlagsTy ArgFlags, CCState &State);
23 ISD::ArgFlagsTy ArgFlags, CCState &State);
26 ISD::ArgFlagsTy ArgFlags, CCState &State);
29 ISD::ArgFlagsTy ArgFlags, CCState &State);
32 ISD::ArgFlagsTy ArgFlags, CCState &State);
35 ISD::ArgFlagsTy ArgFlags, CCState &State);
38 ISD::ArgFlagsTy ArgFlags, CCState &State);
41 ISD::ArgFlagsTy ArgFlags, CCState &State);
44 ISD::ArgFlagsTy ArgFlags, CCState &State);
47 ISD::ArgFlagsTy ArgFlags, CCState &State);
50 ISD::ArgFlagsTy ArgFlags, CCState &State);
53 ISD::ArgFlagsTy ArgFlags, CCState &State);
56 ISD::ArgFlagsTy ArgFlags, CCState &State);
59 ISD::ArgFlagsTy ArgFlags, CCState &State);
62 ISD::ArgFlagsTy ArgFlags, CCState &State);
65 ISD::ArgFlagsTy ArgFlags, CCState &State);
70 ISD::ArgFlagsTy ArgFlags, CCState &State) {
88 ISD::ArgFlagsTy ArgFlags, CCState &State) {
111 ISD::ArgFlagsTy ArgFlags, CCState &State) {
209 ISD::ArgFlagsTy ArgFlags, CCState &State) {
244 ISD::ArgFlagsTy ArgFlags, CCState &State) {
267 ISD::ArgFlagsTy ArgFlags, CCState &State) {
338 ISD::ArgFlagsTy ArgFlags, CCState &State) {
371 ISD::ArgFlagsTy ArgFlags, CCState &State) {
389 ISD::ArgFlagsTy ArgFlags, CCState &State) {
443 ISD::ArgFlagsTy ArgFlags, CCState &State) {
463 ISD::ArgFlagsTy ArgFlags, CCState &State) {
550 ISD::ArgFlagsTy ArgFlags, CCState &State) {
592 ISD::ArgFlagsTy ArgFlags, CCState &State) {
613 ISD::ArgFlagsTy ArgFlags, CCState &State) {
635 ISD::ArgFlagsTy ArgFlags, CCState &State) {
664 ISD::ArgFlagsTy ArgFlags, CCState &State) {
680 ISD::ArgFlagsTy ArgFlags, CCState &State) {
701 ISD::ArgFlagsTy ArgFlags, CCState &State) {
780 ISD::ArgFlagsTy ArgFlags, CCState &State) {
gen/lib/Target/PowerPC/PPCGenCallingConv.inc 11 ISD::ArgFlagsTy ArgFlags, CCState &State);
14 ISD::ArgFlagsTy ArgFlags, CCState &State);
17 ISD::ArgFlagsTy ArgFlags, CCState &State);
20 ISD::ArgFlagsTy ArgFlags, CCState &State);
23 ISD::ArgFlagsTy ArgFlags, CCState &State);
26 ISD::ArgFlagsTy ArgFlags, CCState &State);
29 ISD::ArgFlagsTy ArgFlags, CCState &State);
32 ISD::ArgFlagsTy ArgFlags, CCState &State);
35 ISD::ArgFlagsTy ArgFlags, CCState &State);
38 ISD::ArgFlagsTy ArgFlags, CCState &State);
43 ISD::ArgFlagsTy ArgFlags, CCState &State) {
98 ISD::ArgFlagsTy ArgFlags, CCState &State) {
114 ISD::ArgFlagsTy ArgFlags, CCState &State) {
289 ISD::ArgFlagsTy ArgFlags, CCState &State) {
300 ISD::ArgFlagsTy ArgFlags, CCState &State) {
311 ISD::ArgFlagsTy ArgFlags, CCState &State) {
385 ISD::ArgFlagsTy ArgFlags, CCState &State) {
540 ISD::ArgFlagsTy ArgFlags, CCState &State) {
551 ISD::ArgFlagsTy ArgFlags, CCState &State) {
688 ISD::ArgFlagsTy ArgFlags, CCState &State) {
gen/lib/Target/Sparc/SparcGenCallingConv.inc 11 ISD::ArgFlagsTy ArgFlags, CCState &State);
14 ISD::ArgFlagsTy ArgFlags, CCState &State);
17 ISD::ArgFlagsTy ArgFlags, CCState &State);
20 ISD::ArgFlagsTy ArgFlags, CCState &State);
25 ISD::ArgFlagsTy ArgFlags, CCState &State) {
63 ISD::ArgFlagsTy ArgFlags, CCState &State) {
92 ISD::ArgFlagsTy ArgFlags, CCState &State) {
135 ISD::ArgFlagsTy ArgFlags, CCState &State) {
gen/lib/Target/SystemZ/SystemZGenCallingConv.inc 11 ISD::ArgFlagsTy ArgFlags, CCState &State);
14 ISD::ArgFlagsTy ArgFlags, CCState &State);
19 ISD::ArgFlagsTy ArgFlags, CCState &State) {
162 ISD::ArgFlagsTy ArgFlags, CCState &State) {
gen/lib/Target/X86/X86GenCallingConv.inc 11 ISD::ArgFlagsTy ArgFlags, CCState &State);
14 ISD::ArgFlagsTy ArgFlags, CCState &State);
17 ISD::ArgFlagsTy ArgFlags, CCState &State);
20 ISD::ArgFlagsTy ArgFlags, CCState &State);
23 ISD::ArgFlagsTy ArgFlags, CCState &State);
26 ISD::ArgFlagsTy ArgFlags, CCState &State);
29 ISD::ArgFlagsTy ArgFlags, CCState &State);
32 ISD::ArgFlagsTy ArgFlags, CCState &State);
35 ISD::ArgFlagsTy ArgFlags, CCState &State);
38 ISD::ArgFlagsTy ArgFlags, CCState &State);
41 ISD::ArgFlagsTy ArgFlags, CCState &State);
44 ISD::ArgFlagsTy ArgFlags, CCState &State);
47 ISD::ArgFlagsTy ArgFlags, CCState &State);
50 ISD::ArgFlagsTy ArgFlags, CCState &State);
53 ISD::ArgFlagsTy ArgFlags, CCState &State);
56 ISD::ArgFlagsTy ArgFlags, CCState &State);
59 ISD::ArgFlagsTy ArgFlags, CCState &State);
62 ISD::ArgFlagsTy ArgFlags, CCState &State);
65 ISD::ArgFlagsTy ArgFlags, CCState &State);
68 ISD::ArgFlagsTy ArgFlags, CCState &State);
71 ISD::ArgFlagsTy ArgFlags, CCState &State);
74 ISD::ArgFlagsTy ArgFlags, CCState &State);
77 ISD::ArgFlagsTy ArgFlags, CCState &State);
80 ISD::ArgFlagsTy ArgFlags, CCState &State);
83 ISD::ArgFlagsTy ArgFlags, CCState &State);
86 ISD::ArgFlagsTy ArgFlags, CCState &State);
89 ISD::ArgFlagsTy ArgFlags, CCState &State);
92 ISD::ArgFlagsTy ArgFlags, CCState &State);
95 ISD::ArgFlagsTy ArgFlags, CCState &State);
98 ISD::ArgFlagsTy ArgFlags, CCState &State);
101 ISD::ArgFlagsTy ArgFlags, CCState &State);
104 ISD::ArgFlagsTy ArgFlags, CCState &State);
107 ISD::ArgFlagsTy ArgFlags, CCState &State);
110 ISD::ArgFlagsTy ArgFlags, CCState &State);
113 ISD::ArgFlagsTy ArgFlags, CCState &State);
116 ISD::ArgFlagsTy ArgFlags, CCState &State);
119 ISD::ArgFlagsTy ArgFlags, CCState &State);
122 ISD::ArgFlagsTy ArgFlags, CCState &State);
125 ISD::ArgFlagsTy ArgFlags, CCState &State);
128 ISD::ArgFlagsTy ArgFlags, CCState &State);
131 ISD::ArgFlagsTy ArgFlags, CCState &State);
134 ISD::ArgFlagsTy ArgFlags, CCState &State);
137 ISD::ArgFlagsTy ArgFlags, CCState &State);
140 ISD::ArgFlagsTy ArgFlags, CCState &State);
143 ISD::ArgFlagsTy ArgFlags, CCState &State);
146 ISD::ArgFlagsTy ArgFlags, CCState &State);
149 ISD::ArgFlagsTy ArgFlags, CCState &State);
152 ISD::ArgFlagsTy ArgFlags, CCState &State);
155 ISD::ArgFlagsTy ArgFlags, CCState &State);
158 ISD::ArgFlagsTy ArgFlags, CCState &State);
161 ISD::ArgFlagsTy ArgFlags, CCState &State);
164 ISD::ArgFlagsTy ArgFlags, CCState &State);
169 ISD::ArgFlagsTy ArgFlags, CCState &State) {
293 ISD::ArgFlagsTy ArgFlags, CCState &State) {
314 ISD::ArgFlagsTy ArgFlags, CCState &State) {
380 ISD::ArgFlagsTy ArgFlags, CCState &State) {
425 ISD::ArgFlagsTy ArgFlags, CCState &State) {
561 ISD::ArgFlagsTy ArgFlags, CCState &State) {
628 ISD::ArgFlagsTy ArgFlags, CCState &State) {
692 ISD::ArgFlagsTy ArgFlags, CCState &State) {
721 ISD::ArgFlagsTy ArgFlags, CCState &State) {
757 ISD::ArgFlagsTy ArgFlags, CCState &State) {
793 ISD::ArgFlagsTy ArgFlags, CCState &State) {
1034 ISD::ArgFlagsTy ArgFlags, CCState &State) {
1050 ISD::ArgFlagsTy ArgFlags, CCState &State) {
1068 ISD::ArgFlagsTy ArgFlags, CCState &State) {
1092 ISD::ArgFlagsTy ArgFlags, CCState &State) {
1122 ISD::ArgFlagsTy ArgFlags, CCState &State) {
1163 ISD::ArgFlagsTy ArgFlags, CCState &State) {
1227 ISD::ArgFlagsTy ArgFlags, CCState &State) {
1291 ISD::ArgFlagsTy ArgFlags, CCState &State) {
1369 ISD::ArgFlagsTy ArgFlags, CCState &State) {
1380 ISD::ArgFlagsTy ArgFlags, CCState &State) {
1654 ISD::ArgFlagsTy ArgFlags, CCState &State) {
1737 ISD::ArgFlagsTy ArgFlags, CCState &State) {
1755 ISD::ArgFlagsTy ArgFlags, CCState &State) {
1773 ISD::ArgFlagsTy ArgFlags, CCState &State) {
1812 ISD::ArgFlagsTy ArgFlags, CCState &State) {
1859 ISD::ArgFlagsTy ArgFlags, CCState &State) {
2106 ISD::ArgFlagsTy ArgFlags, CCState &State) {
2121 ISD::ArgFlagsTy ArgFlags, CCState &State) {
2135 ISD::ArgFlagsTy ArgFlags, CCState &State) {
2322 ISD::ArgFlagsTy ArgFlags, CCState &State) {
2569 ISD::ArgFlagsTy ArgFlags, CCState &State) {
2583 ISD::ArgFlagsTy ArgFlags, CCState &State) {
2635 ISD::ArgFlagsTy ArgFlags, CCState &State) {
2656 ISD::ArgFlagsTy ArgFlags, CCState &State) {
2848 ISD::ArgFlagsTy ArgFlags, CCState &State) {
2884 ISD::ArgFlagsTy ArgFlags, CCState &State) {
2921 ISD::ArgFlagsTy ArgFlags, CCState &State) {
2986 ISD::ArgFlagsTy ArgFlags, CCState &State) {
3015 ISD::ArgFlagsTy ArgFlags, CCState &State) {
3193 ISD::ArgFlagsTy ArgFlags, CCState &State) {
3216 ISD::ArgFlagsTy ArgFlags, CCState &State) {
3284 ISD::ArgFlagsTy ArgFlags, CCState &State) {
3295 ISD::ArgFlagsTy ArgFlags, CCState &State) {
3355 ISD::ArgFlagsTy ArgFlags, CCState &State) {
3385 ISD::ArgFlagsTy ArgFlags, CCState &State) {
3415 ISD::ArgFlagsTy ArgFlags, CCState &State) {
3535 ISD::ArgFlagsTy ArgFlags, CCState &State) {
3558 ISD::ArgFlagsTy ArgFlags, CCState &State) {
3585 ISD::ArgFlagsTy ArgFlags, CCState &State) {
3769 ISD::ArgFlagsTy ArgFlags, CCState &State) {
3785 ISD::ArgFlagsTy ArgFlags, CCState &State) {
gen/lib/Target/XCore/XCoreGenCallingConv.inc 11 ISD::ArgFlagsTy ArgFlags, CCState &State);
14 ISD::ArgFlagsTy ArgFlags, CCState &State);
19 ISD::ArgFlagsTy ArgFlags, CCState &State) {
61 ISD::ArgFlagsTy ArgFlags, CCState &State) {
include/llvm/CodeGen/CallingConvLower.h 179 ISD::ArgFlagsTy ArgFlags, CCState &State);
186 ISD::ArgFlagsTy &ArgFlags, CCState &State);
include/llvm/CodeGen/GlobalISel/CallLowering.h 159 ISD::ArgFlagsTy Flags, CCState &State) {
212 bool handleAssignments(CCState &CCState,
222 bool analyzeArgInfo(CCState &CCState, SmallVectorImpl<ArgInfo> &Args,
include/llvm/CodeGen/TargetLowering.h 3648 virtual void HandleByVal(CCState *, unsigned &, unsigned) const {}
lib/CodeGen/CallingConvLower.cpp 267 CCState CCInfo1(CalleeCC, false, MF, RVLocs1, C);
271 CCState CCInfo2(CallerCC, false, MF, RVLocs2, C);
lib/CodeGen/GlobalISel/CallLowering.cpp 173 CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext());
177 bool CallLowering::handleAssignments(CCState &CCInfo,
379 bool CallLowering::analyzeArgInfo(CCState &CCState,
411 CCState CCInfo1(CalleeCC, false, MF, ArgLocs1, F.getContext());
417 CCState CCInfo2(CallerCC, false, MF, ArgLocs2, F.getContext());
lib/Target/AArch64/AArch64CallLowering.cpp 193 CCState &State) override {
391 CCState CCInfo(F.getCallingConv(), /*IsVarArg=*/true, MF, ArgLocs,
579 CCState OutInfo(CalleeCC, false, MF, OutLocs, CallerF.getContext());
843 CCState OutInfo(CalleeCC, false, MF, OutLocs, F.getContext());
lib/Target/AArch64/AArch64CallingConvention.cpp 41 CCState &State, unsigned SlotAlign) {
64 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
83 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
lib/Target/AArch64/AArch64CallingConvention.h 21 CCState &State);
24 ISD::ArgFlagsTy ArgFlags, CCState &State);
27 ISD::ArgFlagsTy ArgFlags, CCState &State);
30 ISD::ArgFlagsTy ArgFlags, CCState &State);
33 ISD::ArgFlagsTy ArgFlags, CCState &State);
36 ISD::ArgFlagsTy ArgFlags, CCState &State);
39 ISD::ArgFlagsTy ArgFlags, CCState &State);
42 CCState &State);
45 CCState &State);
48 ISD::ArgFlagsTy ArgFlags, CCState &State);
lib/Target/AArch64/AArch64FastISel.cpp 3067 CCState CCInfo(CC, false, *FuncInfo.MF, ArgLocs, *Context);
3164 CCState CCInfo(CC, false, *FuncInfo.MF, RVLocs, *Context);
3866 CCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, ValLocs, I->getContext());
lib/Target/AArch64/AArch64ISelLowering.cpp 3145 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs,
3391 void AArch64TargetLowering::saveVarArgRegisters(CCState &CCInfo,
3488 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs,
3626 CCState CCInfo(CalleeCC, isVarArg, MF, ArgLocs, C);
3635 if (!CCState::resultsCompatible(CalleeCC, CallerCC, MF, C, Ins,
3657 CCState CCInfo(CalleeCC, isVarArg, MF, ArgLocs, C);
3756 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs,
4155 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context);
4172 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs,
lib/Target/AArch64/AArch64ISelLowering.h 617 void saveVarArgRegisters(CCState &CCInfo, SelectionDAG &DAG, const SDLoc &DL,
lib/Target/AMDGPU/AMDGPUCallLowering.cpp 70 CCState &State) override {
386 static void allocateHSAUserSGPRs(CCState &CCInfo,
450 CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext());
574 CCState CCInfo(CC, F.isVarArg(), MF, ArgLocs, F.getContext());
lib/Target/AMDGPU/AMDGPUISelLowering.cpp 909 CCState &State,
lib/Target/AMDGPU/AMDGPUISelLowering.h 143 CCState &State,
lib/Target/AMDGPU/R600ISelLowering.cpp 1583 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs,
lib/Target/AMDGPU/SIISelLowering.cpp 103 static unsigned findFirstFreeSGPR(CCState &CCInfo) {
1613 void SITargetLowering::allocateSpecialEntryInputVGPRs(CCState &CCInfo,
1649 static ArgDescriptor allocateVGPR32Input(CCState &CCInfo, unsigned Mask = ~0u,
1674 static ArgDescriptor allocateSGPR32InputImpl(CCState &CCInfo,
1691 static ArgDescriptor allocateSGPR32Input(CCState &CCInfo) {
1695 static ArgDescriptor allocateSGPR64Input(CCState &CCInfo) {
1699 void SITargetLowering::allocateSpecialInputVGPRs(CCState &CCInfo,
1721 CCState &CCInfo,
1757 void SITargetLowering::allocateHSAUserSGPRs(CCState &CCInfo,
1812 void SITargetLowering::allocateSystemSGPRs(CCState &CCInfo,
2038 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs,
2254 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context);
2282 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs,
2377 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs,
2428 CCState &CCInfo,
2623 if (!CCState::resultsCompatible(CalleeCC, CallerCC, MF, Ctx, Ins,
2640 CCState CCInfo(CalleeCC, IsVarArg, MF, ArgLocs, Ctx);
2741 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext());
lib/Target/AMDGPU/SIISelLowering.h 308 CCState &CCInfo,
405 void allocateHSAUserSGPRs(CCState &CCInfo,
410 void allocateSystemSGPRs(CCState &CCInfo,
416 void allocateSpecialEntryInputVGPRs(CCState &CCInfo,
421 CCState &CCInfo,
426 void allocateSpecialInputVGPRs(CCState &CCInfo,
lib/Target/ARC/ARCISelLowering.cpp 239 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs,
246 CCState RetCCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs,
457 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs,
596 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context);
618 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs,
lib/Target/ARM/ARMCallLowering.cpp 175 CCState &State) override {
lib/Target/ARM/ARMCallingConv.cpp 23 CCState &State, bool CanFail) {
54 CCState &State) {
66 CCState &State, bool CanFail) {
108 CCState &State) {
118 CCValAssign::LocInfo &LocInfo, CCState &State) {
140 CCState &State) {
151 CCState &State) {
176 CCState &State) {
lib/Target/ARM/ARMCallingConv.h 22 CCState &State);
25 CCState &State);
28 CCState &State);
31 CCState &State);
34 CCState &State);
37 ISD::ArgFlagsTy ArgFlags, CCState &State);
40 CCState &State);
43 CCState &State);
46 CCState &State);
49 CCState &State);
lib/Target/ARM/ARMFastISel.cpp 1896 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, ArgLocs, *Context);
2046 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, RVLocs, *Context);
2114 CCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, ValLocs, I->getContext());
2218 CCState CCInfo(CC, false, *FuncInfo.MF, RVLocs, *Context);
2326 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, RVLocs, *Context);
lib/Target/ARM/ARMISelLowering.cpp 1932 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs,
2106 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs,
2454 void ARMTargetLowering::HandleByVal(CCState *State, unsigned &Size,
2602 if (!CCState::resultsCompatible(CalleeCC, CallerCC, MF, C, Ins,
2628 CCState CCInfo(CalleeCC, isVarArg, MF, ArgLocs, C);
2682 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context);
2729 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs,
3877 int ARMTargetLowering::StoreByValRegs(CCState &CCInfo, SelectionDAG &DAG,
3931 void ARMTargetLowering::VarArgStyleRegisters(CCState &CCInfo, SelectionDAG &DAG,
3962 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs,
lib/Target/ARM/ARMISelLowering.h 777 int StoreByValRegs(CCState &CCInfo, SelectionDAG &DAG, const SDLoc &dl,
782 void VarArgStyleRegisters(CCState &CCInfo, SelectionDAG &DAG,
791 void HandleByVal(CCState *, unsigned &, unsigned) const override;
lib/Target/AVR/AVRISelLowering.cpp 938 CCState &CCInfo, bool IsCall, bool IsVarArg) {
1014 CCState &CCInfo, bool IsCall, bool IsVarArg) {
1032 CCState &CCInfo, bool IsCall, bool IsVarArg) {
1059 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs,
1165 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs,
1318 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs,
1363 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context);
1379 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs,
lib/Target/BPF/BPFISelLowering.cpp 223 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext());
301 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext());
419 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, *DAG.getContext());
462 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, *DAG.getContext());
lib/Target/Hexagon/HexagonISelLowering.cpp 114 class HexagonCCState : public CCState {
133 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
181 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context);
201 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs,
268 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs,
lib/Target/Lanai/LanaiISelLowering.cpp 371 ISD::ArgFlagsTy ArgFlags, CCState &State) {
448 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs,
543 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs,
604 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs,
780 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs,
lib/Target/MSP430/MSP430ISelLowering.cpp 425 static void AnalyzeVarArgs(CCState &State,
430 static void AnalyzeVarArgs(CCState &State,
440 static void AnalyzeArguments(CCState &State,
534 static void AnalyzeRetResult(CCState &State,
539 static void AnalyzeRetResult(CCState &State,
545 static void AnalyzeReturnValues(CCState &State,
613 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs,
714 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context);
735 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs,
796 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs,
927 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs,
lib/Target/Mips/Mips16ISelLowering.cpp 242 const CCState &CCInfo, unsigned NextStackOffset,
lib/Target/Mips/Mips16ISelLowering.h 35 const CCState &CCInfo, unsigned NextStackOffset,
lib/Target/Mips/MipsCCState.h 20 class MipsCCState : public CCState {
lib/Target/Mips/MipsFastISel.cpp 276 CCState &State) LLVM_ATTRIBUTE_UNUSED;
280 ISD::ArgFlagsTy ArgFlags, CCState &State) {
286 ISD::ArgFlagsTy ArgFlags, CCState &State) {
1144 CCState CCInfo(CC, false, *FuncInfo.MF, ArgLocs, *Context);
lib/Target/Mips/MipsISelLowering.cpp 2739 CCState &State, ArrayRef<MCPhysReg> F64Regs) {
2850 ISD::ArgFlagsTy ArgFlags, CCState &State) {
2858 ISD::ArgFlagsTy ArgFlags, CCState &State) {
2866 CCState &State) LLVM_ATTRIBUTE_UNUSED;
4325 CCState &State) const {
4369 void MipsTargetLowering::HandleByVal(CCState *State, unsigned &Size,
lib/Target/Mips/MipsISelLowering.h 349 void HandleByVal(CCState *, unsigned &, unsigned) const override;
570 isEligibleForTailCallOptimization(const CCState &CCInfo,
599 CCState &State) const;
lib/Target/Mips/MipsSEISelLowering.cpp 1143 const CCState &CCInfo, unsigned NextStackOffset,
lib/Target/Mips/MipsSEISelLowering.h 64 const CCState &CCInfo, unsigned NextStackOffset,
lib/Target/PowerPC/PPCCCState.h 18 class PPCCCState : public CCState {
lib/Target/PowerPC/PPCCallingConv.cpp 17 CCState &) {
27 CCState &State) {
35 CCState &State) {
60 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
85 CCState &State) {
113 CCState &State) {
142 CCState &State) {
lib/Target/PowerPC/PPCCallingConv.h 24 CCState &State);
27 CCState &State);
30 CCState &State);
33 CCState &State);
36 CCState &State);
39 CCState &State);
42 ISD::ArgFlagsTy ArgFlags, CCState &State);
lib/Target/PowerPC/PPCFastISel.cpp 1383 CCState CCInfo(CC, IsVarArg, *FuncInfo.MF, ArgLocs, *Context);
1503 CCState CCInfo(CC, false, *FuncInfo.MF, RVLocs, *Context);
1585 CCState CCInfo(CC, IsVarArg, *FuncInfo.MF, RVLocs, *Context);
1707 CCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, ValLocs, *Context);
lib/Target/PowerPC/PPCISelLowering.cpp 3575 CCState CCByValInfo(CallConv, isVarArg, DAG.getMachineFunction(),
5158 CCState CCRetInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs,
5488 CCState CCByValInfo(CallConv, isVarArg, MF, ByValArgLocs, *DAG.getContext());
6709 CCState &State) {
6809 CCState CCInfo(CallConv, isVarArg, MF, ArgLocs, *DAG.getContext());
6879 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context);
6893 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs,
lib/Target/RISCV/RISCVISelLowering.cpp 1410 static bool CC_RISCVAssign2XLen(unsigned XLen, CCState &State, CCValAssign VA1,
1449 ISD::ArgFlagsTy ArgFlags, CCState &State, bool IsFixed,
1619 MachineFunction &MF, CCState &CCInfo,
1645 MachineFunction &MF, CCState &CCInfo,
1811 ISD::ArgFlagsTy ArgFlags, CCState &State) {
1902 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext());
2012 CCState &CCInfo, CallLoweringInfo &CLI, MachineFunction &MF,
2106 CCState ArgCCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext());
2331 CCState RetCCInfo(CallConv, IsVarArg, MF, RVLocs, *DAG.getContext());
2365 CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context);
2390 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs,
lib/Target/RISCV/RISCVISelLowering.h 151 void analyzeInputArgs(MachineFunction &MF, CCState &CCInfo,
154 void analyzeOutputArgs(MachineFunction &MF, CCState &CCInfo,
198 CCState &CCInfo, CallLoweringInfo &CLI, MachineFunction &MF,
lib/Target/Sparc/SparcISelLowering.cpp 43 ISD::ArgFlagsTy &ArgFlags, CCState &State)
56 ISD::ArgFlagsTy &ArgFlags, CCState &State)
84 ISD::ArgFlagsTy &ArgFlags, CCState &State)
108 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
153 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
219 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs,
302 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs,
393 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs,
586 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs,
735 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs,
982 CCState RVInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs,
1105 CCState CCInfo(CLI.CallConv, CLI.IsVarArg, DAG.getMachineFunction(), ArgLocs,
1290 CCState RVInfo(CLI.CallConv, CLI.IsVarArg, DAG.getMachineFunction(), RVLocs,
lib/Target/SystemZ/SystemZCallingConv.h 25 class SystemZCCState : public CCState {
91 CCState &State) {
lib/Target/SystemZ/SystemZISelLowering.cpp 1437 static bool canUseSiblingCall(const CCState &ArgCCInfo,
1616 CCState RetCCInfo(CallConv, IsVarArg, MF, RetLocs, *DAG.getContext());
1653 CCState RetCCInfo(CallConv, isVarArg, MF, RetLocs, Context);
1671 CCState RetCCInfo(CallConv, IsVarArg, MF, RetLocs, *DAG.getContext());
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp 739 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext());
lib/Target/X86/X86CallLowering.cpp 161 CCState &State) override {
lib/Target/X86/X86CallingConv.cpp 30 CCState &State) {
94 CCState &State) {
130 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
190 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
230 CCState &) {
239 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
299 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
lib/Target/X86/X86CallingConv.h 25 CCState &State);
28 ISD::ArgFlagsTy ArgFlags, CCState &State);
lib/Target/X86/X86FastISel.cpp 1194 CCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, ValLocs, I->getContext());
3300 CCState CCInfo(CC, IsVarArg, *FuncInfo.MF, ArgLocs, CLI.RetTy->getContext());
3546 CCState CCRetInfo(CC, IsVarArg, *FuncInfo.MF, RVLocs,
lib/Target/X86/X86ISelLowering.cpp 2397 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context);
2483 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, *DAG.getContext());
2830 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs,
3196 CCState CCInfo(CallConv, isVarArg, MF, ArgLocs, *DAG.getContext());
3679 CCState CCInfo(CallConv, isVarArg, MF, ArgLocs, *DAG.getContext());
4363 CCState CCInfo(CalleeCC, isVarArg, MF, ArgLocs, C);
4383 CCState CCInfo(CalleeCC, false, MF, RVLocs, C);
4393 if (!CCState::resultsCompatible(CalleeCC, CallerCC, MF, C, Ins,
4413 CCState CCInfo(CalleeCC, isVarArg, MF, ArgLocs, C);
lib/Target/XCore/XCoreISelLowering.cpp 1115 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs,
1126 CCState RetCCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs,
1270 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs,
1427 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context);
1451 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs,