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| /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|* *|
|* Calling Convention Implementation Fragment *|
|* *|
|* Automatically generated file, do not edit! *|
|* *|
\*===----------------------------------------------------------------------===*/
static bool CC_Lanai32(unsigned ValNo, MVT ValVT,
MVT LocVT, CCValAssign::LocInfo LocInfo,
ISD::ArgFlagsTy ArgFlags, CCState &State);
static bool CC_Lanai32_Fast(unsigned ValNo, MVT ValVT,
MVT LocVT, CCValAssign::LocInfo LocInfo,
ISD::ArgFlagsTy ArgFlags, CCState &State);
static bool RetCC_Lanai32(unsigned ValNo, MVT ValVT,
MVT LocVT, CCValAssign::LocInfo LocInfo,
ISD::ArgFlagsTy ArgFlags, CCState &State);
static bool CC_Lanai32(unsigned ValNo, MVT ValVT,
MVT LocVT, CCValAssign::LocInfo LocInfo,
ISD::ArgFlagsTy ArgFlags, CCState &State) {
if (LocVT == MVT::i8 ||
LocVT == MVT::i16) {
LocVT = MVT::i32;
if (ArgFlags.isSExt())
LocInfo = CCValAssign::SExt;
else if (ArgFlags.isZExt())
LocInfo = CCValAssign::ZExt;
else
LocInfo = CCValAssign::AExt;
}
if (!State.isVarArg()) {
if (ArgFlags.isInReg()) {
if (LocVT == MVT::i32) {
static const MCPhysReg RegList1[] = {
Lanai::R6, Lanai::R7, Lanai::R18, Lanai::R19
};
if (unsigned Reg = State.AllocateReg(RegList1)) {
State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
return false;
}
}
}
}
unsigned Offset2 = State.AllocateStack(4, 4);
State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset2, LocVT, LocInfo));
return false;
return true; // CC didn't match.
}
static bool CC_Lanai32_Fast(unsigned ValNo, MVT ValVT,
MVT LocVT, CCValAssign::LocInfo LocInfo,
ISD::ArgFlagsTy ArgFlags, CCState &State) {
if (LocVT == MVT::i8 ||
LocVT == MVT::i16) {
LocVT = MVT::i32;
if (ArgFlags.isSExt())
LocInfo = CCValAssign::SExt;
else if (ArgFlags.isZExt())
LocInfo = CCValAssign::ZExt;
else
LocInfo = CCValAssign::AExt;
}
if (!State.isVarArg()) {
if (LocVT == MVT::i32) {
static const MCPhysReg RegList1[] = {
Lanai::R6, Lanai::R7, Lanai::R18, Lanai::R19
};
if (unsigned Reg = State.AllocateReg(RegList1)) {
State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
return false;
}
}
}
unsigned Offset2 = State.AllocateStack(4, 4);
State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset2, LocVT, LocInfo));
return false;
return true; // CC didn't match.
}
static bool RetCC_Lanai32(unsigned ValNo, MVT ValVT,
MVT LocVT, CCValAssign::LocInfo LocInfo,
ISD::ArgFlagsTy ArgFlags, CCState &State) {
if (LocVT == MVT::i32) {
static const MCPhysReg RegList1[] = {
Lanai::RV, Lanai::R9
};
if (unsigned Reg = State.AllocateReg(RegList1)) {
State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
return false;
}
}
return true; // CC didn't match.
}
|