reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

include/llvm/Target/TargetMachine.h
  222   CodeGenOpt::Level getOptLevel() const;

References

lib/CodeGen/AsmPrinter/AsmPrinter.cpp
 2909                             TM.getOptLevel() != CodeGenOpt::None;
lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
 1393   if (Asm->TM.getOptLevel() != CodeGenOpt::None &&
lib/CodeGen/GlobalISel/IRTranslator.cpp
 1292     if (MF->getTarget().getOptLevel() == CodeGenOpt::None)
 2250   EnableOpts = TM.getOptLevel() != CodeGenOpt::None && !skipFunction(F);
lib/CodeGen/PrologEpilogInserter.cpp
 1027   if (MF.getTarget().getOptLevel() != CodeGenOpt::None &&
 1037       MF.getTarget().getOptLevel() != CodeGenOpt::None &&
lib/CodeGen/RegAllocGreedy.cpp
 3221                             MF->getTarget().getOptLevel());
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
 1607         TM.getOptLevel() == CodeGenOpt::None)
 2234     if (Succ0MBB != NextBlock(BrMBB) || TM.getOptLevel() == CodeGenOpt::None)
 6570     if (TM.getOptLevel() == CodeGenOpt::None)
10110   if (TM.getOptLevel() != CodeGenOpt::None) {
10448       TM.getOptLevel() == CodeGenOpt::None ||
10571     if (NumClusters > 3 && TM.getOptLevel() != CodeGenOpt::None &&
lib/CodeGen/SwitchLoweringUtils.cpp
   93   if (TM->getOptLevel() == CodeGenOpt::None)
  276   if (TM->getOptLevel() == CodeGenOpt::None)
lib/CodeGen/TargetPassConfig.cpp
  427   return TM->getOptLevel();
  773   else if (TM->getOptLevel() == CodeGenOpt::None && TM->getO0WantsFastISel())
lib/CodeGen/TwoAddressInstructionPass.cpp
 1679   OptLevel = TM.getOptLevel();
lib/Target/AArch64/AArch64FastISel.cpp
 5083   assert(TM.getOptLevel() == CodeGenOpt::None &&
lib/Target/AArch64/AArch64ISelLowering.cpp
12164   if (getTargetMachine().getOptLevel() == 0)
lib/Target/AArch64/AArch64InstructionSelector.cpp
 3640   if (TM.getOptLevel() == CodeGenOpt::None)
lib/Target/AArch64/AArch64PreLegalizerCombiner.cpp
  150       MF.getTarget().getOptLevel() != CodeGenOpt::None && !skipFunction(F);
lib/Target/AArch64/AArch64TargetMachine.cpp
  289   if (getOptLevel() <= EnableGlobalISelAtO &&
  352     if (TM.getOptLevel() != CodeGenOpt::None)
  415   return getStandardCSEConfigForOpt(TM->getOptLevel());
  426   if (TM->getOptLevel() != CodeGenOpt::None && EnableAtomicTidy)
  433   if (TM->getOptLevel() != CodeGenOpt::None) {
  443   if (TM->getOptLevel() != CodeGenOpt::None) {
  448   if (TM->getOptLevel() == CodeGenOpt::Aggressive && EnableGEPOpt) {
  461   addPass(createAArch64StackTaggingPass(/* MergeInit = */ TM->getOptLevel() !=
  473   if (TM->getOptLevel() != CodeGenOpt::None && EnablePromoteConstant)
  478   if ((TM->getOptLevel() != CodeGenOpt::None &&
  481     bool OnlyOptimizeForSize = (TM->getOptLevel() < CodeGenOpt::Aggressive) &&
  557   if (TM->getOptLevel() != CodeGenOpt::None)
  564   if (TM->getOptLevel() != CodeGenOpt::None && EnableDeadRegisterElimination)
  568   if (TM->getOptLevel() != CodeGenOpt::None && EnableAdvSIMDScalar) {
  578   if (TM->getOptLevel() != CodeGenOpt::None && EnableRedundantCopyElimination)
  581   if (TM->getOptLevel() != CodeGenOpt::None && usingDefaultRegAlloc())
  590   if (TM->getOptLevel() != CodeGenOpt::None) {
  602   if (TM->getOptLevel() != CodeGenOpt::None) {
  612   if (TM->getOptLevel() >= CodeGenOpt::Aggressive && EnableLoadStoreOpt)
  629   if (TM->getOptLevel() != CodeGenOpt::None && EnableCompressJumpTables)
  632   if (TM->getOptLevel() != CodeGenOpt::None && EnableCollectLOH &&
lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  396   bool EnableOpt = getOptLevel() > CodeGenOpt::None;
  576   return getStandardCSEConfigForOpt(TM->getOptLevel());
  695   if (TM.getOptLevel() > CodeGenOpt::None) {
lib/Target/AMDGPU/SIFixSGPRCopies.cpp
  752   if (MF.getTarget().getOptLevel() > CodeGenOpt::None && EnableM0Merge)
lib/Target/AMDGPU/SIISelLowering.cpp
 1880   if (TM.getOptLevel() == CodeGenOpt::None)
 6822     if (getTargetMachine().getOptLevel() > CodeGenOpt::None) {
 9935   if (getTargetMachine().getOptLevel() == CodeGenOpt::None)
lib/Target/ARM/ARMAsmPrinter.cpp
  132   else if (TM.getOptLevel() == CodeGenOpt::Aggressive)
  135   else if (TM.getOptLevel() > CodeGenOpt::None)
lib/Target/ARM/ARMISelLowering.cpp
 1212         getTargetMachine().getOptLevel() == 0) {
16520   if (getTargetMachine().getOptLevel() != 0 && HasAtomicCmpXchg)
lib/Target/ARM/ARMTargetMachine.cpp
  326     if (TM.getOptLevel() != CodeGenOpt::None) {
  396   return getStandardCSEConfigForOpt(TM->getOptLevel());
  408   if (TM->getOptLevel() != CodeGenOpt::None && EnableAtomicTidy)
  422   if (TM->getOptLevel() != CodeGenOpt::None)
  437   if ((TM->getOptLevel() != CodeGenOpt::None &&
  445     bool OnlyOptimizeForSize = (TM->getOptLevel() < CodeGenOpt::Aggressive) &&
  456   if (TM->getOptLevel() != CodeGenOpt::None) {
lib/Target/Hexagon/HexagonCopyToCombine.cpp
  478     MF.getTarget().getOptLevel() <= CodeGenOpt::Default;
lib/Target/Hexagon/HexagonFrameLowering.cpp
  378            MF.getTarget().getOptLevel() == CodeGenOpt::None;
 1006   if (MF.getTarget().getOptLevel() == CodeGenOpt::None)
 1118   bool NoOpt = MF.getTarget().getOptLevel() == CodeGenOpt::None;
 2427     if (MF.getTarget().getOptLevel() > CodeGenOpt::Default)
lib/Target/Hexagon/HexagonSubtarget.cpp
   81     : HexagonGenSubtargetInfo(TT, CPU, FS), OptLevel(TM.getOptLevel()),
lib/Target/Hexagon/HexagonTargetMachine.cpp
  376   if (TM->getOptLevel() >= CodeGenOpt::Default)
lib/Target/Mips/MipsDelaySlotFiller.cpp
  608     if (!DisableDelaySlotFiller && (TM->getOptLevel() != CodeGenOpt::None) &&
lib/Target/Mips/MipsTargetMachine.cpp
  257   return getStandardCSEConfigForOpt(TM->getOptLevel());
lib/Target/NVPTX/NVPTXISelLowering.cpp
 4757   CodeGenOpt::Level OptLevel = getTargetMachine().getOptLevel();
lib/Target/PowerPC/PPCISelDAGToDAG.cpp
 3629   if (TM.getOptLevel() == CodeGenOpt::None || !TM.isPPC64())
 5564   if (TM.getOptLevel() == CodeGenOpt::None)
lib/Target/PowerPC/PPCISelLowering.cpp
14823   if (getTargetMachine().getOptLevel() != CodeGenOpt::None) {
lib/Target/PowerPC/PPCInstrInfo.cpp
  272   if (Subtarget.getTargetMachine().getOptLevel() != CodeGenOpt::Aggressive)
lib/Target/PowerPC/PPCTargetMachine.cpp
  349         computeFSAdditions(FS, getOptLevel(), getTargetTriple()), *this);
  367     if (TM.getOptLevel() != CodeGenOpt::None)
  400   if (TM->getOptLevel() != CodeGenOpt::None)
  413   if (TM->getOptLevel() >= CodeGenOpt::Default && EnableGEPOpt) {
lib/Target/X86/X86ISelDAGToDAG.cpp
 1156   if (TM.getOptLevel() == CodeGenOpt::None)
lib/Target/X86/X86ISelLowering.cpp
  135   if (TM.getOptLevel() >= CodeGenOpt::Default) {
lib/Target/X86/X86TargetMachine.cpp
  411   if (TM->getOptLevel() != CodeGenOpt::None)
  550   return getStandardCSEConfigForOpt(TM->getOptLevel());