reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

include/llvm/CodeGen/MachineRegisterInfo.h

  591   void replaceRegWith(unsigned FromReg, unsigned ToReg);

References

include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h

  356         MRI.replaceRegWith(MI.getOperand(Idx).getReg(),

lib/CodeGen/GlobalISel/CombinerHelper.cpp

   47     MRI.replaceRegWith(FromReg, ToReg);

lib/CodeGen/GlobalISel/InstructionSelect.cpp

  177           MRI.replaceRegWith(DstReg, SrcReg);

lib/CodeGen/MachineCSE.cpp

  650         MRI->replaceRegWith(OldReg, NewReg);

lib/CodeGen/MachineLICM.cpp

 1407       MRI->replaceRegWith(Reg, DupReg);

lib/CodeGen/MachineSink.cpp

  222   MRI->replaceRegWith(DstReg, SrcReg);

lib/CodeGen/ModuloSchedule.cpp

 1232         MRI.replaceRegWith(MI.getOperand(0).getReg(),
 1729     MRI.replaceRegWith(PhiR, R);

lib/CodeGen/OptimizePHIs.cpp

  183       MRI->replaceRegWith(OldReg, SingleValReg);

lib/CodeGen/PeepholeOptimizer.cpp

 1247   MRI->replaceRegWith(Def.Reg, NewVReg);
 1427   MRI->replaceRegWith(DstReg, PrevDstReg);

lib/CodeGen/RegisterScavenging.cpp

  669   MRI.replaceRegWith(VReg, SReg);

lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

  537     MRI.replaceRegWith(From, To);
  684     MRI.replaceRegWith(From, To);

lib/CodeGen/TailDuplicator.cpp

  243       MRI->replaceRegWith(Dst, Src);

lib/CodeGen/UnreachableBlockElim.cpp

  188             MRI.replaceRegWith(OutputReg, InputReg);

lib/Target/AMDGPU/SIFoldOperands.cpp

 1315   MRI->replaceRegWith(MI.getOperand(0).getReg(), Def->getOperand(0).getReg());
 1437   MRI->replaceRegWith(MI.getOperand(0).getReg(), Def->getOperand(0).getReg());

lib/Target/AMDGPU/SIFrameLowering.cpp

  308       MRI.replaceRegWith(ScratchRsrcReg, Reg);
  374         MRI.replaceRegWith(ScratchWaveOffsetReg, Reg);

lib/Target/AMDGPU/SIISelLowering.cpp

10688     MRI.replaceRegWith(AMDGPU::SP_REG, Info->getStackPtrOffsetReg());
10693     MRI.replaceRegWith(AMDGPU::PRIVATE_RSRC_REG, Info->getScratchRSrcReg());
10696     MRI.replaceRegWith(AMDGPU::FP_REG, Info->getFrameOffsetReg());
10699     MRI.replaceRegWith(AMDGPU::SCRATCH_WAVE_OFFSET_REG,

lib/Target/AMDGPU/SIInstrInfo.cpp

 1856   MRI.replaceRegWith(PCReg, Scav);
 5075         MRI.replaceRegWith(DstReg, Inst.getOperand(1).getReg());
 5089       MRI.replaceRegWith(DstReg, NewDstReg);
 5126     MRI.replaceRegWith(OldDstReg, ResultReg);
 5159   MRI.replaceRegWith(Dest.getReg(), ResultReg);
 5183     MRI.replaceRegWith(Dest.getReg(), NewDest);
 5220     MRI.replaceRegWith(Dest.getReg(), NewDest);
 5253   MRI.replaceRegWith(Dest.getReg(), NewDest);
 5282   MRI.replaceRegWith(Dest.getReg(), NewDest);
 5328   MRI.replaceRegWith(Dest.getReg(), FullDestReg);
 5401   MRI.replaceRegWith(Dest.getReg(), FullDestReg);
 5467   MRI.replaceRegWith(Dest.getReg(), FullDestReg);
 5513   MRI.replaceRegWith(Dest.getReg(), NewDest);
 5548   MRI.replaceRegWith(Dest.getReg(), ResultReg);
 5593     MRI.replaceRegWith(Dest.getReg(), ResultReg);
 5612   MRI.replaceRegWith(Dest.getReg(), ResultReg);
 5710   MRI.replaceRegWith(Dest.getReg(), ResultReg);

lib/Target/AMDGPU/SILowerI1Copies.cpp

  657       MRI->replaceRegWith(NewReg, DstReg);

lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp

  430       MRI.replaceRegWith(SavedExec, Exec);

lib/Target/Hexagon/HexagonConstExtenders.cpp

 1886       MRI->replaceRegWith(ED.Rd.Reg, ExtR.Reg);

lib/Target/Hexagon/HexagonEarlyIfConv.cpp

 1004     MRI->replaceRegWith(DefR, NewR);

lib/Target/Hexagon/HexagonExpandCondsets.cpp

 1158   MRI->replaceRegWith(R2.Reg, R1.Reg);

lib/Target/Hexagon/HexagonGenInsert.cpp

 1445     MRI->replaceRegWith(I->first, RegMap[I->first]);

lib/Target/Hexagon/HexagonGenPredicate.cpp

  438   MRI->replaceRegWith(OutR.R, NewOutR);
  483       MRI->replaceRegWith(DR.R, SR.R);

lib/Target/Hexagon/HexagonSplitDouble.cpp

  682     MRI->replaceRegWith(UpdOp.getReg(), NewR);

lib/Target/Hexagon/HexagonVExtract.cpp

  154       MRI.replaceRegWith(ExtR, ElemR);

lib/Target/RISCV/RISCVInstrInfo.cpp

  408   MRI.replaceRegWith(ScratchReg, Scav);

lib/Target/RISCV/RISCVMergeBaseOffset.cpp

  110   MRI->replaceRegWith(Tail.getOperand(0).getReg(),

lib/Target/Sparc/SparcFrameLowering.cpp

  342     MRI.replaceRegWith(reg, mapped_reg);
  348       MRI.replaceRegWith(preg, mapped_preg);

lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp

  360         MRI.replaceRegWith(MI.getOperand(1).getReg(),

lib/Target/WebAssembly/WebAssemblyRegColoring.cpp

  171       MRI->replaceRegWith(Old, New);

lib/Target/X86/X86FixupSetCC.cpp

  153       MRI->replaceRegWith(ZExt->getOperand(0).getReg(), InsertReg);

lib/Target/X86/X86FlagsCopyLowering.cpp

  881   MRI->replaceRegWith(MI.getOperand(0).getReg(),
  904     MRI->replaceRegWith(SetBI.getOperand(0).getReg(), Reg);
 1029     MRI->replaceRegWith(SetCCI.getOperand(0).getReg(), CondReg);

lib/Target/X86/X86SpeculativeLoadHardening.cpp

 2352   MRI->replaceRegWith(/*FromReg*/ OldDefReg, /*ToReg*/ HardenedReg);