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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/Mips/MipsGenGlobalISel.inc20724 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FADD,
20750 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FADD,
20776 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FADD,
20802 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FADD,
20914 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FADD,
20941 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FADD,
20968 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FADD,
20995 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FADD,
21022 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FADD,
21049 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FADD,
include/llvm/CodeGen/GlobalISel/IRTranslator.h 433 return translateBinaryOp(TargetOpcode::G_FADD, U, MIRBuilder);
include/llvm/CodeGen/GlobalISel/MIPatternMatch.h 212 inline BinaryOp_match<LHS, RHS, TargetOpcode::G_FADD, true>
214 return BinaryOp_match<LHS, RHS, TargetOpcode::G_FADD, true>(L, R);
include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h 1374 return buildInstr(TargetOpcode::G_FADD, {Dst}, {Src0, Src1}, Flags);
lib/CodeGen/GlobalISel/IRTranslator.cpp 1424 MIRBuilder.buildInstr(TargetOpcode::G_FADD, {Dst}, {FMul, Op2},
lib/CodeGen/GlobalISel/LegalizerHelper.cpp 275 case TargetOpcode::G_FADD:
511 case TargetOpcode::G_FADD:
1821 case TargetOpcode::G_FADD:
2020 MIRBuilder.buildInstr(TargetOpcode::G_FADD, {Res}, {LHS, Neg}, MI.getFlags());
2960 case G_FADD:
lib/Target/AArch64/AArch64InstructionSelector.cpp 482 case TargetOpcode::G_FADD:
495 case TargetOpcode::G_FADD:
1849 case TargetOpcode::G_FADD:
lib/Target/AArch64/AArch64LegalizerInfo.cpp 148 getActionDefinitionsBuilder({G_FADD, G_FSUB, G_FMUL, G_FDIV, G_FNEG})
lib/Target/AArch64/AArch64RegisterBankInfo.cpp 389 case TargetOpcode::G_FADD:
541 case TargetOpcode::G_FADD:
lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp 335 { G_FADD, G_FMUL, G_FMA, G_FCANONICALIZE})
lib/Target/ARM/ARMLegalizerInfo.cpp 173 {G_FADD, G_FSUB, G_FMUL, G_FDIV, G_FCONSTANT, G_FNEG})
195 getActionDefinitionsBuilder({G_FADD, G_FSUB, G_FMUL, G_FDIV})
lib/Target/ARM/ARMRegisterBankInfo.cpp 287 case G_FADD:
lib/Target/Mips/MipsLegalizerInfo.cpp 191 getActionDefinitionsBuilder({G_FADD, G_FSUB, G_FMUL, G_FDIV, G_FABS, G_FSQRT})
426 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_FADD, MIRBuilder, ST);
lib/Target/Mips/MipsRegisterBankInfo.cpp 111 case TargetOpcode::G_FADD:
542 case G_FADD:
lib/Target/X86/X86LegalizerInfo.cpp 293 for (unsigned BinOp : {G_FADD, G_FSUB, G_FMUL, G_FDIV})
329 for (unsigned BinOp : {G_FADD, G_FSUB, G_FMUL, G_FDIV})
lib/Target/X86/X86RegisterBankInfo.cpp 179 case TargetOpcode::G_FADD:
unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp 763 B.buildInstr(TargetOpcode::G_FADD, {LLT::scalar(64)}, {Copies[0], Copies[1]},