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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Mips/MipsGenGlobalISel.inc 2241 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4324 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4350 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4376 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
12449 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
gen/lib/Target/RISCV/RISCVGenGlobalISel.inc 1228 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
1258 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
1288 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
1318 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
1348 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
1378 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
1408 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
1438 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
1468 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
1498 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
1528 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
1558 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
1588 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
1618 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
1648 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
1678 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
1708 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
1738 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
1768 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
1799 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
1830 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2263 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2293 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2323 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2353 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2383 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2413 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2443 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2473 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2503 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2533 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2563 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2594 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2860 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2889 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2918 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2947 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2977 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3007 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3148 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3177 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3207 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3299 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3328 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3357 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3386 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3416 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3446 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3587 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3616 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3646 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3740 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3768 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3796 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3824 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3852 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3880 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3908 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4062 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4090 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4118 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4146 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4174 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
gen/lib/Target/X86/X86GenGlobalISel.inc 2761 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2788 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2821 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
2848 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
2868 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2889 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2933 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2954 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3136 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3163 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3196 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
3223 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
3243 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3264 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3308 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3329 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4219 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4246 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4276 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
4306 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
4333 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
4359 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
4380 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4401 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4479 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4500 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4632 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4659 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4689 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
4719 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
4746 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
4772 GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
4793 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4814 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4892 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4913 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
5920 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
5941 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
5998 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
6019 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
6143 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
6164 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
6221 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
6242 GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
include/llvm/CodeGen/GlobalISel/ConstantFoldingMIRBuilder.h 34 case TargetOpcode::G_ADD:
include/llvm/CodeGen/GlobalISel/IRTranslator.h 354 return translateBinaryOp(TargetOpcode::G_ADD, U, MIRBuilder);
include/llvm/CodeGen/GlobalISel/MIPatternMatch.h 194 inline BinaryOp_match<LHS, RHS, TargetOpcode::G_ADD, true>
196 return BinaryOp_match<LHS, RHS, TargetOpcode::G_ADD, true>(L, R);
include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h 1228 return buildInstr(TargetOpcode::G_ADD, {Dst}, {Src0, Src1}, Flags);
include/llvm/Support/TargetOpcodes.def 205 HANDLE_TARGET_OPCODE_MARKER(PRE_ISEL_GENERIC_OPCODE_START, G_ADD)
lib/CodeGen/GlobalISel/CSEInfo.cpp 35 case TargetOpcode::G_ADD:
lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp 144 case TargetOpcode::G_ADD:
lib/CodeGen/GlobalISel/GISelKnownBits.cpp 189 case TargetOpcode::G_ADD: {
lib/CodeGen/GlobalISel/LegalizerHelper.cpp 719 case TargetOpcode::G_ADD: {
1430 ? TargetOpcode::G_ADD
1533 case TargetOpcode::G_ADD:
2955 case G_ADD:
3768 {MIBNot, MIRBuilder.buildInstr(TargetOpcode::G_ADD, {Ty},
lib/CodeGen/GlobalISel/LegalizerInfo.cpp 265 TargetOpcode::G_ADD, 0, widenToLargerTypesAndNarrowToLargest);
lib/CodeGen/GlobalISel/MachineIRBuilder.cpp 968 case TargetOpcode::G_ADD:
lib/CodeGen/GlobalISel/Utils.cpp 350 case TargetOpcode::G_ADD:
lib/Target/AArch64/AArch64LegalizerInfo.cpp 88 getActionDefinitionsBuilder({G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR})
lib/Target/AArch64/AArch64RegisterBankInfo.cpp 530 case TargetOpcode::G_ADD:
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp 1690 case TargetOpcode::G_ADD:
lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp 264 getActionDefinitionsBuilder({G_ADD, G_SUB, G_MUL})
269 getActionDefinitionsBuilder({G_ADD, G_SUB, G_MUL})
lib/Target/ARM/ARMLegalizerInfo.cpp 94 getActionDefinitionsBuilder({G_ADD, G_SUB})
98 getActionDefinitionsBuilder({G_ADD, G_SUB})
lib/Target/ARM/ARMRegisterBankInfo.cpp 230 case G_ADD:
lib/Target/Mips/MipsLegalizerInfo.cpp 64 getActionDefinitionsBuilder({G_ADD, G_SUB, G_MUL})
377 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_ADD, MIRBuilder, ST);
lib/Target/Mips/MipsRegisterBankInfo.cpp 456 case G_ADD:
lib/Target/X86/X86LegalizerInfo.cpp 122 for (unsigned BinOp : {G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR})
219 for (unsigned BinOp : {G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR})
333 for (unsigned BinOp : {G_ADD, G_SUB})
426 for (unsigned BinOp : {G_ADD, G_SUB})
463 for (unsigned BinOp : {G_ADD, G_SUB})
516 for (unsigned BinOp : {G_ADD, G_SUB})
lib/Target/X86/X86RegisterBankInfo.cpp 175 case TargetOpcode::G_ADD:
unittests/CodeGen/GlobalISel/CSETest.cpp 23 auto MIBAdd = B.buildInstr(TargetOpcode::G_ADD, {s16}, {MIBInput, MIBInput});
33 CSEB.buildInstr(TargetOpcode::G_ADD, {AddReg}, {MIBInput, MIBInput});
36 CSEB.buildInstr(TargetOpcode::G_ADD, {s16}, {MIBInput, MIBInput});
39 CSEB.buildInstr(TargetOpcode::G_ADD, {s16}, {MIBInput, MIBInput});
42 CSEB.buildInstr(TargetOpcode::G_ADD, {s16}, {MIBInput, MIBInput1});
50 auto MIBCF1 = CSEB.buildInstr(TargetOpcode::G_ADD, {s32}, {MIBCst, MIBCst});
84 auto MIBAdd = B.buildInstr(TargetOpcode::G_ADD, {s16}, {MIBInput, MIBInput});
93 CSEB.buildInstr(TargetOpcode::G_ADD, {s16}, {MIBInput, MIBInput});
unittests/CodeGen/GlobalISel/ConstantFoldingTest.cpp 35 CFB.buildInstr(TargetOpcode::G_ADD, {s32},
84 ConstantFoldBinOp(TargetOpcode::G_ADD, MIBCst1->getOperand(0).getReg(),
89 ConstantFoldBinOp(TargetOpcode::G_ADD, MIBCst1->getOperand(0).getReg(),
unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp 499 getActionDefinitionsBuilder(G_ADD).legalFor({{s16, s16}});
unittests/CodeGen/GlobalISel/LegalizerInfoTest.cpp 51 for (unsigned Op : {G_ADD, G_SUB}) {
60 for (unsigned opcode : {G_ADD, G_SUB}) {
92 L.setAction({G_ADD, LLT::vector(8, 8)}, Legal);
93 L.setAction({G_ADD, LLT::vector(16, 8)}, Legal);
94 L.setAction({G_ADD, LLT::vector(4, 16)}, Legal);
95 L.setAction({G_ADD, LLT::vector(8, 16)}, Legal);
96 L.setAction({G_ADD, LLT::vector(2, 32)}, Legal);
97 L.setAction({G_ADD, LLT::vector(4, 32)}, Legal);
100 G_ADD, 0, LegalizerInfo::widenToLargerTypesUnsupportedOtherwise);
102 L.setAction({G_ADD, 0, LLT::scalar(32)}, Legal);
108 EXPECT_EQ(L.getAction({G_ADD, {LLT::vector(8, 8)}}),
110 EXPECT_EQ(L.getAction({G_ADD, {LLT::vector(8, 7)}}),
112 EXPECT_EQ(L.getAction({G_ADD, {LLT::vector(2, 8)}}),
114 EXPECT_EQ(L.getAction({G_ADD, {LLT::vector(8, 32)}}),
117 EXPECT_EQ(L.getAction({G_ADD, {LLT::vector(3, 3)}}),
119 EXPECT_EQ(L.getAction({G_ADD, {LLT::vector(3, 8)}}),