|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc27452 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc21332 Msg << "Attempting to emit " << MCII.getName(Inst.getOpcode()).str()
gen/lib/Target/AMDGPU/AMDGPUGenAsmMatcher.inc23977 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/AMDGPU/AMDGPUGenMCCodeEmitter.inc50364 Msg << "Attempting to emit " << MCII.getName(Inst.getOpcode()).str()
gen/lib/Target/AMDGPU/R600GenMCCodeEmitter.inc 2321 Msg << "Attempting to emit " << MCII.getName(Inst.getOpcode()).str()
gen/lib/Target/ARM/ARMGenAsmMatcher.inc15110 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/AVR/AVRGenAsmMatcher.inc 1305 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/BPF/BPFGenAsmMatcher.inc 950 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/BPF/BPFGenMCCodeEmitter.inc 980 Msg << "Attempting to emit " << MCII.getName(Inst.getOpcode()).str()
gen/lib/Target/Hexagon/HexagonGenAsmMatcher.inc10296 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/Hexagon/HexagonGenMCCodeEmitter.inc14643 Msg << "Attempting to emit " << MCII.getName(Inst.getOpcode()).str()
gen/lib/Target/Lanai/LanaiGenAsmMatcher.inc 1089 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/MSP430/MSP430GenAsmMatcher.inc 1147 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/Mips/MipsGenAsmMatcher.inc 8123 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/PowerPC/PPCGenAsmMatcher.inc 7052 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/PowerPC/PPCGenMCCodeEmitter.inc 8510 Msg << "Attempting to emit " << MCII.getName(Inst.getOpcode()).str()
gen/lib/Target/RISCV/RISCVGenAsmMatcher.inc 2441 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/Sparc/SparcGenAsmMatcher.inc 4185 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/Sparc/SparcGenMCCodeEmitter.inc 2463 Msg << "Attempting to emit " << MCII.getName(Inst.getOpcode()).str()
gen/lib/Target/SystemZ/SystemZGenAsmMatcher.inc 5380 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/SystemZ/SystemZGenMCCodeEmitter.inc11991 Msg << "Attempting to emit " << MCII.getName(Inst.getOpcode()).str()
gen/lib/Target/WebAssembly/WebAssemblyGenAsmMatcher.inc 1149 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/X86/X86GenAsmMatcher.inc36980 << MII.getName(it->Opcode) << "\n");
lib/CodeGen/GlobalISel/LegalizerInfo.cpp 708 LLVM_DEBUG(dbgs() << MII.getName(Opcode) << " (opcode " << Opcode
722 errs() << " " << MII.getName(Opcode);
lib/CodeGen/MIRParser/MIParser.cpp 139 Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I));
lib/CodeGen/MIRPrinter.cpp 758 OS << TII->getName(MI.getOpcode());
lib/CodeGen/MachineInstr.cpp 1546 OS << TII->getName(getOpcode());
lib/CodeGen/MacroFusion.cpp 71 dbgs() << DAG.TII->getName(FirstSU.getInstr()->getOpcode()) << " - "
72 << DAG.TII->getName(SecondSU.getInstr()->getOpcode()) << '\n';);
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp 68 return TII->getName(getMachineOpcode());
lib/MC/MCInstPrinter.cpp 40 return MII.getName(Opcode);
lib/MCA/InstrBuilder.cpp 542 LLVM_DEBUG(dbgs() << "\n\t\tOpcode Name= " << MCII.getName(Opcode) << '\n');
lib/Target/AArch64/AArch64InstructionSelector.cpp 747 LLVM_DEBUG(dbgs() << "Failed to constrain " << TII.getName(I.getOpcode())
2098 LLVM_DEBUG(dbgs() << "Failed to constrain " << TII.getName(Opcode)
lib/Target/ARM/ARMInstructionSelector.cpp 223 LLVM_DEBUG(dbgs() << "Failed to constrain " << TII.getName(I.getOpcode())
lib/Target/ARM/AsmParser/ARMAsmParser.cpp10424 Inst.dump_pretty(dbgs(), MII.getName(Inst.getOpcode()));
10446 Inst.dump_pretty(dbgs(), MII.getName(Inst.getOpcode()));
11600 << ", opcode " << MII.getName(I.getOpcode()) << "\n");
lib/Target/Hexagon/HexagonConstExtenders.cpp 1664 dbgs() << "\nExtOpc: " << HII->getName(ExtOpc) << " has no rr version\n";
lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp 735 << TII.getName(Opc);
lib/Target/Hexagon/HexagonInstrInfo.cpp 4398 << getName(NewMI->getOpcode())
lib/Target/Hexagon/HexagonOptAddrMode.cpp 701 LLVM_DEBUG(dbgs() << "[Analyzing " << HII->getName(MI->getOpcode())
lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp 344 return MCII.getName(MCI.getOpcode());
lib/Target/Hexagon/MCTargetDesc/HexagonMCShuffler.cpp 39 LLVM_DEBUG(dbgs() << "Shuffling: " << MCII.getName(MI.getOpcode())
lib/Target/Hexagon/RDFGraph.cpp 227 OS << Print<NodeId>(P.Obj.Id, P.G) << ": " << P.G.getTII().getName(Opc);
lib/Target/Mips/MipsInstructionSelector.cpp 106 LLVM_DEBUG(dbgs() << "Failed to constrain " << TII.getName(I.getOpcode())
lib/Target/PowerPC/PPCVSXSwapRemoval.cpp 978 dbgs() << format(" %14s ", TII->getName(MI->getOpcode()).str().c_str());
lib/Target/SystemZ/SystemZHazardRecognizer.cpp 169 OS << TII->getName(SU->getInstr()->getOpcode());
lib/Target/X86/Disassembler/X86Disassembler.cpp 103 return MII->getName(Opcode);
lib/Target/X86/X86InstructionSelector.cpp 298 LLVM_DEBUG(dbgs() << "Failed to constrain " << TII.getName(I.getOpcode())
696 LLVM_DEBUG(dbgs() << "Failed to constrain " << TII.getName(I.getOpcode())
721 LLVM_DEBUG(dbgs() << TII.getName(I.getOpcode())
759 LLVM_DEBUG(dbgs() << "Failed to constrain " << TII.getName(I.getOpcode())
813 LLVM_DEBUG(dbgs() << "Failed to constrain " << TII.getName(I.getOpcode())
915 LLVM_DEBUG(dbgs() << "Failed to constrain " << TII.getName(I.getOpcode())
1502 LLVM_DEBUG(dbgs() << "Failed to constrain " << TII.getName(I.getOpcode())
1637 LLVM_DEBUG(dbgs() << "Failed to constrain " << TII.getName(I.getOpcode())
tools/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp 1087 const char *op_name = m_insn_info->getName(mc_insn.getOpcode()).data();
1354 const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
1806 const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
1855 const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
1935 const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
2004 const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
2054 const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
2107 const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
2193 const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
2293 const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
2332 const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
2680 const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
2796 const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
tools/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp 978 const char *op_name = m_insn_info->getName(mc_insn.getOpcode()).data();
1267 const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
1346 const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
1398 const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
1508 const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
1576 const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
1661 const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
1741 const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
1981 const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
2106 const char *op_name = m_insn_info->getName(insn.getOpcode()).data();
tools/llvm-exegesis/lib/Analysis.cpp 254 writeEscaped<kEscapeHtml>(OS, InstrInfo.getName(Instructions[0].getOpcode()));
270 writeEscaped<kEscapeHtml>(OS, InstrInfo.getName(Instr.getOpcode()));
tools/llvm-exegesis/lib/BenchmarkResult.cpp 45 Map[InstrInfo.getName(I)] = I;
160 const StringRef InstrName = State->getInstrInfo().getName(InstrNo);
tools/llvm-exegesis/lib/MCInstrDescView.cpp 100 : Description(&InstrInfo.get(Opcode)), Name(InstrInfo.getName(Opcode)) {
364 OS << MCInstrInfo.getName(MCInst.getOpcode());
tools/llvm-exegesis/llvm-exegesis.cpp 189 if (MCInstrInfo.getName(I) == OpcodeName)
256 errs() << State.getInstrInfo().getName(Opcode)
265 Twine(State.getInstrInfo().getName(Opcode)).concat(": "));
unittests/Target/ARM/MachineInstrTest.cpp 502 << MII->getName(i)