reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

    1
    2
    3
    4
    5
    6
    7
    8
    9
   10
   11
   12
   13
   14
   15
   16
   17
   18
   19
   20
   21
   22
   23
   24
   25
   26
   27
   28
   29
   30
   31
   32
   33
   34
   35
   36
   37
   38
   39
   40
   41
   42
   43
   44
   45
   46
   47
   48
   49
   50
   51
   52
   53
   54
   55
   56
   57
   58
   59
   60
   61
   62
   63
   64
   65
   66
   67
   68
   69
   70
   71
   72
   73
   74
   75
   76
   77
   78
   79
   80
   81
   82
   83
   84
   85
   86
   87
   88
   89
   90
   91
   92
   93
   94
   95
   96
   97
   98
   99
  100
  101
  102
  103
  104
  105
  106
  107
  108
  109
  110
  111
  112
  113
  114
  115
  116
  117
  118
  119
  120
  121
  122
  123
  124
  125
  126
  127
  128
  129
  130
  131
  132
  133
  134
  135
  136
  137
  138
  139
  140
  141
  142
  143
  144
  145
  146
  147
  148
  149
  150
  151
  152
  153
  154
  155
  156
  157
  158
  159
  160
  161
  162
  163
  164
  165
  166
  167
  168
  169
  170
  171
  172
  173
  174
  175
  176
  177
  178
  179
  180
  181
  182
  183
  184
  185
  186
  187
  188
  189
  190
  191
  192
  193
  194
  195
  196
  197
  198
  199
  200
  201
  202
  203
  204
  205
  206
  207
  208
  209
  210
  211
  212
  213
  214
  215
  216
  217
  218
  219
  220
  221
  222
  223
  224
  225
  226
  227
  228
  229
  230
  231
  232
  233
  234
  235
  236
  237
  238
  239
  240
  241
  242
  243
  244
  245
  246
  247
  248
  249
  250
  251
  252
  253
  254
  255
  256
  257
  258
  259
  260
  261
  262
  263
  264
  265
  266
  267
  268
  269
  270
  271
  272
  273
  274
  275
  276
  277
  278
  279
  280
  281
  282
  283
  284
  285
  286
  287
  288
  289
  290
  291
  292
  293
  294
  295
  296
  297
  298
  299
  300
  301
  302
  303
  304
  305
  306
  307
  308
  309
  310
  311
  312
  313
  314
  315
  316
  317
  318
  319
  320
  321
  322
  323
  324
  325
  326
  327
  328
  329
  330
  331
  332
  333
  334
  335
  336
  337
  338
  339
  340
  341
  342
  343
  344
  345
  346
  347
  348
  349
  350
  351
  352
  353
  354
  355
  356
  357
  358
  359
  360
  361
  362
  363
  364
  365
  366
  367
  368
  369
  370
  371
  372
  373
  374
  375
  376
  377
  378
  379
  380
  381
  382
  383
  384
  385
  386
  387
  388
  389
  390
  391
  392
  393
  394
  395
  396
  397
  398
  399
  400
  401
  402
  403
  404
  405
  406
  407
  408
  409
  410
  411
  412
  413
  414
  415
  416
  417
  418
  419
  420
  421
  422
  423
  424
  425
  426
  427
  428
  429
  430
  431
  432
  433
  434
  435
  436
  437
  438
  439
  440
  441
  442
  443
  444
  445
  446
  447
  448
  449
  450
  451
  452
  453
  454
  455
  456
  457
  458
  459
  460
  461
  462
  463
  464
  465
  466
  467
  468
  469
  470
  471
  472
  473
  474
  475
  476
  477
  478
  479
  480
  481
  482
  483
  484
  485
  486
  487
  488
  489
  490
  491
  492
  493
  494
  495
  496
  497
  498
  499
  500
  501
  502
  503
  504
  505
  506
  507
  508
  509
  510
  511
  512
  513
  514
  515
  516
  517
  518
  519
  520
  521
  522
  523
  524
  525
  526
  527
  528
  529
  530
  531
  532
  533
  534
  535
  536
  537
  538
  539
  540
  541
  542
  543
  544
  545
  546
  547
  548
  549
  550
  551
  552
  553
  554
  555
  556
  557
  558
  559
  560
  561
  562
  563
  564
  565
  566
  567
  568
  569
  570
  571
  572
  573
  574
  575
  576
  577
  578
  579
  580
  581
  582
  583
  584
  585
  586
  587
  588
  589
  590
  591
  592
  593
  594
  595
  596
  597
  598
  599
  600
  601
  602
  603
  604
  605
  606
  607
  608
  609
  610
  611
  612
  613
  614
  615
  616
  617
  618
  619
  620
  621
  622
  623
  624
  625
  626
  627
  628
  629
  630
  631
  632
  633
  634
  635
  636
  637
  638
  639
  640
  641
  642
  643
  644
  645
  646
  647
  648
  649
  650
  651
  652
  653
  654
  655
  656
  657
  658
  659
  660
  661
  662
  663
  664
  665
  666
  667
  668
  669
  670
  671
  672
  673
  674
  675
  676
  677
  678
  679
  680
  681
  682
  683
  684
  685
  686
  687
  688
  689
  690
  691
  692
  693
  694
  695
  696
  697
  698
  699
  700
  701
  702
  703
  704
  705
  706
  707
  708
  709
  710
  711
  712
  713
  714
  715
  716
  717
  718
  719
  720
  721
  722
  723
  724
  725
  726
  727
  728
  729
  730
  731
  732
  733
  734
  735
  736
  737
  738
  739
  740
  741
  742
  743
  744
  745
  746
  747
  748
  749
  750
  751
  752
  753
  754
  755
  756
  757
  758
  759
  760
  761
  762
  763
  764
  765
  766
  767
  768
  769
  770
  771
  772
  773
  774
  775
  776
  777
  778
  779
  780
  781
  782
  783
  784
  785
  786
  787
  788
  789
  790
  791
  792
  793
  794
  795
  796
  797
  798
  799
  800
  801
  802
  803
  804
  805
  806
  807
  808
  809
  810
  811
  812
  813
  814
  815
  816
  817
  818
  819
  820
  821
  822
  823
  824
  825
  826
  827
  828
  829
  830
  831
  832
  833
  834
  835
  836
  837
  838
  839
  840
  841
  842
  843
  844
  845
  846
  847
  848
  849
  850
  851
  852
  853
  854
  855
  856
  857
  858
  859
  860
  861
  862
  863
  864
  865
  866
  867
  868
  869
  870
  871
  872
  873
  874
  875
  876
  877
  878
  879
  880
  881
  882
  883
  884
  885
  886
  887
  888
  889
  890
  891
  892
  893
  894
  895
  896
  897
  898
  899
  900
  901
  902
  903
  904
  905
  906
  907
  908
  909
  910
  911
  912
  913
  914
  915
  916
  917
  918
  919
  920
  921
  922
  923
  924
  925
  926
  927
  928
  929
  930
  931
  932
  933
  934
  935
  936
  937
  938
  939
  940
  941
  942
  943
  944
  945
  946
  947
  948
  949
  950
  951
  952
  953
  954
  955
  956
  957
  958
  959
  960
  961
  962
  963
  964
  965
  966
  967
  968
  969
  970
  971
  972
  973
  974
  975
  976
  977
  978
  979
  980
  981
  982
  983
  984
  985
  986
  987
  988
  989
  990
  991
  992
  993
  994
  995
  996
  997
  998
  999
 1000
 1001
 1002
 1003
 1004
 1005
 1006
 1007
 1008
 1009
 1010
 1011
 1012
 1013
 1014
 1015
 1016
 1017
 1018
 1019
 1020
 1021
 1022
 1023
 1024
 1025
 1026
 1027
 1028
 1029
 1030
 1031
 1032
 1033
 1034
 1035
 1036
 1037
 1038
 1039
 1040
 1041
 1042
 1043
 1044
 1045
 1046
 1047
 1048
 1049
 1050
 1051
 1052
 1053
 1054
 1055
 1056
 1057
 1058
 1059
 1060
 1061
 1062
 1063
 1064
 1065
 1066
 1067
 1068
 1069
 1070
 1071
 1072
 1073
 1074
 1075
 1076
 1077
 1078
 1079
 1080
 1081
 1082
 1083
 1084
 1085
 1086
 1087
 1088
 1089
 1090
 1091
 1092
 1093
 1094
 1095
 1096
 1097
 1098
 1099
 1100
 1101
 1102
 1103
 1104
 1105
 1106
 1107
 1108
 1109
 1110
 1111
 1112
 1113
 1114
 1115
 1116
 1117
 1118
 1119
 1120
 1121
 1122
 1123
 1124
 1125
 1126
 1127
 1128
 1129
 1130
 1131
 1132
 1133
 1134
 1135
 1136
 1137
 1138
 1139
 1140
 1141
 1142
 1143
 1144
 1145
 1146
 1147
 1148
 1149
 1150
 1151
 1152
 1153
 1154
 1155
 1156
 1157
 1158
 1159
 1160
 1161
 1162
 1163
 1164
 1165
 1166
 1167
 1168
 1169
 1170
 1171
 1172
 1173
 1174
 1175
 1176
 1177
 1178
 1179
 1180
 1181
 1182
 1183
 1184
 1185
 1186
 1187
 1188
 1189
 1190
 1191
 1192
 1193
 1194
 1195
 1196
 1197
 1198
 1199
 1200
 1201
 1202
 1203
 1204
 1205
 1206
 1207
 1208
 1209
 1210
 1211
 1212
 1213
 1214
 1215
 1216
 1217
 1218
 1219
 1220
 1221
 1222
 1223
 1224
 1225
 1226
 1227
 1228
 1229
 1230
 1231
 1232
 1233
 1234
 1235
 1236
 1237
 1238
 1239
 1240
 1241
 1242
 1243
 1244
 1245
 1246
 1247
 1248
 1249
 1250
 1251
 1252
 1253
 1254
 1255
 1256
 1257
 1258
 1259
 1260
 1261
 1262
 1263
 1264
 1265
 1266
 1267
 1268
 1269
 1270
 1271
 1272
 1273
 1274
 1275
 1276
 1277
 1278
 1279
 1280
 1281
 1282
 1283
 1284
 1285
 1286
 1287
 1288
 1289
 1290
 1291
 1292
 1293
 1294
 1295
 1296
 1297
 1298
 1299
 1300
 1301
 1302
 1303
 1304
 1305
 1306
 1307
 1308
 1309
 1310
 1311
 1312
 1313
 1314
 1315
 1316
 1317
 1318
 1319
 1320
 1321
 1322
 1323
 1324
 1325
 1326
 1327
 1328
 1329
 1330
 1331
 1332
 1333
 1334
 1335
 1336
 1337
 1338
 1339
 1340
 1341
 1342
 1343
 1344
 1345
 1346
 1347
 1348
 1349
 1350
 1351
 1352
 1353
 1354
 1355
 1356
 1357
 1358
 1359
 1360
 1361
 1362
 1363
 1364
 1365
 1366
 1367
 1368
 1369
 1370
 1371
 1372
 1373
 1374
 1375
 1376
 1377
 1378
 1379
 1380
 1381
 1382
 1383
 1384
 1385
 1386
 1387
 1388
 1389
 1390
 1391
 1392
 1393
 1394
 1395
 1396
 1397
 1398
 1399
 1400
 1401
 1402
 1403
 1404
 1405
 1406
 1407
 1408
 1409
 1410
 1411
 1412
 1413
 1414
 1415
 1416
 1417
 1418
 1419
 1420
 1421
 1422
 1423
 1424
 1425
 1426
 1427
 1428
 1429
 1430
 1431
 1432
 1433
 1434
 1435
 1436
 1437
 1438
 1439
 1440
 1441
 1442
 1443
 1444
 1445
 1446
 1447
 1448
 1449
 1450
 1451
 1452
 1453
 1454
 1455
 1456
 1457
 1458
 1459
 1460
 1461
 1462
 1463
 1464
 1465
 1466
 1467
 1468
 1469
 1470
 1471
 1472
 1473
 1474
 1475
 1476
 1477
 1478
 1479
 1480
 1481
 1482
 1483
 1484
 1485
 1486
 1487
 1488
 1489
 1490
 1491
 1492
 1493
 1494
 1495
 1496
 1497
 1498
 1499
 1500
 1501
 1502
 1503
 1504
 1505
 1506
 1507
 1508
 1509
 1510
 1511
 1512
 1513
 1514
 1515
 1516
 1517
 1518
 1519
 1520
 1521
 1522
 1523
 1524
 1525
 1526
 1527
 1528
 1529
 1530
 1531
 1532
 1533
 1534
 1535
 1536
 1537
 1538
 1539
 1540
 1541
 1542
 1543
 1544
 1545
 1546
 1547
 1548
 1549
 1550
 1551
 1552
 1553
 1554
 1555
 1556
 1557
 1558
 1559
 1560
 1561
 1562
 1563
 1564
 1565
 1566
 1567
 1568
 1569
 1570
 1571
 1572
 1573
 1574
 1575
 1576
 1577
 1578
 1579
 1580
 1581
 1582
 1583
 1584
 1585
 1586
 1587
 1588
 1589
 1590
 1591
 1592
 1593
 1594
 1595
 1596
 1597
 1598
 1599
 1600
 1601
 1602
 1603
 1604
 1605
 1606
 1607
 1608
 1609
 1610
 1611
 1612
 1613
 1614
 1615
 1616
 1617
 1618
 1619
 1620
 1621
 1622
 1623
 1624
 1625
 1626
 1627
 1628
 1629
 1630
 1631
 1632
 1633
 1634
 1635
 1636
 1637
 1638
 1639
 1640
 1641
 1642
 1643
 1644
 1645
 1646
 1647
 1648
 1649
 1650
 1651
 1652
 1653
 1654
 1655
 1656
 1657
 1658
 1659
 1660
 1661
 1662
 1663
 1664
 1665
 1666
 1667
 1668
 1669
 1670
 1671
 1672
 1673
 1674
 1675
 1676
 1677
 1678
 1679
 1680
 1681
 1682
 1683
 1684
 1685
 1686
 1687
 1688
 1689
 1690
 1691
 1692
 1693
 1694
 1695
 1696
 1697
 1698
 1699
 1700
 1701
 1702
 1703
 1704
 1705
 1706
 1707
 1708
 1709
 1710
 1711
 1712
 1713
 1714
 1715
 1716
 1717
 1718
 1719
 1720
 1721
 1722
 1723
 1724
 1725
 1726
 1727
 1728
 1729
 1730
 1731
 1732
 1733
 1734
 1735
 1736
 1737
 1738
 1739
 1740
 1741
 1742
 1743
 1744
 1745
 1746
 1747
 1748
 1749
 1750
 1751
 1752
 1753
 1754
 1755
 1756
 1757
 1758
 1759
 1760
 1761
 1762
 1763
 1764
 1765
 1766
 1767
 1768
 1769
 1770
 1771
 1772
 1773
 1774
 1775
 1776
 1777
 1778
 1779
 1780
 1781
 1782
 1783
 1784
 1785
 1786
 1787
 1788
 1789
 1790
 1791
 1792
 1793
 1794
 1795
 1796
 1797
 1798
 1799
 1800
 1801
 1802
 1803
 1804
 1805
 1806
 1807
 1808
 1809
 1810
 1811
 1812
 1813
 1814
 1815
 1816
 1817
 1818
 1819
 1820
 1821
 1822
 1823
 1824
 1825
 1826
 1827
 1828
 1829
 1830
 1831
 1832
 1833
 1834
 1835
 1836
 1837
 1838
 1839
 1840
 1841
 1842
 1843
 1844
 1845
 1846
 1847
 1848
 1849
 1850
 1851
 1852
 1853
 1854
 1855
 1856
 1857
 1858
 1859
 1860
 1861
 1862
 1863
 1864
 1865
 1866
 1867
 1868
 1869
 1870
 1871
 1872
 1873
 1874
 1875
 1876
 1877
 1878
 1879
 1880
 1881
 1882
 1883
 1884
 1885
 1886
 1887
 1888
 1889
 1890
 1891
 1892
 1893
 1894
 1895
 1896
 1897
 1898
 1899
 1900
 1901
 1902
 1903
 1904
 1905
 1906
 1907
 1908
 1909
 1910
 1911
 1912
 1913
 1914
 1915
 1916
 1917
 1918
 1919
 1920
 1921
 1922
 1923
 1924
 1925
 1926
 1927
 1928
 1929
 1930
 1931
 1932
 1933
 1934
 1935
 1936
 1937
 1938
 1939
 1940
 1941
 1942
 1943
 1944
 1945
 1946
 1947
 1948
 1949
 1950
 1951
 1952
 1953
 1954
 1955
 1956
 1957
 1958
 1959
 1960
 1961
 1962
 1963
 1964
 1965
 1966
 1967
 1968
 1969
 1970
 1971
 1972
 1973
 1974
 1975
 1976
 1977
 1978
 1979
 1980
 1981
 1982
 1983
 1984
 1985
 1986
 1987
 1988
 1989
 1990
 1991
 1992
 1993
 1994
 1995
 1996
 1997
 1998
 1999
 2000
 2001
 2002
 2003
 2004
 2005
 2006
 2007
 2008
 2009
 2010
 2011
 2012
 2013
 2014
 2015
 2016
 2017
 2018
 2019
 2020
 2021
 2022
 2023
 2024
 2025
 2026
 2027
 2028
 2029
 2030
 2031
 2032
 2033
 2034
 2035
 2036
 2037
 2038
 2039
 2040
 2041
 2042
 2043
 2044
 2045
 2046
 2047
 2048
 2049
 2050
 2051
 2052
 2053
 2054
 2055
 2056
 2057
 2058
 2059
 2060
 2061
 2062
 2063
 2064
 2065
 2066
 2067
 2068
 2069
 2070
 2071
 2072
 2073
 2074
 2075
 2076
 2077
 2078
 2079
 2080
 2081
 2082
 2083
 2084
 2085
 2086
 2087
 2088
 2089
 2090
 2091
 2092
 2093
 2094
 2095
 2096
 2097
 2098
 2099
 2100
 2101
 2102
 2103
 2104
 2105
 2106
 2107
 2108
 2109
 2110
 2111
 2112
 2113
 2114
 2115
 2116
 2117
 2118
 2119
 2120
 2121
 2122
 2123
 2124
 2125
 2126
 2127
 2128
 2129
 2130
 2131
 2132
 2133
 2134
 2135
 2136
 2137
 2138
 2139
 2140
 2141
 2142
 2143
 2144
 2145
 2146
 2147
 2148
 2149
 2150
 2151
 2152
 2153
 2154
 2155
 2156
 2157
 2158
 2159
 2160
 2161
 2162
 2163
 2164
 2165
 2166
 2167
 2168
 2169
 2170
 2171
 2172
 2173
 2174
 2175
 2176
 2177
 2178
 2179
 2180
 2181
 2182
 2183
 2184
 2185
 2186
 2187
 2188
 2189
 2190
 2191
 2192
 2193
 2194
 2195
 2196
 2197
 2198
 2199
 2200
 2201
 2202
 2203
 2204
 2205
 2206
 2207
 2208
 2209
 2210
 2211
 2212
 2213
 2214
 2215
 2216
 2217
 2218
 2219
 2220
 2221
 2222
 2223
 2224
 2225
 2226
 2227
 2228
 2229
 2230
 2231
 2232
 2233
 2234
 2235
 2236
 2237
 2238
 2239
 2240
 2241
 2242
 2243
 2244
 2245
 2246
 2247
 2248
 2249
 2250
 2251
 2252
 2253
 2254
 2255
 2256
 2257
 2258
 2259
 2260
 2261
 2262
 2263
 2264
 2265
 2266
 2267
 2268
 2269
 2270
 2271
 2272
 2273
 2274
 2275
 2276
 2277
 2278
 2279
 2280
 2281
 2282
 2283
 2284
 2285
 2286
 2287
 2288
 2289
 2290
 2291
 2292
 2293
 2294
 2295
 2296
 2297
 2298
 2299
 2300
 2301
 2302
 2303
 2304
 2305
 2306
 2307
 2308
 2309
 2310
 2311
 2312
 2313
 2314
 2315
 2316
 2317
 2318
 2319
 2320
 2321
 2322
 2323
 2324
 2325
 2326
 2327
 2328
 2329
 2330
 2331
 2332
 2333
 2334
 2335
 2336
 2337
 2338
 2339
 2340
 2341
 2342
 2343
 2344
 2345
 2346
 2347
 2348
 2349
 2350
 2351
 2352
 2353
 2354
 2355
 2356
 2357
 2358
 2359
 2360
 2361
 2362
 2363
 2364
 2365
 2366
 2367
 2368
 2369
 2370
 2371
 2372
 2373
 2374
 2375
 2376
 2377
 2378
 2379
 2380
 2381
 2382
 2383
 2384
 2385
 2386
 2387
 2388
 2389
 2390
 2391
 2392
 2393
 2394
 2395
 2396
 2397
 2398
 2399
 2400
 2401
 2402
 2403
 2404
 2405
 2406
 2407
 2408
 2409
 2410
 2411
 2412
 2413
 2414
 2415
 2416
 2417
 2418
 2419
 2420
 2421
 2422
 2423
 2424
 2425
 2426
 2427
 2428
 2429
 2430
 2431
 2432
 2433
 2434
 2435
 2436
 2437
 2438
 2439
 2440
 2441
 2442
 2443
 2444
 2445
 2446
 2447
 2448
 2449
 2450
 2451
 2452
 2453
 2454
 2455
 2456
 2457
 2458
 2459
 2460
 2461
 2462
 2463
 2464
 2465
 2466
 2467
 2468
 2469
 2470
 2471
 2472
 2473
 2474
 2475
 2476
 2477
 2478
 2479
 2480
 2481
 2482
 2483
 2484
 2485
 2486
 2487
 2488
 2489
 2490
 2491
 2492
 2493
 2494
 2495
 2496
 2497
 2498
 2499
 2500
 2501
 2502
 2503
 2504
 2505
 2506
 2507
 2508
 2509
 2510
 2511
 2512
 2513
 2514
 2515
 2516
 2517
 2518
 2519
 2520
 2521
 2522
 2523
 2524
 2525
 2526
 2527
 2528
 2529
 2530
 2531
 2532
 2533
 2534
 2535
 2536
 2537
 2538
 2539
 2540
 2541
 2542
 2543
 2544
 2545
 2546
 2547
 2548
 2549
 2550
 2551
 2552
 2553
 2554
 2555
 2556
 2557
 2558
 2559
 2560
 2561
 2562
 2563
 2564
 2565
 2566
 2567
 2568
 2569
 2570
 2571
 2572
 2573
 2574
 2575
 2576
 2577
 2578
 2579
 2580
 2581
 2582
 2583
 2584
 2585
 2586
 2587
 2588
 2589
 2590
 2591
 2592
 2593
 2594
 2595
 2596
 2597
 2598
 2599
 2600
 2601
 2602
 2603
 2604
 2605
 2606
 2607
 2608
 2609
 2610
 2611
 2612
 2613
 2614
 2615
 2616
 2617
 2618
 2619
 2620
 2621
 2622
 2623
 2624
 2625
 2626
 2627
 2628
 2629
 2630
 2631
 2632
 2633
 2634
 2635
 2636
 2637
 2638
 2639
 2640
 2641
 2642
 2643
 2644
 2645
 2646
 2647
 2648
 2649
 2650
 2651
 2652
 2653
 2654
 2655
 2656
 2657
 2658
 2659
 2660
 2661
 2662
 2663
 2664
 2665
 2666
 2667
 2668
 2669
 2670
 2671
 2672
 2673
 2674
 2675
 2676
 2677
 2678
 2679
 2680
 2681
 2682
 2683
 2684
 2685
 2686
 2687
 2688
 2689
 2690
 2691
 2692
 2693
 2694
 2695
 2696
 2697
 2698
 2699
 2700
 2701
 2702
 2703
 2704
 2705
 2706
 2707
 2708
 2709
 2710
 2711
 2712
 2713
 2714
 2715
 2716
 2717
 2718
 2719
 2720
 2721
 2722
 2723
 2724
 2725
 2726
 2727
 2728
 2729
 2730
 2731
 2732
 2733
 2734
 2735
 2736
 2737
 2738
 2739
 2740
 2741
 2742
 2743
 2744
 2745
 2746
 2747
 2748
 2749
 2750
 2751
 2752
 2753
 2754
 2755
 2756
 2757
 2758
 2759
 2760
 2761
 2762
 2763
 2764
 2765
 2766
 2767
 2768
 2769
 2770
 2771
 2772
 2773
 2774
 2775
 2776
 2777
 2778
 2779
 2780
 2781
 2782
 2783
 2784
 2785
 2786
 2787
 2788
 2789
 2790
 2791
 2792
 2793
 2794
 2795
 2796
 2797
 2798
 2799
 2800
 2801
 2802
 2803
 2804
 2805
 2806
 2807
 2808
 2809
 2810
 2811
 2812
 2813
 2814
 2815
 2816
 2817
 2818
 2819
 2820
 2821
 2822
 2823
 2824
 2825
 2826
 2827
 2828
 2829
 2830
 2831
 2832
 2833
 2834
 2835
 2836
 2837
 2838
 2839
 2840
 2841
 2842
 2843
 2844
 2845
 2846
 2847
 2848
 2849
 2850
 2851
 2852
 2853
 2854
 2855
 2856
 2857
 2858
 2859
 2860
 2861
 2862
 2863
 2864
 2865
 2866
 2867
 2868
 2869
 2870
 2871
 2872
 2873
 2874
 2875
 2876
 2877
 2878
 2879
 2880
 2881
 2882
 2883
 2884
 2885
 2886
 2887
 2888
 2889
 2890
 2891
 2892
 2893
 2894
 2895
 2896
 2897
 2898
 2899
 2900
 2901
 2902
 2903
 2904
 2905
 2906
 2907
 2908
 2909
 2910
 2911
 2912
 2913
 2914
 2915
 2916
 2917
 2918
 2919
 2920
 2921
 2922
 2923
 2924
 2925
 2926
 2927
 2928
 2929
 2930
 2931
 2932
 2933
 2934
 2935
 2936
 2937
 2938
 2939
 2940
 2941
 2942
 2943
 2944
 2945
 2946
 2947
 2948
 2949
 2950
 2951
 2952
 2953
 2954
 2955
 2956
 2957
 2958
 2959
 2960
 2961
 2962
 2963
 2964
 2965
 2966
 2967
 2968
 2969
 2970
 2971
 2972
 2973
 2974
 2975
 2976
 2977
 2978
 2979
 2980
 2981
 2982
 2983
 2984
 2985
 2986
 2987
 2988
 2989
 2990
 2991
 2992
 2993
 2994
 2995
 2996
 2997
 2998
 2999
 3000
 3001
 3002
 3003
 3004
 3005
 3006
 3007
 3008
 3009
 3010
 3011
 3012
 3013
 3014
 3015
 3016
 3017
 3018
 3019
 3020
 3021
 3022
 3023
 3024
 3025
 3026
 3027
 3028
 3029
 3030
 3031
 3032
 3033
 3034
 3035
 3036
 3037
 3038
 3039
 3040
 3041
 3042
 3043
 3044
 3045
 3046
 3047
 3048
 3049
 3050
 3051
 3052
 3053
 3054
 3055
 3056
 3057
 3058
 3059
 3060
 3061
 3062
 3063
 3064
 3065
 3066
 3067
 3068
 3069
 3070
 3071
 3072
 3073
 3074
 3075
 3076
 3077
 3078
 3079
 3080
 3081
 3082
 3083
 3084
 3085
 3086
 3087
 3088
 3089
 3090
 3091
 3092
 3093
 3094
 3095
 3096
 3097
 3098
 3099
 3100
 3101
 3102
 3103
 3104
 3105
 3106
 3107
 3108
 3109
 3110
 3111
 3112
 3113
 3114
 3115
 3116
 3117
 3118
 3119
 3120
 3121
 3122
 3123
 3124
 3125
 3126
 3127
 3128
 3129
 3130
 3131
 3132
 3133
 3134
 3135
 3136
 3137
 3138
 3139
 3140
 3141
 3142
 3143
 3144
 3145
 3146
 3147
 3148
 3149
 3150
 3151
 3152
 3153
 3154
 3155
 3156
 3157
 3158
 3159
 3160
 3161
 3162
 3163
 3164
 3165
 3166
 3167
 3168
 3169
 3170
 3171
 3172
 3173
 3174
 3175
 3176
 3177
 3178
 3179
 3180
 3181
 3182
 3183
 3184
 3185
 3186
 3187
 3188
 3189
 3190
 3191
 3192
 3193
 3194
 3195
 3196
 3197
 3198
 3199
 3200
 3201
 3202
 3203
 3204
 3205
 3206
 3207
 3208
 3209
 3210
 3211
 3212
 3213
 3214
 3215
 3216
 3217
 3218
 3219
 3220
 3221
 3222
 3223
 3224
 3225
 3226
 3227
 3228
 3229
 3230
 3231
 3232
 3233
 3234
 3235
 3236
 3237
 3238
 3239
 3240
 3241
 3242
 3243
 3244
 3245
 3246
 3247
 3248
 3249
 3250
 3251
 3252
 3253
 3254
 3255
 3256
 3257
 3258
 3259
 3260
 3261
 3262
 3263
 3264
 3265
 3266
 3267
 3268
 3269
 3270
 3271
 3272
 3273
 3274
 3275
 3276
 3277
 3278
 3279
 3280
 3281
 3282
 3283
 3284
 3285
 3286
 3287
 3288
 3289
 3290
 3291
 3292
 3293
 3294
 3295
 3296
 3297
 3298
 3299
 3300
 3301
 3302
 3303
 3304
 3305
 3306
 3307
 3308
 3309
 3310
 3311
 3312
 3313
 3314
 3315
 3316
 3317
 3318
 3319
 3320
 3321
 3322
 3323
 3324
 3325
 3326
 3327
 3328
 3329
 3330
 3331
 3332
 3333
 3334
 3335
 3336
 3337
 3338
 3339
 3340
 3341
 3342
 3343
 3344
 3345
 3346
 3347
 3348
 3349
 3350
 3351
 3352
 3353
 3354
 3355
 3356
 3357
 3358
 3359
 3360
 3361
 3362
 3363
 3364
 3365
 3366
 3367
 3368
 3369
 3370
 3371
 3372
 3373
 3374
 3375
 3376
 3377
 3378
 3379
 3380
 3381
 3382
 3383
 3384
 3385
 3386
 3387
 3388
 3389
 3390
 3391
 3392
 3393
 3394
 3395
 3396
 3397
 3398
 3399
 3400
 3401
 3402
 3403
 3404
 3405
 3406
 3407
 3408
 3409
 3410
 3411
 3412
 3413
 3414
 3415
 3416
 3417
 3418
 3419
 3420
 3421
 3422
 3423
 3424
 3425
 3426
 3427
 3428
 3429
 3430
 3431
 3432
 3433
 3434
 3435
 3436
 3437
 3438
 3439
 3440
 3441
 3442
 3443
 3444
 3445
 3446
 3447
 3448
 3449
 3450
 3451
 3452
 3453
 3454
 3455
 3456
 3457
 3458
 3459
 3460
 3461
 3462
 3463
 3464
 3465
 3466
 3467
 3468
 3469
 3470
 3471
 3472
 3473
 3474
 3475
 3476
 3477
 3478
 3479
 3480
 3481
 3482
 3483
 3484
 3485
 3486
 3487
 3488
 3489
 3490
 3491
 3492
 3493
 3494
 3495
 3496
 3497
 3498
 3499
 3500
 3501
 3502
 3503
 3504
 3505
 3506
 3507
 3508
 3509
 3510
 3511
 3512
 3513
 3514
 3515
 3516
 3517
 3518
 3519
 3520
 3521
 3522
 3523
 3524
 3525
 3526
 3527
 3528
 3529
 3530
 3531
 3532
 3533
 3534
 3535
 3536
 3537
 3538
 3539
 3540
 3541
 3542
 3543
 3544
 3545
 3546
 3547
 3548
 3549
 3550
 3551
 3552
 3553
 3554
 3555
 3556
 3557
 3558
 3559
 3560
 3561
 3562
 3563
 3564
 3565
 3566
 3567
 3568
 3569
 3570
 3571
 3572
 3573
 3574
 3575
 3576
 3577
 3578
 3579
 3580
 3581
 3582
 3583
 3584
 3585
 3586
 3587
 3588
 3589
 3590
 3591
 3592
 3593
 3594
 3595
 3596
 3597
 3598
 3599
 3600
 3601
 3602
 3603
 3604
 3605
 3606
 3607
 3608
 3609
 3610
 3611
 3612
 3613
 3614
 3615
 3616
 3617
 3618
 3619
 3620
 3621
 3622
 3623
 3624
 3625
 3626
 3627
 3628
 3629
 3630
 3631
 3632
 3633
 3634
 3635
 3636
 3637
 3638
 3639
 3640
 3641
 3642
 3643
 3644
 3645
 3646
 3647
 3648
 3649
 3650
 3651
 3652
 3653
 3654
 3655
 3656
 3657
 3658
 3659
 3660
 3661
 3662
 3663
 3664
 3665
 3666
 3667
 3668
 3669
 3670
 3671
 3672
 3673
 3674
 3675
 3676
 3677
 3678
 3679
 3680
 3681
 3682
 3683
 3684
 3685
 3686
 3687
 3688
 3689
 3690
 3691
 3692
 3693
 3694
 3695
 3696
 3697
 3698
 3699
 3700
 3701
 3702
 3703
 3704
 3705
 3706
 3707
 3708
 3709
 3710
 3711
 3712
 3713
 3714
 3715
 3716
 3717
 3718
 3719
 3720
 3721
 3722
 3723
 3724
 3725
 3726
 3727
 3728
 3729
 3730
 3731
 3732
 3733
 3734
 3735
 3736
 3737
 3738
 3739
 3740
 3741
 3742
 3743
 3744
 3745
 3746
 3747
 3748
 3749
 3750
 3751
 3752
 3753
 3754
 3755
 3756
 3757
 3758
 3759
 3760
 3761
 3762
 3763
 3764
 3765
 3766
 3767
 3768
 3769
 3770
 3771
 3772
 3773
 3774
 3775
 3776
 3777
 3778
 3779
 3780
 3781
 3782
 3783
 3784
 3785
 3786
 3787
 3788
 3789
 3790
 3791
 3792
 3793
 3794
 3795
 3796
 3797
 3798
 3799
 3800
 3801
 3802
 3803
 3804
 3805
 3806
 3807
 3808
 3809
 3810
 3811
 3812
 3813
 3814
 3815
 3816
 3817
 3818
 3819
 3820
 3821
 3822
 3823
 3824
 3825
 3826
 3827
 3828
 3829
 3830
 3831
 3832
 3833
 3834
 3835
 3836
 3837
 3838
 3839
 3840
 3841
 3842
 3843
 3844
 3845
 3846
 3847
 3848
 3849
 3850
 3851
 3852
 3853
 3854
 3855
 3856
 3857
 3858
 3859
 3860
 3861
 3862
 3863
 3864
 3865
 3866
 3867
 3868
 3869
 3870
 3871
 3872
 3873
 3874
 3875
 3876
 3877
 3878
 3879
 3880
 3881
 3882
 3883
 3884
 3885
 3886
 3887
 3888
 3889
 3890
 3891
 3892
 3893
 3894
 3895
 3896
 3897
 3898
 3899
 3900
 3901
 3902
 3903
 3904
 3905
 3906
 3907
 3908
 3909
 3910
 3911
 3912
 3913
 3914
 3915
 3916
 3917
 3918
 3919
 3920
 3921
 3922
 3923
 3924
 3925
 3926
 3927
 3928
 3929
 3930
 3931
 3932
 3933
 3934
 3935
 3936
 3937
 3938
 3939
 3940
 3941
 3942
 3943
 3944
 3945
 3946
 3947
 3948
 3949
 3950
 3951
 3952
 3953
 3954
 3955
 3956
 3957
 3958
 3959
 3960
 3961
 3962
 3963
 3964
 3965
 3966
 3967
 3968
 3969
 3970
 3971
 3972
 3973
 3974
 3975
 3976
 3977
 3978
 3979
 3980
 3981
 3982
 3983
 3984
 3985
 3986
 3987
 3988
 3989
 3990
 3991
 3992
 3993
 3994
 3995
 3996
 3997
 3998
 3999
 4000
 4001
 4002
 4003
 4004
 4005
 4006
 4007
 4008
 4009
 4010
 4011
 4012
 4013
 4014
 4015
 4016
 4017
 4018
 4019
 4020
 4021
 4022
 4023
 4024
 4025
 4026
 4027
 4028
 4029
 4030
 4031
 4032
 4033
 4034
 4035
 4036
 4037
 4038
 4039
 4040
 4041
 4042
 4043
 4044
 4045
 4046
 4047
 4048
 4049
 4050
 4051
 4052
 4053
 4054
 4055
 4056
 4057
 4058
 4059
 4060
 4061
 4062
 4063
 4064
 4065
 4066
 4067
 4068
 4069
 4070
 4071
 4072
 4073
 4074
 4075
 4076
 4077
 4078
 4079
 4080
 4081
 4082
 4083
 4084
 4085
 4086
 4087
 4088
 4089
 4090
 4091
 4092
 4093
 4094
 4095
 4096
 4097
 4098
 4099
 4100
 4101
 4102
 4103
 4104
 4105
 4106
 4107
 4108
 4109
 4110
 4111
 4112
 4113
 4114
 4115
 4116
 4117
 4118
 4119
 4120
 4121
 4122
 4123
 4124
 4125
 4126
 4127
 4128
 4129
 4130
 4131
 4132
 4133
 4134
 4135
 4136
 4137
 4138
 4139
 4140
 4141
 4142
 4143
 4144
 4145
 4146
 4147
 4148
 4149
 4150
 4151
 4152
 4153
 4154
 4155
 4156
 4157
 4158
 4159
 4160
 4161
 4162
 4163
 4164
 4165
 4166
 4167
 4168
 4169
 4170
 4171
 4172
 4173
 4174
 4175
 4176
 4177
 4178
 4179
 4180
 4181
 4182
 4183
 4184
 4185
 4186
 4187
 4188
 4189
 4190
 4191
 4192
 4193
 4194
 4195
 4196
 4197
 4198
 4199
 4200
 4201
 4202
 4203
 4204
 4205
 4206
 4207
 4208
 4209
 4210
 4211
 4212
 4213
 4214
 4215
 4216
 4217
 4218
 4219
 4220
 4221
 4222
 4223
 4224
 4225
 4226
 4227
 4228
 4229
 4230
 4231
 4232
 4233
 4234
 4235
 4236
 4237
 4238
 4239
 4240
 4241
 4242
 4243
 4244
 4245
 4246
 4247
 4248
 4249
 4250
 4251
 4252
 4253
 4254
 4255
 4256
 4257
 4258
 4259
 4260
 4261
 4262
 4263
 4264
 4265
 4266
 4267
 4268
 4269
 4270
 4271
 4272
 4273
 4274
 4275
 4276
 4277
 4278
 4279
 4280
 4281
 4282
 4283
 4284
 4285
 4286
 4287
 4288
 4289
 4290
 4291
 4292
 4293
 4294
 4295
 4296
 4297
 4298
 4299
 4300
 4301
 4302
 4303
 4304
 4305
 4306
 4307
 4308
 4309
 4310
 4311
 4312
 4313
 4314
 4315
 4316
 4317
 4318
 4319
 4320
 4321
 4322
 4323
 4324
 4325
 4326
 4327
 4328
 4329
 4330
 4331
 4332
 4333
 4334
 4335
 4336
 4337
 4338
 4339
 4340
 4341
 4342
 4343
 4344
 4345
 4346
 4347
 4348
 4349
 4350
 4351
 4352
 4353
 4354
 4355
 4356
 4357
 4358
 4359
 4360
 4361
 4362
 4363
 4364
 4365
 4366
 4367
 4368
 4369
 4370
 4371
 4372
 4373
 4374
 4375
 4376
 4377
 4378
 4379
 4380
 4381
 4382
 4383
 4384
 4385
 4386
 4387
 4388
 4389
 4390
 4391
 4392
 4393
 4394
 4395
 4396
 4397
 4398
 4399
 4400
 4401
 4402
 4403
 4404
 4405
 4406
 4407
 4408
 4409
 4410
 4411
 4412
 4413
 4414
 4415
 4416
 4417
 4418
 4419
 4420
 4421
 4422
 4423
 4424
 4425
 4426
 4427
 4428
 4429
 4430
 4431
 4432
 4433
 4434
 4435
 4436
 4437
 4438
 4439
 4440
 4441
 4442
 4443
 4444
 4445
 4446
 4447
 4448
 4449
 4450
 4451
 4452
 4453
 4454
 4455
 4456
 4457
 4458
 4459
 4460
 4461
 4462
 4463
 4464
 4465
 4466
 4467
 4468
 4469
 4470
 4471
 4472
 4473
 4474
 4475
 4476
 4477
 4478
 4479
 4480
 4481
 4482
 4483
 4484
 4485
 4486
 4487
 4488
 4489
 4490
 4491
 4492
 4493
 4494
 4495
 4496
 4497
 4498
 4499
 4500
 4501
 4502
 4503
 4504
 4505
 4506
 4507
 4508
 4509
 4510
 4511
 4512
 4513
 4514
 4515
 4516
 4517
 4518
 4519
 4520
 4521
 4522
 4523
 4524
 4525
 4526
 4527
 4528
 4529
 4530
 4531
 4532
 4533
 4534
 4535
 4536
 4537
 4538
 4539
 4540
 4541
 4542
 4543
 4544
 4545
 4546
 4547
 4548
 4549
 4550
 4551
 4552
 4553
 4554
 4555
 4556
 4557
 4558
 4559
 4560
 4561
 4562
 4563
 4564
 4565
 4566
 4567
 4568
 4569
 4570
 4571
 4572
 4573
 4574
 4575
 4576
 4577
 4578
 4579
 4580
 4581
 4582
 4583
 4584
 4585
 4586
 4587
 4588
 4589
 4590
 4591
 4592
 4593
 4594
 4595
 4596
 4597
 4598
 4599
 4600
 4601
 4602
 4603
 4604
 4605
 4606
 4607
 4608
 4609
 4610
 4611
 4612
 4613
 4614
 4615
 4616
 4617
 4618
 4619
 4620
 4621
 4622
 4623
 4624
 4625
 4626
 4627
 4628
 4629
 4630
 4631
 4632
 4633
 4634
 4635
 4636
 4637
 4638
 4639
 4640
 4641
 4642
 4643
 4644
 4645
 4646
 4647
 4648
 4649
 4650
 4651
 4652
 4653
 4654
 4655
 4656
 4657
 4658
 4659
 4660
 4661
 4662
 4663
 4664
 4665
 4666
 4667
 4668
 4669
 4670
 4671
 4672
 4673
 4674
 4675
 4676
 4677
 4678
 4679
 4680
 4681
 4682
 4683
 4684
 4685
 4686
 4687
 4688
 4689
 4690
 4691
 4692
 4693
 4694
 4695
 4696
 4697
 4698
 4699
 4700
 4701
 4702
 4703
 4704
 4705
 4706
 4707
 4708
 4709
 4710
 4711
 4712
 4713
 4714
 4715
 4716
 4717
 4718
 4719
 4720
 4721
 4722
 4723
 4724
 4725
 4726
 4727
 4728
 4729
 4730
 4731
 4732
 4733
 4734
 4735
 4736
 4737
 4738
 4739
 4740
 4741
 4742
 4743
 4744
 4745
 4746
 4747
 4748
 4749
 4750
 4751
 4752
 4753
 4754
 4755
 4756
 4757
 4758
 4759
 4760
 4761
 4762
 4763
 4764
 4765
 4766
 4767
 4768
 4769
 4770
 4771
 4772
 4773
 4774
 4775
 4776
 4777
 4778
 4779
 4780
 4781
 4782
 4783
 4784
 4785
 4786
 4787
 4788
 4789
 4790
 4791
 4792
 4793
 4794
 4795
 4796
 4797
 4798
 4799
 4800
 4801
 4802
 4803
 4804
 4805
 4806
 4807
 4808
 4809
 4810
 4811
 4812
 4813
 4814
 4815
 4816
 4817
 4818
 4819
 4820
 4821
 4822
 4823
 4824
 4825
 4826
 4827
 4828
 4829
 4830
 4831
 4832
 4833
 4834
 4835
 4836
 4837
 4838
 4839
 4840
 4841
 4842
 4843
 4844
 4845
 4846
 4847
 4848
 4849
 4850
 4851
 4852
 4853
 4854
 4855
 4856
 4857
 4858
 4859
 4860
 4861
 4862
 4863
 4864
 4865
 4866
 4867
 4868
 4869
 4870
 4871
 4872
 4873
 4874
 4875
 4876
 4877
 4878
 4879
 4880
 4881
 4882
 4883
 4884
 4885
 4886
 4887
 4888
 4889
 4890
 4891
 4892
 4893
 4894
 4895
 4896
 4897
 4898
 4899
 4900
 4901
 4902
 4903
 4904
 4905
 4906
 4907
 4908
 4909
 4910
 4911
 4912
 4913
 4914
 4915
 4916
 4917
 4918
 4919
 4920
 4921
 4922
 4923
 4924
 4925
 4926
 4927
 4928
 4929
 4930
 4931
 4932
 4933
 4934
 4935
 4936
 4937
 4938
 4939
 4940
 4941
 4942
 4943
 4944
 4945
 4946
 4947
 4948
 4949
 4950
 4951
 4952
 4953
 4954
 4955
 4956
 4957
 4958
 4959
 4960
 4961
 4962
 4963
 4964
 4965
 4966
 4967
 4968
 4969
 4970
 4971
 4972
 4973
 4974
 4975
 4976
 4977
 4978
 4979
 4980
 4981
 4982
 4983
 4984
 4985
 4986
 4987
 4988
 4989
 4990
 4991
 4992
 4993
 4994
 4995
 4996
 4997
 4998
 4999
 5000
 5001
 5002
 5003
 5004
 5005
 5006
 5007
 5008
 5009
 5010
 5011
 5012
 5013
 5014
 5015
 5016
 5017
 5018
 5019
 5020
 5021
 5022
 5023
 5024
 5025
 5026
 5027
 5028
 5029
 5030
 5031
 5032
 5033
 5034
 5035
 5036
 5037
 5038
 5039
 5040
 5041
 5042
 5043
 5044
 5045
 5046
 5047
 5048
 5049
 5050
 5051
 5052
 5053
 5054
 5055
 5056
 5057
 5058
 5059
 5060
 5061
 5062
 5063
 5064
 5065
 5066
 5067
 5068
 5069
 5070
 5071
 5072
 5073
 5074
 5075
 5076
 5077
 5078
 5079
 5080
 5081
 5082
 5083
 5084
 5085
 5086
 5087
 5088
 5089
 5090
 5091
 5092
 5093
 5094
 5095
 5096
 5097
 5098
 5099
 5100
 5101
 5102
 5103
 5104
 5105
 5106
 5107
 5108
 5109
 5110
 5111
 5112
 5113
 5114
 5115
 5116
 5117
 5118
 5119
 5120
 5121
 5122
 5123
 5124
 5125
 5126
 5127
 5128
 5129
 5130
 5131
 5132
 5133
 5134
 5135
 5136
 5137
 5138
 5139
 5140
 5141
 5142
 5143
 5144
 5145
 5146
 5147
 5148
 5149
 5150
 5151
 5152
 5153
 5154
 5155
 5156
 5157
 5158
 5159
 5160
 5161
 5162
 5163
 5164
 5165
 5166
 5167
 5168
 5169
 5170
 5171
 5172
 5173
 5174
 5175
 5176
 5177
 5178
 5179
 5180
 5181
 5182
 5183
 5184
 5185
 5186
 5187
 5188
 5189
 5190
 5191
 5192
 5193
 5194
 5195
 5196
 5197
 5198
 5199
 5200
 5201
 5202
 5203
 5204
 5205
 5206
 5207
 5208
 5209
 5210
 5211
 5212
 5213
 5214
 5215
 5216
 5217
 5218
 5219
 5220
 5221
 5222
 5223
 5224
 5225
 5226
 5227
 5228
 5229
 5230
 5231
 5232
 5233
 5234
 5235
 5236
 5237
 5238
 5239
 5240
 5241
 5242
 5243
 5244
 5245
 5246
 5247
 5248
 5249
 5250
 5251
 5252
 5253
 5254
 5255
 5256
 5257
 5258
 5259
 5260
 5261
 5262
 5263
 5264
 5265
 5266
 5267
 5268
 5269
 5270
 5271
 5272
 5273
 5274
 5275
 5276
 5277
 5278
 5279
 5280
 5281
 5282
 5283
 5284
 5285
 5286
 5287
 5288
 5289
 5290
 5291
 5292
 5293
 5294
 5295
 5296
 5297
 5298
 5299
 5300
 5301
 5302
 5303
 5304
 5305
 5306
 5307
 5308
 5309
 5310
 5311
 5312
 5313
 5314
 5315
 5316
 5317
 5318
 5319
 5320
 5321
 5322
 5323
 5324
 5325
 5326
 5327
 5328
 5329
 5330
 5331
 5332
 5333
 5334
 5335
 5336
 5337
 5338
 5339
 5340
 5341
 5342
 5343
 5344
 5345
 5346
 5347
 5348
 5349
 5350
 5351
 5352
 5353
 5354
 5355
 5356
 5357
 5358
 5359
 5360
 5361
 5362
 5363
 5364
 5365
 5366
 5367
 5368
 5369
 5370
 5371
 5372
 5373
 5374
 5375
 5376
 5377
 5378
 5379
 5380
 5381
 5382
 5383
 5384
 5385
 5386
 5387
 5388
 5389
 5390
 5391
 5392
 5393
 5394
 5395
 5396
 5397
 5398
 5399
 5400
 5401
 5402
 5403
 5404
 5405
 5406
 5407
 5408
 5409
 5410
 5411
 5412
 5413
 5414
 5415
 5416
 5417
 5418
 5419
 5420
 5421
 5422
 5423
 5424
 5425
 5426
 5427
 5428
 5429
 5430
 5431
 5432
 5433
 5434
 5435
 5436
 5437
 5438
 5439
 5440
 5441
 5442
 5443
 5444
 5445
 5446
 5447
 5448
 5449
 5450
 5451
 5452
 5453
 5454
 5455
 5456
 5457
 5458
 5459
 5460
 5461
 5462
 5463
 5464
 5465
 5466
 5467
 5468
 5469
 5470
 5471
 5472
 5473
 5474
 5475
 5476
 5477
 5478
 5479
 5480
 5481
 5482
 5483
 5484
 5485
 5486
 5487
 5488
 5489
 5490
 5491
 5492
 5493
 5494
 5495
 5496
 5497
 5498
 5499
 5500
 5501
 5502
 5503
 5504
 5505
 5506
 5507
 5508
 5509
 5510
 5511
 5512
 5513
 5514
 5515
 5516
 5517
 5518
 5519
 5520
 5521
 5522
 5523
 5524
 5525
 5526
 5527
 5528
 5529
 5530
 5531
 5532
 5533
 5534
 5535
 5536
 5537
 5538
 5539
 5540
 5541
 5542
 5543
 5544
 5545
 5546
 5547
 5548
 5549
 5550
 5551
 5552
 5553
 5554
 5555
 5556
 5557
 5558
 5559
 5560
 5561
 5562
 5563
 5564
 5565
 5566
 5567
 5568
 5569
 5570
 5571
 5572
 5573
 5574
 5575
 5576
 5577
 5578
 5579
 5580
 5581
 5582
 5583
 5584
 5585
 5586
 5587
 5588
 5589
 5590
 5591
 5592
 5593
 5594
 5595
 5596
 5597
 5598
 5599
 5600
 5601
 5602
 5603
 5604
 5605
 5606
 5607
 5608
 5609
 5610
 5611
 5612
 5613
 5614
 5615
 5616
 5617
 5618
 5619
 5620
 5621
 5622
 5623
 5624
 5625
 5626
 5627
 5628
 5629
 5630
 5631
 5632
 5633
 5634
 5635
 5636
 5637
 5638
 5639
 5640
 5641
 5642
 5643
 5644
 5645
 5646
 5647
 5648
 5649
 5650
 5651
 5652
 5653
 5654
 5655
 5656
 5657
 5658
 5659
 5660
 5661
 5662
 5663
 5664
 5665
 5666
 5667
 5668
 5669
 5670
 5671
 5672
 5673
 5674
 5675
 5676
 5677
 5678
 5679
 5680
 5681
 5682
 5683
 5684
 5685
 5686
 5687
 5688
 5689
 5690
 5691
 5692
 5693
 5694
 5695
 5696
 5697
 5698
 5699
 5700
 5701
 5702
 5703
 5704
 5705
 5706
 5707
 5708
 5709
 5710
 5711
 5712
 5713
 5714
 5715
 5716
 5717
 5718
 5719
 5720
 5721
 5722
 5723
 5724
 5725
 5726
 5727
 5728
 5729
 5730
 5731
 5732
 5733
 5734
 5735
 5736
 5737
 5738
 5739
 5740
 5741
 5742
 5743
 5744
 5745
 5746
 5747
 5748
 5749
 5750
 5751
 5752
 5753
 5754
 5755
 5756
 5757
 5758
 5759
 5760
 5761
 5762
 5763
 5764
 5765
 5766
 5767
 5768
 5769
 5770
 5771
 5772
 5773
 5774
 5775
 5776
 5777
 5778
 5779
 5780
 5781
 5782
 5783
 5784
 5785
 5786
 5787
 5788
 5789
 5790
 5791
 5792
 5793
 5794
 5795
 5796
 5797
 5798
 5799
 5800
 5801
 5802
 5803
 5804
 5805
 5806
 5807
 5808
 5809
 5810
 5811
 5812
 5813
 5814
 5815
 5816
 5817
 5818
 5819
 5820
 5821
 5822
 5823
 5824
 5825
 5826
 5827
 5828
 5829
 5830
 5831
 5832
 5833
 5834
 5835
 5836
 5837
 5838
 5839
 5840
 5841
 5842
 5843
 5844
 5845
 5846
 5847
 5848
 5849
 5850
 5851
 5852
 5853
 5854
 5855
 5856
 5857
 5858
 5859
 5860
 5861
 5862
 5863
 5864
 5865
 5866
 5867
 5868
 5869
 5870
 5871
 5872
 5873
 5874
 5875
 5876
 5877
 5878
 5879
 5880
 5881
 5882
 5883
 5884
 5885
 5886
 5887
 5888
 5889
 5890
 5891
 5892
 5893
 5894
 5895
 5896
 5897
 5898
 5899
 5900
 5901
 5902
 5903
 5904
 5905
 5906
 5907
 5908
 5909
 5910
 5911
 5912
 5913
 5914
 5915
 5916
 5917
 5918
 5919
 5920
 5921
 5922
 5923
 5924
 5925
 5926
 5927
 5928
 5929
 5930
 5931
 5932
 5933
 5934
 5935
 5936
 5937
 5938
 5939
 5940
 5941
 5942
 5943
 5944
 5945
 5946
 5947
 5948
 5949
 5950
 5951
 5952
 5953
 5954
 5955
 5956
 5957
 5958
 5959
 5960
 5961
 5962
 5963
 5964
 5965
 5966
 5967
 5968
 5969
 5970
 5971
 5972
 5973
 5974
 5975
 5976
 5977
 5978
 5979
 5980
 5981
 5982
 5983
 5984
 5985
 5986
 5987
 5988
 5989
 5990
 5991
 5992
 5993
 5994
 5995
 5996
 5997
 5998
 5999
 6000
 6001
 6002
 6003
 6004
 6005
 6006
 6007
 6008
 6009
 6010
 6011
 6012
 6013
 6014
 6015
 6016
 6017
 6018
 6019
 6020
 6021
 6022
 6023
 6024
 6025
 6026
 6027
 6028
 6029
 6030
 6031
 6032
 6033
 6034
 6035
 6036
 6037
 6038
 6039
 6040
 6041
 6042
 6043
 6044
 6045
 6046
 6047
 6048
 6049
 6050
 6051
 6052
 6053
 6054
 6055
 6056
 6057
 6058
 6059
 6060
 6061
 6062
 6063
 6064
 6065
 6066
 6067
 6068
 6069
 6070
 6071
 6072
 6073
 6074
 6075
 6076
 6077
 6078
 6079
 6080
 6081
 6082
 6083
 6084
 6085
 6086
 6087
 6088
 6089
 6090
 6091
 6092
 6093
 6094
 6095
 6096
 6097
 6098
 6099
 6100
 6101
 6102
 6103
 6104
 6105
 6106
 6107
 6108
 6109
 6110
 6111
 6112
 6113
 6114
 6115
 6116
 6117
 6118
 6119
 6120
 6121
 6122
 6123
 6124
 6125
 6126
 6127
 6128
 6129
 6130
 6131
 6132
 6133
 6134
 6135
 6136
 6137
 6138
 6139
 6140
 6141
 6142
 6143
 6144
 6145
 6146
 6147
 6148
 6149
 6150
 6151
 6152
 6153
 6154
 6155
 6156
 6157
 6158
 6159
 6160
 6161
 6162
 6163
 6164
 6165
 6166
 6167
 6168
 6169
 6170
 6171
 6172
 6173
 6174
 6175
 6176
 6177
 6178
 6179
 6180
 6181
 6182
 6183
 6184
 6185
 6186
 6187
 6188
 6189
 6190
 6191
 6192
 6193
 6194
 6195
 6196
 6197
 6198
 6199
 6200
 6201
 6202
 6203
 6204
 6205
 6206
 6207
 6208
 6209
 6210
 6211
 6212
 6213
 6214
 6215
 6216
 6217
 6218
 6219
 6220
 6221
 6222
 6223
 6224
 6225
 6226
 6227
 6228
 6229
 6230
 6231
 6232
 6233
 6234
 6235
 6236
 6237
 6238
 6239
 6240
 6241
 6242
 6243
 6244
 6245
 6246
 6247
 6248
 6249
 6250
 6251
 6252
 6253
 6254
 6255
 6256
 6257
 6258
 6259
 6260
 6261
 6262
 6263
 6264
 6265
 6266
 6267
 6268
 6269
 6270
 6271
 6272
 6273
 6274
 6275
 6276
 6277
 6278
 6279
 6280
 6281
 6282
 6283
 6284
 6285
 6286
 6287
 6288
 6289
 6290
 6291
 6292
 6293
 6294
 6295
 6296
 6297
 6298
 6299
 6300
 6301
 6302
 6303
 6304
 6305
 6306
 6307
 6308
 6309
 6310
 6311
 6312
 6313
 6314
 6315
 6316
 6317
 6318
 6319
 6320
 6321
 6322
 6323
 6324
 6325
 6326
 6327
 6328
 6329
 6330
 6331
 6332
 6333
 6334
 6335
 6336
 6337
 6338
 6339
 6340
 6341
 6342
 6343
 6344
 6345
 6346
 6347
 6348
 6349
 6350
 6351
 6352
 6353
 6354
 6355
 6356
 6357
 6358
 6359
 6360
 6361
 6362
 6363
 6364
 6365
 6366
 6367
 6368
 6369
 6370
 6371
 6372
 6373
 6374
 6375
 6376
 6377
 6378
 6379
 6380
 6381
 6382
 6383
 6384
 6385
 6386
 6387
 6388
 6389
 6390
 6391
 6392
 6393
 6394
 6395
 6396
 6397
 6398
 6399
 6400
 6401
 6402
 6403
 6404
 6405
 6406
 6407
 6408
 6409
 6410
 6411
 6412
 6413
 6414
 6415
 6416
 6417
 6418
 6419
 6420
 6421
 6422
 6423
 6424
 6425
 6426
 6427
 6428
 6429
 6430
 6431
 6432
 6433
 6434
 6435
 6436
 6437
 6438
 6439
 6440
 6441
 6442
 6443
 6444
 6445
 6446
 6447
 6448
 6449
 6450
 6451
 6452
 6453
 6454
 6455
 6456
 6457
 6458
 6459
 6460
 6461
 6462
 6463
 6464
 6465
 6466
 6467
 6468
 6469
 6470
 6471
 6472
 6473
 6474
 6475
 6476
 6477
 6478
 6479
 6480
 6481
 6482
 6483
 6484
 6485
 6486
 6487
 6488
 6489
 6490
 6491
 6492
 6493
 6494
 6495
 6496
 6497
 6498
 6499
 6500
 6501
 6502
 6503
 6504
 6505
 6506
 6507
 6508
 6509
 6510
 6511
 6512
 6513
 6514
 6515
 6516
 6517
 6518
 6519
 6520
 6521
 6522
 6523
 6524
 6525
 6526
 6527
 6528
 6529
 6530
 6531
 6532
 6533
 6534
 6535
 6536
 6537
 6538
 6539
 6540
 6541
 6542
 6543
 6544
 6545
 6546
 6547
 6548
 6549
 6550
 6551
 6552
 6553
 6554
 6555
 6556
 6557
 6558
 6559
 6560
 6561
 6562
 6563
 6564
 6565
 6566
 6567
 6568
 6569
 6570
 6571
 6572
 6573
 6574
 6575
 6576
 6577
 6578
 6579
 6580
 6581
 6582
 6583
 6584
 6585
 6586
 6587
 6588
 6589
 6590
 6591
 6592
 6593
 6594
 6595
 6596
 6597
 6598
 6599
 6600
 6601
 6602
 6603
 6604
 6605
 6606
 6607
 6608
 6609
 6610
 6611
 6612
 6613
 6614
 6615
 6616
 6617
 6618
 6619
 6620
 6621
 6622
 6623
 6624
 6625
 6626
 6627
 6628
 6629
 6630
 6631
 6632
 6633
 6634
 6635
 6636
 6637
 6638
 6639
 6640
 6641
 6642
 6643
 6644
 6645
 6646
 6647
 6648
 6649
 6650
 6651
 6652
 6653
 6654
 6655
 6656
 6657
 6658
 6659
 6660
 6661
 6662
 6663
 6664
 6665
 6666
 6667
 6668
 6669
 6670
 6671
 6672
 6673
 6674
 6675
 6676
 6677
 6678
 6679
 6680
 6681
 6682
 6683
 6684
 6685
 6686
 6687
 6688
 6689
 6690
 6691
 6692
 6693
 6694
 6695
 6696
 6697
 6698
 6699
 6700
 6701
 6702
 6703
 6704
 6705
 6706
 6707
 6708
 6709
 6710
 6711
 6712
 6713
 6714
 6715
 6716
 6717
 6718
 6719
 6720
 6721
 6722
 6723
 6724
 6725
 6726
 6727
 6728
 6729
 6730
 6731
 6732
 6733
 6734
 6735
 6736
 6737
 6738
 6739
 6740
 6741
 6742
 6743
 6744
 6745
 6746
 6747
 6748
 6749
 6750
 6751
 6752
 6753
 6754
 6755
 6756
 6757
 6758
 6759
 6760
 6761
 6762
 6763
 6764
 6765
 6766
 6767
 6768
 6769
 6770
 6771
 6772
 6773
 6774
 6775
 6776
 6777
 6778
 6779
 6780
 6781
 6782
 6783
 6784
 6785
 6786
 6787
 6788
 6789
 6790
 6791
 6792
 6793
 6794
 6795
 6796
 6797
 6798
 6799
 6800
 6801
 6802
 6803
 6804
 6805
 6806
 6807
 6808
 6809
 6810
 6811
 6812
 6813
 6814
 6815
 6816
 6817
 6818
 6819
 6820
 6821
 6822
 6823
 6824
 6825
 6826
 6827
 6828
 6829
 6830
 6831
 6832
 6833
 6834
 6835
 6836
 6837
 6838
 6839
 6840
 6841
 6842
 6843
 6844
 6845
 6846
 6847
 6848
 6849
 6850
 6851
 6852
 6853
 6854
 6855
 6856
 6857
 6858
 6859
 6860
 6861
 6862
 6863
 6864
 6865
 6866
 6867
 6868
 6869
 6870
 6871
 6872
 6873
 6874
 6875
 6876
 6877
 6878
 6879
 6880
 6881
 6882
 6883
 6884
 6885
 6886
 6887
 6888
 6889
 6890
 6891
 6892
 6893
 6894
 6895
 6896
 6897
 6898
 6899
 6900
 6901
 6902
 6903
 6904
 6905
 6906
 6907
 6908
 6909
 6910
 6911
 6912
 6913
 6914
 6915
 6916
 6917
 6918
 6919
 6920
 6921
 6922
 6923
 6924
 6925
 6926
 6927
 6928
 6929
 6930
 6931
 6932
 6933
 6934
 6935
 6936
 6937
 6938
 6939
 6940
 6941
 6942
 6943
 6944
 6945
 6946
 6947
 6948
 6949
 6950
 6951
 6952
 6953
 6954
 6955
 6956
 6957
 6958
 6959
 6960
 6961
 6962
 6963
 6964
 6965
 6966
 6967
 6968
 6969
 6970
 6971
 6972
 6973
 6974
 6975
 6976
 6977
 6978
 6979
 6980
 6981
 6982
 6983
 6984
 6985
 6986
 6987
 6988
 6989
 6990
 6991
 6992
 6993
 6994
 6995
 6996
 6997
 6998
 6999
 7000
 7001
 7002
 7003
 7004
 7005
 7006
 7007
 7008
 7009
 7010
 7011
 7012
 7013
 7014
 7015
 7016
 7017
 7018
 7019
 7020
 7021
 7022
 7023
 7024
 7025
 7026
 7027
 7028
 7029
 7030
 7031
 7032
 7033
 7034
 7035
 7036
 7037
 7038
 7039
 7040
 7041
 7042
 7043
 7044
 7045
 7046
 7047
 7048
 7049
 7050
 7051
 7052
 7053
 7054
 7055
 7056
 7057
 7058
 7059
 7060
 7061
 7062
 7063
 7064
 7065
 7066
 7067
 7068
 7069
 7070
 7071
 7072
 7073
 7074
 7075
 7076
 7077
 7078
 7079
 7080
 7081
 7082
 7083
 7084
 7085
 7086
 7087
 7088
 7089
 7090
 7091
 7092
 7093
 7094
 7095
 7096
 7097
 7098
 7099
 7100
 7101
 7102
 7103
 7104
 7105
 7106
 7107
 7108
 7109
 7110
 7111
 7112
 7113
 7114
 7115
 7116
 7117
 7118
 7119
 7120
 7121
 7122
 7123
 7124
 7125
 7126
 7127
 7128
 7129
 7130
 7131
 7132
 7133
 7134
 7135
 7136
 7137
 7138
 7139
 7140
 7141
 7142
 7143
 7144
 7145
 7146
 7147
 7148
 7149
 7150
 7151
 7152
 7153
 7154
 7155
 7156
 7157
 7158
 7159
 7160
 7161
 7162
 7163
 7164
 7165
 7166
 7167
 7168
 7169
 7170
 7171
 7172
 7173
 7174
 7175
 7176
 7177
 7178
 7179
 7180
 7181
 7182
 7183
 7184
 7185
 7186
 7187
 7188
 7189
 7190
 7191
 7192
 7193
 7194
 7195
 7196
 7197
 7198
 7199
 7200
 7201
 7202
 7203
 7204
 7205
 7206
 7207
 7208
 7209
 7210
 7211
 7212
 7213
 7214
 7215
 7216
 7217
 7218
 7219
 7220
 7221
 7222
 7223
 7224
 7225
 7226
 7227
 7228
 7229
 7230
 7231
 7232
 7233
 7234
 7235
 7236
 7237
 7238
 7239
 7240
 7241
 7242
 7243
 7244
 7245
 7246
 7247
 7248
 7249
 7250
 7251
 7252
 7253
 7254
 7255
 7256
 7257
 7258
 7259
 7260
 7261
 7262
 7263
 7264
 7265
 7266
 7267
 7268
 7269
 7270
 7271
 7272
 7273
 7274
 7275
 7276
 7277
 7278
 7279
 7280
 7281
 7282
 7283
 7284
 7285
 7286
 7287
 7288
 7289
 7290
 7291
 7292
 7293
 7294
 7295
 7296
 7297
 7298
 7299
 7300
 7301
 7302
 7303
 7304
 7305
 7306
 7307
 7308
 7309
 7310
 7311
 7312
 7313
 7314
 7315
 7316
 7317
 7318
 7319
 7320
 7321
 7322
 7323
 7324
 7325
 7326
 7327
 7328
 7329
 7330
 7331
 7332
 7333
 7334
 7335
 7336
 7337
 7338
 7339
 7340
 7341
 7342
 7343
 7344
 7345
 7346
 7347
 7348
 7349
 7350
 7351
 7352
 7353
 7354
 7355
 7356
 7357
 7358
 7359
 7360
 7361
 7362
 7363
 7364
 7365
 7366
 7367
 7368
 7369
 7370
 7371
 7372
 7373
 7374
 7375
 7376
 7377
 7378
 7379
 7380
 7381
 7382
 7383
 7384
 7385
 7386
 7387
 7388
 7389
 7390
 7391
 7392
 7393
 7394
 7395
 7396
 7397
 7398
 7399
 7400
 7401
 7402
 7403
 7404
 7405
 7406
 7407
 7408
 7409
 7410
 7411
 7412
 7413
 7414
 7415
 7416
 7417
 7418
 7419
 7420
 7421
 7422
 7423
 7424
 7425
 7426
 7427
 7428
 7429
 7430
 7431
 7432
 7433
 7434
 7435
 7436
 7437
 7438
 7439
 7440
 7441
 7442
 7443
 7444
 7445
 7446
 7447
 7448
 7449
 7450
 7451
 7452
 7453
 7454
 7455
 7456
 7457
 7458
 7459
 7460
 7461
 7462
 7463
 7464
 7465
 7466
 7467
 7468
 7469
 7470
 7471
 7472
 7473
 7474
 7475
 7476
 7477
 7478
 7479
 7480
 7481
 7482
 7483
 7484
 7485
 7486
 7487
 7488
 7489
 7490
 7491
 7492
 7493
 7494
 7495
 7496
 7497
 7498
 7499
 7500
 7501
 7502
 7503
 7504
 7505
 7506
 7507
 7508
 7509
 7510
 7511
 7512
 7513
 7514
 7515
 7516
 7517
 7518
 7519
 7520
 7521
 7522
 7523
 7524
 7525
 7526
 7527
 7528
 7529
 7530
 7531
 7532
 7533
 7534
 7535
 7536
 7537
 7538
 7539
 7540
 7541
 7542
 7543
 7544
 7545
 7546
 7547
 7548
 7549
 7550
 7551
 7552
 7553
 7554
 7555
 7556
 7557
 7558
 7559
 7560
 7561
 7562
 7563
 7564
 7565
 7566
 7567
 7568
 7569
 7570
 7571
 7572
 7573
 7574
 7575
 7576
 7577
 7578
 7579
 7580
 7581
 7582
 7583
 7584
 7585
 7586
 7587
 7588
 7589
 7590
 7591
 7592
 7593
 7594
 7595
 7596
 7597
 7598
 7599
 7600
 7601
 7602
 7603
 7604
 7605
 7606
 7607
 7608
 7609
 7610
 7611
 7612
 7613
 7614
 7615
 7616
 7617
 7618
 7619
 7620
 7621
 7622
 7623
 7624
 7625
 7626
 7627
 7628
 7629
 7630
 7631
 7632
 7633
 7634
 7635
 7636
 7637
 7638
 7639
 7640
 7641
 7642
 7643
 7644
 7645
 7646
 7647
 7648
 7649
 7650
 7651
 7652
 7653
 7654
 7655
 7656
 7657
 7658
 7659
 7660
 7661
 7662
 7663
 7664
 7665
 7666
 7667
 7668
 7669
 7670
 7671
 7672
 7673
 7674
 7675
 7676
 7677
 7678
 7679
 7680
 7681
 7682
 7683
 7684
 7685
 7686
 7687
 7688
 7689
 7690
 7691
 7692
 7693
 7694
 7695
 7696
 7697
 7698
 7699
 7700
 7701
 7702
 7703
 7704
 7705
 7706
 7707
 7708
 7709
 7710
 7711
 7712
 7713
 7714
 7715
 7716
 7717
 7718
 7719
 7720
 7721
 7722
 7723
 7724
 7725
 7726
 7727
 7728
 7729
 7730
 7731
 7732
 7733
 7734
 7735
 7736
 7737
 7738
 7739
 7740
 7741
 7742
 7743
 7744
 7745
 7746
 7747
 7748
 7749
 7750
 7751
 7752
 7753
 7754
 7755
 7756
 7757
 7758
 7759
 7760
 7761
 7762
 7763
 7764
 7765
 7766
 7767
 7768
 7769
 7770
 7771
 7772
 7773
 7774
 7775
 7776
 7777
 7778
 7779
 7780
 7781
 7782
 7783
 7784
 7785
 7786
 7787
 7788
 7789
 7790
 7791
 7792
 7793
 7794
 7795
 7796
 7797
 7798
 7799
 7800
 7801
 7802
 7803
 7804
 7805
 7806
 7807
 7808
 7809
 7810
 7811
 7812
 7813
 7814
 7815
 7816
 7817
 7818
 7819
 7820
 7821
 7822
 7823
 7824
 7825
 7826
 7827
 7828
 7829
 7830
 7831
 7832
 7833
 7834
 7835
 7836
 7837
 7838
 7839
 7840
 7841
 7842
 7843
 7844
 7845
 7846
 7847
 7848
 7849
 7850
 7851
 7852
 7853
 7854
 7855
 7856
 7857
 7858
 7859
 7860
 7861
 7862
 7863
 7864
 7865
 7866
 7867
 7868
 7869
 7870
 7871
 7872
 7873
 7874
 7875
 7876
 7877
 7878
 7879
 7880
 7881
 7882
 7883
 7884
 7885
 7886
 7887
 7888
 7889
 7890
 7891
 7892
 7893
 7894
 7895
 7896
 7897
 7898
 7899
 7900
 7901
 7902
 7903
 7904
 7905
 7906
 7907
 7908
 7909
 7910
 7911
 7912
 7913
 7914
 7915
 7916
 7917
 7918
 7919
 7920
 7921
 7922
 7923
 7924
 7925
 7926
 7927
 7928
 7929
 7930
 7931
 7932
 7933
 7934
 7935
 7936
 7937
 7938
 7939
 7940
 7941
 7942
 7943
 7944
 7945
 7946
 7947
 7948
 7949
 7950
 7951
 7952
 7953
 7954
 7955
 7956
 7957
 7958
 7959
 7960
 7961
 7962
 7963
 7964
 7965
 7966
 7967
 7968
 7969
 7970
 7971
 7972
 7973
 7974
 7975
 7976
 7977
 7978
 7979
 7980
 7981
 7982
 7983
 7984
 7985
 7986
 7987
 7988
 7989
 7990
 7991
 7992
 7993
 7994
 7995
 7996
 7997
 7998
 7999
 8000
 8001
 8002
 8003
 8004
 8005
 8006
 8007
 8008
 8009
 8010
 8011
 8012
 8013
 8014
 8015
 8016
 8017
 8018
 8019
 8020
 8021
 8022
 8023
 8024
 8025
 8026
 8027
 8028
 8029
 8030
 8031
 8032
 8033
 8034
 8035
 8036
 8037
 8038
 8039
 8040
 8041
 8042
 8043
 8044
 8045
 8046
 8047
 8048
 8049
 8050
 8051
 8052
 8053
 8054
 8055
 8056
 8057
 8058
 8059
 8060
 8061
 8062
 8063
 8064
 8065
 8066
 8067
 8068
 8069
 8070
 8071
 8072
 8073
 8074
 8075
 8076
 8077
 8078
 8079
 8080
 8081
 8082
 8083
 8084
 8085
 8086
 8087
 8088
 8089
 8090
 8091
 8092
 8093
 8094
 8095
 8096
 8097
 8098
 8099
 8100
 8101
 8102
 8103
 8104
 8105
 8106
 8107
 8108
 8109
 8110
 8111
 8112
 8113
 8114
 8115
 8116
 8117
 8118
 8119
 8120
 8121
 8122
 8123
 8124
 8125
 8126
 8127
 8128
 8129
 8130
 8131
 8132
 8133
 8134
 8135
 8136
 8137
 8138
 8139
 8140
 8141
 8142
 8143
 8144
 8145
 8146
 8147
 8148
 8149
 8150
 8151
 8152
 8153
 8154
 8155
 8156
 8157
 8158
 8159
 8160
 8161
 8162
 8163
 8164
 8165
 8166
 8167
 8168
 8169
 8170
 8171
 8172
 8173
 8174
 8175
 8176
 8177
 8178
 8179
 8180
 8181
 8182
 8183
 8184
 8185
 8186
 8187
 8188
 8189
 8190
 8191
 8192
 8193
 8194
 8195
 8196
 8197
 8198
 8199
 8200
 8201
 8202
 8203
 8204
 8205
 8206
 8207
 8208
 8209
 8210
 8211
 8212
 8213
 8214
 8215
 8216
 8217
 8218
 8219
 8220
 8221
 8222
 8223
 8224
 8225
 8226
 8227
 8228
 8229
 8230
 8231
 8232
 8233
 8234
 8235
 8236
 8237
 8238
 8239
 8240
 8241
 8242
 8243
 8244
 8245
 8246
 8247
 8248
 8249
 8250
 8251
 8252
 8253
 8254
 8255
 8256
 8257
 8258
 8259
 8260
 8261
 8262
 8263
 8264
 8265
 8266
 8267
 8268
 8269
 8270
 8271
 8272
 8273
 8274
 8275
 8276
 8277
 8278
 8279
 8280
 8281
 8282
 8283
 8284
 8285
 8286
 8287
 8288
 8289
 8290
 8291
 8292
 8293
 8294
 8295
 8296
 8297
 8298
 8299
 8300
 8301
 8302
 8303
 8304
 8305
 8306
 8307
 8308
 8309
 8310
 8311
 8312
 8313
 8314
 8315
 8316
 8317
 8318
 8319
 8320
 8321
 8322
 8323
 8324
 8325
 8326
 8327
 8328
 8329
 8330
 8331
 8332
 8333
 8334
 8335
 8336
 8337
 8338
 8339
 8340
 8341
 8342
 8343
 8344
 8345
 8346
 8347
 8348
 8349
 8350
 8351
 8352
 8353
 8354
 8355
 8356
 8357
 8358
 8359
 8360
 8361
 8362
 8363
 8364
 8365
 8366
 8367
 8368
 8369
 8370
 8371
 8372
 8373
 8374
 8375
 8376
 8377
 8378
 8379
 8380
 8381
 8382
 8383
 8384
 8385
 8386
 8387
 8388
 8389
 8390
 8391
 8392
 8393
 8394
 8395
 8396
 8397
 8398
 8399
 8400
 8401
 8402
 8403
 8404
 8405
 8406
 8407
 8408
 8409
 8410
 8411
 8412
 8413
 8414
 8415
 8416
 8417
 8418
 8419
 8420
 8421
 8422
 8423
 8424
 8425
 8426
 8427
 8428
 8429
 8430
 8431
 8432
 8433
 8434
 8435
 8436
 8437
 8438
 8439
 8440
 8441
 8442
 8443
 8444
 8445
 8446
 8447
 8448
 8449
 8450
 8451
 8452
 8453
 8454
 8455
 8456
 8457
 8458
 8459
 8460
 8461
 8462
 8463
 8464
 8465
 8466
 8467
 8468
 8469
 8470
 8471
 8472
 8473
 8474
 8475
 8476
 8477
 8478
 8479
 8480
 8481
 8482
 8483
 8484
 8485
 8486
 8487
 8488
 8489
 8490
 8491
 8492
 8493
 8494
 8495
 8496
 8497
 8498
 8499
 8500
 8501
 8502
 8503
 8504
 8505
 8506
 8507
 8508
 8509
 8510
 8511
 8512
 8513
 8514
 8515
 8516
 8517
 8518
 8519
 8520
 8521
 8522
 8523
 8524
 8525
 8526
 8527
 8528
 8529
 8530
 8531
 8532
 8533
 8534
 8535
 8536
 8537
 8538
 8539
 8540
 8541
 8542
 8543
 8544
 8545
 8546
 8547
 8548
 8549
 8550
 8551
 8552
 8553
 8554
 8555
 8556
 8557
 8558
 8559
 8560
 8561
 8562
 8563
 8564
 8565
 8566
 8567
 8568
 8569
 8570
 8571
 8572
 8573
 8574
 8575
 8576
 8577
 8578
 8579
 8580
 8581
 8582
 8583
 8584
 8585
 8586
 8587
 8588
 8589
 8590
 8591
 8592
 8593
 8594
 8595
 8596
 8597
 8598
 8599
 8600
 8601
 8602
 8603
 8604
 8605
 8606
 8607
 8608
 8609
 8610
 8611
 8612
 8613
 8614
 8615
 8616
 8617
 8618
 8619
 8620
 8621
 8622
 8623
 8624
 8625
 8626
 8627
 8628
 8629
 8630
 8631
 8632
 8633
 8634
 8635
 8636
 8637
 8638
 8639
 8640
 8641
 8642
 8643
 8644
 8645
 8646
 8647
 8648
 8649
 8650
 8651
 8652
 8653
 8654
 8655
 8656
 8657
 8658
 8659
 8660
 8661
 8662
 8663
 8664
 8665
 8666
 8667
 8668
 8669
 8670
 8671
 8672
 8673
 8674
 8675
 8676
 8677
 8678
 8679
 8680
 8681
 8682
 8683
 8684
 8685
 8686
 8687
 8688
 8689
 8690
 8691
 8692
 8693
 8694
 8695
 8696
 8697
 8698
 8699
 8700
 8701
 8702
 8703
 8704
 8705
 8706
 8707
 8708
 8709
 8710
 8711
 8712
 8713
 8714
 8715
 8716
 8717
 8718
 8719
 8720
 8721
 8722
 8723
 8724
 8725
 8726
 8727
 8728
 8729
 8730
 8731
 8732
 8733
 8734
 8735
 8736
 8737
 8738
 8739
 8740
 8741
 8742
 8743
 8744
 8745
 8746
 8747
 8748
 8749
 8750
 8751
 8752
 8753
 8754
 8755
 8756
 8757
 8758
 8759
 8760
 8761
 8762
 8763
 8764
 8765
 8766
 8767
 8768
 8769
 8770
 8771
 8772
 8773
 8774
 8775
 8776
 8777
 8778
 8779
 8780
 8781
 8782
 8783
 8784
 8785
 8786
 8787
 8788
 8789
 8790
 8791
 8792
 8793
 8794
 8795
 8796
 8797
 8798
 8799
 8800
 8801
 8802
 8803
 8804
 8805
 8806
 8807
 8808
 8809
 8810
 8811
 8812
 8813
 8814
 8815
 8816
 8817
 8818
 8819
 8820
 8821
 8822
 8823
 8824
 8825
 8826
 8827
 8828
 8829
 8830
 8831
 8832
 8833
 8834
 8835
 8836
 8837
 8838
 8839
 8840
 8841
 8842
 8843
 8844
 8845
 8846
 8847
 8848
 8849
 8850
 8851
 8852
 8853
 8854
 8855
 8856
 8857
 8858
 8859
 8860
 8861
 8862
 8863
 8864
 8865
 8866
 8867
 8868
 8869
 8870
 8871
 8872
 8873
 8874
 8875
 8876
 8877
 8878
 8879
 8880
 8881
 8882
 8883
 8884
 8885
 8886
 8887
 8888
 8889
 8890
 8891
 8892
 8893
 8894
 8895
 8896
 8897
 8898
 8899
 8900
 8901
 8902
 8903
 8904
 8905
 8906
 8907
 8908
 8909
 8910
 8911
 8912
 8913
 8914
 8915
 8916
 8917
 8918
 8919
 8920
 8921
 8922
 8923
 8924
 8925
 8926
 8927
 8928
 8929
 8930
 8931
 8932
 8933
 8934
 8935
 8936
 8937
 8938
 8939
 8940
 8941
 8942
 8943
 8944
 8945
 8946
 8947
 8948
 8949
 8950
 8951
 8952
 8953
 8954
 8955
 8956
 8957
 8958
 8959
 8960
 8961
 8962
 8963
 8964
 8965
 8966
 8967
 8968
 8969
 8970
 8971
 8972
 8973
 8974
 8975
 8976
 8977
 8978
 8979
 8980
 8981
 8982
 8983
 8984
 8985
 8986
 8987
 8988
 8989
 8990
 8991
 8992
 8993
 8994
 8995
 8996
 8997
 8998
 8999
 9000
 9001
 9002
 9003
 9004
 9005
 9006
 9007
 9008
 9009
 9010
 9011
 9012
 9013
 9014
 9015
 9016
 9017
 9018
 9019
 9020
 9021
 9022
 9023
 9024
 9025
 9026
 9027
 9028
 9029
 9030
 9031
 9032
 9033
 9034
 9035
 9036
 9037
 9038
 9039
 9040
 9041
 9042
 9043
 9044
 9045
 9046
 9047
 9048
 9049
 9050
 9051
 9052
 9053
 9054
 9055
 9056
 9057
 9058
 9059
 9060
 9061
 9062
 9063
 9064
 9065
 9066
 9067
 9068
 9069
 9070
 9071
 9072
 9073
 9074
 9075
 9076
 9077
 9078
 9079
 9080
 9081
 9082
 9083
 9084
 9085
 9086
 9087
 9088
 9089
 9090
 9091
 9092
 9093
 9094
 9095
 9096
 9097
 9098
 9099
 9100
 9101
 9102
 9103
 9104
 9105
 9106
 9107
 9108
 9109
 9110
 9111
 9112
 9113
 9114
 9115
 9116
 9117
 9118
 9119
 9120
 9121
 9122
 9123
 9124
 9125
 9126
 9127
 9128
 9129
 9130
 9131
 9132
 9133
 9134
 9135
 9136
 9137
 9138
 9139
 9140
 9141
 9142
 9143
 9144
 9145
 9146
 9147
 9148
 9149
 9150
 9151
 9152
 9153
 9154
 9155
 9156
 9157
 9158
 9159
 9160
 9161
 9162
 9163
 9164
 9165
 9166
 9167
 9168
 9169
 9170
 9171
 9172
 9173
 9174
 9175
 9176
 9177
 9178
 9179
 9180
 9181
 9182
 9183
 9184
 9185
 9186
 9187
 9188
 9189
 9190
 9191
 9192
 9193
 9194
 9195
 9196
 9197
 9198
 9199
 9200
 9201
 9202
 9203
 9204
 9205
 9206
 9207
 9208
 9209
 9210
 9211
 9212
 9213
 9214
 9215
 9216
 9217
 9218
 9219
 9220
 9221
 9222
 9223
 9224
 9225
 9226
 9227
 9228
 9229
 9230
 9231
 9232
 9233
 9234
 9235
 9236
 9237
 9238
 9239
 9240
 9241
 9242
 9243
 9244
 9245
 9246
 9247
 9248
 9249
 9250
 9251
 9252
 9253
 9254
 9255
 9256
 9257
 9258
 9259
 9260
 9261
 9262
 9263
 9264
 9265
 9266
 9267
 9268
 9269
 9270
 9271
 9272
 9273
 9274
 9275
 9276
 9277
 9278
 9279
 9280
 9281
 9282
 9283
 9284
 9285
 9286
 9287
 9288
 9289
 9290
 9291
 9292
 9293
 9294
 9295
 9296
 9297
 9298
 9299
 9300
 9301
 9302
 9303
 9304
 9305
 9306
 9307
 9308
 9309
 9310
 9311
 9312
 9313
 9314
 9315
 9316
 9317
 9318
 9319
 9320
 9321
 9322
 9323
 9324
 9325
 9326
 9327
 9328
 9329
 9330
 9331
 9332
 9333
 9334
 9335
 9336
 9337
 9338
 9339
 9340
 9341
 9342
 9343
 9344
 9345
 9346
 9347
 9348
 9349
 9350
 9351
 9352
 9353
 9354
 9355
 9356
 9357
 9358
 9359
 9360
 9361
 9362
 9363
 9364
 9365
 9366
 9367
 9368
 9369
 9370
 9371
 9372
 9373
 9374
 9375
 9376
 9377
 9378
 9379
 9380
 9381
 9382
 9383
 9384
 9385
 9386
 9387
 9388
 9389
 9390
 9391
 9392
 9393
 9394
 9395
 9396
 9397
 9398
 9399
 9400
 9401
 9402
 9403
 9404
 9405
 9406
 9407
 9408
 9409
 9410
 9411
 9412
 9413
 9414
 9415
 9416
 9417
 9418
 9419
 9420
 9421
 9422
 9423
 9424
 9425
 9426
 9427
 9428
 9429
 9430
 9431
 9432
 9433
 9434
 9435
 9436
 9437
 9438
 9439
 9440
 9441
 9442
 9443
 9444
 9445
 9446
 9447
 9448
 9449
 9450
 9451
 9452
 9453
 9454
 9455
 9456
 9457
 9458
 9459
 9460
 9461
 9462
 9463
 9464
 9465
 9466
 9467
 9468
 9469
 9470
 9471
 9472
 9473
 9474
 9475
 9476
 9477
 9478
 9479
 9480
 9481
 9482
 9483
 9484
 9485
 9486
 9487
 9488
 9489
 9490
 9491
 9492
 9493
 9494
 9495
 9496
 9497
 9498
 9499
 9500
 9501
 9502
 9503
 9504
 9505
 9506
 9507
 9508
 9509
 9510
 9511
 9512
 9513
 9514
 9515
 9516
 9517
 9518
 9519
 9520
 9521
 9522
 9523
 9524
 9525
 9526
 9527
 9528
 9529
 9530
 9531
 9532
 9533
 9534
 9535
 9536
 9537
 9538
 9539
 9540
 9541
 9542
 9543
 9544
 9545
 9546
 9547
 9548
 9549
 9550
 9551
 9552
 9553
 9554
 9555
 9556
 9557
 9558
 9559
 9560
 9561
 9562
 9563
 9564
 9565
 9566
 9567
 9568
 9569
 9570
 9571
 9572
 9573
 9574
 9575
 9576
 9577
 9578
 9579
 9580
 9581
 9582
 9583
 9584
 9585
 9586
 9587
 9588
 9589
 9590
 9591
 9592
 9593
 9594
 9595
 9596
 9597
 9598
 9599
 9600
 9601
 9602
 9603
 9604
 9605
 9606
 9607
 9608
 9609
 9610
 9611
 9612
 9613
 9614
 9615
 9616
 9617
 9618
 9619
 9620
 9621
 9622
 9623
 9624
 9625
 9626
 9627
 9628
 9629
 9630
 9631
 9632
 9633
 9634
 9635
 9636
 9637
 9638
 9639
 9640
 9641
 9642
 9643
 9644
 9645
 9646
 9647
 9648
 9649
 9650
 9651
 9652
 9653
 9654
 9655
 9656
 9657
 9658
 9659
 9660
 9661
 9662
 9663
 9664
 9665
 9666
 9667
 9668
 9669
 9670
 9671
 9672
 9673
 9674
 9675
 9676
 9677
 9678
 9679
 9680
 9681
 9682
 9683
 9684
 9685
 9686
 9687
 9688
 9689
 9690
 9691
 9692
 9693
 9694
 9695
 9696
 9697
 9698
 9699
 9700
 9701
 9702
 9703
 9704
 9705
 9706
 9707
 9708
 9709
 9710
 9711
 9712
 9713
 9714
 9715
 9716
 9717
 9718
 9719
 9720
 9721
 9722
 9723
 9724
 9725
 9726
 9727
 9728
 9729
 9730
 9731
 9732
 9733
 9734
 9735
 9736
 9737
 9738
 9739
 9740
 9741
 9742
 9743
 9744
 9745
 9746
 9747
 9748
 9749
 9750
 9751
 9752
 9753
 9754
 9755
 9756
 9757
 9758
 9759
 9760
 9761
 9762
 9763
 9764
 9765
 9766
 9767
 9768
 9769
 9770
 9771
 9772
 9773
 9774
 9775
 9776
 9777
 9778
 9779
 9780
 9781
 9782
 9783
 9784
 9785
 9786
 9787
 9788
 9789
 9790
 9791
 9792
 9793
 9794
 9795
 9796
 9797
 9798
 9799
 9800
 9801
 9802
 9803
 9804
 9805
 9806
 9807
 9808
 9809
 9810
 9811
 9812
 9813
 9814
 9815
 9816
 9817
 9818
 9819
 9820
 9821
 9822
 9823
 9824
 9825
 9826
 9827
 9828
 9829
 9830
 9831
 9832
 9833
 9834
 9835
 9836
 9837
 9838
 9839
 9840
 9841
 9842
 9843
 9844
 9845
 9846
 9847
 9848
 9849
 9850
 9851
 9852
 9853
 9854
 9855
 9856
 9857
 9858
 9859
 9860
 9861
 9862
 9863
 9864
 9865
 9866
 9867
 9868
 9869
 9870
 9871
 9872
 9873
 9874
 9875
 9876
 9877
 9878
 9879
 9880
 9881
 9882
 9883
 9884
 9885
 9886
 9887
 9888
 9889
 9890
 9891
 9892
 9893
 9894
 9895
 9896
 9897
 9898
 9899
 9900
 9901
 9902
 9903
 9904
 9905
 9906
 9907
 9908
 9909
 9910
 9911
 9912
 9913
 9914
 9915
 9916
 9917
 9918
 9919
 9920
 9921
 9922
 9923
 9924
 9925
 9926
 9927
 9928
 9929
 9930
 9931
 9932
 9933
 9934
 9935
 9936
 9937
 9938
 9939
 9940
 9941
 9942
 9943
 9944
 9945
 9946
 9947
 9948
 9949
 9950
 9951
 9952
 9953
 9954
 9955
 9956
 9957
 9958
 9959
 9960
 9961
 9962
 9963
 9964
 9965
 9966
 9967
 9968
 9969
 9970
 9971
 9972
 9973
 9974
 9975
 9976
 9977
 9978
 9979
 9980
 9981
 9982
 9983
 9984
 9985
 9986
 9987
 9988
 9989
 9990
 9991
 9992
 9993
 9994
 9995
 9996
 9997
 9998
 9999
10000
10001
10002
10003
10004
10005
10006
10007
10008
10009
10010
10011
10012
10013
10014
10015
10016
10017
10018
10019
10020
10021
10022
10023
10024
10025
10026
10027
10028
10029
10030
10031
10032
10033
10034
10035
10036
10037
10038
10039
10040
10041
10042
10043
10044
10045
10046
10047
10048
10049
10050
10051
10052
10053
10054
10055
10056
10057
10058
10059
10060
10061
10062
10063
10064
10065
10066
10067
10068
10069
10070
10071
10072
10073
10074
10075
10076
10077
10078
10079
10080
10081
10082
10083
10084
10085
10086
10087
10088
10089
10090
10091
10092
10093
10094
10095
10096
10097
10098
10099
10100
10101
10102
10103
10104
10105
10106
10107
10108
10109
10110
10111
10112
10113
10114
10115
10116
10117
10118
10119
10120
10121
10122
10123
10124
10125
10126
10127
10128
10129
10130
10131
10132
10133
10134
10135
10136
10137
10138
10139
10140
10141
10142
10143
10144
10145
10146
10147
10148
10149
10150
10151
10152
10153
10154
10155
10156
10157
10158
10159
10160
10161
10162
10163
10164
10165
10166
10167
10168
10169
10170
10171
10172
10173
10174
10175
10176
10177
10178
10179
10180
10181
10182
10183
10184
10185
10186
10187
10188
10189
10190
10191
10192
10193
10194
10195
10196
10197
10198
10199
10200
10201
10202
10203
10204
10205
10206
10207
10208
10209
10210
10211
10212
10213
10214
10215
10216
10217
10218
10219
10220
10221
10222
10223
10224
10225
10226
10227
10228
10229
10230
10231
10232
10233
10234
10235
10236
10237
10238
10239
10240
10241
10242
10243
10244
10245
10246
10247
10248
10249
10250
10251
10252
10253
10254
10255
10256
10257
10258
10259
10260
10261
10262
10263
10264
10265
10266
10267
10268
10269
10270
10271
10272
10273
10274
10275
10276
10277
10278
10279
10280
10281
10282
10283
10284
10285
10286
10287
10288
10289
10290
10291
10292
10293
10294
10295
10296
10297
10298
10299
10300
10301
10302
10303
10304
10305
10306
10307
10308
10309
10310
10311
10312
10313
10314
10315
10316
10317
10318
10319
10320
10321
10322
10323
10324
10325
10326
10327
10328
10329
10330
10331
10332
10333
10334
10335
10336
10337
10338
10339
10340
10341
10342
10343
10344
10345
10346
10347
10348
10349
10350
10351
10352
10353
10354
10355
10356
10357
10358
10359
10360
10361
10362
10363
10364
10365
10366
10367
10368
10369
10370
10371
10372
10373
10374
10375
10376
10377
10378
10379
10380
10381
10382
10383
10384
10385
10386
10387
10388
10389
10390
10391
10392
10393
10394
10395
10396
10397
10398
10399
10400
10401
10402
10403
10404
10405
10406
10407
10408
10409
10410
10411
10412
10413
10414
10415
10416
10417
10418
10419
10420
10421
10422
10423
10424
10425
10426
10427
10428
10429
10430
10431
10432
10433
10434
10435
10436
10437
10438
10439
10440
10441
10442
10443
10444
10445
10446
10447
10448
10449
10450
10451
10452
10453
10454
10455
10456
10457
10458
10459
10460
10461
10462
10463
10464
10465
10466
10467
10468
10469
10470
10471
10472
10473
10474
10475
10476
10477
10478
10479
10480
10481
10482
10483
10484
10485
10486
10487
10488
10489
10490
10491
10492
10493
10494
10495
10496
10497
10498
10499
10500
10501
10502
10503
10504
10505
10506
10507
10508
10509
10510
10511
10512
10513
10514
10515
10516
10517
10518
10519
10520
10521
10522
10523
10524
10525
10526
10527
10528
10529
10530
10531
10532
10533
10534
10535
10536
10537
10538
10539
10540
10541
10542
10543
10544
10545
10546
10547
10548
10549
10550
10551
10552
10553
10554
10555
10556
10557
10558
10559
10560
10561
10562
10563
10564
10565
10566
10567
10568
10569
10570
10571
10572
10573
10574
10575
10576
10577
10578
10579
10580
10581
10582
10583
10584
10585
10586
10587
10588
10589
10590
10591
10592
10593
10594
10595
10596
10597
10598
10599
10600
10601
10602
10603
10604
10605
10606
10607
10608
10609
10610
10611
10612
10613
10614
10615
10616
10617
10618
10619
10620
10621
10622
10623
10624
10625
10626
10627
10628
10629
10630
10631
10632
10633
10634
10635
10636
10637
10638
10639
10640
10641
10642
10643
10644
10645
10646
10647
10648
10649
10650
10651
10652
10653
10654
10655
10656
10657
10658
10659
10660
10661
10662
10663
10664
10665
10666
10667
10668
10669
10670
10671
10672
10673
10674
10675
10676
10677
10678
10679
10680
10681
10682
10683
10684
10685
10686
10687
10688
10689
10690
10691
10692
10693
10694
10695
10696
10697
10698
10699
10700
10701
10702
10703
10704
10705
10706
10707
10708
10709
10710
10711
10712
10713
10714
10715
10716
10717
10718
10719
10720
10721
10722
10723
10724
10725
10726
10727
10728
10729
10730
10731
10732
10733
10734
10735
10736
10737
10738
10739
10740
10741
10742
10743
10744
10745
10746
10747
10748
10749
10750
10751
10752
10753
10754
10755
10756
10757
10758
10759
10760
10761
10762
10763
10764
10765
10766
10767
10768
10769
10770
10771
10772
10773
10774
10775
10776
10777
10778
10779
10780
10781
10782
10783
10784
10785
10786
10787
10788
10789
10790
10791
10792
10793
10794
10795
10796
10797
10798
10799
10800
10801
10802
10803
10804
10805
10806
10807
10808
10809
10810
10811
10812
10813
10814
10815
10816
10817
10818
10819
10820
10821
10822
10823
10824
10825
10826
10827
10828
10829
10830
10831
10832
10833
10834
10835
10836
10837
10838
10839
10840
10841
10842
10843
10844
10845
10846
10847
10848
10849
10850
10851
10852
10853
10854
10855
10856
10857
10858
10859
10860
10861
10862
10863
10864
10865
10866
10867
10868
10869
10870
10871
10872
10873
10874
10875
10876
10877
10878
10879
10880
10881
10882
10883
10884
10885
10886
10887
10888
10889
10890
10891
10892
10893
10894
10895
10896
10897
10898
10899
10900
10901
10902
10903
10904
10905
10906
10907
10908
10909
10910
10911
10912
10913
10914
10915
10916
10917
10918
10919
10920
10921
10922
10923
10924
10925
10926
10927
10928
10929
10930
10931
10932
10933
10934
10935
10936
10937
10938
10939
10940
10941
10942
10943
10944
10945
10946
10947
10948
10949
10950
10951
10952
10953
10954
10955
10956
10957
10958
10959
10960
10961
10962
10963
10964
10965
10966
10967
10968
10969
10970
10971
10972
10973
10974
10975
10976
10977
10978
10979
10980
10981
10982
10983
10984
10985
10986
10987
10988
10989
10990
10991
10992
10993
10994
10995
10996
10997
10998
10999
11000
11001
11002
11003
11004
11005
11006
11007
11008
11009
11010
11011
11012
11013
11014
11015
11016
11017
11018
11019
11020
11021
11022
11023
11024
11025
11026
11027
11028
11029
11030
11031
11032
11033
11034
11035
11036
11037
11038
11039
11040
11041
11042
11043
11044
11045
11046
11047
11048
11049
11050
11051
11052
11053
11054
11055
11056
11057
11058
11059
11060
11061
11062
11063
11064
11065
11066
11067
11068
11069
11070
11071
11072
11073
11074
11075
11076
11077
11078
11079
11080
11081
11082
11083
11084
11085
11086
11087
11088
11089
11090
11091
11092
11093
11094
11095
11096
11097
11098
11099
11100
11101
11102
11103
11104
11105
11106
11107
11108
11109
11110
11111
11112
11113
11114
11115
11116
11117
11118
11119
11120
11121
11122
11123
11124
11125
11126
11127
11128
11129
11130
11131
11132
11133
11134
11135
11136
11137
11138
11139
11140
11141
11142
11143
11144
11145
11146
11147
11148
11149
11150
11151
11152
11153
11154
11155
11156
11157
11158
11159
11160
11161
11162
11163
11164
11165
11166
11167
11168
11169
11170
11171
11172
11173
11174
11175
11176
11177
11178
11179
11180
11181
11182
11183
11184
11185
11186
11187
11188
11189
11190
11191
11192
11193
11194
11195
11196
11197
11198
11199
11200
11201
11202
11203
11204
11205
11206
11207
11208
11209
11210
11211
11212
11213
11214
11215
11216
11217
11218
11219
11220
11221
11222
11223
11224
11225
11226
11227
11228
11229
11230
11231
11232
11233
11234
11235
11236
11237
11238
11239
11240
11241
11242
11243
11244
11245
11246
11247
11248
11249
11250
11251
11252
11253
11254
11255
11256
11257
11258
11259
11260
11261
11262
11263
11264
11265
11266
11267
11268
11269
11270
11271
11272
11273
11274
11275
11276
11277
11278
11279
11280
11281
11282
11283
11284
11285
11286
11287
11288
11289
11290
11291
11292
11293
11294
11295
11296
11297
11298
11299
11300
11301
11302
11303
11304
11305
11306
11307
11308
11309
11310
11311
11312
11313
11314
11315
11316
11317
11318
11319
11320
11321
11322
11323
11324
11325
11326
11327
11328
11329
11330
11331
11332
11333
11334
11335
11336
11337
11338
11339
11340
11341
11342
11343
11344
11345
11346
11347
11348
11349
11350
11351
11352
11353
11354
11355
11356
11357
11358
11359
11360
11361
11362
11363
11364
11365
11366
11367
11368
11369
11370
11371
11372
11373
11374
11375
11376
11377
11378
11379
11380
11381
11382
11383
11384
11385
11386
11387
11388
11389
11390
11391
11392
11393
11394
11395
11396
11397
11398
11399
11400
11401
11402
11403
11404
11405
11406
11407
11408
11409
11410
11411
11412
11413
11414
11415
11416
11417
11418
11419
11420
11421
11422
11423
11424
11425
11426
11427
11428
11429
11430
11431
11432
11433
11434
11435
11436
11437
11438
11439
11440
11441
11442
11443
11444
11445
11446
11447
11448
11449
11450
11451
11452
11453
11454
11455
11456
11457
11458
11459
11460
11461
11462
11463
11464
11465
11466
11467
11468
11469
11470
11471
11472
11473
11474
11475
11476
11477
11478
11479
11480
11481
11482
11483
11484
11485
11486
11487
11488
11489
11490
11491
11492
11493
11494
11495
11496
11497
11498
11499
11500
11501
11502
11503
11504
11505
11506
11507
11508
11509
11510
11511
11512
11513
11514
11515
11516
11517
11518
11519
11520
11521
11522
11523
11524
11525
11526
11527
11528
11529
11530
11531
11532
11533
11534
11535
11536
11537
11538
11539
11540
11541
11542
11543
11544
11545
11546
11547
11548
11549
11550
11551
11552
11553
11554
11555
11556
11557
11558
11559
11560
11561
11562
11563
11564
11565
11566
11567
11568
11569
11570
11571
11572
11573
11574
11575
11576
11577
11578
11579
11580
11581
11582
11583
11584
11585
11586
11587
11588
11589
11590
11591
11592
11593
11594
11595
11596
11597
11598
11599
11600
11601
11602
11603
11604
11605
11606
11607
11608
11609
11610
11611
11612
11613
11614
11615
11616
11617
11618
11619
11620
11621
11622
11623
11624
11625
11626
11627
11628
11629
11630
11631
11632
11633
11634
11635
11636
11637
11638
11639
11640
11641
11642
11643
11644
11645
11646
11647
11648
11649
11650
11651
11652
11653
11654
11655
11656
11657
11658
11659
11660
11661
11662
11663
11664
11665
11666
11667
11668
11669
11670
11671
11672
11673
11674
11675
11676
11677
11678
11679
11680
11681
11682
11683
11684
11685
11686
11687
11688
11689
11690
11691
11692
11693
11694
11695
11696
11697
11698
11699
11700
11701
11702
11703
11704
11705
11706
11707
11708
11709
11710
11711
11712
11713
11714
11715
11716
11717
11718
11719
11720
11721
11722
11723
11724
11725
11726
11727
11728
11729
11730
11731
11732
11733
11734
11735
11736
11737
11738
11739
11740
11741
11742
11743
11744
11745
11746
11747
11748
11749
11750
11751
11752
11753
11754
11755
11756
11757
11758
11759
11760
11761
11762
11763
11764
11765
11766
11767
11768
11769
11770
11771
11772
11773
11774
11775
11776
11777
11778
11779
11780
11781
11782
11783
11784
11785
11786
11787
11788
11789
11790
11791
11792
11793
11794
11795
11796
11797
11798
11799
11800
11801
11802
11803
11804
11805
11806
11807
11808
11809
11810
11811
11812
11813
11814
11815
11816
11817
11818
11819
11820
11821
11822
11823
11824
11825
11826
11827
11828
11829
11830
11831
11832
11833
11834
11835
11836
11837
11838
11839
11840
11841
11842
11843
11844
11845
11846
11847
11848
11849
11850
11851
11852
11853
11854
11855
11856
11857
11858
11859
11860
11861
11862
11863
11864
11865
11866
11867
11868
11869
11870
11871
11872
11873
11874
11875
11876
11877
11878
11879
11880
11881
11882
11883
11884
11885
11886
11887
11888
11889
11890
11891
11892
11893
11894
11895
11896
11897
11898
11899
11900
11901
11902
11903
11904
11905
11906
11907
11908
11909
11910
11911
11912
11913
11914
11915
11916
11917
11918
11919
11920
11921
11922
11923
11924
11925
11926
11927
11928
11929
11930
11931
11932
11933
11934
11935
11936
11937
11938
11939
11940
11941
11942
11943
11944
11945
11946
11947
11948
11949
11950
11951
11952
11953
11954
11955
11956
11957
11958
11959
11960
11961
11962
11963
11964
11965
11966
11967
11968
11969
11970
11971
11972
11973
11974
11975
11976
11977
11978
11979
11980
11981
11982
11983
11984
11985
11986
11987
11988
11989
11990
11991
11992
11993
11994
11995
11996
11997
11998
11999
12000
12001
12002
12003
12004
12005
12006
12007
12008
12009
12010
12011
12012
12013
12014
12015
12016
12017
12018
12019
12020
12021
12022
12023
12024
12025
12026
12027
12028
12029
12030
12031
12032
12033
12034
12035
12036
12037
12038
12039
12040
12041
12042
12043
12044
12045
12046
12047
12048
12049
12050
12051
12052
12053
12054
12055
12056
12057
12058
12059
12060
12061
12062
12063
12064
12065
12066
12067
12068
12069
12070
12071
12072
12073
12074
12075
12076
12077
12078
12079
12080
12081
12082
12083
12084
12085
12086
12087
12088
12089
12090
12091
12092
12093
12094
12095
12096
12097
12098
12099
12100
12101
12102
12103
12104
12105
12106
12107
12108
12109
12110
12111
12112
12113
12114
12115
12116
12117
12118
12119
12120
12121
12122
12123
12124
12125
12126
12127
12128
12129
12130
12131
12132
12133
12134
12135
12136
12137
12138
12139
12140
12141
12142
12143
12144
12145
12146
12147
12148
12149
12150
12151
12152
12153
12154
12155
12156
12157
12158
12159
12160
12161
12162
12163
12164
12165
12166
12167
12168
12169
12170
12171
12172
12173
12174
12175
12176
12177
12178
12179
12180
12181
12182
12183
12184
12185
12186
12187
12188
12189
12190
12191
12192
12193
12194
12195
12196
12197
12198
12199
12200
12201
12202
12203
12204
12205
12206
12207
12208
12209
12210
12211
12212
12213
12214
12215
12216
12217
12218
12219
12220
12221
12222
12223
12224
12225
12226
12227
12228
12229
12230
12231
12232
12233
12234
12235
12236
12237
12238
12239
12240
12241
12242
12243
12244
12245
12246
12247
12248
12249
12250
12251
12252
12253
12254
12255
12256
12257
12258
12259
12260
12261
12262
12263
12264
12265
12266
12267
12268
12269
12270
12271
12272
12273
12274
12275
12276
12277
12278
12279
12280
12281
12282
12283
12284
12285
12286
12287
12288
12289
12290
12291
12292
12293
12294
12295
12296
12297
12298
12299
12300
12301
12302
12303
12304
12305
12306
12307
12308
12309
12310
12311
12312
12313
12314
12315
12316
12317
12318
12319
12320
12321
12322
12323
12324
12325
12326
12327
12328
12329
12330
12331
12332
12333
12334
12335
12336
12337
12338
12339
12340
12341
12342
12343
12344
12345
12346
12347
12348
12349
12350
12351
12352
12353
12354
12355
12356
12357
12358
12359
12360
12361
12362
12363
12364
12365
12366
12367
12368
12369
12370
12371
12372
12373
12374
12375
12376
12377
12378
12379
12380
12381
12382
12383
12384
12385
12386
12387
12388
12389
12390
12391
12392
12393
12394
12395
12396
12397
12398
12399
12400
12401
12402
12403
12404
12405
12406
12407
12408
12409
12410
12411
12412
12413
12414
12415
12416
12417
12418
12419
12420
12421
12422
12423
12424
12425
12426
12427
12428
12429
12430
12431
12432
12433
12434
12435
12436
12437
12438
12439
12440
12441
12442
12443
12444
12445
12446
12447
12448
12449
12450
12451
12452
12453
12454
12455
12456
12457
12458
12459
12460
12461
12462
12463
12464
12465
12466
12467
12468
12469
12470
12471
12472
12473
12474
12475
12476
12477
12478
12479
12480
12481
12482
12483
12484
12485
12486
12487
12488
12489
12490
12491
12492
12493
12494
12495
12496
12497
12498
12499
12500
12501
12502
12503
12504
12505
12506
12507
12508
12509
12510
12511
12512
12513
12514
12515
12516
12517
12518
12519
12520
12521
12522
12523
12524
12525
12526
12527
12528
12529
12530
12531
12532
12533
12534
12535
12536
12537
12538
12539
12540
12541
12542
12543
12544
12545
12546
12547
12548
12549
12550
12551
12552
12553
12554
12555
12556
12557
12558
12559
12560
12561
12562
12563
12564
12565
12566
12567
12568
12569
12570
12571
12572
12573
12574
12575
12576
12577
12578
12579
12580
12581
12582
12583
12584
12585
12586
12587
12588
12589
12590
12591
12592
12593
12594
12595
12596
12597
12598
12599
12600
12601
12602
12603
12604
12605
12606
12607
12608
12609
12610
12611
12612
12613
12614
12615
12616
12617
12618
12619
12620
12621
12622
12623
12624
12625
12626
12627
12628
12629
12630
12631
12632
12633
12634
12635
12636
12637
12638
12639
12640
12641
12642
12643
12644
12645
12646
12647
12648
12649
12650
12651
12652
12653
12654
12655
12656
12657
12658
12659
12660
12661
12662
12663
12664
12665
12666
12667
12668
12669
12670
12671
12672
12673
12674
12675
12676
12677
12678
12679
12680
12681
12682
12683
12684
12685
12686
12687
12688
12689
12690
12691
12692
12693
12694
12695
12696
12697
12698
12699
12700
12701
12702
12703
12704
12705
12706
12707
12708
12709
12710
12711
12712
12713
12714
12715
12716
12717
12718
12719
12720
12721
12722
12723
12724
12725
12726
12727
12728
12729
12730
12731
12732
12733
12734
12735
12736
12737
12738
12739
12740
12741
12742
12743
12744
12745
12746
12747
12748
12749
12750
12751
12752
12753
12754
12755
12756
12757
12758
12759
12760
12761
12762
12763
12764
12765
12766
12767
12768
12769
12770
12771
12772
12773
12774
12775
12776
12777
12778
12779
12780
12781
12782
12783
12784
12785
12786
12787
12788
12789
12790
12791
12792
12793
12794
12795
12796
12797
12798
12799
12800
12801
12802
12803
12804
12805
12806
12807
12808
12809
12810
12811
12812
12813
12814
12815
12816
12817
12818
12819
12820
12821
12822
12823
12824
12825
12826
12827
12828
12829
12830
12831
12832
12833
12834
12835
12836
12837
12838
12839
12840
12841
12842
12843
12844
12845
12846
12847
12848
12849
12850
12851
12852
12853
12854
12855
12856
12857
12858
12859
12860
12861
12862
12863
12864
12865
12866
12867
12868
12869
12870
12871
12872
12873
12874
12875
12876
12877
12878
12879
12880
12881
12882
12883
12884
12885
12886
12887
12888
12889
12890
12891
12892
12893
12894
12895
12896
12897
12898
12899
12900
12901
12902
12903
12904
12905
12906
12907
12908
12909
12910
12911
12912
12913
12914
12915
12916
12917
12918
12919
12920
12921
12922
12923
12924
12925
12926
12927
12928
12929
12930
12931
12932
12933
12934
12935
12936
12937
12938
12939
12940
12941
12942
12943
12944
12945
12946
12947
12948
12949
12950
12951
12952
12953
12954
12955
12956
12957
12958
12959
12960
12961
12962
12963
12964
12965
12966
12967
12968
12969
12970
12971
12972
12973
12974
12975
12976
12977
12978
12979
12980
12981
12982
12983
12984
12985
12986
12987
12988
12989
12990
12991
12992
12993
12994
12995
12996
12997
12998
12999
13000
13001
13002
13003
13004
13005
13006
13007
13008
13009
13010
13011
13012
13013
13014
13015
13016
13017
13018
13019
13020
13021
13022
13023
13024
13025
13026
13027
13028
13029
13030
13031
13032
13033
13034
13035
13036
13037
13038
13039
13040
13041
13042
13043
13044
13045
13046
13047
13048
13049
13050
13051
13052
13053
13054
13055
13056
13057
13058
13059
13060
13061
13062
13063
13064
13065
13066
13067
13068
13069
13070
13071
13072
13073
13074
13075
13076
13077
13078
13079
13080
13081
13082
13083
13084
13085
13086
13087
13088
13089
13090
13091
13092
13093
13094
13095
13096
13097
13098
13099
13100
13101
13102
13103
13104
13105
13106
13107
13108
13109
13110
13111
13112
13113
13114
13115
13116
13117
13118
13119
13120
13121
13122
13123
13124
13125
13126
13127
13128
13129
13130
13131
13132
13133
13134
13135
13136
13137
13138
13139
13140
13141
13142
13143
13144
13145
13146
13147
13148
13149
13150
13151
13152
13153
13154
13155
13156
13157
13158
13159
13160
13161
13162
13163
13164
13165
13166
13167
13168
13169
13170
13171
13172
13173
13174
13175
13176
13177
13178
13179
13180
13181
13182
13183
13184
13185
13186
13187
13188
13189
13190
13191
13192
13193
13194
13195
13196
13197
13198
13199
13200
13201
13202
13203
13204
13205
13206
13207
13208
13209
13210
13211
13212
13213
13214
13215
13216
13217
13218
13219
13220
13221
13222
13223
13224
13225
13226
13227
13228
13229
13230
13231
13232
13233
13234
13235
13236
13237
13238
13239
13240
13241
13242
13243
13244
13245
13246
13247
13248
13249
13250
13251
13252
13253
13254
13255
13256
13257
13258
13259
13260
13261
13262
13263
13264
13265
13266
13267
13268
13269
13270
13271
13272
13273
13274
13275
13276
13277
13278
13279
13280
13281
13282
13283
13284
13285
13286
13287
13288
13289
13290
13291
13292
13293
13294
13295
13296
13297
13298
13299
13300
13301
13302
13303
13304
13305
13306
13307
13308
13309
13310
13311
13312
13313
13314
13315
13316
13317
13318
13319
13320
13321
13322
13323
13324
13325
13326
13327
13328
13329
13330
13331
13332
13333
13334
13335
13336
13337
13338
13339
13340
13341
13342
13343
13344
13345
13346
13347
13348
13349
13350
13351
13352
13353
13354
13355
13356
13357
13358
13359
13360
13361
13362
13363
13364
13365
13366
13367
13368
13369
13370
13371
13372
13373
13374
13375
13376
13377
13378
13379
13380
13381
13382
13383
13384
13385
13386
13387
13388
13389
13390
13391
13392
13393
13394
13395
13396
13397
13398
13399
13400
13401
13402
13403
13404
13405
13406
13407
13408
13409
13410
13411
13412
13413
13414
13415
13416
13417
13418
13419
13420
13421
13422
13423
13424
13425
13426
13427
13428
13429
13430
13431
13432
13433
13434
13435
13436
13437
13438
13439
13440
13441
13442
13443
13444
13445
13446
13447
13448
13449
13450
13451
13452
13453
13454
13455
13456
13457
13458
13459
13460
13461
13462
13463
13464
13465
13466
13467
13468
13469
13470
13471
13472
13473
13474
13475
13476
13477
13478
13479
13480
13481
13482
13483
13484
13485
13486
13487
13488
13489
13490
13491
13492
13493
13494
13495
13496
13497
13498
13499
13500
13501
13502
13503
13504
13505
13506
13507
13508
13509
13510
13511
13512
13513
13514
13515
13516
13517
13518
13519
13520
13521
13522
13523
13524
13525
13526
13527
13528
13529
13530
13531
13532
13533
13534
13535
13536
13537
13538
13539
13540
13541
13542
13543
13544
13545
13546
13547
13548
13549
13550
13551
13552
13553
13554
13555
13556
13557
13558
13559
13560
13561
13562
13563
13564
13565
13566
13567
13568
13569
13570
13571
13572
13573
13574
13575
13576
13577
13578
13579
13580
13581
13582
13583
13584
13585
13586
13587
13588
13589
13590
13591
13592
13593
13594
13595
13596
13597
13598
13599
13600
13601
13602
13603
13604
13605
13606
13607
13608
13609
13610
13611
13612
13613
13614
13615
13616
13617
13618
13619
13620
13621
13622
13623
13624
13625
13626
13627
13628
13629
13630
13631
13632
13633
13634
13635
13636
13637
13638
13639
13640
13641
13642
13643
13644
13645
13646
13647
13648
13649
13650
13651
13652
13653
13654
13655
13656
13657
13658
13659
13660
13661
13662
13663
13664
13665
13666
13667
13668
13669
13670
13671
13672
13673
13674
13675
13676
13677
13678
13679
13680
13681
13682
13683
13684
13685
13686
13687
13688
13689
13690
13691
13692
13693
13694
13695
13696
13697
13698
13699
13700
13701
13702
13703
13704
13705
13706
13707
13708
13709
13710
13711
13712
13713
13714
13715
13716
13717
13718
13719
13720
13721
13722
13723
13724
13725
13726
13727
13728
13729
13730
13731
13732
13733
13734
13735
13736
13737
13738
13739
13740
13741
13742
13743
13744
13745
13746
13747
13748
13749
13750
13751
13752
13753
13754
13755
13756
13757
13758
13759
13760
13761
13762
13763
13764
13765
13766
13767
13768
13769
13770
13771
13772
13773
13774
13775
13776
13777
13778
13779
13780
13781
13782
13783
13784
13785
13786
13787
13788
13789
13790
13791
13792
13793
13794
13795
13796
13797
13798
13799
13800
13801
13802
13803
13804
13805
13806
13807
13808
13809
13810
13811
13812
13813
13814
13815
13816
13817
13818
13819
13820
13821
13822
13823
13824
13825
13826
13827
13828
13829
13830
13831
13832
13833
13834
13835
13836
13837
13838
13839
13840
13841
13842
13843
13844
13845
13846
13847
13848
13849
13850
13851
13852
13853
13854
13855
13856
13857
13858
13859
13860
13861
13862
13863
13864
13865
13866
13867
13868
13869
13870
13871
13872
13873
13874
13875
13876
13877
13878
13879
13880
13881
13882
13883
13884
13885
13886
13887
13888
13889
13890
13891
13892
13893
13894
13895
13896
13897
13898
13899
13900
13901
13902
13903
13904
13905
13906
13907
13908
13909
13910
13911
13912
13913
13914
13915
13916
13917
13918
13919
13920
13921
13922
13923
13924
13925
13926
13927
13928
13929
13930
13931
13932
13933
13934
13935
13936
13937
13938
13939
13940
13941
13942
13943
13944
13945
13946
13947
13948
13949
13950
13951
13952
13953
13954
13955
13956
13957
13958
13959
13960
13961
13962
13963
13964
13965
13966
13967
13968
13969
13970
13971
13972
13973
13974
13975
13976
13977
13978
13979
13980
13981
13982
13983
13984
13985
13986
13987
13988
13989
13990
13991
13992
13993
13994
13995
13996
13997
13998
13999
14000
14001
14002
14003
14004
14005
14006
14007
14008
14009
14010
14011
14012
14013
14014
14015
14016
14017
14018
14019
14020
14021
14022
14023
14024
14025
14026
14027
14028
14029
14030
14031
14032
14033
14034
14035
14036
14037
14038
14039
14040
14041
14042
14043
14044
14045
14046
14047
14048
14049
14050
14051
14052
14053
14054
14055
14056
14057
14058
14059
14060
14061
14062
14063
14064
14065
14066
14067
14068
14069
14070
14071
14072
14073
14074
14075
14076
14077
14078
14079
14080
14081
14082
14083
14084
14085
14086
14087
14088
14089
14090
14091
14092
14093
14094
14095
14096
14097
14098
14099
14100
14101
14102
14103
14104
14105
14106
14107
14108
14109
14110
14111
14112
14113
14114
14115
14116
14117
14118
14119
14120
14121
14122
14123
14124
14125
14126
14127
14128
14129
14130
14131
14132
14133
14134
14135
14136
14137
14138
14139
14140
14141
14142
14143
14144
14145
14146
14147
14148
14149
14150
14151
14152
14153
14154
14155
14156
14157
14158
14159
14160
14161
14162
14163
14164
14165
14166
14167
14168
14169
14170
14171
14172
14173
14174
14175
14176
14177
14178
14179
14180
14181
14182
14183
14184
14185
14186
14187
14188
14189
14190
14191
14192
14193
14194
14195
14196
14197
14198
14199
14200
14201
14202
14203
14204
14205
14206
14207
14208
14209
14210
14211
14212
14213
14214
14215
14216
14217
14218
14219
14220
14221
14222
14223
14224
14225
14226
14227
14228
14229
14230
14231
14232
14233
14234
14235
14236
14237
14238
14239
14240
14241
14242
14243
14244
14245
14246
14247
14248
14249
14250
14251
14252
14253
14254
14255
14256
14257
14258
14259
14260
14261
14262
14263
14264
14265
14266
14267
14268
14269
14270
14271
14272
14273
14274
14275
14276
14277
14278
14279
14280
14281
14282
14283
14284
14285
14286
14287
14288
14289
14290
14291
14292
14293
14294
14295
14296
14297
14298
14299
14300
14301
14302
14303
14304
14305
14306
14307
14308
14309
14310
14311
14312
14313
14314
14315
14316
14317
14318
14319
14320
14321
14322
14323
14324
14325
14326
14327
14328
14329
14330
14331
14332
14333
14334
14335
14336
14337
14338
14339
14340
14341
14342
14343
14344
14345
14346
14347
14348
14349
14350
14351
14352
14353
14354
14355
14356
14357
14358
14359
14360
14361
14362
14363
14364
14365
14366
14367
14368
14369
14370
14371
14372
14373
14374
14375
14376
14377
14378
14379
14380
14381
14382
14383
14384
14385
14386
14387
14388
14389
14390
14391
14392
14393
14394
14395
14396
14397
14398
14399
14400
14401
14402
14403
14404
14405
14406
14407
14408
14409
14410
14411
14412
14413
14414
14415
14416
14417
14418
14419
14420
14421
14422
14423
14424
14425
14426
14427
14428
14429
14430
14431
14432
14433
14434
14435
14436
14437
14438
14439
14440
14441
14442
14443
14444
14445
14446
14447
14448
14449
14450
14451
14452
14453
14454
14455
14456
14457
14458
14459
14460
14461
14462
14463
14464
14465
14466
14467
14468
14469
14470
14471
14472
14473
14474
14475
14476
14477
14478
14479
14480
14481
14482
14483
14484
14485
14486
14487
14488
14489
14490
14491
14492
14493
14494
14495
14496
14497
14498
14499
14500
14501
14502
14503
14504
14505
14506
14507
14508
14509
14510
14511
14512
14513
14514
14515
14516
14517
14518
14519
14520
14521
14522
14523
14524
14525
14526
14527
14528
14529
14530
14531
14532
14533
14534
14535
14536
14537
14538
14539
14540
14541
14542
14543
14544
14545
14546
14547
14548
14549
14550
14551
14552
14553
14554
14555
14556
14557
14558
14559
14560
14561
14562
14563
14564
14565
14566
14567
14568
14569
14570
14571
14572
14573
14574
14575
14576
14577
14578
14579
14580
14581
14582
14583
14584
14585
14586
14587
14588
14589
14590
14591
14592
14593
14594
14595
14596
14597
14598
14599
14600
14601
14602
14603
14604
14605
14606
14607
14608
14609
14610
14611
14612
14613
14614
14615
14616
14617
14618
14619
14620
14621
14622
14623
14624
14625
14626
14627
14628
14629
14630
14631
14632
14633
14634
14635
14636
14637
14638
14639
14640
14641
14642
14643
14644
14645
14646
14647
14648
14649
14650
14651
14652
14653
14654
14655
14656

/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|*                                                                            *|
|* Machine Code Emitter                                                       *|
|*                                                                            *|
|* Automatically generated file, do not edit!                                 *|
|*                                                                            *|
\*===----------------------------------------------------------------------===*/

uint64_t HexagonMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,
    SmallVectorImpl<MCFixup> &Fixups,
    const MCSubtargetInfo &STI) const {
  static const uint64_t InstBits[] = {
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(2357198976),	// A2_abs
    UINT64_C(2155872448),	// A2_absp
    UINT64_C(2357199008),	// A2_abssat
    UINT64_C(4076863488),	// A2_add
    UINT64_C(3577741408),	// A2_addh_h16_hh
    UINT64_C(3577741376),	// A2_addh_h16_hl
    UINT64_C(3577741344),	// A2_addh_h16_lh
    UINT64_C(3577741312),	// A2_addh_h16_ll
    UINT64_C(3577741536),	// A2_addh_h16_sat_hh
    UINT64_C(3577741504),	// A2_addh_h16_sat_hl
    UINT64_C(3577741472),	// A2_addh_h16_sat_lh
    UINT64_C(3577741440),	// A2_addh_h16_sat_ll
    UINT64_C(3573547072),	// A2_addh_l16_hl
    UINT64_C(3573547008),	// A2_addh_l16_ll
    UINT64_C(3573547200),	// A2_addh_l16_sat_hl
    UINT64_C(3573547136),	// A2_addh_l16_sat_ll
    UINT64_C(2952790016),	// A2_addi
    UINT64_C(3539992800),	// A2_addp
    UINT64_C(3546284192),	// A2_addpsat
    UINT64_C(4131389440),	// A2_addsat
    UINT64_C(3546284256),	// A2_addsph
    UINT64_C(3546284224),	// A2_addspl
    UINT64_C(4043309056),	// A2_and
    UINT64_C(1979711488),	// A2_andir
    UINT64_C(3554672640),	// A2_andp
    UINT64_C(1879048192),	// A2_aslh
    UINT64_C(1881145344),	// A2_asrh
    UINT64_C(4085252096),	// A2_combine_hh
    UINT64_C(4087349248),	// A2_combine_hl
    UINT64_C(4089446400),	// A2_combine_lh
    UINT64_C(4091543552),	// A2_combine_ll
    UINT64_C(2080374784),	// A2_combineii
    UINT64_C(4110417920),	// A2_combinew
    UINT64_C(3586129920),	// A2_max
    UINT64_C(3552575616),	// A2_maxp
    UINT64_C(3586130048),	// A2_maxu
    UINT64_C(3552575648),	// A2_maxup
    UINT64_C(3584032768),	// A2_min
    UINT64_C(3550478528),	// A2_minp
    UINT64_C(3584032896),	// A2_minu
    UINT64_C(3550478560),	// A2_minup
    UINT64_C(2155872416),	// A2_negp
    UINT64_C(2357199040),	// A2_negsat
    UINT64_C(2130706432),	// A2_nop
    UINT64_C(2155872384),	// A2_notp
    UINT64_C(4045406208),	// A2_or
    UINT64_C(1988100096),	// A2_orir
    UINT64_C(3554672704),	// A2_orp
    UINT64_C(4211081344),	// A2_paddf
    UINT64_C(4211089536),	// A2_paddfnew
    UINT64_C(1954545664),	// A2_paddif
    UINT64_C(1954553856),	// A2_paddifnew
    UINT64_C(1946157056),	// A2_paddit
    UINT64_C(1946165248),	// A2_padditnew
    UINT64_C(4211081216),	// A2_paddt
    UINT64_C(4211089408),	// A2_paddtnew
    UINT64_C(4177526912),	// A2_pandf
    UINT64_C(4177535104),	// A2_pandfnew
    UINT64_C(4177526784),	// A2_pandt
    UINT64_C(4177534976),	// A2_pandtnew
    UINT64_C(4179624064),	// A2_porf
    UINT64_C(4179632256),	// A2_porfnew
    UINT64_C(4179623936),	// A2_port
    UINT64_C(4179632128),	// A2_portnew
    UINT64_C(4213178496),	// A2_psubf
    UINT64_C(4213186688),	// A2_psubfnew
    UINT64_C(4213178368),	// A2_psubt
    UINT64_C(4213186560),	// A2_psubtnew
    UINT64_C(4183818368),	// A2_pxorf
    UINT64_C(4183826560),	// A2_pxorfnew
    UINT64_C(4183818240),	// A2_pxort
    UINT64_C(4183826432),	// A2_pxortnew
    UINT64_C(2294284320),	// A2_roundsat
    UINT64_C(2294284288),	// A2_sat
    UINT64_C(2361393376),	// A2_satb
    UINT64_C(2361393280),	// A2_sath
    UINT64_C(2361393344),	// A2_satub
    UINT64_C(2361393312),	// A2_satuh
    UINT64_C(4078960640),	// A2_sub
    UINT64_C(3579838560),	// A2_subh_h16_hh
    UINT64_C(3579838528),	// A2_subh_h16_hl
    UINT64_C(3579838496),	// A2_subh_h16_lh
    UINT64_C(3579838464),	// A2_subh_h16_ll
    UINT64_C(3579838688),	// A2_subh_h16_sat_hh
    UINT64_C(3579838656),	// A2_subh_h16_sat_hl
    UINT64_C(3579838624),	// A2_subh_h16_sat_lh
    UINT64_C(3579838592),	// A2_subh_h16_sat_ll
    UINT64_C(3575644224),	// A2_subh_l16_hl
    UINT64_C(3575644160),	// A2_subh_l16_ll
    UINT64_C(3575644352),	// A2_subh_l16_sat_hl
    UINT64_C(3575644288),	// A2_subh_l16_sat_ll
    UINT64_C(3542089952),	// A2_subp
    UINT64_C(1983905792),	// A2_subri
    UINT64_C(4139778048),	// A2_subsat
    UINT64_C(4127195136),	// A2_svaddh
    UINT64_C(4129292288),	// A2_svaddhs
    UINT64_C(4133486592),	// A2_svadduhs
    UINT64_C(4143972352),	// A2_svavgh
    UINT64_C(4146069504),	// A2_svavghs
    UINT64_C(4150263808),	// A2_svnavgh
    UINT64_C(4135583744),	// A2_svsubh
    UINT64_C(4137680896),	// A2_svsubhs
    UINT64_C(4141875200),	// A2_svsubuhs
    UINT64_C(2357199072),	// A2_swiz
    UINT64_C(1889533952),	// A2_sxtb
    UINT64_C(1893728256),	// A2_sxth
    UINT64_C(2218786816),	// A2_sxtw
    UINT64_C(1885339648),	// A2_tfr
    UINT64_C(1778384896),	// A2_tfrcrr
    UINT64_C(1914699776),	// A2_tfrih
    UINT64_C(1897922560),	// A2_tfril
    UINT64_C(1646264320),	// A2_tfrrcr
    UINT64_C(2013265920),	// A2_tfrsi
    UINT64_C(2151678080),	// A2_vabsh
    UINT64_C(2151678112),	// A2_vabshsat
    UINT64_C(2151678144),	// A2_vabsw
    UINT64_C(2151678176),	// A2_vabswsat
    UINT64_C(3539992640),	// A2_vaddh
    UINT64_C(3539992672),	// A2_vaddhs
    UINT64_C(3539992576),	// A2_vaddub
    UINT64_C(3539992608),	// A2_vaddubs
    UINT64_C(3539992704),	// A2_vadduhs
    UINT64_C(3539992736),	// A2_vaddw
    UINT64_C(3539992768),	// A2_vaddws
    UINT64_C(3544186944),	// A2_vavgh
    UINT64_C(3544187008),	// A2_vavghcr
    UINT64_C(3544186976),	// A2_vavghr
    UINT64_C(3544186880),	// A2_vavgub
    UINT64_C(3544186912),	// A2_vavgubr
    UINT64_C(3544187040),	// A2_vavguh
    UINT64_C(3544187072),	// A2_vavguhr
    UINT64_C(3546284128),	// A2_vavguw
    UINT64_C(3546284160),	// A2_vavguwr
    UINT64_C(3546284032),	// A2_vavgw
    UINT64_C(3546284096),	// A2_vavgwcr
    UINT64_C(3546284064),	// A2_vavgwr
    UINT64_C(3523215552),	// A2_vcmpbeq
    UINT64_C(3523215584),	// A2_vcmpbgtu
    UINT64_C(3523215456),	// A2_vcmpheq
    UINT64_C(3523215488),	// A2_vcmphgt
    UINT64_C(3523215520),	// A2_vcmphgtu
    UINT64_C(3523215360),	// A2_vcmpweq
    UINT64_C(3523215392),	// A2_vcmpwgt
    UINT64_C(3523215424),	// A2_vcmpwgtu
    UINT64_C(2155872480),	// A2_vconj
    UINT64_C(3552575680),	// A2_vmaxb
    UINT64_C(3552575520),	// A2_vmaxh
    UINT64_C(3552575488),	// A2_vmaxub
    UINT64_C(3552575552),	// A2_vmaxuh
    UINT64_C(3550478496),	// A2_vmaxuw
    UINT64_C(3552575584),	// A2_vmaxw
    UINT64_C(3552575712),	// A2_vminb
    UINT64_C(3550478368),	// A2_vminh
    UINT64_C(3550478336),	// A2_vminub
    UINT64_C(3550478400),	// A2_vminuh
    UINT64_C(3550478464),	// A2_vminuw
    UINT64_C(3550478432),	// A2_vminw
    UINT64_C(3548381184),	// A2_vnavgh
    UINT64_C(3548381248),	// A2_vnavghcr
    UINT64_C(3548381216),	// A2_vnavghr
    UINT64_C(3548381280),	// A2_vnavgw
    UINT64_C(3548381376),	// A2_vnavgwcr
    UINT64_C(3548381312),	// A2_vnavgwr
    UINT64_C(3896508448),	// A2_vraddub
    UINT64_C(3930062880),	// A2_vraddub_acc
    UINT64_C(3896508480),	// A2_vrsadub
    UINT64_C(3930062912),	// A2_vrsadub_acc
    UINT64_C(3542089792),	// A2_vsubh
    UINT64_C(3542089824),	// A2_vsubhs
    UINT64_C(3542089728),	// A2_vsubub
    UINT64_C(3542089760),	// A2_vsububs
    UINT64_C(3542089856),	// A2_vsubuhs
    UINT64_C(3542089888),	// A2_vsubw
    UINT64_C(3542089920),	// A2_vsubws
    UINT64_C(4049600512),	// A2_xor
    UINT64_C(3554672768),	// A2_xorp
    UINT64_C(1891631104),	// A2_zxth
    UINT64_C(3267362816),	// A4_addp_c
    UINT64_C(4051697664),	// A4_andn
    UINT64_C(3554672672),	// A4_andnp
    UINT64_C(3558866944),	// A4_bitsplit
    UINT64_C(2294284416),	// A4_bitspliti
    UINT64_C(3523223712),	// A4_boundscheck_hi
    UINT64_C(3523223680),	// A4_boundscheck_lo
    UINT64_C(3351249088),	// A4_cmpbeq
    UINT64_C(3707764736),	// A4_cmpbeqi
    UINT64_C(3351248960),	// A4_cmpbgt
    UINT64_C(3709861888),	// A4_cmpbgti
    UINT64_C(3351249120),	// A4_cmpbgtu
    UINT64_C(3711959040),	// A4_cmpbgtui
    UINT64_C(3351248992),	// A4_cmpheq
    UINT64_C(3707764744),	// A4_cmpheqi
    UINT64_C(3351249024),	// A4_cmphgt
    UINT64_C(3709861896),	// A4_cmphgti
    UINT64_C(3351249056),	// A4_cmphgtu
    UINT64_C(3711959048),	// A4_cmphgtui
    UINT64_C(2088763392),	// A4_combineii
    UINT64_C(1931485184),	// A4_combineir
    UINT64_C(1929388032),	// A4_combineri
    UINT64_C(2363490304),	// A4_cround_ri
    UINT64_C(3334471680),	// A4_cround_rr
    UINT64_C(0),	// A4_ext
    UINT64_C(3554672864),	// A4_modwrapu
    UINT64_C(4053794816),	// A4_orn
    UINT64_C(3554672736),	// A4_ornp
    UINT64_C(1879058432),	// A4_paslhf
    UINT64_C(1879059456),	// A4_paslhfnew
    UINT64_C(1879056384),	// A4_paslht
    UINT64_C(1879057408),	// A4_paslhtnew
    UINT64_C(1881155584),	// A4_pasrhf
    UINT64_C(1881156608),	// A4_pasrhfnew
    UINT64_C(1881153536),	// A4_pasrht
    UINT64_C(1881154560),	// A4_pasrhtnew
    UINT64_C(1889544192),	// A4_psxtbf
    UINT64_C(1889545216),	// A4_psxtbfnew
    UINT64_C(1889542144),	// A4_psxtbt
    UINT64_C(1889543168),	// A4_psxtbtnew
    UINT64_C(1893738496),	// A4_psxthf
    UINT64_C(1893739520),	// A4_psxthfnew
    UINT64_C(1893736448),	// A4_psxtht
    UINT64_C(1893737472),	// A4_psxthtnew
    UINT64_C(1887447040),	// A4_pzxtbf
    UINT64_C(1887448064),	// A4_pzxtbfnew
    UINT64_C(1887444992),	// A4_pzxtbt
    UINT64_C(1887446016),	// A4_pzxtbtnew
    UINT64_C(1891641344),	// A4_pzxthf
    UINT64_C(1891642368),	// A4_pzxthfnew
    UINT64_C(1891639296),	// A4_pzxtht
    UINT64_C(1891640320),	// A4_pzxthtnew
    UINT64_C(4081057792),	// A4_rcmpeq
    UINT64_C(1933582336),	// A4_rcmpeqi
    UINT64_C(4083154944),	// A4_rcmpneq
    UINT64_C(1935679488),	// A4_rcmpneqi
    UINT64_C(2363490432),	// A4_round_ri
    UINT64_C(2363490496),	// A4_round_ri_sat
    UINT64_C(3334471808),	// A4_round_rr
    UINT64_C(3334471872),	// A4_round_rr_sat
    UINT64_C(3269459968),	// A4_subp_c
    UINT64_C(1744830464),	// A4_tfrcpp
    UINT64_C(1663041536),	// A4_tfrpcp
    UINT64_C(3523223648),	// A4_tlbmatch
    UINT64_C(3523223552),	// A4_vcmpbeq_any
    UINT64_C(3690987520),	// A4_vcmpbeqi
    UINT64_C(3523223616),	// A4_vcmpbgt
    UINT64_C(3693084672),	// A4_vcmpbgti
    UINT64_C(3695181824),	// A4_vcmpbgtui
    UINT64_C(3690987528),	// A4_vcmpheqi
    UINT64_C(3693084680),	// A4_vcmphgti
    UINT64_C(3695181832),	// A4_vcmphgtui
    UINT64_C(3690987536),	// A4_vcmpweqi
    UINT64_C(3693084688),	// A4_vcmpwgti
    UINT64_C(3695181840),	// A4_vcmpwgtui
    UINT64_C(3407872032),	// A4_vrmaxh
    UINT64_C(3407880224),	// A4_vrmaxuh
    UINT64_C(3407880256),	// A4_vrmaxuw
    UINT64_C(3407872064),	// A4_vrmaxw
    UINT64_C(3407872160),	// A4_vrminh
    UINT64_C(3407880352),	// A4_vrminuh
    UINT64_C(3407880384),	// A4_vrminuw
    UINT64_C(3407872192),	// A4_vrminw
    UINT64_C(3936354304),	// A5_ACS
    UINT64_C(3242197024),	// A5_vaddhubs
    UINT64_C(3523223584),	// A6_vcmpbeq_notany
    UINT64_C(3940548608),	// A6_vminub_RdP
    UINT64_C(1805647872),	// C2_all8
    UINT64_C(1795162112),	// C2_and
    UINT64_C(1801453568),	// C2_andn
    UINT64_C(1803550720),	// C2_any8
    UINT64_C(3347054592),	// C2_bitsclr
    UINT64_C(2239758336),	// C2_bitsclri
    UINT64_C(3342860288),	// C2_bitsset
    UINT64_C(4244635776),	// C2_ccombinewf
    UINT64_C(4244643968),	// C2_ccombinewnewf
    UINT64_C(4244643840),	// C2_ccombinewnewt
    UINT64_C(4244635648),	// C2_ccombinewt
    UINT64_C(2122317824),	// C2_cmoveif
    UINT64_C(2113929216),	// C2_cmoveit
    UINT64_C(2122326016),	// C2_cmovenewif
    UINT64_C(2113937408),	// C2_cmovenewit
    UINT64_C(4060086272),	// C2_cmpeq
    UINT64_C(1962934272),	// C2_cmpeqi
    UINT64_C(3531603968),	// C2_cmpeqp
    UINT64_C(4064280576),	// C2_cmpgt
    UINT64_C(1967128576),	// C2_cmpgti
    UINT64_C(3531604032),	// C2_cmpgtp
    UINT64_C(4066377728),	// C2_cmpgtu
    UINT64_C(1971322880),	// C2_cmpgtui
    UINT64_C(3531604096),	// C2_cmpgtup
    UINT64_C(2248146944),	// C2_mask
    UINT64_C(4093640704),	// C2_mux
    UINT64_C(2046820352),	// C2_muxii
    UINT64_C(1929379840),	// C2_muxir
    UINT64_C(1937768448),	// C2_muxri
    UINT64_C(1807745024),	// C2_not
    UINT64_C(1797259264),	// C2_or
    UINT64_C(1809842176),	// C2_orn
    UINT64_C(2302672896),	// C2_tfrpr
    UINT64_C(2235564032),	// C2_tfrrp
    UINT64_C(2298478592),	// C2_vitpack
    UINT64_C(3506438144),	// C2_vmux
    UINT64_C(1799356416),	// C2_xor
    UINT64_C(1783169024),	// C4_addipc
    UINT64_C(1796210688),	// C4_and_and
    UINT64_C(1804599296),	// C4_and_andn
    UINT64_C(1798307840),	// C4_and_or
    UINT64_C(1806696448),	// C4_and_orn
    UINT64_C(4064280592),	// C4_cmplte
    UINT64_C(1967128592),	// C4_cmpltei
    UINT64_C(4066377744),	// C4_cmplteu
    UINT64_C(1971322896),	// C4_cmplteui
    UINT64_C(4060086288),	// C4_cmpneq
    UINT64_C(1962934288),	// C4_cmpneqi
    UINT64_C(1795170448),	// C4_fastcorner9
    UINT64_C(1796219024),	// C4_fastcorner9_not
    UINT64_C(3349151744),	// C4_nbitsclr
    UINT64_C(2241855488),	// C4_nbitsclri
    UINT64_C(3344957440),	// C4_nbitsset
    UINT64_C(1800404992),	// C4_or_and
    UINT64_C(1808793600),	// C4_or_andn
    UINT64_C(1802502144),	// C4_or_or
    UINT64_C(1810890752),	// C4_or_orn
    UINT64_C(1509949440),	// CALLProfile
    UINT64_C(0),	// CONST32
    UINT64_C(0),	// CONST64
    UINT64_C(0),	// DuplexIClass0
    UINT64_C(8192),	// DuplexIClass1
    UINT64_C(536870912),	// DuplexIClass2
    UINT64_C(536879104),	// DuplexIClass3
    UINT64_C(1073741824),	// DuplexIClass4
    UINT64_C(1073750016),	// DuplexIClass5
    UINT64_C(1610612736),	// DuplexIClass6
    UINT64_C(1610620928),	// DuplexIClass7
    UINT64_C(2147483648),	// DuplexIClass8
    UINT64_C(2147491840),	// DuplexIClass9
    UINT64_C(2684354560),	// DuplexIClassA
    UINT64_C(2684362752),	// DuplexIClassB
    UINT64_C(3221225472),	// DuplexIClassC
    UINT64_C(3221233664),	// DuplexIClassD
    UINT64_C(3758096384),	// DuplexIClassE
    UINT64_C(3758104576),	// DuplexIClassF
    UINT64_C(1384120320),	// EH_RETURN_JMPR
    UINT64_C(2162163808),	// F2_conv_d2df
    UINT64_C(2285895712),	// F2_conv_d2sf
    UINT64_C(2162163712),	// F2_conv_df2d
    UINT64_C(2162163904),	// F2_conv_df2d_chop
    UINT64_C(2281701408),	// F2_conv_df2sf
    UINT64_C(2162163744),	// F2_conv_df2ud
    UINT64_C(2162163936),	// F2_conv_df2ud_chop
    UINT64_C(2287992864),	// F2_conv_df2uw
    UINT64_C(2292187168),	// F2_conv_df2uw_chop
    UINT64_C(2290090016),	// F2_conv_df2w
    UINT64_C(2296381472),	// F2_conv_df2w_chop
    UINT64_C(2222981248),	// F2_conv_sf2d
    UINT64_C(2222981312),	// F2_conv_sf2d_chop
    UINT64_C(2222981120),	// F2_conv_sf2df
    UINT64_C(2222981216),	// F2_conv_sf2ud
    UINT64_C(2222981280),	// F2_conv_sf2ud_chop
    UINT64_C(2338324480),	// F2_conv_sf2uw
    UINT64_C(2338324512),	// F2_conv_sf2uw_chop
    UINT64_C(2340421632),	// F2_conv_sf2w
    UINT64_C(2340421664),	// F2_conv_sf2w_chop
    UINT64_C(2162163776),	// F2_conv_ud2df
    UINT64_C(2283798560),	// F2_conv_ud2sf
    UINT64_C(2222981152),	// F2_conv_uw2df
    UINT64_C(2334130176),	// F2_conv_uw2sf
    UINT64_C(2222981184),	// F2_conv_w2df
    UINT64_C(2336227328),	// F2_conv_w2sf
    UINT64_C(3892314208),	// F2_dfadd
    UINT64_C(3699376144),	// F2_dfclass
    UINT64_C(3537895424),	// F2_dfcmpeq
    UINT64_C(3537895488),	// F2_dfcmpge
    UINT64_C(3537895456),	// F2_dfcmpgt
    UINT64_C(3537895520),	// F2_dfcmpuo
    UINT64_C(3644850176),	// F2_dfimm_n
    UINT64_C(3640655872),	// F2_dfimm_p
    UINT64_C(3900702816),	// F2_dfsub
    UINT64_C(3942645760),	// F2_sfadd
    UINT64_C(2246049792),	// F2_sfclass
    UINT64_C(3353346144),	// F2_sfcmpeq
    UINT64_C(3353346048),	// F2_sfcmpge
    UINT64_C(3353346176),	// F2_sfcmpgt
    UINT64_C(3353346080),	// F2_sfcmpuo
    UINT64_C(3955228704),	// F2_sffixupd
    UINT64_C(3955228672),	// F2_sffixupn
    UINT64_C(2342518784),	// F2_sffixupr
    UINT64_C(4009754752),	// F2_sffma
    UINT64_C(4009754816),	// F2_sffma_lib
    UINT64_C(4016046208),	// F2_sffma_sc
    UINT64_C(4009754784),	// F2_sffms
    UINT64_C(4009754848),	// F2_sffms_lib
    UINT64_C(3594518528),	// F2_sfimm_n
    UINT64_C(3590324224),	// F2_sfimm_p
    UINT64_C(2346713088),	// F2_sfinvsqrta
    UINT64_C(3951034368),	// F2_sfmax
    UINT64_C(3951034400),	// F2_sfmin
    UINT64_C(3946840064),	// F2_sfmpy
    UINT64_C(3957325952),	// F2_sfrecipa
    UINT64_C(3942645792),	// F2_sfsub
    UINT64_C(1746927616),	// G4_tfrgcpp
    UINT64_C(1780482048),	// G4_tfrgcrr
    UINT64_C(1660944384),	// G4_tfrgpcp
    UINT64_C(1644167168),	// G4_tfrgrcr
    UINT64_C(35651584),	// HI
    UINT64_C(1509949440),	// J2_call
    UINT64_C(1562378240),	// J2_callf
    UINT64_C(1352663040),	// J2_callr
    UINT64_C(1361051648),	// J2_callrf
    UINT64_C(1358954496),	// J2_callrt
    UINT64_C(1560281088),	// J2_callt
    UINT64_C(1476395008),	// J2_jump
    UINT64_C(1545601024),	// J2_jumpf
    UINT64_C(1545603072),	// J2_jumpfnew
    UINT64_C(1545607168),	// J2_jumpfnewpt
    UINT64_C(1545605120),	// J2_jumpfpt
    UINT64_C(1384120320),	// J2_jumpr
    UINT64_C(1398800384),	// J2_jumprf
    UINT64_C(1398802432),	// J2_jumprfnew
    UINT64_C(1398806528),	// J2_jumprfnewpt
    UINT64_C(1398804480),	// J2_jumprfpt
    UINT64_C(1631584256),	// J2_jumprgtez
    UINT64_C(1631588352),	// J2_jumprgtezpt
    UINT64_C(1639972864),	// J2_jumprltez
    UINT64_C(1639976960),	// J2_jumprltezpt
    UINT64_C(1635778560),	// J2_jumprnz
    UINT64_C(1635782656),	// J2_jumprnzpt
    UINT64_C(1396703232),	// J2_jumprt
    UINT64_C(1396705280),	// J2_jumprtnew
    UINT64_C(1396709376),	// J2_jumprtnewpt
    UINT64_C(1396707328),	// J2_jumprtpt
    UINT64_C(1627389952),	// J2_jumprz
    UINT64_C(1627394048),	// J2_jumprzpt
    UINT64_C(1543503872),	// J2_jumpt
    UINT64_C(1543505920),	// J2_jumptnew
    UINT64_C(1543510016),	// J2_jumptnewpt
    UINT64_C(1543507968),	// J2_jumptpt
    UINT64_C(1761607680),	// J2_loop0i
    UINT64_C(1761607680),	// J2_loop0iext
    UINT64_C(1610612736),	// J2_loop0r
    UINT64_C(1610612736),	// J2_loop0rext
    UINT64_C(1763704832),	// J2_loop1i
    UINT64_C(1763704832),	// J2_loop1iext
    UINT64_C(1612709888),	// J2_loop1r
    UINT64_C(1612709888),	// J2_loop1rext
    UINT64_C(1413480448),	// J2_pause
    UINT64_C(1772093440),	// J2_ploop1si
    UINT64_C(1621098496),	// J2_ploop1sr
    UINT64_C(1774190592),	// J2_ploop2si
    UINT64_C(1623195648),	// J2_ploop2sr
    UINT64_C(1776287744),	// J2_ploop3si
    UINT64_C(1625292800),	// J2_ploop3sr
    UINT64_C(1409286144),	// J2_trap0
    UINT64_C(1417674752),	// J2_trap1
    UINT64_C(541065216),	// J4_cmpeq_f_jumpnv_nt
    UINT64_C(541073408),	// J4_cmpeq_f_jumpnv_t
    UINT64_C(339738624),	// J4_cmpeq_fp0_jump_nt
    UINT64_C(339746816),	// J4_cmpeq_fp0_jump_t
    UINT64_C(339742720),	// J4_cmpeq_fp1_jump_nt
    UINT64_C(339750912),	// J4_cmpeq_fp1_jump_t
    UINT64_C(536870912),	// J4_cmpeq_t_jumpnv_nt
    UINT64_C(536879104),	// J4_cmpeq_t_jumpnv_t
    UINT64_C(335544320),	// J4_cmpeq_tp0_jump_nt
    UINT64_C(335552512),	// J4_cmpeq_tp0_jump_t
    UINT64_C(335548416),	// J4_cmpeq_tp1_jump_nt
    UINT64_C(335556608),	// J4_cmpeq_tp1_jump_t
    UINT64_C(608174080),	// J4_cmpeqi_f_jumpnv_nt
    UINT64_C(608182272),	// J4_cmpeqi_f_jumpnv_t
    UINT64_C(272629760),	// J4_cmpeqi_fp0_jump_nt
    UINT64_C(272637952),	// J4_cmpeqi_fp0_jump_t
    UINT64_C(306184192),	// J4_cmpeqi_fp1_jump_nt
    UINT64_C(306192384),	// J4_cmpeqi_fp1_jump_t
    UINT64_C(603979776),	// J4_cmpeqi_t_jumpnv_nt
    UINT64_C(603987968),	// J4_cmpeqi_t_jumpnv_t
    UINT64_C(268435456),	// J4_cmpeqi_tp0_jump_nt
    UINT64_C(268443648),	// J4_cmpeqi_tp0_jump_t
    UINT64_C(301989888),	// J4_cmpeqi_tp1_jump_nt
    UINT64_C(301998080),	// J4_cmpeqi_tp1_jump_t
    UINT64_C(641728512),	// J4_cmpeqn1_f_jumpnv_nt
    UINT64_C(641736704),	// J4_cmpeqn1_f_jumpnv_t
    UINT64_C(297795584),	// J4_cmpeqn1_fp0_jump_nt
    UINT64_C(297803776),	// J4_cmpeqn1_fp0_jump_t
    UINT64_C(331350016),	// J4_cmpeqn1_fp1_jump_nt
    UINT64_C(331358208),	// J4_cmpeqn1_fp1_jump_t
    UINT64_C(637534208),	// J4_cmpeqn1_t_jumpnv_nt
    UINT64_C(637542400),	// J4_cmpeqn1_t_jumpnv_t
    UINT64_C(293601280),	// J4_cmpeqn1_tp0_jump_nt
    UINT64_C(293609472),	// J4_cmpeqn1_tp0_jump_t
    UINT64_C(327155712),	// J4_cmpeqn1_tp1_jump_nt
    UINT64_C(327163904),	// J4_cmpeqn1_tp1_jump_t
    UINT64_C(549453824),	// J4_cmpgt_f_jumpnv_nt
    UINT64_C(549462016),	// J4_cmpgt_f_jumpnv_t
    UINT64_C(348127232),	// J4_cmpgt_fp0_jump_nt
    UINT64_C(348135424),	// J4_cmpgt_fp0_jump_t
    UINT64_C(348131328),	// J4_cmpgt_fp1_jump_nt
    UINT64_C(348139520),	// J4_cmpgt_fp1_jump_t
    UINT64_C(545259520),	// J4_cmpgt_t_jumpnv_nt
    UINT64_C(545267712),	// J4_cmpgt_t_jumpnv_t
    UINT64_C(343932928),	// J4_cmpgt_tp0_jump_nt
    UINT64_C(343941120),	// J4_cmpgt_tp0_jump_t
    UINT64_C(343937024),	// J4_cmpgt_tp1_jump_nt
    UINT64_C(343945216),	// J4_cmpgt_tp1_jump_t
    UINT64_C(616562688),	// J4_cmpgti_f_jumpnv_nt
    UINT64_C(616570880),	// J4_cmpgti_f_jumpnv_t
    UINT64_C(281018368),	// J4_cmpgti_fp0_jump_nt
    UINT64_C(281026560),	// J4_cmpgti_fp0_jump_t
    UINT64_C(314572800),	// J4_cmpgti_fp1_jump_nt
    UINT64_C(314580992),	// J4_cmpgti_fp1_jump_t
    UINT64_C(612368384),	// J4_cmpgti_t_jumpnv_nt
    UINT64_C(612376576),	// J4_cmpgti_t_jumpnv_t
    UINT64_C(276824064),	// J4_cmpgti_tp0_jump_nt
    UINT64_C(276832256),	// J4_cmpgti_tp0_jump_t
    UINT64_C(310378496),	// J4_cmpgti_tp1_jump_nt
    UINT64_C(310386688),	// J4_cmpgti_tp1_jump_t
    UINT64_C(650117120),	// J4_cmpgtn1_f_jumpnv_nt
    UINT64_C(650125312),	// J4_cmpgtn1_f_jumpnv_t
    UINT64_C(297795840),	// J4_cmpgtn1_fp0_jump_nt
    UINT64_C(297804032),	// J4_cmpgtn1_fp0_jump_t
    UINT64_C(331350272),	// J4_cmpgtn1_fp1_jump_nt
    UINT64_C(331358464),	// J4_cmpgtn1_fp1_jump_t
    UINT64_C(645922816),	// J4_cmpgtn1_t_jumpnv_nt
    UINT64_C(645931008),	// J4_cmpgtn1_t_jumpnv_t
    UINT64_C(293601536),	// J4_cmpgtn1_tp0_jump_nt
    UINT64_C(293609728),	// J4_cmpgtn1_tp0_jump_t
    UINT64_C(327155968),	// J4_cmpgtn1_tp1_jump_nt
    UINT64_C(327164160),	// J4_cmpgtn1_tp1_jump_t
    UINT64_C(557842432),	// J4_cmpgtu_f_jumpnv_nt
    UINT64_C(557850624),	// J4_cmpgtu_f_jumpnv_t
    UINT64_C(356515840),	// J4_cmpgtu_fp0_jump_nt
    UINT64_C(356524032),	// J4_cmpgtu_fp0_jump_t
    UINT64_C(356519936),	// J4_cmpgtu_fp1_jump_nt
    UINT64_C(356528128),	// J4_cmpgtu_fp1_jump_t
    UINT64_C(553648128),	// J4_cmpgtu_t_jumpnv_nt
    UINT64_C(553656320),	// J4_cmpgtu_t_jumpnv_t
    UINT64_C(352321536),	// J4_cmpgtu_tp0_jump_nt
    UINT64_C(352329728),	// J4_cmpgtu_tp0_jump_t
    UINT64_C(352325632),	// J4_cmpgtu_tp1_jump_nt
    UINT64_C(352333824),	// J4_cmpgtu_tp1_jump_t
    UINT64_C(624951296),	// J4_cmpgtui_f_jumpnv_nt
    UINT64_C(624959488),	// J4_cmpgtui_f_jumpnv_t
    UINT64_C(289406976),	// J4_cmpgtui_fp0_jump_nt
    UINT64_C(289415168),	// J4_cmpgtui_fp0_jump_t
    UINT64_C(322961408),	// J4_cmpgtui_fp1_jump_nt
    UINT64_C(322969600),	// J4_cmpgtui_fp1_jump_t
    UINT64_C(620756992),	// J4_cmpgtui_t_jumpnv_nt
    UINT64_C(620765184),	// J4_cmpgtui_t_jumpnv_t
    UINT64_C(285212672),	// J4_cmpgtui_tp0_jump_nt
    UINT64_C(285220864),	// J4_cmpgtui_tp0_jump_t
    UINT64_C(318767104),	// J4_cmpgtui_tp1_jump_nt
    UINT64_C(318775296),	// J4_cmpgtui_tp1_jump_t
    UINT64_C(566231040),	// J4_cmplt_f_jumpnv_nt
    UINT64_C(566239232),	// J4_cmplt_f_jumpnv_t
    UINT64_C(562036736),	// J4_cmplt_t_jumpnv_nt
    UINT64_C(562044928),	// J4_cmplt_t_jumpnv_t
    UINT64_C(574619648),	// J4_cmpltu_f_jumpnv_nt
    UINT64_C(574627840),	// J4_cmpltu_f_jumpnv_t
    UINT64_C(570425344),	// J4_cmpltu_t_jumpnv_nt
    UINT64_C(570433536),	// J4_cmpltu_t_jumpnv_t
    UINT64_C(1386217472),	// J4_hintjumpr
    UINT64_C(369098752),	// J4_jumpseti
    UINT64_C(385875968),	// J4_jumpsetr
    UINT64_C(633339904),	// J4_tstbit0_f_jumpnv_nt
    UINT64_C(633348096),	// J4_tstbit0_f_jumpnv_t
    UINT64_C(297796352),	// J4_tstbit0_fp0_jump_nt
    UINT64_C(297804544),	// J4_tstbit0_fp0_jump_t
    UINT64_C(331350784),	// J4_tstbit0_fp1_jump_nt
    UINT64_C(331358976),	// J4_tstbit0_fp1_jump_t
    UINT64_C(629145600),	// J4_tstbit0_t_jumpnv_nt
    UINT64_C(629153792),	// J4_tstbit0_t_jumpnv_t
    UINT64_C(293602048),	// J4_tstbit0_tp0_jump_nt
    UINT64_C(293610240),	// J4_tstbit0_tp0_jump_t
    UINT64_C(327156480),	// J4_tstbit0_tp1_jump_nt
    UINT64_C(327164672),	// J4_tstbit0_tp1_jump_t
    UINT64_C(2415919104),	// L2_deallocframe
    UINT64_C(2424307712),	// L2_loadalignb_io
    UINT64_C(2659188736),	// L2_loadalignb_pbr
    UINT64_C(2558525440),	// L2_loadalignb_pci
    UINT64_C(2558525952),	// L2_loadalignb_pcr
    UINT64_C(2592079872),	// L2_loadalignb_pi
    UINT64_C(2625634304),	// L2_loadalignb_pr
    UINT64_C(2420113408),	// L2_loadalignh_io
    UINT64_C(2654994432),	// L2_loadalignh_pbr
    UINT64_C(2554331136),	// L2_loadalignh_pci
    UINT64_C(2554331648),	// L2_loadalignh_pcr
    UINT64_C(2587885568),	// L2_loadalignh_pi
    UINT64_C(2621440000),	// L2_loadalignh_pr
    UINT64_C(2418016256),	// L2_loadbsw2_io
    UINT64_C(2652897280),	// L2_loadbsw2_pbr
    UINT64_C(2552233984),	// L2_loadbsw2_pci
    UINT64_C(2552234496),	// L2_loadbsw2_pcr
    UINT64_C(2585788416),	// L2_loadbsw2_pi
    UINT64_C(2619342848),	// L2_loadbsw2_pr
    UINT64_C(2430599168),	// L2_loadbsw4_io
    UINT64_C(2665480192),	// L2_loadbsw4_pbr
    UINT64_C(2564816896),	// L2_loadbsw4_pci
    UINT64_C(2564817408),	// L2_loadbsw4_pcr
    UINT64_C(2598371328),	// L2_loadbsw4_pi
    UINT64_C(2631925760),	// L2_loadbsw4_pr
    UINT64_C(2422210560),	// L2_loadbzw2_io
    UINT64_C(2657091584),	// L2_loadbzw2_pbr
    UINT64_C(2556428288),	// L2_loadbzw2_pci
    UINT64_C(2556428800),	// L2_loadbzw2_pcr
    UINT64_C(2589982720),	// L2_loadbzw2_pi
    UINT64_C(2623537152),	// L2_loadbzw2_pr
    UINT64_C(2426404864),	// L2_loadbzw4_io
    UINT64_C(2661285888),	// L2_loadbzw4_pbr
    UINT64_C(2560622592),	// L2_loadbzw4_pci
    UINT64_C(2560623104),	// L2_loadbzw4_pcr
    UINT64_C(2594177024),	// L2_loadbzw4_pi
    UINT64_C(2627731456),	// L2_loadbzw4_pr
    UINT64_C(2432696320),	// L2_loadrb_io
    UINT64_C(2667577344),	// L2_loadrb_pbr
    UINT64_C(2566914048),	// L2_loadrb_pci
    UINT64_C(2566914560),	// L2_loadrb_pcr
    UINT64_C(2600468480),	// L2_loadrb_pi
    UINT64_C(2634022912),	// L2_loadrb_pr
    UINT64_C(1224736768),	// L2_loadrbgp
    UINT64_C(2445279232),	// L2_loadrd_io
    UINT64_C(2680160256),	// L2_loadrd_pbr
    UINT64_C(2579496960),	// L2_loadrd_pci
    UINT64_C(2579497472),	// L2_loadrd_pcr
    UINT64_C(2613051392),	// L2_loadrd_pi
    UINT64_C(2646605824),	// L2_loadrd_pr
    UINT64_C(1237319680),	// L2_loadrdgp
    UINT64_C(2436890624),	// L2_loadrh_io
    UINT64_C(2671771648),	// L2_loadrh_pbr
    UINT64_C(2571108352),	// L2_loadrh_pci
    UINT64_C(2571108864),	// L2_loadrh_pcr
    UINT64_C(2604662784),	// L2_loadrh_pi
    UINT64_C(2638217216),	// L2_loadrh_pr
    UINT64_C(1228931072),	// L2_loadrhgp
    UINT64_C(2441084928),	// L2_loadri_io
    UINT64_C(2675965952),	// L2_loadri_pbr
    UINT64_C(2575302656),	// L2_loadri_pci
    UINT64_C(2575303168),	// L2_loadri_pcr
    UINT64_C(2608857088),	// L2_loadri_pi
    UINT64_C(2642411520),	// L2_loadri_pr
    UINT64_C(1233125376),	// L2_loadrigp
    UINT64_C(2434793472),	// L2_loadrub_io
    UINT64_C(2669674496),	// L2_loadrub_pbr
    UINT64_C(2569011200),	// L2_loadrub_pci
    UINT64_C(2569011712),	// L2_loadrub_pcr
    UINT64_C(2602565632),	// L2_loadrub_pi
    UINT64_C(2636120064),	// L2_loadrub_pr
    UINT64_C(1226833920),	// L2_loadrubgp
    UINT64_C(2438987776),	// L2_loadruh_io
    UINT64_C(2673868800),	// L2_loadruh_pbr
    UINT64_C(2573205504),	// L2_loadruh_pci
    UINT64_C(2573206016),	// L2_loadruh_pcr
    UINT64_C(2606759936),	// L2_loadruh_pi
    UINT64_C(2640314368),	// L2_loadruh_pr
    UINT64_C(1231028224),	// L2_loadruhgp
    UINT64_C(2449473536),	// L2_loadw_locked
    UINT64_C(1157627904),	// L2_ploadrbf_io
    UINT64_C(2600478720),	// L2_ploadrbf_pi
    UINT64_C(1191182336),	// L2_ploadrbfnew_io
    UINT64_C(2600482816),	// L2_ploadrbfnew_pi
    UINT64_C(1090519040),	// L2_ploadrbt_io
    UINT64_C(2600476672),	// L2_ploadrbt_pi
    UINT64_C(1124073472),	// L2_ploadrbtnew_io
    UINT64_C(2600480768),	// L2_ploadrbtnew_pi
    UINT64_C(1170210816),	// L2_ploadrdf_io
    UINT64_C(2613061632),	// L2_ploadrdf_pi
    UINT64_C(1203765248),	// L2_ploadrdfnew_io
    UINT64_C(2613065728),	// L2_ploadrdfnew_pi
    UINT64_C(1103101952),	// L2_ploadrdt_io
    UINT64_C(2613059584),	// L2_ploadrdt_pi
    UINT64_C(1136656384),	// L2_ploadrdtnew_io
    UINT64_C(2613063680),	// L2_ploadrdtnew_pi
    UINT64_C(1161822208),	// L2_ploadrhf_io
    UINT64_C(2604673024),	// L2_ploadrhf_pi
    UINT64_C(1195376640),	// L2_ploadrhfnew_io
    UINT64_C(2604677120),	// L2_ploadrhfnew_pi
    UINT64_C(1094713344),	// L2_ploadrht_io
    UINT64_C(2604670976),	// L2_ploadrht_pi
    UINT64_C(1128267776),	// L2_ploadrhtnew_io
    UINT64_C(2604675072),	// L2_ploadrhtnew_pi
    UINT64_C(1166016512),	// L2_ploadrif_io
    UINT64_C(2608867328),	// L2_ploadrif_pi
    UINT64_C(1199570944),	// L2_ploadrifnew_io
    UINT64_C(2608871424),	// L2_ploadrifnew_pi
    UINT64_C(1098907648),	// L2_ploadrit_io
    UINT64_C(2608865280),	// L2_ploadrit_pi
    UINT64_C(1132462080),	// L2_ploadritnew_io
    UINT64_C(2608869376),	// L2_ploadritnew_pi
    UINT64_C(1159725056),	// L2_ploadrubf_io
    UINT64_C(2602575872),	// L2_ploadrubf_pi
    UINT64_C(1193279488),	// L2_ploadrubfnew_io
    UINT64_C(2602579968),	// L2_ploadrubfnew_pi
    UINT64_C(1092616192),	// L2_ploadrubt_io
    UINT64_C(2602573824),	// L2_ploadrubt_pi
    UINT64_C(1126170624),	// L2_ploadrubtnew_io
    UINT64_C(2602577920),	// L2_ploadrubtnew_pi
    UINT64_C(1163919360),	// L2_ploadruhf_io
    UINT64_C(2606770176),	// L2_ploadruhf_pi
    UINT64_C(1197473792),	// L2_ploadruhfnew_io
    UINT64_C(2606774272),	// L2_ploadruhfnew_pi
    UINT64_C(1096810496),	// L2_ploadruht_io
    UINT64_C(2606768128),	// L2_ploadruht_pi
    UINT64_C(1130364928),	// L2_ploadruhtnew_io
    UINT64_C(2606772224),	// L2_ploadruhtnew_pi
    UINT64_C(1040187392),	// L4_add_memopb_io
    UINT64_C(1042284544),	// L4_add_memoph_io
    UINT64_C(1044381696),	// L4_add_memopw_io
    UINT64_C(1040187456),	// L4_and_memopb_io
    UINT64_C(1042284608),	// L4_and_memoph_io
    UINT64_C(1044381760),	// L4_and_memopw_io
    UINT64_C(1056964608),	// L4_iadd_memopb_io
    UINT64_C(1059061760),	// L4_iadd_memoph_io
    UINT64_C(1061158912),	// L4_iadd_memopw_io
    UINT64_C(1056964672),	// L4_iand_memopb_io
    UINT64_C(1059061824),	// L4_iand_memoph_io
    UINT64_C(1061158976),	// L4_iand_memopw_io
    UINT64_C(1056964704),	// L4_ior_memopb_io
    UINT64_C(1059061856),	// L4_ior_memoph_io
    UINT64_C(1061159008),	// L4_ior_memopw_io
    UINT64_C(1056964640),	// L4_isub_memopb_io
    UINT64_C(1059061792),	// L4_isub_memoph_io
    UINT64_C(1061158944),	// L4_isub_memopw_io
    UINT64_C(2592083968),	// L4_loadalignb_ap
    UINT64_C(2625638400),	// L4_loadalignb_ur
    UINT64_C(2587889664),	// L4_loadalignh_ap
    UINT64_C(2621444096),	// L4_loadalignh_ur
    UINT64_C(2585792512),	// L4_loadbsw2_ap
    UINT64_C(2619346944),	// L4_loadbsw2_ur
    UINT64_C(2598375424),	// L4_loadbsw4_ap
    UINT64_C(2631929856),	// L4_loadbsw4_ur
    UINT64_C(2589986816),	// L4_loadbzw2_ap
    UINT64_C(2623541248),	// L4_loadbzw2_ur
    UINT64_C(2594181120),	// L4_loadbzw4_ap
    UINT64_C(2627735552),	// L4_loadbzw4_ur
    UINT64_C(2449477632),	// L4_loadd_locked
    UINT64_C(2600472576),	// L4_loadrb_ap
    UINT64_C(973078528),	// L4_loadrb_rr
    UINT64_C(2634027008),	// L4_loadrb_ur
    UINT64_C(2613055488),	// L4_loadrd_ap
    UINT64_C(985661440),	// L4_loadrd_rr
    UINT64_C(2646609920),	// L4_loadrd_ur
    UINT64_C(2604666880),	// L4_loadrh_ap
    UINT64_C(977272832),	// L4_loadrh_rr
    UINT64_C(2638221312),	// L4_loadrh_ur
    UINT64_C(2608861184),	// L4_loadri_ap
    UINT64_C(981467136),	// L4_loadri_rr
    UINT64_C(2642415616),	// L4_loadri_ur
    UINT64_C(2602569728),	// L4_loadrub_ap
    UINT64_C(975175680),	// L4_loadrub_rr
    UINT64_C(2636124160),	// L4_loadrub_ur
    UINT64_C(2606764032),	// L4_loadruh_ap
    UINT64_C(979369984),	// L4_loadruh_rr
    UINT64_C(2640318464),	// L4_loadruh_ur
    UINT64_C(1040187488),	// L4_or_memopb_io
    UINT64_C(1042284640),	// L4_or_memoph_io
    UINT64_C(1044381792),	// L4_or_memopw_io
    UINT64_C(2667587712),	// L4_ploadrbf_abs
    UINT64_C(822083584),	// L4_ploadrbf_rr
    UINT64_C(2667591808),	// L4_ploadrbfnew_abs
    UINT64_C(855638016),	// L4_ploadrbfnew_rr
    UINT64_C(2667585664),	// L4_ploadrbt_abs
    UINT64_C(805306368),	// L4_ploadrbt_rr
    UINT64_C(2667589760),	// L4_ploadrbtnew_abs
    UINT64_C(838860800),	// L4_ploadrbtnew_rr
    UINT64_C(2680170624),	// L4_ploadrdf_abs
    UINT64_C(834666496),	// L4_ploadrdf_rr
    UINT64_C(2680174720),	// L4_ploadrdfnew_abs
    UINT64_C(868220928),	// L4_ploadrdfnew_rr
    UINT64_C(2680168576),	// L4_ploadrdt_abs
    UINT64_C(817889280),	// L4_ploadrdt_rr
    UINT64_C(2680172672),	// L4_ploadrdtnew_abs
    UINT64_C(851443712),	// L4_ploadrdtnew_rr
    UINT64_C(2671782016),	// L4_ploadrhf_abs
    UINT64_C(826277888),	// L4_ploadrhf_rr
    UINT64_C(2671786112),	// L4_ploadrhfnew_abs
    UINT64_C(859832320),	// L4_ploadrhfnew_rr
    UINT64_C(2671779968),	// L4_ploadrht_abs
    UINT64_C(809500672),	// L4_ploadrht_rr
    UINT64_C(2671784064),	// L4_ploadrhtnew_abs
    UINT64_C(843055104),	// L4_ploadrhtnew_rr
    UINT64_C(2675976320),	// L4_ploadrif_abs
    UINT64_C(830472192),	// L4_ploadrif_rr
    UINT64_C(2675980416),	// L4_ploadrifnew_abs
    UINT64_C(864026624),	// L4_ploadrifnew_rr
    UINT64_C(2675974272),	// L4_ploadrit_abs
    UINT64_C(813694976),	// L4_ploadrit_rr
    UINT64_C(2675978368),	// L4_ploadritnew_abs
    UINT64_C(847249408),	// L4_ploadritnew_rr
    UINT64_C(2669684864),	// L4_ploadrubf_abs
    UINT64_C(824180736),	// L4_ploadrubf_rr
    UINT64_C(2669688960),	// L4_ploadrubfnew_abs
    UINT64_C(857735168),	// L4_ploadrubfnew_rr
    UINT64_C(2669682816),	// L4_ploadrubt_abs
    UINT64_C(807403520),	// L4_ploadrubt_rr
    UINT64_C(2669686912),	// L4_ploadrubtnew_abs
    UINT64_C(840957952),	// L4_ploadrubtnew_rr
    UINT64_C(2673879168),	// L4_ploadruhf_abs
    UINT64_C(828375040),	// L4_ploadruhf_rr
    UINT64_C(2673883264),	// L4_ploadruhfnew_abs
    UINT64_C(861929472),	// L4_ploadruhfnew_rr
    UINT64_C(2673877120),	// L4_ploadruht_abs
    UINT64_C(811597824),	// L4_ploadruht_rr
    UINT64_C(2673881216),	// L4_ploadruhtnew_abs
    UINT64_C(845152256),	// L4_ploadruhtnew_rr
    UINT64_C(2516582400),	// L4_return
    UINT64_C(2516594688),	// L4_return_f
    UINT64_C(2516592640),	// L4_return_fnew_pnt
    UINT64_C(2516596736),	// L4_return_fnew_pt
    UINT64_C(2516586496),	// L4_return_t
    UINT64_C(2516584448),	// L4_return_tnew_pnt
    UINT64_C(2516588544),	// L4_return_tnew_pt
    UINT64_C(1040187424),	// L4_sub_memopb_io
    UINT64_C(1042284576),	// L4_sub_memoph_io
    UINT64_C(1044381728),	// L4_sub_memopw_io
    UINT64_C(2449473600),	// L6_memcpy
    UINT64_C(18874368),	// LO
    UINT64_C(4009754656),	// M2_acci
    UINT64_C(3791650816),	// M2_accii
    UINT64_C(3875536928),	// M2_cmaci_s0
    UINT64_C(3875536960),	// M2_cmacr_s0
    UINT64_C(3875537088),	// M2_cmacs_s0
    UINT64_C(3883925696),	// M2_cmacs_s1
    UINT64_C(3879731392),	// M2_cmacsc_s0
    UINT64_C(3888120000),	// M2_cmacsc_s1
    UINT64_C(3841982496),	// M2_cmpyi_s0
    UINT64_C(3841982528),	// M2_cmpyr_s0
    UINT64_C(3978297536),	// M2_cmpyrs_s0
    UINT64_C(3986686144),	// M2_cmpyrs_s1
    UINT64_C(3982491840),	// M2_cmpyrsc_s0
    UINT64_C(3990880448),	// M2_cmpyrsc_s1
    UINT64_C(3841982656),	// M2_cmpys_s0
    UINT64_C(3850371264),	// M2_cmpys_s1
    UINT64_C(3846176960),	// M2_cmpysc_s0
    UINT64_C(3854565568),	// M2_cmpysc_s1
    UINT64_C(3875537120),	// M2_cnacs_s0
    UINT64_C(3883925728),	// M2_cnacs_s1
    UINT64_C(3879731424),	// M2_cnacsc_s0
    UINT64_C(3888120032),	// M2_cnacsc_s1
    UINT64_C(3875536896),	// M2_dpmpyss_acc_s0
    UINT64_C(3877634048),	// M2_dpmpyss_nac_s0
    UINT64_C(3978297376),	// M2_dpmpyss_rnd_s0
    UINT64_C(3841982464),	// M2_dpmpyss_s0
    UINT64_C(3879731200),	// M2_dpmpyuu_acc_s0
    UINT64_C(3881828352),	// M2_dpmpyuu_nac_s0
    UINT64_C(3846176768),	// M2_dpmpyuu_s0
    UINT64_C(3986686080),	// M2_hmmpyh_rs1
    UINT64_C(3986685952),	// M2_hmmpyh_s1
    UINT64_C(3990880384),	// M2_hmmpyl_rs1
    UINT64_C(3986685984),	// M2_hmmpyl_s1
    UINT64_C(4009754624),	// M2_maci
    UINT64_C(3783262208),	// M2_macsin
    UINT64_C(3774873600),	// M2_macsip
    UINT64_C(3927965920),	// M2_mmachs_rs0
    UINT64_C(3936354528),	// M2_mmachs_rs1
    UINT64_C(3925868768),	// M2_mmachs_s0
    UINT64_C(3934257376),	// M2_mmachs_s1
    UINT64_C(3927965856),	// M2_mmacls_rs0
    UINT64_C(3936354464),	// M2_mmacls_rs1
    UINT64_C(3925868704),	// M2_mmacls_s0
    UINT64_C(3934257312),	// M2_mmacls_s1
    UINT64_C(3932160224),	// M2_mmacuhs_rs0
    UINT64_C(3940548832),	// M2_mmacuhs_rs1
    UINT64_C(3930063072),	// M2_mmacuhs_s0
    UINT64_C(3938451680),	// M2_mmacuhs_s1
    UINT64_C(3932160160),	// M2_mmaculs_rs0
    UINT64_C(3940548768),	// M2_mmaculs_rs1
    UINT64_C(3930063008),	// M2_mmaculs_s0
    UINT64_C(3938451616),	// M2_mmaculs_s1
    UINT64_C(3894411488),	// M2_mmpyh_rs0
    UINT64_C(3902800096),	// M2_mmpyh_rs1
    UINT64_C(3892314336),	// M2_mmpyh_s0
    UINT64_C(3900702944),	// M2_mmpyh_s1
    UINT64_C(3894411424),	// M2_mmpyl_rs0
    UINT64_C(3902800032),	// M2_mmpyl_rs1
    UINT64_C(3892314272),	// M2_mmpyl_s0
    UINT64_C(3900702880),	// M2_mmpyl_s1
    UINT64_C(3898605792),	// M2_mmpyuh_rs0
    UINT64_C(3906994400),	// M2_mmpyuh_rs1
    UINT64_C(3896508640),	// M2_mmpyuh_s0
    UINT64_C(3904897248),	// M2_mmpyuh_s1
    UINT64_C(3898605728),	// M2_mmpyul_rs0
    UINT64_C(3906994336),	// M2_mmpyul_rs1
    UINT64_C(3896508576),	// M2_mmpyul_s0
    UINT64_C(3904897184),	// M2_mmpyul_s1
    UINT64_C(4018143232),	// M2_mnaci
    UINT64_C(3992977504),	// M2_mpy_acc_hh_s0
    UINT64_C(4001366112),	// M2_mpy_acc_hh_s1
    UINT64_C(3992977472),	// M2_mpy_acc_hl_s0
    UINT64_C(4001366080),	// M2_mpy_acc_hl_s1
    UINT64_C(3992977440),	// M2_mpy_acc_lh_s0
    UINT64_C(4001366048),	// M2_mpy_acc_lh_s1
    UINT64_C(3992977408),	// M2_mpy_acc_ll_s0
    UINT64_C(4001366016),	// M2_mpy_acc_ll_s1
    UINT64_C(3992977632),	// M2_mpy_acc_sat_hh_s0
    UINT64_C(4001366240),	// M2_mpy_acc_sat_hh_s1
    UINT64_C(3992977600),	// M2_mpy_acc_sat_hl_s0
    UINT64_C(4001366208),	// M2_mpy_acc_sat_hl_s1
    UINT64_C(3992977568),	// M2_mpy_acc_sat_lh_s0
    UINT64_C(4001366176),	// M2_mpy_acc_sat_lh_s1
    UINT64_C(3992977536),	// M2_mpy_acc_sat_ll_s0
    UINT64_C(4001366144),	// M2_mpy_acc_sat_ll_s1
    UINT64_C(3959423072),	// M2_mpy_hh_s0
    UINT64_C(3967811680),	// M2_mpy_hh_s1
    UINT64_C(3959423040),	// M2_mpy_hl_s0
    UINT64_C(3967811648),	// M2_mpy_hl_s1
    UINT64_C(3959423008),	// M2_mpy_lh_s0
    UINT64_C(3967811616),	// M2_mpy_lh_s1
    UINT64_C(3959422976),	// M2_mpy_ll_s0
    UINT64_C(3967811584),	// M2_mpy_ll_s1
    UINT64_C(3995074656),	// M2_mpy_nac_hh_s0
    UINT64_C(4003463264),	// M2_mpy_nac_hh_s1
    UINT64_C(3995074624),	// M2_mpy_nac_hl_s0
    UINT64_C(4003463232),	// M2_mpy_nac_hl_s1
    UINT64_C(3995074592),	// M2_mpy_nac_lh_s0
    UINT64_C(4003463200),	// M2_mpy_nac_lh_s1
    UINT64_C(3995074560),	// M2_mpy_nac_ll_s0
    UINT64_C(4003463168),	// M2_mpy_nac_ll_s1
    UINT64_C(3995074784),	// M2_mpy_nac_sat_hh_s0
    UINT64_C(4003463392),	// M2_mpy_nac_sat_hh_s1
    UINT64_C(3995074752),	// M2_mpy_nac_sat_hl_s0
    UINT64_C(4003463360),	// M2_mpy_nac_sat_hl_s1
    UINT64_C(3995074720),	// M2_mpy_nac_sat_lh_s0
    UINT64_C(4003463328),	// M2_mpy_nac_sat_lh_s1
    UINT64_C(3995074688),	// M2_mpy_nac_sat_ll_s0
    UINT64_C(4003463296),	// M2_mpy_nac_sat_ll_s1
    UINT64_C(3961520224),	// M2_mpy_rnd_hh_s0
    UINT64_C(3969908832),	// M2_mpy_rnd_hh_s1
    UINT64_C(3961520192),	// M2_mpy_rnd_hl_s0
    UINT64_C(3969908800),	// M2_mpy_rnd_hl_s1
    UINT64_C(3961520160),	// M2_mpy_rnd_lh_s0
    UINT64_C(3969908768),	// M2_mpy_rnd_lh_s1
    UINT64_C(3961520128),	// M2_mpy_rnd_ll_s0
    UINT64_C(3969908736),	// M2_mpy_rnd_ll_s1
    UINT64_C(3959423200),	// M2_mpy_sat_hh_s0
    UINT64_C(3967811808),	// M2_mpy_sat_hh_s1
    UINT64_C(3959423168),	// M2_mpy_sat_hl_s0
    UINT64_C(3967811776),	// M2_mpy_sat_hl_s1
    UINT64_C(3959423136),	// M2_mpy_sat_lh_s0
    UINT64_C(3967811744),	// M2_mpy_sat_lh_s1
    UINT64_C(3959423104),	// M2_mpy_sat_ll_s0
    UINT64_C(3967811712),	// M2_mpy_sat_ll_s1
    UINT64_C(3961520352),	// M2_mpy_sat_rnd_hh_s0
    UINT64_C(3969908960),	// M2_mpy_sat_rnd_hh_s1
    UINT64_C(3961520320),	// M2_mpy_sat_rnd_hl_s0
    UINT64_C(3969908928),	// M2_mpy_sat_rnd_hl_s1
    UINT64_C(3961520288),	// M2_mpy_sat_rnd_lh_s0
    UINT64_C(3969908896),	// M2_mpy_sat_rnd_lh_s1
    UINT64_C(3961520256),	// M2_mpy_sat_rnd_ll_s0
    UINT64_C(3969908864),	// M2_mpy_sat_rnd_ll_s1
    UINT64_C(3976200224),	// M2_mpy_up
    UINT64_C(3986686016),	// M2_mpy_up_s1
    UINT64_C(3990880256),	// M2_mpy_up_s1_sat
    UINT64_C(3858759776),	// M2_mpyd_acc_hh_s0
    UINT64_C(3867148384),	// M2_mpyd_acc_hh_s1
    UINT64_C(3858759744),	// M2_mpyd_acc_hl_s0
    UINT64_C(3867148352),	// M2_mpyd_acc_hl_s1
    UINT64_C(3858759712),	// M2_mpyd_acc_lh_s0
    UINT64_C(3867148320),	// M2_mpyd_acc_lh_s1
    UINT64_C(3858759680),	// M2_mpyd_acc_ll_s0
    UINT64_C(3867148288),	// M2_mpyd_acc_ll_s1
    UINT64_C(3825205344),	// M2_mpyd_hh_s0
    UINT64_C(3833593952),	// M2_mpyd_hh_s1
    UINT64_C(3825205312),	// M2_mpyd_hl_s0
    UINT64_C(3833593920),	// M2_mpyd_hl_s1
    UINT64_C(3825205280),	// M2_mpyd_lh_s0
    UINT64_C(3833593888),	// M2_mpyd_lh_s1
    UINT64_C(3825205248),	// M2_mpyd_ll_s0
    UINT64_C(3833593856),	// M2_mpyd_ll_s1
    UINT64_C(3860856928),	// M2_mpyd_nac_hh_s0
    UINT64_C(3869245536),	// M2_mpyd_nac_hh_s1
    UINT64_C(3860856896),	// M2_mpyd_nac_hl_s0
    UINT64_C(3869245504),	// M2_mpyd_nac_hl_s1
    UINT64_C(3860856864),	// M2_mpyd_nac_lh_s0
    UINT64_C(3869245472),	// M2_mpyd_nac_lh_s1
    UINT64_C(3860856832),	// M2_mpyd_nac_ll_s0
    UINT64_C(3869245440),	// M2_mpyd_nac_ll_s1
    UINT64_C(3827302496),	// M2_mpyd_rnd_hh_s0
    UINT64_C(3835691104),	// M2_mpyd_rnd_hh_s1
    UINT64_C(3827302464),	// M2_mpyd_rnd_hl_s0
    UINT64_C(3835691072),	// M2_mpyd_rnd_hl_s1
    UINT64_C(3827302432),	// M2_mpyd_rnd_lh_s0
    UINT64_C(3835691040),	// M2_mpyd_rnd_lh_s1
    UINT64_C(3827302400),	// M2_mpyd_rnd_ll_s0
    UINT64_C(3835691008),	// M2_mpyd_rnd_ll_s1
    UINT64_C(3976200192),	// M2_mpyi
    UINT64_C(3766484992),	// M2_mpysin
    UINT64_C(3758096384),	// M2_mpysip
    UINT64_C(3982491680),	// M2_mpysu_up
    UINT64_C(3997171808),	// M2_mpyu_acc_hh_s0
    UINT64_C(4005560416),	// M2_mpyu_acc_hh_s1
    UINT64_C(3997171776),	// M2_mpyu_acc_hl_s0
    UINT64_C(4005560384),	// M2_mpyu_acc_hl_s1
    UINT64_C(3997171744),	// M2_mpyu_acc_lh_s0
    UINT64_C(4005560352),	// M2_mpyu_acc_lh_s1
    UINT64_C(3997171712),	// M2_mpyu_acc_ll_s0
    UINT64_C(4005560320),	// M2_mpyu_acc_ll_s1
    UINT64_C(3963617376),	// M2_mpyu_hh_s0
    UINT64_C(3972005984),	// M2_mpyu_hh_s1
    UINT64_C(3963617344),	// M2_mpyu_hl_s0
    UINT64_C(3972005952),	// M2_mpyu_hl_s1
    UINT64_C(3963617312),	// M2_mpyu_lh_s0
    UINT64_C(3972005920),	// M2_mpyu_lh_s1
    UINT64_C(3963617280),	// M2_mpyu_ll_s0
    UINT64_C(3972005888),	// M2_mpyu_ll_s1
    UINT64_C(3999268960),	// M2_mpyu_nac_hh_s0
    UINT64_C(4007657568),	// M2_mpyu_nac_hh_s1
    UINT64_C(3999268928),	// M2_mpyu_nac_hl_s0
    UINT64_C(4007657536),	// M2_mpyu_nac_hl_s1
    UINT64_C(3999268896),	// M2_mpyu_nac_lh_s0
    UINT64_C(4007657504),	// M2_mpyu_nac_lh_s1
    UINT64_C(3999268864),	// M2_mpyu_nac_ll_s0
    UINT64_C(4007657472),	// M2_mpyu_nac_ll_s1
    UINT64_C(3980394528),	// M2_mpyu_up
    UINT64_C(3862954080),	// M2_mpyud_acc_hh_s0
    UINT64_C(3871342688),	// M2_mpyud_acc_hh_s1
    UINT64_C(3862954048),	// M2_mpyud_acc_hl_s0
    UINT64_C(3871342656),	// M2_mpyud_acc_hl_s1
    UINT64_C(3862954016),	// M2_mpyud_acc_lh_s0
    UINT64_C(3871342624),	// M2_mpyud_acc_lh_s1
    UINT64_C(3862953984),	// M2_mpyud_acc_ll_s0
    UINT64_C(3871342592),	// M2_mpyud_acc_ll_s1
    UINT64_C(3829399648),	// M2_mpyud_hh_s0
    UINT64_C(3837788256),	// M2_mpyud_hh_s1
    UINT64_C(3829399616),	// M2_mpyud_hl_s0
    UINT64_C(3837788224),	// M2_mpyud_hl_s1
    UINT64_C(3829399584),	// M2_mpyud_lh_s0
    UINT64_C(3837788192),	// M2_mpyud_lh_s1
    UINT64_C(3829399552),	// M2_mpyud_ll_s0
    UINT64_C(3837788160),	// M2_mpyud_ll_s1
    UINT64_C(3865051232),	// M2_mpyud_nac_hh_s0
    UINT64_C(3873439840),	// M2_mpyud_nac_hh_s1
    UINT64_C(3865051200),	// M2_mpyud_nac_hl_s0
    UINT64_C(3873439808),	// M2_mpyud_nac_hl_s1
    UINT64_C(3865051168),	// M2_mpyud_nac_lh_s0
    UINT64_C(3873439776),	// M2_mpyud_nac_lh_s1
    UINT64_C(3865051136),	// M2_mpyud_nac_ll_s0
    UINT64_C(3873439744),	// M2_mpyud_nac_ll_s1
    UINT64_C(4018143264),	// M2_nacci
    UINT64_C(3800039424),	// M2_naccii
    UINT64_C(4009754720),	// M2_subacc
    UINT64_C(3898605568),	// M2_vabsdiffh
    UINT64_C(3894411264),	// M2_vabsdiffw
    UINT64_C(3930062976),	// M2_vcmac_s0_sat_i
    UINT64_C(3927965824),	// M2_vcmac_s0_sat_r
    UINT64_C(3896508608),	// M2_vcmpy_s0_sat_i
    UINT64_C(3894411456),	// M2_vcmpy_s0_sat_r
    UINT64_C(3904897216),	// M2_vcmpy_s1_sat_i
    UINT64_C(3902800064),	// M2_vcmpy_s1_sat_r
    UINT64_C(3925868672),	// M2_vdmacs_s0
    UINT64_C(3934257280),	// M2_vdmacs_s1
    UINT64_C(3909091328),	// M2_vdmpyrs_s0
    UINT64_C(3917479936),	// M2_vdmpyrs_s1
    UINT64_C(3892314240),	// M2_vdmpys_s0
    UINT64_C(3900702848),	// M2_vdmpys_s1
    UINT64_C(3877634080),	// M2_vmac2
    UINT64_C(3927965760),	// M2_vmac2es
    UINT64_C(3925868736),	// M2_vmac2es_s0
    UINT64_C(3934257344),	// M2_vmac2es_s1
    UINT64_C(3875537056),	// M2_vmac2s_s0
    UINT64_C(3883925664),	// M2_vmac2s_s1
    UINT64_C(3881828512),	// M2_vmac2su_s0
    UINT64_C(3890217120),	// M2_vmac2su_s1
    UINT64_C(3892314304),	// M2_vmpy2es_s0
    UINT64_C(3900702912),	// M2_vmpy2es_s1
    UINT64_C(3841982624),	// M2_vmpy2s_s0
    UINT64_C(3978297568),	// M2_vmpy2s_s0pack
    UINT64_C(3850371232),	// M2_vmpy2s_s1
    UINT64_C(3986686176),	// M2_vmpy2s_s1pack
    UINT64_C(3841982688),	// M2_vmpy2su_s0
    UINT64_C(3850371296),	// M2_vmpy2su_s1
    UINT64_C(3911188704),	// M2_vraddh
    UINT64_C(3909091360),	// M2_vradduh
    UINT64_C(3925868544),	// M2_vrcmaci_s0
    UINT64_C(3930062848),	// M2_vrcmaci_s0c
    UINT64_C(3925868576),	// M2_vrcmacr_s0
    UINT64_C(3932160032),	// M2_vrcmacr_s0c
    UINT64_C(3892314112),	// M2_vrcmpyi_s0
    UINT64_C(3896508416),	// M2_vrcmpyi_s0c
    UINT64_C(3892314144),	// M2_vrcmpyr_s0
    UINT64_C(3898605600),	// M2_vrcmpyr_s0c
    UINT64_C(3936354432),	// M2_vrcmpys_acc_s1_h
    UINT64_C(3940548736),	// M2_vrcmpys_acc_s1_l
    UINT64_C(3902800000),	// M2_vrcmpys_s1_h
    UINT64_C(3906994304),	// M2_vrcmpys_s1_l
    UINT64_C(3919577280),	// M2_vrcmpys_s1rp_h
    UINT64_C(3919577312),	// M2_vrcmpys_s1rp_l
    UINT64_C(3925868608),	// M2_vrmac_s0
    UINT64_C(3892314176),	// M2_vrmpy_s0
    UINT64_C(4018143328),	// M2_xor_xacc
    UINT64_C(4013948928),	// M4_and_and
    UINT64_C(4011851808),	// M4_and_andn
    UINT64_C(4013948960),	// M4_and_or
    UINT64_C(4013948992),	// M4_and_xor
    UINT64_C(3305111680),	// M4_cmpyi_wh
    UINT64_C(3305111712),	// M4_cmpyi_whc
    UINT64_C(3305111744),	// M4_cmpyr_wh
    UINT64_C(3305111776),	// M4_cmpyr_whc
    UINT64_C(4016046080),	// M4_mac_up_s1_sat
    UINT64_C(3623878656),	// M4_mpyri_addi
    UINT64_C(3749707776),	// M4_mpyri_addr
    UINT64_C(3741319168),	// M4_mpyri_addr_u2
    UINT64_C(3607101440),	// M4_mpyrr_addi
    UINT64_C(3808428032),	// M4_mpyrr_addr
    UINT64_C(4016046112),	// M4_nac_up_s1_sat
    UINT64_C(4013949024),	// M4_or_and
    UINT64_C(4011851776),	// M4_or_andn
    UINT64_C(4022337536),	// M4_or_or
    UINT64_C(4022337568),	// M4_or_xor
    UINT64_C(3846176992),	// M4_pmpyw
    UINT64_C(3877634272),	// M4_pmpyw_acc
    UINT64_C(3854565600),	// M4_vpmpyh
    UINT64_C(3886022880),	// M4_vpmpyh_acc
    UINT64_C(3927965888),	// M4_vrmpyeh_acc_s0
    UINT64_C(3936354496),	// M4_vrmpyeh_acc_s1
    UINT64_C(3896508544),	// M4_vrmpyeh_s0
    UINT64_C(3904897152),	// M4_vrmpyeh_s1
    UINT64_C(3932160192),	// M4_vrmpyoh_acc_s0
    UINT64_C(3940548800),	// M4_vrmpyoh_acc_s1
    UINT64_C(3894411328),	// M4_vrmpyoh_s0
    UINT64_C(3902799936),	// M4_vrmpyoh_s1
    UINT64_C(4022337600),	// M4_xor_and
    UINT64_C(4011851840),	// M4_xor_andn
    UINT64_C(4022337632),	// M4_xor_or
    UINT64_C(3397386240),	// M4_xor_xacc
    UINT64_C(3927965728),	// M5_vdmacbsu
    UINT64_C(3902799904),	// M5_vdmpybsu
    UINT64_C(3888119840),	// M5_vmacbsu
    UINT64_C(3883925536),	// M5_vmacbuu
    UINT64_C(3846176800),	// M5_vmpybsu
    UINT64_C(3850371104),	// M5_vmpybuu
    UINT64_C(3938451488),	// M5_vrmacbsu
    UINT64_C(3934257184),	// M5_vrmacbuu
    UINT64_C(3904897056),	// M5_vrmpybsu
    UINT64_C(3900702752),	// M5_vrmpybuu
    UINT64_C(3906994176),	// M6_vabsdiffb
    UINT64_C(3902799872),	// M6_vabsdiffub
    UINT64_C(1509949440),	// PS_call_stk
    UINT64_C(1352663040),	// PS_callr_nr
    UINT64_C(1384120320),	// PS_jmpret
    UINT64_C(1398800384),	// PS_jmpretf
    UINT64_C(1398802432),	// PS_jmpretfnew
    UINT64_C(1398806528),	// PS_jmpretfnewpt
    UINT64_C(1396703232),	// PS_jmprett
    UINT64_C(1396705280),	// PS_jmprettnew
    UINT64_C(1396709376),	// PS_jmprettnewpt
    UINT64_C(1224736768),	// PS_loadrbabs
    UINT64_C(1237319680),	// PS_loadrdabs
    UINT64_C(1228931072),	// PS_loadrhabs
    UINT64_C(1233125376),	// PS_loadriabs
    UINT64_C(1226833920),	// PS_loadrubabs
    UINT64_C(1231028224),	// PS_loadruhabs
    UINT64_C(1207959552),	// PS_storerbabs
    UINT64_C(1218445312),	// PS_storerbnewabs
    UINT64_C(1220542464),	// PS_storerdabs
    UINT64_C(1214251008),	// PS_storerfabs
    UINT64_C(1212153856),	// PS_storerhabs
    UINT64_C(1218447360),	// PS_storerhnewabs
    UINT64_C(1216348160),	// PS_storeriabs
    UINT64_C(1218449408),	// PS_storerinewabs
    UINT64_C(1509949440),	// RESTORE_DEALLOC_BEFORE_TAILCALL_V4
    UINT64_C(1509949440),	// RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT
    UINT64_C(1509949440),	// RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT_PIC
    UINT64_C(1509949440),	// RESTORE_DEALLOC_BEFORE_TAILCALL_V4_PIC
    UINT64_C(1476395008),	// RESTORE_DEALLOC_RET_JMP_V4
    UINT64_C(1476395008),	// RESTORE_DEALLOC_RET_JMP_V4_EXT
    UINT64_C(1476395008),	// RESTORE_DEALLOC_RET_JMP_V4_EXT_PIC
    UINT64_C(1476395008),	// RESTORE_DEALLOC_RET_JMP_V4_PIC
    UINT64_C(3288334336),	// S2_addasl_rrri
    UINT64_C(2692743168),	// S2_allocframe
    UINT64_C(2147483712),	// S2_asl_i_p
    UINT64_C(2181038272),	// S2_asl_i_p_acc
    UINT64_C(2185232448),	// S2_asl_i_p_and
    UINT64_C(2181038144),	// S2_asl_i_p_nac
    UINT64_C(2185232576),	// S2_asl_i_p_or
    UINT64_C(2189426752),	// S2_asl_i_p_xacc
    UINT64_C(2348810304),	// S2_asl_i_r
    UINT64_C(2382364864),	// S2_asl_i_r_acc
    UINT64_C(2386559040),	// S2_asl_i_r_and
    UINT64_C(2382364736),	// S2_asl_i_r_nac
    UINT64_C(2386559168),	// S2_asl_i_r_or
    UINT64_C(2353004608),	// S2_asl_i_r_sat
    UINT64_C(2390753344),	// S2_asl_i_r_xacc
    UINT64_C(2155872320),	// S2_asl_i_vh
    UINT64_C(2151678016),	// S2_asl_i_vw
    UINT64_C(3279945856),	// S2_asl_r_p
    UINT64_C(3418357888),	// S2_asl_r_p_acc
    UINT64_C(3409969280),	// S2_asl_r_p_and
    UINT64_C(3414163584),	// S2_asl_r_p_nac
    UINT64_C(3405774976),	// S2_asl_r_p_or
    UINT64_C(3412066432),	// S2_asl_r_p_xor
    UINT64_C(3326083200),	// S2_asl_r_r
    UINT64_C(3435135104),	// S2_asl_r_r_acc
    UINT64_C(3426746496),	// S2_asl_r_r_and
    UINT64_C(3430940800),	// S2_asl_r_r_nac
    UINT64_C(3422552192),	// S2_asl_r_r_or
    UINT64_C(3321888896),	// S2_asl_r_r_sat
    UINT64_C(3275751552),	// S2_asl_r_vh
    UINT64_C(3271557248),	// S2_asl_r_vw
    UINT64_C(2147483648),	// S2_asr_i_p
    UINT64_C(2181038208),	// S2_asr_i_p_acc
    UINT64_C(2185232384),	// S2_asr_i_p_and
    UINT64_C(2181038080),	// S2_asr_i_p_nac
    UINT64_C(2185232512),	// S2_asr_i_p_or
    UINT64_C(2160066784),	// S2_asr_i_p_rnd
    UINT64_C(2348810240),	// S2_asr_i_r
    UINT64_C(2382364800),	// S2_asr_i_r_acc
    UINT64_C(2386558976),	// S2_asr_i_r_and
    UINT64_C(2382364672),	// S2_asr_i_r_nac
    UINT64_C(2386559104),	// S2_asr_i_r_or
    UINT64_C(2353004544),	// S2_asr_i_r_rnd
    UINT64_C(2294284352),	// S2_asr_i_svw_trun
    UINT64_C(2155872256),	// S2_asr_i_vh
    UINT64_C(2151677952),	// S2_asr_i_vw
    UINT64_C(3279945728),	// S2_asr_r_p
    UINT64_C(3418357760),	// S2_asr_r_p_acc
    UINT64_C(3409969152),	// S2_asr_r_p_and
    UINT64_C(3414163456),	// S2_asr_r_p_nac
    UINT64_C(3405774848),	// S2_asr_r_p_or
    UINT64_C(3412066304),	// S2_asr_r_p_xor
    UINT64_C(3326083072),	// S2_asr_r_r
    UINT64_C(3435134976),	// S2_asr_r_r_acc
    UINT64_C(3426746368),	// S2_asr_r_r_and
    UINT64_C(3430940672),	// S2_asr_r_r_nac
    UINT64_C(3422552064),	// S2_asr_r_r_or
    UINT64_C(3321888768),	// S2_asr_r_r_sat
    UINT64_C(3305111616),	// S2_asr_r_svw_trun
    UINT64_C(3275751424),	// S2_asr_r_vh
    UINT64_C(3271557120),	// S2_asr_r_vw
    UINT64_C(2353004736),	// S2_brev
    UINT64_C(2160066752),	// S2_brevp
    UINT64_C(3250585792),	// S2_cabacdecbin
    UINT64_C(2348810400),	// S2_cl0
    UINT64_C(2285895744),	// S2_cl0p
    UINT64_C(2348810432),	// S2_cl1
    UINT64_C(2285895808),	// S2_cl1p
    UINT64_C(2348810368),	// S2_clb
    UINT64_C(2348810464),	// S2_clbnorm
    UINT64_C(2285895680),	// S2_clbp
    UINT64_C(2361393184),	// S2_clrbit_i
    UINT64_C(3330277440),	// S2_clrbit_r
    UINT64_C(2353004672),	// S2_ct0
    UINT64_C(2296381504),	// S2_ct0p
    UINT64_C(2353004704),	// S2_ct1
    UINT64_C(2296381568),	// S2_ct1p
    UINT64_C(2160066688),	// S2_deinterleave
    UINT64_C(2365587456),	// S2_extractu
    UINT64_C(3372220416),	// S2_extractu_rp
    UINT64_C(2164260864),	// S2_extractup
    UINT64_C(3238002688),	// S2_extractup_rp
    UINT64_C(2399141888),	// S2_insert
    UINT64_C(3355443200),	// S2_insert_rp
    UINT64_C(2197815296),	// S2_insertp
    UINT64_C(3388997632),	// S2_insertp_rp
    UINT64_C(2160066720),	// S2_interleave
    UINT64_C(3246391488),	// S2_lfsp
    UINT64_C(3279945920),	// S2_lsl_r_p
    UINT64_C(3418357952),	// S2_lsl_r_p_acc
    UINT64_C(3409969344),	// S2_lsl_r_p_and
    UINT64_C(3414163648),	// S2_lsl_r_p_nac
    UINT64_C(3405775040),	// S2_lsl_r_p_or
    UINT64_C(3412066496),	// S2_lsl_r_p_xor
    UINT64_C(3326083264),	// S2_lsl_r_r
    UINT64_C(3435135168),	// S2_lsl_r_r_acc
    UINT64_C(3426746560),	// S2_lsl_r_r_and
    UINT64_C(3430940864),	// S2_lsl_r_r_nac
    UINT64_C(3422552256),	// S2_lsl_r_r_or
    UINT64_C(3275751616),	// S2_lsl_r_vh
    UINT64_C(3271557312),	// S2_lsl_r_vw
    UINT64_C(2147483680),	// S2_lsr_i_p
    UINT64_C(2181038240),	// S2_lsr_i_p_acc
    UINT64_C(2185232416),	// S2_lsr_i_p_and
    UINT64_C(2181038112),	// S2_lsr_i_p_nac
    UINT64_C(2185232544),	// S2_lsr_i_p_or
    UINT64_C(2189426720),	// S2_lsr_i_p_xacc
    UINT64_C(2348810272),	// S2_lsr_i_r
    UINT64_C(2382364832),	// S2_lsr_i_r_acc
    UINT64_C(2386559008),	// S2_lsr_i_r_and
    UINT64_C(2382364704),	// S2_lsr_i_r_nac
    UINT64_C(2386559136),	// S2_lsr_i_r_or
    UINT64_C(2390753312),	// S2_lsr_i_r_xacc
    UINT64_C(2155872288),	// S2_lsr_i_vh
    UINT64_C(2151677984),	// S2_lsr_i_vw
    UINT64_C(3279945792),	// S2_lsr_r_p
    UINT64_C(3418357824),	// S2_lsr_r_p_acc
    UINT64_C(3409969216),	// S2_lsr_r_p_and
    UINT64_C(3414163520),	// S2_lsr_r_p_nac
    UINT64_C(3405774912),	// S2_lsr_r_p_or
    UINT64_C(3412066368),	// S2_lsr_r_p_xor
    UINT64_C(3326083136),	// S2_lsr_r_r
    UINT64_C(3435135040),	// S2_lsr_r_r_acc
    UINT64_C(3426746432),	// S2_lsr_r_r_and
    UINT64_C(3430940736),	// S2_lsr_r_r_nac
    UINT64_C(3422552128),	// S2_lsr_r_r_or
    UINT64_C(3275751488),	// S2_lsr_r_vh
    UINT64_C(3271557184),	// S2_lsr_r_vw
    UINT64_C(2365595648),	// S2_mask
    UINT64_C(4118806528),	// S2_packhl
    UINT64_C(3489660928),	// S2_parityp
    UINT64_C(1140850688),	// S2_pstorerbf_io
    UINT64_C(2868912132),	// S2_pstorerbf_pi
    UINT64_C(2868912260),	// S2_pstorerbfnew_pi
    UINT64_C(1151336448),	// S2_pstorerbnewf_io
    UINT64_C(2879397892),	// S2_pstorerbnewf_pi
    UINT64_C(2879398020),	// S2_pstorerbnewfnew_pi
    UINT64_C(1084227584),	// S2_pstorerbnewt_io
    UINT64_C(2879397888),	// S2_pstorerbnewt_pi
    UINT64_C(2879398016),	// S2_pstorerbnewtnew_pi
    UINT64_C(1073741824),	// S2_pstorerbt_io
    UINT64_C(2868912128),	// S2_pstorerbt_pi
    UINT64_C(2868912256),	// S2_pstorerbtnew_pi
    UINT64_C(1153433600),	// S2_pstorerdf_io
    UINT64_C(2881495044),	// S2_pstorerdf_pi
    UINT64_C(2881495172),	// S2_pstorerdfnew_pi
    UINT64_C(1086324736),	// S2_pstorerdt_io
    UINT64_C(2881495040),	// S2_pstorerdt_pi
    UINT64_C(2881495168),	// S2_pstorerdtnew_pi
    UINT64_C(1147142144),	// S2_pstorerff_io
    UINT64_C(2875203588),	// S2_pstorerff_pi
    UINT64_C(2875203716),	// S2_pstorerffnew_pi
    UINT64_C(1080033280),	// S2_pstorerft_io
    UINT64_C(2875203584),	// S2_pstorerft_pi
    UINT64_C(2875203712),	// S2_pstorerftnew_pi
    UINT64_C(1145044992),	// S2_pstorerhf_io
    UINT64_C(2873106436),	// S2_pstorerhf_pi
    UINT64_C(2873106564),	// S2_pstorerhfnew_pi
    UINT64_C(1151338496),	// S2_pstorerhnewf_io
    UINT64_C(2879399940),	// S2_pstorerhnewf_pi
    UINT64_C(2879400068),	// S2_pstorerhnewfnew_pi
    UINT64_C(1084229632),	// S2_pstorerhnewt_io
    UINT64_C(2879399936),	// S2_pstorerhnewt_pi
    UINT64_C(2879400064),	// S2_pstorerhnewtnew_pi
    UINT64_C(1077936128),	// S2_pstorerht_io
    UINT64_C(2873106432),	// S2_pstorerht_pi
    UINT64_C(2873106560),	// S2_pstorerhtnew_pi
    UINT64_C(1149239296),	// S2_pstorerif_io
    UINT64_C(2877300740),	// S2_pstorerif_pi
    UINT64_C(2877300868),	// S2_pstorerifnew_pi
    UINT64_C(1151340544),	// S2_pstorerinewf_io
    UINT64_C(2879401988),	// S2_pstorerinewf_pi
    UINT64_C(2879402116),	// S2_pstorerinewfnew_pi
    UINT64_C(1084231680),	// S2_pstorerinewt_io
    UINT64_C(2879401984),	// S2_pstorerinewt_pi
    UINT64_C(2879402112),	// S2_pstorerinewtnew_pi
    UINT64_C(1082130432),	// S2_pstorerit_io
    UINT64_C(2877300736),	// S2_pstorerit_pi
    UINT64_C(2877300864),	// S2_pstoreritnew_pi
    UINT64_C(2361393152),	// S2_setbit_i
    UINT64_C(3330277376),	// S2_setbit_r
    UINT64_C(3238002752),	// S2_shuffeb
    UINT64_C(3238002880),	// S2_shuffeh
    UINT64_C(3238002816),	// S2_shuffob
    UINT64_C(3246391296),	// S2_shuffoh
    UINT64_C(2701131776),	// S2_storerb_io
    UINT64_C(2936012800),	// S2_storerb_pbr
    UINT64_C(2835349504),	// S2_storerb_pci
    UINT64_C(2835349506),	// S2_storerb_pcr
    UINT64_C(2868903936),	// S2_storerb_pi
    UINT64_C(2902458368),	// S2_storerb_pr
    UINT64_C(1207959552),	// S2_storerbgp
    UINT64_C(2711617536),	// S2_storerbnew_io
    UINT64_C(2946498560),	// S2_storerbnew_pbr
    UINT64_C(2845835264),	// S2_storerbnew_pci
    UINT64_C(2845835266),	// S2_storerbnew_pcr
    UINT64_C(2879389696),	// S2_storerbnew_pi
    UINT64_C(2912944128),	// S2_storerbnew_pr
    UINT64_C(1218445312),	// S2_storerbnewgp
    UINT64_C(2713714688),	// S2_storerd_io
    UINT64_C(2948595712),	// S2_storerd_pbr
    UINT64_C(2847932416),	// S2_storerd_pci
    UINT64_C(2847932418),	// S2_storerd_pcr
    UINT64_C(2881486848),	// S2_storerd_pi
    UINT64_C(2915041280),	// S2_storerd_pr
    UINT64_C(1220542464),	// S2_storerdgp
    UINT64_C(2707423232),	// S2_storerf_io
    UINT64_C(2942304256),	// S2_storerf_pbr
    UINT64_C(2841640960),	// S2_storerf_pci
    UINT64_C(2841640962),	// S2_storerf_pcr
    UINT64_C(2875195392),	// S2_storerf_pi
    UINT64_C(2908749824),	// S2_storerf_pr
    UINT64_C(1214251008),	// S2_storerfgp
    UINT64_C(2705326080),	// S2_storerh_io
    UINT64_C(2940207104),	// S2_storerh_pbr
    UINT64_C(2839543808),	// S2_storerh_pci
    UINT64_C(2839543810),	// S2_storerh_pcr
    UINT64_C(2873098240),	// S2_storerh_pi
    UINT64_C(2906652672),	// S2_storerh_pr
    UINT64_C(1212153856),	// S2_storerhgp
    UINT64_C(2711619584),	// S2_storerhnew_io
    UINT64_C(2946500608),	// S2_storerhnew_pbr
    UINT64_C(2845837312),	// S2_storerhnew_pci
    UINT64_C(2845837314),	// S2_storerhnew_pcr
    UINT64_C(2879391744),	// S2_storerhnew_pi
    UINT64_C(2912946176),	// S2_storerhnew_pr
    UINT64_C(1218447360),	// S2_storerhnewgp
    UINT64_C(2709520384),	// S2_storeri_io
    UINT64_C(2944401408),	// S2_storeri_pbr
    UINT64_C(2843738112),	// S2_storeri_pci
    UINT64_C(2843738114),	// S2_storeri_pcr
    UINT64_C(2877292544),	// S2_storeri_pi
    UINT64_C(2910846976),	// S2_storeri_pr
    UINT64_C(1216348160),	// S2_storerigp
    UINT64_C(2711621632),	// S2_storerinew_io
    UINT64_C(2946502656),	// S2_storerinew_pbr
    UINT64_C(2845839360),	// S2_storerinew_pci
    UINT64_C(2845839362),	// S2_storerinew_pcr
    UINT64_C(2879393792),	// S2_storerinew_pi
    UINT64_C(2912948224),	// S2_storerinew_pr
    UINT64_C(1218449408),	// S2_storerinewgp
    UINT64_C(2694840320),	// S2_storew_locked
    UINT64_C(2357198848),	// S2_svsathb
    UINT64_C(2357198912),	// S2_svsathub
    UINT64_C(2264924160),	// S2_tableidxb
    UINT64_C(2277507072),	// S2_tableidxd
    UINT64_C(2269118464),	// S2_tableidxh
    UINT64_C(2273312768),	// S2_tableidxw
    UINT64_C(2361393216),	// S2_togglebit_i
    UINT64_C(3330277504),	// S2_togglebit_r
    UINT64_C(2231369728),	// S2_tstbit_i
    UINT64_C(3338665984),	// S2_tstbit_r
    UINT64_C(3221225472),	// S2_valignib
    UINT64_C(3254779904),	// S2_valignrb
    UINT64_C(3284140096),	// S2_vcnegh
    UINT64_C(3284140032),	// S2_vcrotate
    UINT64_C(3407880416),	// S2_vrcnegh
    UINT64_C(2290090112),	// S2_vrndpackwh
    UINT64_C(2290090176),	// S2_vrndpackwhs
    UINT64_C(2281701568),	// S2_vsathb
    UINT64_C(2147483872),	// S2_vsathb_nopack
    UINT64_C(2281701376),	// S2_vsathub
    UINT64_C(2147483776),	// S2_vsathub_nopack
    UINT64_C(2281701440),	// S2_vsatwh
    UINT64_C(2147483840),	// S2_vsatwh_nopack
    UINT64_C(2281701504),	// S2_vsatwuh
    UINT64_C(2147483808),	// S2_vsatwuh_nopack
    UINT64_C(2353004768),	// S2_vsplatrb
    UINT64_C(2218786880),	// S2_vsplatrh
    UINT64_C(3229614080),	// S2_vspliceib
    UINT64_C(3263168512),	// S2_vsplicerb
    UINT64_C(2214592512),	// S2_vsxtbh
    UINT64_C(2214592640),	// S2_vsxthw
    UINT64_C(2290090048),	// S2_vtrunehb
    UINT64_C(3246391360),	// S2_vtrunewh
    UINT64_C(2290089984),	// S2_vtrunohb
    UINT64_C(3246391424),	// S2_vtrunowh
    UINT64_C(2214592576),	// S2_vzxtbh
    UINT64_C(2214592704),	// S2_vzxthw
    UINT64_C(3674210304),	// S4_addaddi
    UINT64_C(3724541956),	// S4_addi_asl_ri
    UINT64_C(3724541972),	// S4_addi_lsr_ri
    UINT64_C(3724541952),	// S4_andi_asl_ri
    UINT64_C(3724541968),	// S4_andi_lsr_ri
    UINT64_C(2350907392),	// S4_clbaddi
    UINT64_C(2287992896),	// S4_clbpaddi
    UINT64_C(2287992832),	// S4_clbpnorm
    UINT64_C(2373976064),	// S4_extract
    UINT64_C(3372220480),	// S4_extract_rp
    UINT64_C(2315255808),	// S4_extractp
    UINT64_C(3250585728),	// S4_extractp_rp
    UINT64_C(3330277568),	// S4_lsli
    UINT64_C(2233466880),	// S4_ntstbit_i
    UINT64_C(3340763136),	// S4_ntstbit_r
    UINT64_C(3657433088),	// S4_or_andi
    UINT64_C(3661627392),	// S4_or_andix
    UINT64_C(3665821696),	// S4_or_ori
    UINT64_C(3724541954),	// S4_ori_asl_ri
    UINT64_C(3724541970),	// S4_ori_lsr_ri
    UINT64_C(3588227072),	// S4_parity
    UINT64_C(2936012932),	// S4_pstorerbf_abs
    UINT64_C(889192448),	// S4_pstorerbf_rr
    UINT64_C(2936021124),	// S4_pstorerbfnew_abs
    UINT64_C(1174405120),	// S4_pstorerbfnew_io
    UINT64_C(922746880),	// S4_pstorerbfnew_rr
    UINT64_C(2946498692),	// S4_pstorerbnewf_abs
    UINT64_C(899678208),	// S4_pstorerbnewf_rr
    UINT64_C(2946506884),	// S4_pstorerbnewfnew_abs
    UINT64_C(1184890880),	// S4_pstorerbnewfnew_io
    UINT64_C(933232640),	// S4_pstorerbnewfnew_rr
    UINT64_C(2946498688),	// S4_pstorerbnewt_abs
    UINT64_C(882900992),	// S4_pstorerbnewt_rr
    UINT64_C(2946506880),	// S4_pstorerbnewtnew_abs
    UINT64_C(1117782016),	// S4_pstorerbnewtnew_io
    UINT64_C(916455424),	// S4_pstorerbnewtnew_rr
    UINT64_C(2936012928),	// S4_pstorerbt_abs
    UINT64_C(872415232),	// S4_pstorerbt_rr
    UINT64_C(2936021120),	// S4_pstorerbtnew_abs
    UINT64_C(1107296256),	// S4_pstorerbtnew_io
    UINT64_C(905969664),	// S4_pstorerbtnew_rr
    UINT64_C(2948595844),	// S4_pstorerdf_abs
    UINT64_C(901775360),	// S4_pstorerdf_rr
    UINT64_C(2948604036),	// S4_pstorerdfnew_abs
    UINT64_C(1186988032),	// S4_pstorerdfnew_io
    UINT64_C(935329792),	// S4_pstorerdfnew_rr
    UINT64_C(2948595840),	// S4_pstorerdt_abs
    UINT64_C(884998144),	// S4_pstorerdt_rr
    UINT64_C(2948604032),	// S4_pstorerdtnew_abs
    UINT64_C(1119879168),	// S4_pstorerdtnew_io
    UINT64_C(918552576),	// S4_pstorerdtnew_rr
    UINT64_C(2942304388),	// S4_pstorerff_abs
    UINT64_C(895483904),	// S4_pstorerff_rr
    UINT64_C(2942312580),	// S4_pstorerffnew_abs
    UINT64_C(1180696576),	// S4_pstorerffnew_io
    UINT64_C(929038336),	// S4_pstorerffnew_rr
    UINT64_C(2942304384),	// S4_pstorerft_abs
    UINT64_C(878706688),	// S4_pstorerft_rr
    UINT64_C(2942312576),	// S4_pstorerftnew_abs
    UINT64_C(1113587712),	// S4_pstorerftnew_io
    UINT64_C(912261120),	// S4_pstorerftnew_rr
    UINT64_C(2940207236),	// S4_pstorerhf_abs
    UINT64_C(893386752),	// S4_pstorerhf_rr
    UINT64_C(2940215428),	// S4_pstorerhfnew_abs
    UINT64_C(1178599424),	// S4_pstorerhfnew_io
    UINT64_C(926941184),	// S4_pstorerhfnew_rr
    UINT64_C(2946500740),	// S4_pstorerhnewf_abs
    UINT64_C(899678216),	// S4_pstorerhnewf_rr
    UINT64_C(2946508932),	// S4_pstorerhnewfnew_abs
    UINT64_C(1184892928),	// S4_pstorerhnewfnew_io
    UINT64_C(933232648),	// S4_pstorerhnewfnew_rr
    UINT64_C(2946500736),	// S4_pstorerhnewt_abs
    UINT64_C(882901000),	// S4_pstorerhnewt_rr
    UINT64_C(2946508928),	// S4_pstorerhnewtnew_abs
    UINT64_C(1117784064),	// S4_pstorerhnewtnew_io
    UINT64_C(916455432),	// S4_pstorerhnewtnew_rr
    UINT64_C(2940207232),	// S4_pstorerht_abs
    UINT64_C(876609536),	// S4_pstorerht_rr
    UINT64_C(2940215424),	// S4_pstorerhtnew_abs
    UINT64_C(1111490560),	// S4_pstorerhtnew_io
    UINT64_C(910163968),	// S4_pstorerhtnew_rr
    UINT64_C(2944401540),	// S4_pstorerif_abs
    UINT64_C(897581056),	// S4_pstorerif_rr
    UINT64_C(2944409732),	// S4_pstorerifnew_abs
    UINT64_C(1182793728),	// S4_pstorerifnew_io
    UINT64_C(931135488),	// S4_pstorerifnew_rr
    UINT64_C(2946502788),	// S4_pstorerinewf_abs
    UINT64_C(899678224),	// S4_pstorerinewf_rr
    UINT64_C(2946510980),	// S4_pstorerinewfnew_abs
    UINT64_C(1184894976),	// S4_pstorerinewfnew_io
    UINT64_C(933232656),	// S4_pstorerinewfnew_rr
    UINT64_C(2946502784),	// S4_pstorerinewt_abs
    UINT64_C(882901008),	// S4_pstorerinewt_rr
    UINT64_C(2946510976),	// S4_pstorerinewtnew_abs
    UINT64_C(1117786112),	// S4_pstorerinewtnew_io
    UINT64_C(916455440),	// S4_pstorerinewtnew_rr
    UINT64_C(2944401536),	// S4_pstorerit_abs
    UINT64_C(880803840),	// S4_pstorerit_rr
    UINT64_C(2944409728),	// S4_pstoreritnew_abs
    UINT64_C(1115684864),	// S4_pstoreritnew_io
    UINT64_C(914358272),	// S4_pstoreritnew_rr
    UINT64_C(2699034624),	// S4_stored_locked
    UINT64_C(1006632960),	// S4_storeirb_io
    UINT64_C(947912704),	// S4_storeirbf_io
    UINT64_C(964689920),	// S4_storeirbfnew_io
    UINT64_C(939524096),	// S4_storeirbt_io
    UINT64_C(956301312),	// S4_storeirbtnew_io
    UINT64_C(1008730112),	// S4_storeirh_io
    UINT64_C(950009856),	// S4_storeirhf_io
    UINT64_C(966787072),	// S4_storeirhfnew_io
    UINT64_C(941621248),	// S4_storeirht_io
    UINT64_C(958398464),	// S4_storeirhtnew_io
    UINT64_C(1010827264),	// S4_storeiri_io
    UINT64_C(952107008),	// S4_storeirif_io
    UINT64_C(968884224),	// S4_storeirifnew_io
    UINT64_C(943718400),	// S4_storeirit_io
    UINT64_C(960495616),	// S4_storeiritnew_io
    UINT64_C(2868904064),	// S4_storerb_ap
    UINT64_C(989855744),	// S4_storerb_rr
    UINT64_C(2902458496),	// S4_storerb_ur
    UINT64_C(2879389824),	// S4_storerbnew_ap
    UINT64_C(1000341504),	// S4_storerbnew_rr
    UINT64_C(2912944256),	// S4_storerbnew_ur
    UINT64_C(2881486976),	// S4_storerd_ap
    UINT64_C(1002438656),	// S4_storerd_rr
    UINT64_C(2915041408),	// S4_storerd_ur
    UINT64_C(2875195520),	// S4_storerf_ap
    UINT64_C(996147200),	// S4_storerf_rr
    UINT64_C(2908749952),	// S4_storerf_ur
    UINT64_C(2873098368),	// S4_storerh_ap
    UINT64_C(994050048),	// S4_storerh_rr
    UINT64_C(2906652800),	// S4_storerh_ur
    UINT64_C(2879391872),	// S4_storerhnew_ap
    UINT64_C(1000341512),	// S4_storerhnew_rr
    UINT64_C(2912946304),	// S4_storerhnew_ur
    UINT64_C(2877292672),	// S4_storeri_ap
    UINT64_C(998244352),	// S4_storeri_rr
    UINT64_C(2910847104),	// S4_storeri_ur
    UINT64_C(2879393920),	// S4_storerinew_ap
    UINT64_C(1000341520),	// S4_storerinew_rr
    UINT64_C(2912948352),	// S4_storerinew_ur
    UINT64_C(3682598912),	// S4_subaddi
    UINT64_C(3724541958),	// S4_subi_asl_ri
    UINT64_C(3724541974),	// S4_subi_lsr_ri
    UINT64_C(3284140224),	// S4_vrcrotate
    UINT64_C(3416260608),	// S4_vrcrotate_acc
    UINT64_C(3242197120),	// S4_vxaddsubh
    UINT64_C(3250585600),	// S4_vxaddsubhr
    UINT64_C(3242196992),	// S4_vxaddsubw
    UINT64_C(3242197184),	// S4_vxsubaddh
    UINT64_C(3250585664),	// S4_vxsubaddhr
    UINT64_C(3242197056),	// S4_vxsubaddw
    UINT64_C(2287992960),	// S5_asrhub_rnd_sat
    UINT64_C(2287992992),	// S5_asrhub_sat
    UINT64_C(2287992928),	// S5_popcountp
    UINT64_C(2149580800),	// S5_vasrhrnd
    UINT64_C(2147483744),	// S6_rol_i_p
    UINT64_C(2181038304),	// S6_rol_i_p_acc
    UINT64_C(2185232480),	// S6_rol_i_p_and
    UINT64_C(2181038176),	// S6_rol_i_p_nac
    UINT64_C(2185232608),	// S6_rol_i_p_or
    UINT64_C(2189426784),	// S6_rol_i_p_xacc
    UINT64_C(2348810336),	// S6_rol_i_r
    UINT64_C(2382364896),	// S6_rol_i_r_acc
    UINT64_C(2386559072),	// S6_rol_i_r_and
    UINT64_C(2382364768),	// S6_rol_i_r_nac
    UINT64_C(2386559200),	// S6_rol_i_r_or
    UINT64_C(2390753376),	// S6_rol_i_r_xacc
    UINT64_C(2218786944),	// S6_vsplatrbp
    UINT64_C(3246391392),	// S6_vtrunehb_ppp
    UINT64_C(3246391456),	// S6_vtrunohb_ppp
    UINT64_C(0),	// SA1_addi
    UINT64_C(6144),	// SA1_addrx
    UINT64_C(3072),	// SA1_addsp
    UINT64_C(4608),	// SA1_and1
    UINT64_C(6768),	// SA1_clrf
    UINT64_C(6736),	// SA1_clrfnew
    UINT64_C(6752),	// SA1_clrt
    UINT64_C(6720),	// SA1_clrtnew
    UINT64_C(6400),	// SA1_cmpeqi
    UINT64_C(7168),	// SA1_combine0i
    UINT64_C(7176),	// SA1_combine1i
    UINT64_C(7184),	// SA1_combine2i
    UINT64_C(7192),	// SA1_combine3i
    UINT64_C(7432),	// SA1_combinerz
    UINT64_C(7424),	// SA1_combinezr
    UINT64_C(4864),	// SA1_dec
    UINT64_C(4352),	// SA1_inc
    UINT64_C(2048),	// SA1_seti
    UINT64_C(6656),	// SA1_setin1
    UINT64_C(5376),	// SA1_sxtb
    UINT64_C(5120),	// SA1_sxth
    UINT64_C(4096),	// SA1_tfr
    UINT64_C(5888),	// SA1_zxtb
    UINT64_C(5632),	// SA1_zxth
    UINT64_C(1509949440),	// SAVE_REGISTERS_CALL_V4
    UINT64_C(1509949440),	// SAVE_REGISTERS_CALL_V4STK
    UINT64_C(1509949440),	// SAVE_REGISTERS_CALL_V4STK_EXT
    UINT64_C(1509949440),	// SAVE_REGISTERS_CALL_V4STK_EXT_PIC
    UINT64_C(1509949440),	// SAVE_REGISTERS_CALL_V4STK_PIC
    UINT64_C(1509949440),	// SAVE_REGISTERS_CALL_V4_EXT
    UINT64_C(1509949440),	// SAVE_REGISTERS_CALL_V4_EXT_PIC
    UINT64_C(1509949440),	// SAVE_REGISTERS_CALL_V4_PIC
    UINT64_C(0),	// SL1_loadri_io
    UINT64_C(4096),	// SL1_loadrub_io
    UINT64_C(7936),	// SL2_deallocframe
    UINT64_C(8128),	// SL2_jumpr31
    UINT64_C(8133),	// SL2_jumpr31_f
    UINT64_C(8135),	// SL2_jumpr31_fnew
    UINT64_C(8132),	// SL2_jumpr31_t
    UINT64_C(8134),	// SL2_jumpr31_tnew
    UINT64_C(4096),	// SL2_loadrb_io
    UINT64_C(7680),	// SL2_loadrd_sp
    UINT64_C(0),	// SL2_loadrh_io
    UINT64_C(7168),	// SL2_loadri_sp
    UINT64_C(2048),	// SL2_loadruh_io
    UINT64_C(8000),	// SL2_return
    UINT64_C(8005),	// SL2_return_f
    UINT64_C(8007),	// SL2_return_fnew
    UINT64_C(8004),	// SL2_return_t
    UINT64_C(8006),	// SL2_return_tnew
    UINT64_C(4096),	// SS1_storeb_io
    UINT64_C(0),	// SS1_storew_io
    UINT64_C(7168),	// SS2_allocframe
    UINT64_C(4608),	// SS2_storebi0
    UINT64_C(4864),	// SS2_storebi1
    UINT64_C(2560),	// SS2_stored_sp
    UINT64_C(0),	// SS2_storeh_io
    UINT64_C(2048),	// SS2_storew_sp
    UINT64_C(4096),	// SS2_storewi0
    UINT64_C(4352),	// SS2_storewi1
    UINT64_C(0),	// TFRI64_V2_ext
    UINT64_C(0),	// TFRI64_V4
    UINT64_C(2449473568),	// V6_extractw
    UINT64_C(432013376),	// V6_lvsplatb
    UINT64_C(432013344),	// V6_lvsplath
    UINT64_C(429916192),	// V6_lvsplatw
    UINT64_C(503513088),	// V6_pred_and
    UINT64_C(503513108),	// V6_pred_and_n
    UINT64_C(503513096),	// V6_pred_not
    UINT64_C(503513092),	// V6_pred_or
    UINT64_C(503513104),	// V6_pred_or_n
    UINT64_C(429916228),	// V6_pred_scalar2
    UINT64_C(429916236),	// V6_pred_scalar2v2
    UINT64_C(503513100),	// V6_pred_xor
    UINT64_C(503513112),	// V6_shuffeqh
    UINT64_C(503513116),	// V6_shuffeqw
    UINT64_C(671088864),	// V6_vL32Ub_ai
    UINT64_C(687866080),	// V6_vL32Ub_pi
    UINT64_C(721420512),	// V6_vL32Ub_ppu
    UINT64_C(671088640),	// V6_vL32b_ai
    UINT64_C(671088672),	// V6_vL32b_cur_ai
    UINT64_C(679477408),	// V6_vL32b_cur_npred_ai
    UINT64_C(696254624),	// V6_vL32b_cur_npred_pi
    UINT64_C(729809056),	// V6_vL32b_cur_npred_ppu
    UINT64_C(687865888),	// V6_vL32b_cur_pi
    UINT64_C(721420320),	// V6_vL32b_cur_ppu
    UINT64_C(679477376),	// V6_vL32b_cur_pred_ai
    UINT64_C(696254592),	// V6_vL32b_cur_pred_pi
    UINT64_C(729809024),	// V6_vL32b_cur_pred_ppu
    UINT64_C(679477344),	// V6_vL32b_npred_ai
    UINT64_C(696254560),	// V6_vL32b_npred_pi
    UINT64_C(729808992),	// V6_vL32b_npred_ppu
    UINT64_C(675282944),	// V6_vL32b_nt_ai
    UINT64_C(675282976),	// V6_vL32b_nt_cur_ai
    UINT64_C(683671712),	// V6_vL32b_nt_cur_npred_ai
    UINT64_C(700448928),	// V6_vL32b_nt_cur_npred_pi
    UINT64_C(734003360),	// V6_vL32b_nt_cur_npred_ppu
    UINT64_C(692060192),	// V6_vL32b_nt_cur_pi
    UINT64_C(725614624),	// V6_vL32b_nt_cur_ppu
    UINT64_C(683671680),	// V6_vL32b_nt_cur_pred_ai
    UINT64_C(700448896),	// V6_vL32b_nt_cur_pred_pi
    UINT64_C(734003328),	// V6_vL32b_nt_cur_pred_ppu
    UINT64_C(683671648),	// V6_vL32b_nt_npred_ai
    UINT64_C(700448864),	// V6_vL32b_nt_npred_pi
    UINT64_C(734003296),	// V6_vL32b_nt_npred_ppu
    UINT64_C(692060160),	// V6_vL32b_nt_pi
    UINT64_C(725614592),	// V6_vL32b_nt_ppu
    UINT64_C(683671616),	// V6_vL32b_nt_pred_ai
    UINT64_C(700448832),	// V6_vL32b_nt_pred_pi
    UINT64_C(734003264),	// V6_vL32b_nt_pred_ppu
    UINT64_C(675283008),	// V6_vL32b_nt_tmp_ai
    UINT64_C(683671776),	// V6_vL32b_nt_tmp_npred_ai
    UINT64_C(700448992),	// V6_vL32b_nt_tmp_npred_pi
    UINT64_C(734003424),	// V6_vL32b_nt_tmp_npred_ppu
    UINT64_C(692060224),	// V6_vL32b_nt_tmp_pi
    UINT64_C(725614656),	// V6_vL32b_nt_tmp_ppu
    UINT64_C(683671744),	// V6_vL32b_nt_tmp_pred_ai
    UINT64_C(700448960),	// V6_vL32b_nt_tmp_pred_pi
    UINT64_C(734003392),	// V6_vL32b_nt_tmp_pred_ppu
    UINT64_C(687865856),	// V6_vL32b_pi
    UINT64_C(721420288),	// V6_vL32b_ppu
    UINT64_C(679477312),	// V6_vL32b_pred_ai
    UINT64_C(696254528),	// V6_vL32b_pred_pi
    UINT64_C(729808960),	// V6_vL32b_pred_ppu
    UINT64_C(671088704),	// V6_vL32b_tmp_ai
    UINT64_C(679477472),	// V6_vL32b_tmp_npred_ai
    UINT64_C(696254688),	// V6_vL32b_tmp_npred_pi
    UINT64_C(729809120),	// V6_vL32b_tmp_npred_ppu
    UINT64_C(687865920),	// V6_vL32b_tmp_pi
    UINT64_C(721420352),	// V6_vL32b_tmp_ppu
    UINT64_C(679477440),	// V6_vL32b_tmp_pred_ai
    UINT64_C(696254656),	// V6_vL32b_tmp_pred_pi
    UINT64_C(729809088),	// V6_vL32b_tmp_pred_ppu
    UINT64_C(673186016),	// V6_vS32Ub_ai
    UINT64_C(681574624),	// V6_vS32Ub_npred_ai
    UINT64_C(698351840),	// V6_vS32Ub_npred_pi
    UINT64_C(731906272),	// V6_vS32Ub_npred_ppu
    UINT64_C(689963232),	// V6_vS32Ub_pi
    UINT64_C(723517664),	// V6_vS32Ub_ppu
    UINT64_C(681574592),	// V6_vS32Ub_pred_ai
    UINT64_C(698351808),	// V6_vS32Ub_pred_pi
    UINT64_C(731906240),	// V6_vS32Ub_pred_ppu
    UINT64_C(673185792),	// V6_vS32b_ai
    UINT64_C(673185824),	// V6_vS32b_new_ai
    UINT64_C(681574504),	// V6_vS32b_new_npred_ai
    UINT64_C(698351720),	// V6_vS32b_new_npred_pi
    UINT64_C(731906152),	// V6_vS32b_new_npred_ppu
    UINT64_C(689963040),	// V6_vS32b_new_pi
    UINT64_C(723517472),	// V6_vS32b_new_ppu
    UINT64_C(681574464),	// V6_vS32b_new_pred_ai
    UINT64_C(698351680),	// V6_vS32b_new_pred_pi
    UINT64_C(731906112),	// V6_vS32b_new_pred_ppu
    UINT64_C(681574432),	// V6_vS32b_npred_ai
    UINT64_C(698351648),	// V6_vS32b_npred_pi
    UINT64_C(731906080),	// V6_vS32b_npred_ppu
    UINT64_C(679477280),	// V6_vS32b_nqpred_ai
    UINT64_C(696254496),	// V6_vS32b_nqpred_pi
    UINT64_C(729808928),	// V6_vS32b_nqpred_ppu
    UINT64_C(677380096),	// V6_vS32b_nt_ai
    UINT64_C(677380128),	// V6_vS32b_nt_new_ai
    UINT64_C(685768824),	// V6_vS32b_nt_new_npred_ai
    UINT64_C(702546040),	// V6_vS32b_nt_new_npred_pi
    UINT64_C(736100472),	// V6_vS32b_nt_new_npred_ppu
    UINT64_C(694157344),	// V6_vS32b_nt_new_pi
    UINT64_C(727711776),	// V6_vS32b_nt_new_ppu
    UINT64_C(685768784),	// V6_vS32b_nt_new_pred_ai
    UINT64_C(702546000),	// V6_vS32b_nt_new_pred_pi
    UINT64_C(736100432),	// V6_vS32b_nt_new_pred_ppu
    UINT64_C(685768736),	// V6_vS32b_nt_npred_ai
    UINT64_C(702545952),	// V6_vS32b_nt_npred_pi
    UINT64_C(736100384),	// V6_vS32b_nt_npred_ppu
    UINT64_C(683671584),	// V6_vS32b_nt_nqpred_ai
    UINT64_C(700448800),	// V6_vS32b_nt_nqpred_pi
    UINT64_C(734003232),	// V6_vS32b_nt_nqpred_ppu
    UINT64_C(694157312),	// V6_vS32b_nt_pi
    UINT64_C(727711744),	// V6_vS32b_nt_ppu
    UINT64_C(685768704),	// V6_vS32b_nt_pred_ai
    UINT64_C(702545920),	// V6_vS32b_nt_pred_pi
    UINT64_C(736100352),	// V6_vS32b_nt_pred_ppu
    UINT64_C(683671552),	// V6_vS32b_nt_qpred_ai
    UINT64_C(700448768),	// V6_vS32b_nt_qpred_pi
    UINT64_C(734003200),	// V6_vS32b_nt_qpred_ppu
    UINT64_C(689963008),	// V6_vS32b_pi
    UINT64_C(723517440),	// V6_vS32b_ppu
    UINT64_C(681574400),	// V6_vS32b_pred_ai
    UINT64_C(698351616),	// V6_vS32b_pred_pi
    UINT64_C(731906048),	// V6_vS32b_pred_ppu
    UINT64_C(679477248),	// V6_vS32b_qpred_ai
    UINT64_C(696254464),	// V6_vS32b_qpred_pi
    UINT64_C(729808896),	// V6_vS32b_qpred_ppu
    UINT64_C(673185832),	// V6_vS32b_srls_ai
    UINT64_C(689963048),	// V6_vS32b_srls_pi
    UINT64_C(723517480),	// V6_vS32b_srls_ppu
    UINT64_C(503382144),	// V6_vabsb
    UINT64_C(503382176),	// V6_vabsb_sat
    UINT64_C(482344992),	// V6_vabsdiffh
    UINT64_C(482344960),	// V6_vabsdiffub
    UINT64_C(482345024),	// V6_vabsdiffuh
    UINT64_C(482345056),	// V6_vabsdiffw
    UINT64_C(503316480),	// V6_vabsh
    UINT64_C(503316512),	// V6_vabsh_sat
    UINT64_C(503316544),	// V6_vabsw
    UINT64_C(503316576),	// V6_vabsw_sat
    UINT64_C(530579648),	// V6_vaddb
    UINT64_C(476053632),	// V6_vaddb_dv
    UINT64_C(503390304),	// V6_vaddbnq
    UINT64_C(503390208),	// V6_vaddbq
    UINT64_C(520093696),	// V6_vaddbsat
    UINT64_C(513802240),	// V6_vaddbsat_dv
    UINT64_C(480256000),	// V6_vaddcarry
    UINT64_C(497033216),	// V6_vaddcarryo
    UINT64_C(494936064),	// V6_vaddcarrysat
    UINT64_C(520101888),	// V6_vaddclbh
    UINT64_C(520101920),	// V6_vaddclbw
    UINT64_C(530579680),	// V6_vaddh
    UINT64_C(476053664),	// V6_vaddh_dv
    UINT64_C(503390336),	// V6_vaddhnq
    UINT64_C(503390240),	// V6_vaddhq
    UINT64_C(473956448),	// V6_vaddhsat
    UINT64_C(478150688),	// V6_vaddhsat_dv
    UINT64_C(480247936),	// V6_vaddhw
    UINT64_C(471867456),	// V6_vaddhw_acc
    UINT64_C(480247872),	// V6_vaddubh
    UINT64_C(473964704),	// V6_vaddubh_acc
    UINT64_C(473956384),	// V6_vaddubsat
    UINT64_C(476053728),	// V6_vaddubsat_dv
    UINT64_C(513802368),	// V6_vaddububb_sat
    UINT64_C(473956416),	// V6_vadduhsat
    UINT64_C(478150656),	// V6_vadduhsat_dv
    UINT64_C(480247904),	// V6_vadduhw
    UINT64_C(473964672),	// V6_vadduhw_acc
    UINT64_C(526385184),	// V6_vadduwsat
    UINT64_C(513802304),	// V6_vadduwsat_dv
    UINT64_C(473956352),	// V6_vaddw
    UINT64_C(476053696),	// V6_vaddw_dv
    UINT64_C(503390368),	// V6_vaddwnq
    UINT64_C(503390272),	// V6_vaddwq
    UINT64_C(473956480),	// V6_vaddwsat
    UINT64_C(478150720),	// V6_vaddwsat_dv
    UINT64_C(452984832),	// V6_valignb
    UINT64_C(505421824),	// V6_valignbi
    UINT64_C(471859360),	// V6_vand
    UINT64_C(429917344),	// V6_vandnqrt
    UINT64_C(425731168),	// V6_vandnqrt_acc
    UINT64_C(429916320),	// V6_vandqrt
    UINT64_C(425730144),	// V6_vandqrt_acc
    UINT64_C(503521312),	// V6_vandvnqv
    UINT64_C(503521280),	// V6_vandvqv
    UINT64_C(429916232),	// V6_vandvrt
    UINT64_C(425730176),	// V6_vandvrt_acc
    UINT64_C(427819008),	// V6_vaslh
    UINT64_C(429924512),	// V6_vaslh_acc
    UINT64_C(530579616),	// V6_vaslhv
    UINT64_C(425722080),	// V6_vaslw
    UINT64_C(425730112),	// V6_vaslw_acc
    UINT64_C(530579584),	// V6_vaslwv
    UINT64_C(446701792),	// V6_vasr_into
    UINT64_C(425722048),	// V6_vasrh
    UINT64_C(427827424),	// V6_vasrh_acc
    UINT64_C(452993024),	// V6_vasrhbrndsat
    UINT64_C(402653184),	// V6_vasrhbsat
    UINT64_C(452985056),	// V6_vasrhubrndsat
    UINT64_C(452985024),	// V6_vasrhubsat
    UINT64_C(530579552),	// V6_vasrhv
    UINT64_C(402653408),	// V6_vasruhubrndsat
    UINT64_C(402661536),	// V6_vasruhubsat
    UINT64_C(402653216),	// V6_vasruwuhrndsat
    UINT64_C(402661504),	// V6_vasruwuhsat
    UINT64_C(425722016),	// V6_vasrw
    UINT64_C(425730208),	// V6_vasrw_acc
    UINT64_C(452984896),	// V6_vasrwh
    UINT64_C(452984960),	// V6_vasrwhrndsat
    UINT64_C(452984928),	// V6_vasrwhsat
    UINT64_C(402653248),	// V6_vasrwuhrndsat
    UINT64_C(452984992),	// V6_vasrwuhsat
    UINT64_C(530579456),	// V6_vasrwv
    UINT64_C(503521504),	// V6_vassign
    UINT64_C(520102016),	// V6_vavgb
    UINT64_C(520102048),	// V6_vavgbrnd
    UINT64_C(482345152),	// V6_vavgh
    UINT64_C(484442272),	// V6_vavghrnd
    UINT64_C(482345088),	// V6_vavgub
    UINT64_C(484442208),	// V6_vavgubrnd
    UINT64_C(482345120),	// V6_vavguh
    UINT64_C(484442240),	// V6_vavguhrnd
    UINT64_C(520101952),	// V6_vavguw
    UINT64_C(520101984),	// V6_vavguwrnd
    UINT64_C(482345184),	// V6_vavgw
    UINT64_C(484442304),	// V6_vavgwrnd
    UINT64_C(442499072),	// V6_vccombine
    UINT64_C(503447776),	// V6_vcl0h
    UINT64_C(503447712),	// V6_vcl0w
    UINT64_C(436207616),	// V6_vcmov
    UINT64_C(524288224),	// V6_vcombine
    UINT64_C(434118720),	// V6_vdeal
    UINT64_C(503316704),	// V6_vdealb
    UINT64_C(522191072),	// V6_vdealb4w
    UINT64_C(503316672),	// V6_vdealh
    UINT64_C(452993152),	// V6_vdealvdd
    UINT64_C(522190880),	// V6_vdelta
    UINT64_C(419430592),	// V6_vdmpybus
    UINT64_C(419438784),	// V6_vdmpybus_acc
    UINT64_C(419430624),	// V6_vdmpybus_dv
    UINT64_C(419438816),	// V6_vdmpybus_dv_acc
    UINT64_C(419430464),	// V6_vdmpyhb
    UINT64_C(419438688),	// V6_vdmpyhb_acc
    UINT64_C(421527680),	// V6_vdmpyhb_dv
    UINT64_C(421535872),	// V6_vdmpyhb_dv_acc
    UINT64_C(421527648),	// V6_vdmpyhisat
    UINT64_C(421535808),	// V6_vdmpyhisat_acc
    UINT64_C(421527616),	// V6_vdmpyhsat
    UINT64_C(421535840),	// V6_vdmpyhsat_acc
    UINT64_C(421527584),	// V6_vdmpyhsuisat
    UINT64_C(421535776),	// V6_vdmpyhsuisat_acc
    UINT64_C(421527552),	// V6_vdmpyhsusat
    UINT64_C(421535744),	// V6_vdmpyhsusat_acc
    UINT64_C(469762144),	// V6_vdmpyhvsat
    UINT64_C(469770336),	// V6_vdmpyhvsat_acc
    UINT64_C(419430560),	// V6_vdsaduh
    UINT64_C(425730048),	// V6_vdsaduh_acc
    UINT64_C(528482304),	// V6_veqb
    UINT64_C(478158848),	// V6_veqb_and
    UINT64_C(478158912),	// V6_veqb_or
    UINT64_C(478158976),	// V6_veqb_xor
    UINT64_C(528482308),	// V6_veqh
    UINT64_C(478158852),	// V6_veqh_and
    UINT64_C(478158916),	// V6_veqh_or
    UINT64_C(478158980),	// V6_veqh_xor
    UINT64_C(528482312),	// V6_veqw
    UINT64_C(478158856),	// V6_veqw_and
    UINT64_C(478158920),	// V6_veqw_or
    UINT64_C(478158984),	// V6_veqw_xor
    UINT64_C(788529408),	// V6_vgathermh
    UINT64_C(788530432),	// V6_vgathermhq
    UINT64_C(788529664),	// V6_vgathermhw
    UINT64_C(788530688),	// V6_vgathermhwq
    UINT64_C(788529152),	// V6_vgathermw
    UINT64_C(788530176),	// V6_vgathermwq
    UINT64_C(528482320),	// V6_vgtb
    UINT64_C(478158864),	// V6_vgtb_and
    UINT64_C(478158928),	// V6_vgtb_or
    UINT64_C(478158992),	// V6_vgtb_xor
    UINT64_C(528482324),	// V6_vgth
    UINT64_C(478158868),	// V6_vgth_and
    UINT64_C(478158932),	// V6_vgth_or
    UINT64_C(478158996),	// V6_vgth_xor
    UINT64_C(528482336),	// V6_vgtub
    UINT64_C(478158880),	// V6_vgtub_and
    UINT64_C(478158944),	// V6_vgtub_or
    UINT64_C(478159008),	// V6_vgtub_xor
    UINT64_C(528482340),	// V6_vgtuh
    UINT64_C(478158884),	// V6_vgtuh_and
    UINT64_C(478158948),	// V6_vgtuh_or
    UINT64_C(478159012),	// V6_vgtuh_xor
    UINT64_C(528482344),	// V6_vgtuw
    UINT64_C(478158888),	// V6_vgtuw_and
    UINT64_C(478158952),	// V6_vgtuw_or
    UINT64_C(478159016),	// V6_vgtuw_xor
    UINT64_C(528482328),	// V6_vgtw
    UINT64_C(478158872),	// V6_vgtw_and
    UINT64_C(478158936),	// V6_vgtw_or
    UINT64_C(478159000),	// V6_vgtw_xor
    UINT64_C(503324800),	// V6_vhist
    UINT64_C(503455872),	// V6_vhistq
    UINT64_C(429924384),	// V6_vinsertwr
    UINT64_C(452984864),	// V6_vlalignb
    UINT64_C(509616128),	// V6_vlalignbi
    UINT64_C(427819104),	// V6_vlsrb
    UINT64_C(427819072),	// V6_vlsrh
    UINT64_C(530579520),	// V6_vlsrhv
    UINT64_C(427819040),	// V6_vlsrw
    UINT64_C(530579488),	// V6_vlsrwv
    UINT64_C(425721984),	// V6_vlut4
    UINT64_C(452993056),	// V6_vlutvvb
    UINT64_C(402653280),	// V6_vlutvvb_nm
    UINT64_C(452993184),	// V6_vlutvvb_oracc
    UINT64_C(482353152),	// V6_vlutvvb_oracci
    UINT64_C(505413632),	// V6_vlutvvbi
    UINT64_C(452993216),	// V6_vlutvwh
    UINT64_C(402653312),	// V6_vlutvwh_nm
    UINT64_C(452993248),	// V6_vlutvwh_oracc
    UINT64_C(484450304),	// V6_vlutvwh_oracci
    UINT64_C(509607936),	// V6_vlutvwhi
    UINT64_C(522191008),	// V6_vmaxb
    UINT64_C(520093920),	// V6_vmaxh
    UINT64_C(520093856),	// V6_vmaxub
    UINT64_C(520093888),	// V6_vmaxuh
    UINT64_C(522190848),	// V6_vmaxw
    UINT64_C(522190976),	// V6_vminb
    UINT64_C(520093792),	// V6_vminh
    UINT64_C(520093728),	// V6_vminub
    UINT64_C(520093760),	// V6_vminuh
    UINT64_C(520093824),	// V6_vminw
    UINT64_C(421527744),	// V6_vmpabus
    UINT64_C(421535936),	// V6_vmpabus_acc
    UINT64_C(471859296),	// V6_vmpabusv
    UINT64_C(425721952),	// V6_vmpabuu
    UINT64_C(429924480),	// V6_vmpabuu_acc
    UINT64_C(484442336),	// V6_vmpabuuv
    UINT64_C(421527776),	// V6_vmpahb
    UINT64_C(421535968),	// V6_vmpahb_acc
    UINT64_C(427827328),	// V6_vmpahhsat
    UINT64_C(427819168),	// V6_vmpauhb
    UINT64_C(427827264),	// V6_vmpauhb_acc
    UINT64_C(427827360),	// V6_vmpauhuhsat
    UINT64_C(427827392),	// V6_vmpsuhuhsat
    UINT64_C(421527712),	// V6_vmpybus
    UINT64_C(421535904),	// V6_vmpybus_acc
    UINT64_C(469762240),	// V6_vmpybusv
    UINT64_C(469770432),	// V6_vmpybusv_acc
    UINT64_C(469762176),	// V6_vmpybv
    UINT64_C(469770368),	// V6_vmpybv_acc
    UINT64_C(534773920),	// V6_vmpyewuh
    UINT64_C(513802432),	// V6_vmpyewuh_64
    UINT64_C(423624704),	// V6_vmpyh
    UINT64_C(429924544),	// V6_vmpyh_acc
    UINT64_C(423632896),	// V6_vmpyhsat_acc
    UINT64_C(423624768),	// V6_vmpyhsrs
    UINT64_C(423624736),	// V6_vmpyhss
    UINT64_C(471859264),	// V6_vmpyhus
    UINT64_C(471867424),	// V6_vmpyhus_acc
    UINT64_C(469762272),	// V6_vmpyhv
    UINT64_C(469770464),	// V6_vmpyhv_acc
    UINT64_C(471859232),	// V6_vmpyhvsrs
    UINT64_C(526385152),	// V6_vmpyieoh
    UINT64_C(473964544),	// V6_vmpyiewh_acc
    UINT64_C(532676608),	// V6_vmpyiewuh
    UINT64_C(471867552),	// V6_vmpyiewuh_acc
    UINT64_C(471859328),	// V6_vmpyih
    UINT64_C(471867520),	// V6_vmpyih_acc
    UINT64_C(425721856),	// V6_vmpyihb
    UINT64_C(425730080),	// V6_vmpyihb_acc
    UINT64_C(532676640),	// V6_vmpyiowh
    UINT64_C(429916160),	// V6_vmpyiwb
    UINT64_C(423632960),	// V6_vmpyiwb_acc
    UINT64_C(427819232),	// V6_vmpyiwh
    UINT64_C(423632992),	// V6_vmpyiwh_acc
    UINT64_C(427819200),	// V6_vmpyiwub
    UINT64_C(427827232),	// V6_vmpyiwub_acc
    UINT64_C(534773984),	// V6_vmpyowh
    UINT64_C(471867488),	// V6_vmpyowh_64_acc
    UINT64_C(524288000),	// V6_vmpyowh_rnd
    UINT64_C(471867616),	// V6_vmpyowh_rnd_sacc
    UINT64_C(471867584),	// V6_vmpyowh_sacc
    UINT64_C(432013312),	// V6_vmpyub
    UINT64_C(427827200),	// V6_vmpyub_acc
    UINT64_C(469762208),	// V6_vmpyubv
    UINT64_C(469770400),	// V6_vmpyubv_acc
    UINT64_C(423624800),	// V6_vmpyuh
    UINT64_C(423632928),	// V6_vmpyuh_acc
    UINT64_C(425721920),	// V6_vmpyuhe
    UINT64_C(427827296),	// V6_vmpyuhe_acc
    UINT64_C(471859200),	// V6_vmpyuhv
    UINT64_C(471867392),	// V6_vmpyuhv_acc
    UINT64_C(518004736),	// V6_vmux
    UINT64_C(520102080),	// V6_vnavgb
    UINT64_C(484442144),	// V6_vnavgh
    UINT64_C(484442112),	// V6_vnavgub
    UINT64_C(484442176),	// V6_vnavgw
    UINT64_C(440401920),	// V6_vnccombine
    UINT64_C(438304768),	// V6_vncmov
    UINT64_C(503513248),	// V6_vnormamth
    UINT64_C(503513216),	// V6_vnormamtw
    UINT64_C(503316608),	// V6_vnot
    UINT64_C(471859392),	// V6_vor
    UINT64_C(532676672),	// V6_vpackeb
    UINT64_C(532676704),	// V6_vpackeh
    UINT64_C(532676800),	// V6_vpackhb_sat
    UINT64_C(532676768),	// V6_vpackhub_sat
    UINT64_C(534773792),	// V6_vpackob
    UINT64_C(534773824),	// V6_vpackoh
    UINT64_C(534773760),	// V6_vpackwh_sat
    UINT64_C(532676832),	// V6_vpackwuh_sat
    UINT64_C(503447744),	// V6_vpopcounth
    UINT64_C(503521344),	// V6_vprefixqb
    UINT64_C(503521600),	// V6_vprefixqh
    UINT64_C(503521856),	// V6_vprefixqw
    UINT64_C(522190944),	// V6_vrdelta
    UINT64_C(432013472),	// V6_vrmpybub_rtt
    UINT64_C(429924352),	// V6_vrmpybub_rtt_acc
    UINT64_C(419430528),	// V6_vrmpybus
    UINT64_C(419438752),	// V6_vrmpybus_acc
    UINT64_C(423624832),	// V6_vrmpybusi
    UINT64_C(423633024),	// V6_vrmpybusi_acc
    UINT64_C(469762112),	// V6_vrmpybusv
    UINT64_C(469770304),	// V6_vrmpybusv_acc
    UINT64_C(469762080),	// V6_vrmpybv
    UINT64_C(469770272),	// V6_vrmpybv_acc
    UINT64_C(419430496),	// V6_vrmpyub
    UINT64_C(419438720),	// V6_vrmpyub_acc
    UINT64_C(432013440),	// V6_vrmpyub_rtt
    UINT64_C(429924576),	// V6_vrmpyub_rtt_acc
    UINT64_C(429916352),	// V6_vrmpyubi
    UINT64_C(425730240),	// V6_vrmpyubi_acc
    UINT64_C(469762048),	// V6_vrmpyubv
    UINT64_C(469770240),	// V6_vrmpyubv_acc
    UINT64_C(434634752),	// V6_vrmpyzbb_rt
    UINT64_C(432021568),	// V6_vrmpyzbb_rt_acc
    UINT64_C(434110464),	// V6_vrmpyzbb_rx
    UINT64_C(432545856),	// V6_vrmpyzbb_rx_acc
    UINT64_C(435683392),	// V6_vrmpyzbub_rt
    UINT64_C(433070112),	// V6_vrmpyzbub_rt_acc
    UINT64_C(435159104),	// V6_vrmpyzbub_rx
    UINT64_C(433594400),	// V6_vrmpyzbub_rx_acc
    UINT64_C(434634784),	// V6_vrmpyzcb_rt
    UINT64_C(432021600),	// V6_vrmpyzcb_rt_acc
    UINT64_C(434110496),	// V6_vrmpyzcb_rx
    UINT64_C(432545888),	// V6_vrmpyzcb_rx_acc
    UINT64_C(434634816),	// V6_vrmpyzcbs_rt
    UINT64_C(432021536),	// V6_vrmpyzcbs_rt_acc
    UINT64_C(434110528),	// V6_vrmpyzcbs_rx
    UINT64_C(432545824),	// V6_vrmpyzcbs_rx_acc
    UINT64_C(435683328),	// V6_vrmpyznb_rt
    UINT64_C(433070144),	// V6_vrmpyznb_rt_acc
    UINT64_C(435159040),	// V6_vrmpyznb_rx
    UINT64_C(433594432),	// V6_vrmpyznb_rx_acc
    UINT64_C(425721888),	// V6_vror
    UINT64_C(444604640),	// V6_vrotr
    UINT64_C(526385344),	// V6_vroundhb
    UINT64_C(526385376),	// V6_vroundhub
    UINT64_C(534773856),	// V6_vrounduhub
    UINT64_C(534773888),	// V6_vrounduwuh
    UINT64_C(526385280),	// V6_vroundwh
    UINT64_C(526385312),	// V6_vroundwuh
    UINT64_C(423624896),	// V6_vrsadubi
    UINT64_C(423633088),	// V6_vrsadubi_acc
    UINT64_C(494936288),	// V6_vsatdw
    UINT64_C(526385216),	// V6_vsathub
    UINT64_C(522191040),	// V6_vsatuwuh
    UINT64_C(526385248),	// V6_vsatwh
    UINT64_C(503447648),	// V6_vsb
    UINT64_C(790626336),	// V6_vscattermh
    UINT64_C(790626464),	// V6_vscattermh_add
    UINT64_C(796917888),	// V6_vscattermhq
    UINT64_C(790626368),	// V6_vscattermhw
    UINT64_C(790626496),	// V6_vscattermhw_add
    UINT64_C(799014912),	// V6_vscattermhwq
    UINT64_C(790626304),	// V6_vscattermw
    UINT64_C(790626432),	// V6_vscattermw_add
    UINT64_C(796917760),	// V6_vscattermwq
    UINT64_C(503447680),	// V6_vsh
    UINT64_C(524288096),	// V6_vshufeh
    UINT64_C(434118688),	// V6_vshuff
    UINT64_C(503447552),	// V6_vshuffb
    UINT64_C(524288032),	// V6_vshuffeb
    UINT64_C(503382240),	// V6_vshuffh
    UINT64_C(524288064),	// V6_vshuffob
    UINT64_C(452993120),	// V6_vshuffvdd
    UINT64_C(524288192),	// V6_vshufoeb
    UINT64_C(524288160),	// V6_vshufoeh
    UINT64_C(524288128),	// V6_vshufoh
    UINT64_C(473956512),	// V6_vsubb
    UINT64_C(478150752),	// V6_vsubb_dv
    UINT64_C(503455776),	// V6_vsubbnq
    UINT64_C(503390400),	// V6_vsubbq
    UINT64_C(522190912),	// V6_vsubbsat
    UINT64_C(513802272),	// V6_vsubbsat_dv
    UINT64_C(480256128),	// V6_vsubcarry
    UINT64_C(497033344),	// V6_vsubcarryo
    UINT64_C(473956544),	// V6_vsubh
    UINT64_C(478150784),	// V6_vsubh_dv
    UINT64_C(503455808),	// V6_vsubhnq
    UINT64_C(503390432),	// V6_vsubhq
    UINT64_C(476053568),	// V6_vsubhsat
    UINT64_C(480247808),	// V6_vsubhsat_dv
    UINT64_C(480248032),	// V6_vsubhw
    UINT64_C(480247968),	// V6_vsububh
    UINT64_C(476053504),	// V6_vsububsat
    UINT64_C(478150848),	// V6_vsububsat_dv
    UINT64_C(513802400),	// V6_vsubububb_sat
    UINT64_C(476053536),	// V6_vsubuhsat
    UINT64_C(478150880),	// V6_vsubuhsat_dv
    UINT64_C(480248000),	// V6_vsubuhw
    UINT64_C(532676736),	// V6_vsubuwsat
    UINT64_C(513802336),	// V6_vsubuwsat_dv
    UINT64_C(473956576),	// V6_vsubw
    UINT64_C(478150816),	// V6_vsubw_dv
    UINT64_C(503455840),	// V6_vsubwnq
    UINT64_C(503455744),	// V6_vsubwq
    UINT64_C(476053600),	// V6_vsubwsat
    UINT64_C(480247840),	// V6_vsubwsat_dv
    UINT64_C(513810432),	// V6_vswap
    UINT64_C(419430400),	// V6_vtmpyb
    UINT64_C(419438592),	// V6_vtmpyb_acc
    UINT64_C(419430432),	// V6_vtmpybus
    UINT64_C(419438624),	// V6_vtmpybus_acc
    UINT64_C(429916288),	// V6_vtmpyhb
    UINT64_C(419438656),	// V6_vtmpyhb_acc
    UINT64_C(503382080),	// V6_vunpackb
    UINT64_C(503382112),	// V6_vunpackh
    UINT64_C(503324672),	// V6_vunpackob
    UINT64_C(503324704),	// V6_vunpackoh
    UINT64_C(503382016),	// V6_vunpackub
    UINT64_C(503382048),	// V6_vunpackuh
    UINT64_C(503325824),	// V6_vwhist128
    UINT64_C(503326336),	// V6_vwhist128m
    UINT64_C(503456896),	// V6_vwhist128q
    UINT64_C(503457408),	// V6_vwhist128qm
    UINT64_C(503325312),	// V6_vwhist256
    UINT64_C(503325568),	// V6_vwhist256_sat
    UINT64_C(503456384),	// V6_vwhist256q
    UINT64_C(503456640),	// V6_vwhist256q_sat
    UINT64_C(471859424),	// V6_vxor
    UINT64_C(503447584),	// V6_vzb
    UINT64_C(503447616),	// V6_vzh
    UINT64_C(738197504),	// V6_zLd_ai
    UINT64_C(754974720),	// V6_zLd_pi
    UINT64_C(754974721),	// V6_zLd_ppu
    UINT64_C(746586112),	// V6_zLd_pred_ai
    UINT64_C(763363328),	// V6_zLd_pred_pi
    UINT64_C(763363329),	// V6_zLd_pred_ppu
    UINT64_C(429916448),	// V6_zextract
    UINT64_C(2818572288),	// Y2_barrier
    UINT64_C(1814036480),	// Y2_break
    UINT64_C(2684354560),	// Y2_dccleana
    UINT64_C(2688548864),	// Y2_dccleaninva
    UINT64_C(2483027968),	// Y2_dcfetchbo
    UINT64_C(2686451712),	// Y2_dcinva
    UINT64_C(2696937472),	// Y2_dczeroa
    UINT64_C(1455423488),	// Y2_icinva
    UINT64_C(1472200706),	// Y2_isync
    UINT64_C(2822766592),	// Y2_syncht
    UINT64_C(1681915904),	// Y2_wait
    UINT64_C(2785017856),	// Y4_l2fetch
    UINT64_C(1648361472),	// Y4_trace
    UINT64_C(2793406464),	// Y5_l2fetch
    UINT64_C(3581935616),	// dep_A2_addsat
    UINT64_C(3581935744),	// dep_A2_subsat
    UINT64_C(3556769792),	// dep_S2_packhl
    UINT64_C(0)
  };
  const unsigned opcode = MI.getOpcode();
  uint64_t Value = InstBits[opcode];
  uint64_t op = 0;
  (void)op;  // suppress warning
  switch (opcode) {
    case Hexagon::A2_nop:
    case Hexagon::CONST32:
    case Hexagon::CONST64:
    case Hexagon::DuplexIClass0:
    case Hexagon::DuplexIClass1:
    case Hexagon::DuplexIClass2:
    case Hexagon::DuplexIClass3:
    case Hexagon::DuplexIClass4:
    case Hexagon::DuplexIClass5:
    case Hexagon::DuplexIClass6:
    case Hexagon::DuplexIClass7:
    case Hexagon::DuplexIClass8:
    case Hexagon::DuplexIClass9:
    case Hexagon::DuplexIClassA:
    case Hexagon::DuplexIClassB:
    case Hexagon::DuplexIClassC:
    case Hexagon::DuplexIClassD:
    case Hexagon::DuplexIClassE:
    case Hexagon::DuplexIClassF:
    case Hexagon::SL2_deallocframe:
    case Hexagon::SL2_jumpr31:
    case Hexagon::SL2_jumpr31_f:
    case Hexagon::SL2_jumpr31_fnew:
    case Hexagon::SL2_jumpr31_t:
    case Hexagon::SL2_jumpr31_tnew:
    case Hexagon::SL2_return:
    case Hexagon::SL2_return_f:
    case Hexagon::SL2_return_fnew:
    case Hexagon::SL2_return_t:
    case Hexagon::SL2_return_tnew:
    case Hexagon::TFRI64_V2_ext:
    case Hexagon::TFRI64_V4:
    case Hexagon::V6_vhist:
    case Hexagon::V6_vwhist128:
    case Hexagon::V6_vwhist256:
    case Hexagon::V6_vwhist256_sat:
    case Hexagon::Y2_barrier:
    case Hexagon::Y2_break:
    case Hexagon::Y2_isync:
    case Hexagon::Y2_syncht: {
      break;
    }
    case Hexagon::A2_tfrcrr: {
      // op: Cs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A4_tfrcpp: {
      // op: Css32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::G4_tfrgcrr: {
      // op: Gs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::G4_tfrgcpp: {
      // op: Gss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::J4_cmpeqi_f_jumpnv_nt:
    case Hexagon::J4_cmpeqi_f_jumpnv_t:
    case Hexagon::J4_cmpeqi_t_jumpnv_nt:
    case Hexagon::J4_cmpeqi_t_jumpnv_t:
    case Hexagon::J4_cmpgti_f_jumpnv_nt:
    case Hexagon::J4_cmpgti_f_jumpnv_t:
    case Hexagon::J4_cmpgti_t_jumpnv_nt:
    case Hexagon::J4_cmpgti_t_jumpnv_t:
    case Hexagon::J4_cmpgtui_f_jumpnv_nt:
    case Hexagon::J4_cmpgtui_f_jumpnv_t:
    case Hexagon::J4_cmpgtui_t_jumpnv_nt:
    case Hexagon::J4_cmpgtui_t_jumpnv_t: {
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(1536)) << 11;
      Value |= (op & UINT64_C(508)) >> 1;
      // op: Ns8
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::J4_cmpeqi_fp0_jump_nt:
    case Hexagon::J4_cmpeqi_fp0_jump_t:
    case Hexagon::J4_cmpeqi_fp1_jump_nt:
    case Hexagon::J4_cmpeqi_fp1_jump_t:
    case Hexagon::J4_cmpeqi_tp0_jump_nt:
    case Hexagon::J4_cmpeqi_tp0_jump_t:
    case Hexagon::J4_cmpeqi_tp1_jump_nt:
    case Hexagon::J4_cmpeqi_tp1_jump_t:
    case Hexagon::J4_cmpgti_fp0_jump_nt:
    case Hexagon::J4_cmpgti_fp0_jump_t:
    case Hexagon::J4_cmpgti_fp1_jump_nt:
    case Hexagon::J4_cmpgti_fp1_jump_t:
    case Hexagon::J4_cmpgti_tp0_jump_nt:
    case Hexagon::J4_cmpgti_tp0_jump_t:
    case Hexagon::J4_cmpgti_tp1_jump_nt:
    case Hexagon::J4_cmpgti_tp1_jump_t:
    case Hexagon::J4_cmpgtui_fp0_jump_nt:
    case Hexagon::J4_cmpgtui_fp0_jump_t:
    case Hexagon::J4_cmpgtui_fp1_jump_nt:
    case Hexagon::J4_cmpgtui_fp1_jump_t:
    case Hexagon::J4_cmpgtui_tp0_jump_nt:
    case Hexagon::J4_cmpgtui_tp0_jump_t:
    case Hexagon::J4_cmpgtui_tp1_jump_nt:
    case Hexagon::J4_cmpgtui_tp1_jump_t: {
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(1536)) << 11;
      Value |= (op & UINT64_C(508)) >> 1;
      // op: Rs16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S4_storerbnew_ap:
    case Hexagon::S4_storerhnew_ap:
    case Hexagon::S4_storerinew_ap: {
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(63);
      Value |= op;
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      // op: Re32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S4_storerb_ap:
    case Hexagon::S4_storerf_ap:
    case Hexagon::S4_storerh_ap:
    case Hexagon::S4_storeri_ap: {
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(63);
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Re32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S4_storerd_ap: {
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(63);
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Re32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::J4_jumpseti: {
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(63);
      op <<= 8;
      Value |= op;
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(1536)) << 11;
      Value |= (op & UINT64_C(508)) >> 1;
      // op: Rd16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L4_loadbsw2_ap:
    case Hexagon::L4_loadbzw2_ap:
    case Hexagon::L4_loadrb_ap:
    case Hexagon::L4_loadrh_ap:
    case Hexagon::L4_loadri_ap:
    case Hexagon::L4_loadrub_ap:
    case Hexagon::L4_loadruh_ap: {
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(60)) << 6;
      Value |= (op & UINT64_C(3)) << 5;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Re32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L4_loadbsw4_ap:
    case Hexagon::L4_loadbzw4_ap:
    case Hexagon::L4_loadrd_ap: {
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(60)) << 6;
      Value |= (op & UINT64_C(3)) << 5;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Re32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L4_loadalignb_ap:
    case Hexagon::L4_loadalignh_ap: {
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(60)) << 6;
      Value |= (op & UINT64_C(3)) << 5;
      // op: Ryy32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Re32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::J2_call:
    case Hexagon::J2_jump: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(16744448)) << 1;
      Value |= (op & UINT64_C(32764)) >> 1;
      break;
    }
    case Hexagon::PS_storerinewabs:
    case Hexagon::S2_storerinewgp: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(196608)) << 9;
      Value |= (op & UINT64_C(63488)) << 5;
      Value |= (op & UINT64_C(1024)) << 3;
      Value |= (op & UINT64_C(1020)) >> 2;
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::PS_storeriabs:
    case Hexagon::S2_storerigp: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(196608)) << 9;
      Value |= (op & UINT64_C(63488)) << 5;
      Value |= (op & UINT64_C(1024)) << 3;
      Value |= (op & UINT64_C(1020)) >> 2;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::J2_pause:
    case Hexagon::J2_trap0: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(248)) << 5;
      Value |= (op & UINT64_C(7)) << 2;
      break;
    }
    case Hexagon::PS_storerdabs:
    case Hexagon::S2_storerdgp: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(393216)) << 8;
      Value |= (op & UINT64_C(126976)) << 4;
      Value |= (op & UINT64_C(2048)) << 2;
      Value |= (op & UINT64_C(2040)) >> 3;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::A4_ext: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(4293918720)) >> 4;
      Value |= (op & UINT64_C(1048512)) >> 6;
      break;
    }
    case Hexagon::PS_storerbnewabs:
    case Hexagon::S2_storerbnewgp: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(49152)) << 11;
      Value |= (op & UINT64_C(15872)) << 7;
      Value |= (op & UINT64_C(256)) << 5;
      Value |= (op & UINT64_C(255));
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::PS_storerbabs:
    case Hexagon::S2_storerbgp: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(49152)) << 11;
      Value |= (op & UINT64_C(15872)) << 7;
      Value |= (op & UINT64_C(256)) << 5;
      Value |= (op & UINT64_C(255));
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::J2_loop0i:
    case Hexagon::J2_loop1i:
    case Hexagon::J2_ploop1si:
    case Hexagon::J2_ploop2si:
    case Hexagon::J2_ploop3si: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(496)) << 4;
      Value |= (op & UINT64_C(12)) << 1;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(992)) << 11;
      Value |= (op & UINT64_C(28)) << 3;
      Value |= (op & UINT64_C(3));
      break;
    }
    case Hexagon::J2_loop0r:
    case Hexagon::J2_loop1r:
    case Hexagon::J2_ploop1sr:
    case Hexagon::J2_ploop2sr:
    case Hexagon::J2_ploop3sr: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(496)) << 4;
      Value |= (op & UINT64_C(12)) << 1;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::PS_storerhnewabs:
    case Hexagon::S2_storerhnewgp: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(98304)) << 10;
      Value |= (op & UINT64_C(31744)) << 6;
      Value |= (op & UINT64_C(512)) << 4;
      Value |= (op & UINT64_C(510)) >> 1;
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::PS_storerfabs:
    case Hexagon::PS_storerhabs:
    case Hexagon::S2_storerfgp:
    case Hexagon::S2_storerhgp: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(98304)) << 10;
      Value |= (op & UINT64_C(31744)) << 6;
      Value |= (op & UINT64_C(512)) << 4;
      Value |= (op & UINT64_C(510)) >> 1;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::V6_vwhist128m: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::SS2_storew_sp: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(124);
      op <<= 2;
      Value |= op;
      // op: Rt16
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(15);
      Value |= op;
      break;
    }
    case Hexagon::SS2_allocframe: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(248);
      op <<= 1;
      Value |= op;
      break;
    }
    case Hexagon::SS2_stored_sp: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(504);
      Value |= op;
      // op: Rtt8
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(7);
      Value |= op;
      break;
    }
    case Hexagon::S2_storerd_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(12288)) << 13;
      Value |= (op & UINT64_C(2048)) << 2;
      Value |= (op & UINT64_C(2040)) >> 3;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::J4_tstbit0_f_jumpnv_nt:
    case Hexagon::J4_tstbit0_f_jumpnv_t:
    case Hexagon::J4_tstbit0_t_jumpnv_nt:
    case Hexagon::J4_tstbit0_t_jumpnv_t: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1536)) << 11;
      Value |= (op & UINT64_C(508)) >> 1;
      // op: Ns8
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::J4_tstbit0_fp0_jump_nt:
    case Hexagon::J4_tstbit0_fp0_jump_t:
    case Hexagon::J4_tstbit0_fp1_jump_nt:
    case Hexagon::J4_tstbit0_fp1_jump_t:
    case Hexagon::J4_tstbit0_tp0_jump_nt:
    case Hexagon::J4_tstbit0_tp0_jump_t:
    case Hexagon::J4_tstbit0_tp1_jump_nt:
    case Hexagon::J4_tstbit0_tp1_jump_t: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1536)) << 11;
      Value |= (op & UINT64_C(508)) >> 1;
      // op: Rs16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S2_storerbnew_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1536)) << 16;
      Value |= (op & UINT64_C(256)) << 5;
      Value |= (op & UINT64_C(255));
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::S2_storerb_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1536)) << 16;
      Value |= (op & UINT64_C(256)) << 5;
      Value |= (op & UINT64_C(255));
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::J2_jumprgtez:
    case Hexagon::J2_jumprgtezpt:
    case Hexagon::J2_jumprltez:
    case Hexagon::J2_jumprltezpt:
    case Hexagon::J2_jumprnz:
    case Hexagon::J2_jumprnzpt:
    case Hexagon::J2_jumprz:
    case Hexagon::J2_jumprzpt: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(16384)) << 7;
      Value |= (op & UINT64_C(8192));
      Value |= (op & UINT64_C(8188)) >> 1;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_loadrigp:
    case Hexagon::PS_loadriabs: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(196608)) << 9;
      Value |= (op & UINT64_C(63488)) << 5;
      Value |= (op & UINT64_C(2044)) << 3;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S4_storerbnew_ur:
    case Hexagon::S4_storerhnew_ur:
    case Hexagon::S4_storerinew_ur: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(2)) << 12;
      Value |= (op & UINT64_C(1)) << 6;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(63);
      Value |= op;
      // op: Ru32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::S4_storerb_ur:
    case Hexagon::S4_storerf_ur:
    case Hexagon::S4_storerh_ur:
    case Hexagon::S4_storeri_ur: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(2)) << 12;
      Value |= (op & UINT64_C(1)) << 6;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(63);
      Value |= op;
      // op: Ru32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::S4_storerd_ur: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(2)) << 12;
      Value |= (op & UINT64_C(1)) << 6;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(63);
      Value |= op;
      // op: Ru32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::S4_addi_asl_ri:
    case Hexagon::S4_addi_lsr_ri:
    case Hexagon::S4_andi_asl_ri:
    case Hexagon::S4_andi_lsr_ri:
    case Hexagon::S4_ori_asl_ri:
    case Hexagon::S4_ori_lsr_ri:
    case Hexagon::S4_subi_asl_ri:
    case Hexagon::S4_subi_lsr_ri: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(224)) << 16;
      Value |= (op & UINT64_C(16)) << 9;
      Value |= (op & UINT64_C(14)) << 4;
      Value |= (op & UINT64_C(1)) << 3;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S2_storerhnew_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(3072)) << 15;
      Value |= (op & UINT64_C(512)) << 4;
      Value |= (op & UINT64_C(510)) >> 1;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::S2_storerf_io:
    case Hexagon::S2_storerh_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(3072)) << 15;
      Value |= (op & UINT64_C(512)) << 4;
      Value |= (op & UINT64_C(510)) >> 1;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::L2_loadrdgp:
    case Hexagon::PS_loadrdabs: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(393216)) << 8;
      Value |= (op & UINT64_C(126976)) << 4;
      Value |= (op & UINT64_C(4088)) << 2;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S4_pstorerbnewf_abs:
    case Hexagon::S4_pstorerbnewfnew_abs:
    case Hexagon::S4_pstorerbnewt_abs:
    case Hexagon::S4_pstorerbnewtnew_abs:
    case Hexagon::S4_pstorerhnewf_abs:
    case Hexagon::S4_pstorerhnewfnew_abs:
    case Hexagon::S4_pstorerhnewt_abs:
    case Hexagon::S4_pstorerhnewtnew_abs:
    case Hexagon::S4_pstorerinewf_abs:
    case Hexagon::S4_pstorerinewfnew_abs:
    case Hexagon::S4_pstorerinewt_abs:
    case Hexagon::S4_pstorerinewtnew_abs: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(48)) << 12;
      Value |= (op & UINT64_C(15)) << 3;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::S4_pstorerbf_abs:
    case Hexagon::S4_pstorerbfnew_abs:
    case Hexagon::S4_pstorerbt_abs:
    case Hexagon::S4_pstorerbtnew_abs:
    case Hexagon::S4_pstorerff_abs:
    case Hexagon::S4_pstorerffnew_abs:
    case Hexagon::S4_pstorerft_abs:
    case Hexagon::S4_pstorerftnew_abs:
    case Hexagon::S4_pstorerhf_abs:
    case Hexagon::S4_pstorerhfnew_abs:
    case Hexagon::S4_pstorerht_abs:
    case Hexagon::S4_pstorerhtnew_abs:
    case Hexagon::S4_pstorerif_abs:
    case Hexagon::S4_pstorerifnew_abs:
    case Hexagon::S4_pstorerit_abs:
    case Hexagon::S4_pstoreritnew_abs: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(48)) << 12;
      Value |= (op & UINT64_C(15)) << 3;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::S4_pstorerdf_abs:
    case Hexagon::S4_pstorerdfnew_abs:
    case Hexagon::S4_pstorerdt_abs:
    case Hexagon::S4_pstorerdtnew_abs: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(48)) << 12;
      Value |= (op & UINT64_C(15)) << 3;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::M4_mpyri_addi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(48)) << 17;
      Value |= (op & UINT64_C(8)) << 10;
      Value |= (op & UINT64_C(7)) << 5;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(32)) << 18;
      Value |= (op & UINT64_C(31));
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::M4_mpyrr_addi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(48)) << 17;
      Value |= (op & UINT64_C(8)) << 10;
      Value |= (op & UINT64_C(7)) << 5;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::L2_loadrbgp:
    case Hexagon::L2_loadrubgp:
    case Hexagon::PS_loadrbabs:
    case Hexagon::PS_loadrubabs: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(49152)) << 11;
      Value |= (op & UINT64_C(15872)) << 7;
      Value |= (op & UINT64_C(511)) << 5;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A2_tfrsi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(49152)) << 8;
      Value |= (op & UINT64_C(15872)) << 7;
      Value |= (op & UINT64_C(511)) << 5;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::F2_sfimm_n:
    case Hexagon::F2_sfimm_p: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(512)) << 12;
      Value |= (op & UINT64_C(511)) << 5;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::F2_dfimm_n:
    case Hexagon::F2_dfimm_p: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(512)) << 12;
      Value |= (op & UINT64_C(511)) << 5;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A2_subri: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(512)) << 12;
      Value |= (op & UINT64_C(511)) << 5;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_storerinew_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(6144)) << 14;
      Value |= (op & UINT64_C(1024)) << 3;
      Value |= (op & UINT64_C(1020)) >> 2;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::S2_storeri_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(6144)) << 14;
      Value |= (op & UINT64_C(1024)) << 3;
      Value |= (op & UINT64_C(1020)) >> 2;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::S4_lsli: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(62)) << 15;
      Value |= (op & UINT64_C(1)) << 5;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vS32b_srls_ai:
    case Hexagon::V6_zLd_ai: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(8)) << 10;
      Value |= (op & UINT64_C(7)) << 8;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::V6_vS32b_new_ai:
    case Hexagon::V6_vS32b_nt_new_ai: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(8)) << 10;
      Value |= (op & UINT64_C(7)) << 8;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Os8
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(7);
      Value |= op;
      break;
    }
    case Hexagon::V6_vS32Ub_ai:
    case Hexagon::V6_vS32b_ai:
    case Hexagon::V6_vS32b_nt_ai: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(8)) << 10;
      Value |= (op & UINT64_C(7)) << 8;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::L2_loadrhgp:
    case Hexagon::L2_loadruhgp:
    case Hexagon::PS_loadrhabs:
    case Hexagon::PS_loadruhabs: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(98304)) << 10;
      Value |= (op & UINT64_C(31744)) << 6;
      Value |= (op & UINT64_C(1022)) << 4;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::J2_callf:
    case Hexagon::J2_callt:
    case Hexagon::J2_jumpf:
    case Hexagon::J2_jumpfnew:
    case Hexagon::J2_jumpfnewpt:
    case Hexagon::J2_jumpfpt:
    case Hexagon::J2_jumpt:
    case Hexagon::J2_jumptnew:
    case Hexagon::J2_jumptnewpt:
    case Hexagon::J2_jumptpt: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(98304)) << 7;
      Value |= (op & UINT64_C(31744)) << 6;
      Value |= (op & UINT64_C(512)) << 4;
      Value |= (op & UINT64_C(508)) >> 1;
      // op: Pu4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::V6_vwhist128qm: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 8;
      Value |= op;
      // op: Qv4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 22;
      Value |= op;
      break;
    }
    case Hexagon::SL2_loadri_sp: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(124);
      op <<= 2;
      Value |= op;
      // op: Rd16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(15);
      Value |= op;
      break;
    }
    case Hexagon::S4_storeirh_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(126);
      op <<= 6;
      Value |= op;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(128)) << 6;
      Value |= (op & UINT64_C(127));
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L4_iadd_memoph_io:
    case Hexagon::L4_iand_memoph_io:
    case Hexagon::L4_ior_memoph_io:
    case Hexagon::L4_isub_memoph_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(126);
      op <<= 6;
      Value |= op;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L4_add_memoph_io:
    case Hexagon::L4_and_memoph_io:
    case Hexagon::L4_or_memoph_io:
    case Hexagon::L4_sub_memoph_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(126);
      op <<= 6;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::SS2_storeh_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(14);
      op <<= 7;
      Value |= op;
      // op: Rs16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 4;
      Value |= op;
      // op: Rt16
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(15);
      Value |= op;
      break;
    }
    case Hexagon::SS2_storebi0:
    case Hexagon::SS2_storebi1: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(15);
      Value |= op;
      // op: Rs16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 4;
      Value |= op;
      break;
    }
    case Hexagon::SS1_storeb_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 8;
      Value |= op;
      // op: Rs16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 4;
      Value |= op;
      // op: Rt16
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(15);
      Value |= op;
      break;
    }
    case Hexagon::Y2_dcfetchbo: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(16376);
      op >>= 3;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::SL2_loadrd_sp: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(248);
      Value |= op;
      // op: Rdd8
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(7);
      Value |= op;
      break;
    }
    case Hexagon::SA1_addsp: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(252);
      op <<= 2;
      Value |= op;
      // op: Rd16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(15);
      Value |= op;
      break;
    }
    case Hexagon::S4_storeiri_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(252);
      op <<= 5;
      Value |= op;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(128)) << 6;
      Value |= (op & UINT64_C(127));
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L4_iadd_memopw_io:
    case Hexagon::L4_iand_memopw_io:
    case Hexagon::L4_ior_memopw_io:
    case Hexagon::L4_isub_memopw_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(252);
      op <<= 5;
      Value |= op;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L4_add_memopw_io:
    case Hexagon::L4_and_memopw_io:
    case Hexagon::L4_or_memopw_io:
    case Hexagon::L4_sub_memopw_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(252);
      op <<= 5;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A2_combineii: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(255);
      op <<= 5;
      Value |= op;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(254)) << 15;
      Value |= (op & UINT64_C(1)) << 13;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A4_combineii: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(255);
      op <<= 5;
      Value |= op;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(62)) << 15;
      Value |= (op & UINT64_C(1)) << 13;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A4_combineir: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(255);
      op <<= 5;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::SA1_cmpeqi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      // op: Rs16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 4;
      Value |= op;
      break;
    }
    case Hexagon::SA1_combine0i:
    case Hexagon::SA1_combine1i:
    case Hexagon::SA1_combine2i:
    case Hexagon::SA1_combine3i: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Rdd8
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(7);
      Value |= op;
      break;
    }
    case Hexagon::S2_mask: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(24)) << 18;
      Value |= (op & UINT64_C(7)) << 5;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::SS1_storew_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(60);
      op <<= 6;
      Value |= op;
      // op: Rs16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 4;
      Value |= op;
      // op: Rt16
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(15);
      Value |= op;
      break;
    }
    case Hexagon::SS2_storewi0:
    case Hexagon::SS2_storewi1: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(60);
      op >>= 2;
      Value |= op;
      // op: Rs16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 4;
      Value |= op;
      break;
    }
    case Hexagon::SA1_seti: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(63);
      op <<= 4;
      Value |= op;
      // op: Rd16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(15);
      Value |= op;
      break;
    }
    case Hexagon::S4_storeirb_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(63);
      op <<= 7;
      Value |= op;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(128)) << 6;
      Value |= (op & UINT64_C(127));
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L4_iadd_memopb_io:
    case Hexagon::L4_iand_memopb_io:
    case Hexagon::L4_ior_memopb_io:
    case Hexagon::L4_isub_memopb_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(63);
      op <<= 7;
      Value |= op;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::C4_addipc: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(63);
      op <<= 7;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::L4_add_memopb_io:
    case Hexagon::L4_and_memopb_io:
    case Hexagon::L4_or_memopb_io:
    case Hexagon::L4_sub_memopb_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(63);
      op <<= 7;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::L2_loadrd_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(12288)) << 13;
      Value |= (op & UINT64_C(4088)) << 2;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_pstorerinewf_io:
    case Hexagon::S2_pstorerinewt_io:
    case Hexagon::S4_pstorerinewfnew_io:
    case Hexagon::S4_pstorerinewtnew_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(128)) << 6;
      Value |= (op & UINT64_C(124)) << 1;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::S2_pstorerif_io:
    case Hexagon::S2_pstorerit_io:
    case Hexagon::S4_pstorerifnew_io:
    case Hexagon::S4_pstoreritnew_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(128)) << 6;
      Value |= (op & UINT64_C(124)) << 1;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::J4_cmpeqn1_f_jumpnv_nt:
    case Hexagon::J4_cmpeqn1_f_jumpnv_t:
    case Hexagon::J4_cmpeqn1_t_jumpnv_nt:
    case Hexagon::J4_cmpeqn1_t_jumpnv_t:
    case Hexagon::J4_cmpgtn1_f_jumpnv_nt:
    case Hexagon::J4_cmpgtn1_f_jumpnv_t:
    case Hexagon::J4_cmpgtn1_t_jumpnv_nt:
    case Hexagon::J4_cmpgtn1_t_jumpnv_t: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(1536)) << 11;
      Value |= (op & UINT64_C(508)) >> 1;
      // op: Ns8
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::J4_cmpeq_f_jumpnv_nt:
    case Hexagon::J4_cmpeq_f_jumpnv_t:
    case Hexagon::J4_cmpeq_t_jumpnv_nt:
    case Hexagon::J4_cmpeq_t_jumpnv_t:
    case Hexagon::J4_cmpgt_f_jumpnv_nt:
    case Hexagon::J4_cmpgt_f_jumpnv_t:
    case Hexagon::J4_cmpgt_t_jumpnv_nt:
    case Hexagon::J4_cmpgt_t_jumpnv_t:
    case Hexagon::J4_cmpgtu_f_jumpnv_nt:
    case Hexagon::J4_cmpgtu_f_jumpnv_t:
    case Hexagon::J4_cmpgtu_t_jumpnv_nt:
    case Hexagon::J4_cmpgtu_t_jumpnv_t: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(1536)) << 11;
      Value |= (op & UINT64_C(508)) >> 1;
      // op: Ns8
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::J4_cmpeqn1_fp0_jump_nt:
    case Hexagon::J4_cmpeqn1_fp0_jump_t:
    case Hexagon::J4_cmpeqn1_fp1_jump_nt:
    case Hexagon::J4_cmpeqn1_fp1_jump_t:
    case Hexagon::J4_cmpeqn1_tp0_jump_nt:
    case Hexagon::J4_cmpeqn1_tp0_jump_t:
    case Hexagon::J4_cmpeqn1_tp1_jump_nt:
    case Hexagon::J4_cmpeqn1_tp1_jump_t:
    case Hexagon::J4_cmpgtn1_fp0_jump_nt:
    case Hexagon::J4_cmpgtn1_fp0_jump_t:
    case Hexagon::J4_cmpgtn1_fp1_jump_nt:
    case Hexagon::J4_cmpgtn1_fp1_jump_t:
    case Hexagon::J4_cmpgtn1_tp0_jump_nt:
    case Hexagon::J4_cmpgtn1_tp0_jump_t:
    case Hexagon::J4_cmpgtn1_tp1_jump_nt:
    case Hexagon::J4_cmpgtn1_tp1_jump_t: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(1536)) << 11;
      Value |= (op & UINT64_C(508)) >> 1;
      // op: Rs16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::J4_cmpeq_fp0_jump_nt:
    case Hexagon::J4_cmpeq_fp0_jump_t:
    case Hexagon::J4_cmpeq_fp1_jump_nt:
    case Hexagon::J4_cmpeq_fp1_jump_t:
    case Hexagon::J4_cmpeq_tp0_jump_nt:
    case Hexagon::J4_cmpeq_tp0_jump_t:
    case Hexagon::J4_cmpeq_tp1_jump_nt:
    case Hexagon::J4_cmpeq_tp1_jump_t:
    case Hexagon::J4_cmpgt_fp0_jump_nt:
    case Hexagon::J4_cmpgt_fp0_jump_t:
    case Hexagon::J4_cmpgt_fp1_jump_nt:
    case Hexagon::J4_cmpgt_fp1_jump_t:
    case Hexagon::J4_cmpgt_tp0_jump_nt:
    case Hexagon::J4_cmpgt_tp0_jump_t:
    case Hexagon::J4_cmpgt_tp1_jump_nt:
    case Hexagon::J4_cmpgt_tp1_jump_t:
    case Hexagon::J4_cmpgtu_fp0_jump_nt:
    case Hexagon::J4_cmpgtu_fp0_jump_t:
    case Hexagon::J4_cmpgtu_fp1_jump_nt:
    case Hexagon::J4_cmpgtu_fp1_jump_t:
    case Hexagon::J4_cmpgtu_tp0_jump_nt:
    case Hexagon::J4_cmpgtu_tp0_jump_t:
    case Hexagon::J4_cmpgtu_tp1_jump_nt:
    case Hexagon::J4_cmpgtu_tp1_jump_t: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(1536)) << 11;
      Value |= (op & UINT64_C(508)) >> 1;
      // op: Rs16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 16;
      Value |= op;
      // op: Rt16
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::J4_jumpsetr: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(1536)) << 11;
      Value |= (op & UINT64_C(508)) >> 1;
      // op: Rs16
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 16;
      Value |= op;
      // op: Rd16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::J4_cmplt_f_jumpnv_nt:
    case Hexagon::J4_cmplt_f_jumpnv_t:
    case Hexagon::J4_cmplt_t_jumpnv_nt:
    case Hexagon::J4_cmplt_t_jumpnv_t:
    case Hexagon::J4_cmpltu_f_jumpnv_nt:
    case Hexagon::J4_cmpltu_f_jumpnv_t:
    case Hexagon::J4_cmpltu_t_jumpnv_nt:
    case Hexagon::J4_cmpltu_t_jumpnv_t: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(1536)) << 11;
      Value |= (op & UINT64_C(508)) >> 1;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Ns8
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_loadrb_io:
    case Hexagon::L2_loadrub_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(1536)) << 16;
      Value |= (op & UINT64_C(511)) << 5;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::M4_mpyri_addr_u2: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(192)) << 15;
      Value |= (op & UINT64_C(32)) << 8;
      Value |= (op & UINT64_C(28)) << 3;
      // op: Ru32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::L4_loadbsw2_ur:
    case Hexagon::L4_loadbzw2_ur:
    case Hexagon::L4_loadrb_ur:
    case Hexagon::L4_loadrh_ur:
    case Hexagon::L4_loadri_ur:
    case Hexagon::L4_loadrub_ur:
    case Hexagon::L4_loadruh_ur: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(2)) << 12;
      Value |= (op & UINT64_C(1)) << 7;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(60)) << 6;
      Value |= (op & UINT64_C(3)) << 5;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::L4_loadbsw4_ur:
    case Hexagon::L4_loadbzw4_ur:
    case Hexagon::L4_loadrd_ur: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(2)) << 12;
      Value |= (op & UINT64_C(1)) << 7;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(60)) << 6;
      Value |= (op & UINT64_C(3)) << 5;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S4_storerbnew_rr:
    case Hexagon::S4_storerhnew_rr:
    case Hexagon::S4_storerinew_rr: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(2)) << 12;
      Value |= (op & UINT64_C(1)) << 7;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Ru32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      Value |= op;
      break;
    }
    case Hexagon::S4_storerb_rr:
    case Hexagon::S4_storerf_rr:
    case Hexagon::S4_storerh_rr:
    case Hexagon::S4_storeri_rr: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(2)) << 12;
      Value |= (op & UINT64_C(1)) << 7;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Ru32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S4_storerd_rr: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(2)) << 12;
      Value |= (op & UINT64_C(1)) << 7;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Ru32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::J2_trap1: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(248)) << 5;
      Value |= (op & UINT64_C(7)) << 2;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S2_pstorerdf_io:
    case Hexagon::S2_pstorerdt_io:
    case Hexagon::S4_pstorerdfnew_io:
    case Hexagon::S4_pstorerdtnew_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(256)) << 5;
      Value |= (op & UINT64_C(248));
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::L2_loadbsw2_io:
    case Hexagon::L2_loadbzw2_io:
    case Hexagon::L2_loadrh_io:
    case Hexagon::L2_loadruh_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(3072)) << 15;
      Value |= (op & UINT64_C(1022)) << 4;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_pstorerbnewf_io:
    case Hexagon::S2_pstorerbnewt_io:
    case Hexagon::S4_pstorerbnewfnew_io:
    case Hexagon::S4_pstorerbnewtnew_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(32)) << 8;
      Value |= (op & UINT64_C(31)) << 3;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::S2_pstorerbf_io:
    case Hexagon::S2_pstorerbt_io:
    case Hexagon::S4_pstorerbfnew_io:
    case Hexagon::S4_pstorerbtnew_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(32)) << 8;
      Value |= (op & UINT64_C(31)) << 3;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::C2_cmoveif:
    case Hexagon::C2_cmoveit:
    case Hexagon::C2_cmovenewif:
    case Hexagon::C2_cmovenewit: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(3840)) << 8;
      Value |= (op & UINT64_C(255)) << 5;
      // op: Pu4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 21;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S4_subaddi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(48)) << 17;
      Value |= (op & UINT64_C(8)) << 10;
      Value |= (op & UINT64_C(7)) << 5;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Ru32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::A2_tfrih:
    case Hexagon::A2_tfril: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(49152)) << 8;
      Value |= (op & UINT64_C(16383));
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::C2_cmpeqi:
    case Hexagon::C2_cmpgti:
    case Hexagon::C4_cmpltei:
    case Hexagon::C4_cmpneqi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(512)) << 12;
      Value |= (op & UINT64_C(511)) << 5;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Pd4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::A2_andir:
    case Hexagon::A2_orir: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(512)) << 12;
      Value |= (op & UINT64_C(511)) << 5;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::L2_loadri_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(6144)) << 14;
      Value |= (op & UINT64_C(2044)) << 3;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::L2_loadbsw4_io:
    case Hexagon::L2_loadbzw4_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(6144)) << 14;
      Value |= (op & UINT64_C(2044)) << 3;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::L4_ploadrbf_abs:
    case Hexagon::L4_ploadrbfnew_abs:
    case Hexagon::L4_ploadrbt_abs:
    case Hexagon::L4_ploadrbtnew_abs:
    case Hexagon::L4_ploadrhf_abs:
    case Hexagon::L4_ploadrhfnew_abs:
    case Hexagon::L4_ploadrht_abs:
    case Hexagon::L4_ploadrhtnew_abs:
    case Hexagon::L4_ploadrif_abs:
    case Hexagon::L4_ploadrifnew_abs:
    case Hexagon::L4_ploadrit_abs:
    case Hexagon::L4_ploadritnew_abs:
    case Hexagon::L4_ploadrubf_abs:
    case Hexagon::L4_ploadrubfnew_abs:
    case Hexagon::L4_ploadrubt_abs:
    case Hexagon::L4_ploadrubtnew_abs:
    case Hexagon::L4_ploadruhf_abs:
    case Hexagon::L4_ploadruhfnew_abs:
    case Hexagon::L4_ploadruht_abs:
    case Hexagon::L4_ploadruhtnew_abs: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(62)) << 15;
      Value |= (op & UINT64_C(1)) << 8;
      // op: Pt4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 9;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::L4_ploadrdf_abs:
    case Hexagon::L4_ploadrdfnew_abs:
    case Hexagon::L4_ploadrdt_abs:
    case Hexagon::L4_ploadrdtnew_abs: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(62)) << 15;
      Value |= (op & UINT64_C(1)) << 8;
      // op: Pt4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 9;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_pstorerhnewf_io:
    case Hexagon::S2_pstorerhnewt_io:
    case Hexagon::S4_pstorerhnewfnew_io:
    case Hexagon::S4_pstorerhnewtnew_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(64)) << 7;
      Value |= (op & UINT64_C(62)) << 2;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::S2_pstorerff_io:
    case Hexagon::S2_pstorerft_io:
    case Hexagon::S2_pstorerhf_io:
    case Hexagon::S2_pstorerht_io:
    case Hexagon::S4_pstorerffnew_io:
    case Hexagon::S4_pstorerftnew_io:
    case Hexagon::S4_pstorerhfnew_io:
    case Hexagon::S4_pstorerhtnew_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(64)) << 7;
      Value |= (op & UINT64_C(62)) << 2;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::A2_addi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(65024)) << 12;
      Value |= (op & UINT64_C(511)) << 5;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_zLd_pred_ai: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(8)) << 10;
      Value |= (op & UINT64_C(7)) << 8;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 11;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::V6_vS32b_new_npred_ai:
    case Hexagon::V6_vS32b_new_pred_ai:
    case Hexagon::V6_vS32b_nt_new_npred_ai:
    case Hexagon::V6_vS32b_nt_new_pred_ai: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(8)) << 10;
      Value |= (op & UINT64_C(7)) << 8;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 11;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Os8
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      Value |= op;
      break;
    }
    case Hexagon::V6_vS32Ub_npred_ai:
    case Hexagon::V6_vS32Ub_pred_ai:
    case Hexagon::V6_vS32b_npred_ai:
    case Hexagon::V6_vS32b_nt_npred_ai:
    case Hexagon::V6_vS32b_nt_pred_ai:
    case Hexagon::V6_vS32b_pred_ai: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(8)) << 10;
      Value |= (op & UINT64_C(7)) << 8;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 11;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vs32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vS32b_nqpred_ai:
    case Hexagon::V6_vS32b_nt_nqpred_ai:
    case Hexagon::V6_vS32b_nt_qpred_ai:
    case Hexagon::V6_vS32b_qpred_ai: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(8)) << 10;
      Value |= (op & UINT64_C(7)) << 8;
      // op: Qv4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 11;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vs32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vL32Ub_ai:
    case Hexagon::V6_vL32b_ai:
    case Hexagon::V6_vL32b_cur_ai:
    case Hexagon::V6_vL32b_nt_ai:
    case Hexagon::V6_vL32b_nt_cur_ai:
    case Hexagon::V6_vL32b_nt_tmp_ai:
    case Hexagon::V6_vL32b_tmp_ai: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(8)) << 10;
      Value |= (op & UINT64_C(7)) << 8;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_storerd_pci: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(120);
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S2_storerd_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(120);
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S4_storeirhf_io:
    case Hexagon::S4_storeirhfnew_io:
    case Hexagon::S4_storeirht_io:
    case Hexagon::S4_storeirhtnew_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(126);
      op <<= 6;
      Value |= op;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(32)) << 8;
      Value |= (op & UINT64_C(31));
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::SA1_addi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(127);
      op <<= 4;
      Value |= op;
      // op: Rx16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(15);
      Value |= op;
      break;
    }
    case Hexagon::A4_cmpbgtui:
    case Hexagon::A4_cmphgtui: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(127);
      op <<= 5;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Pd4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::A4_vcmpbgtui:
    case Hexagon::A4_vcmphgtui:
    case Hexagon::A4_vcmpwgtui: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(127);
      op <<= 5;
      Value |= op;
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Pd4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::SL2_loadrh_io:
    case Hexagon::SL2_loadruh_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(14);
      op <<= 7;
      Value |= op;
      // op: Rs16
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 4;
      Value |= op;
      // op: Rd16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(15);
      Value |= op;
      break;
    }
    case Hexagon::S2_storerbnew_pci: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 3;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S2_storerb_pci: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 3;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S2_storerbnew_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 3;
      Value |= op;
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S2_storerb_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 3;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::SL1_loadrub_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 8;
      Value |= op;
      // op: Rs16
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 4;
      Value |= op;
      // op: Rd16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(15);
      Value |= op;
      break;
    }
    case Hexagon::S5_asrhub_rnd_sat:
    case Hexagon::S5_asrhub_sat: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 8;
      Value |= op;
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_asl_i_vh:
    case Hexagon::S2_asr_i_vh:
    case Hexagon::S2_lsr_i_vh:
    case Hexagon::S5_vasrhrnd: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 8;
      Value |= op;
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_allocframe: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(16376);
      op >>= 3;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S4_storeirif_io:
    case Hexagon::S4_storeirifnew_io:
    case Hexagon::S4_storeirit_io:
    case Hexagon::S4_storeiritnew_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(252);
      op <<= 5;
      Value |= op;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(32)) << 8;
      Value |= (op & UINT64_C(31));
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::C2_muxii: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(255);
      op <<= 5;
      Value |= op;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(254)) << 15;
      Value |= (op & UINT64_C(1)) << 13;
      // op: Pu4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 23;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::C2_muxri: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(255);
      op <<= 5;
      Value |= op;
      // op: Pu4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 21;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A4_cmpbeqi:
    case Hexagon::A4_cmpbgti:
    case Hexagon::A4_cmpheqi:
    case Hexagon::A4_cmphgti: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(255);
      op <<= 5;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Pd4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::A4_rcmpeqi:
    case Hexagon::A4_rcmpneqi:
    case Hexagon::M2_mpysin:
    case Hexagon::M2_mpysip: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(255);
      op <<= 5;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A4_combineri: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(255);
      op <<= 5;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A4_vcmpbeqi:
    case Hexagon::A4_vcmpbgti:
    case Hexagon::A4_vcmpheqi:
    case Hexagon::A4_vcmphgti:
    case Hexagon::A4_vcmpweqi:
    case Hexagon::A4_vcmpwgti: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(255);
      op <<= 5;
      Value |= op;
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Pd4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::S2_storerhnew_pci: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(30);
      op <<= 2;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S2_storerf_pci:
    case Hexagon::S2_storerh_pci: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(30);
      op <<= 2;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S2_storerhnew_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(30);
      op <<= 2;
      Value |= op;
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S2_storerf_pi:
    case Hexagon::S2_storerh_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(30);
      op <<= 2;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::F2_dfclass: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 5;
      Value |= op;
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Pd4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::S2_extractu:
    case Hexagon::S4_extract: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(24)) << 18;
      Value |= (op & UINT64_C(7)) << 5;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::F2_sfclass:
    case Hexagon::S2_tstbit_i:
    case Hexagon::S4_ntstbit_i: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Pd4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::A4_cround_ri:
    case Hexagon::A4_round_ri:
    case Hexagon::A4_round_ri_sat:
    case Hexagon::S2_asl_i_r:
    case Hexagon::S2_asl_i_r_sat:
    case Hexagon::S2_asr_i_r:
    case Hexagon::S2_asr_i_r_rnd:
    case Hexagon::S2_clrbit_i:
    case Hexagon::S2_lsr_i_r:
    case Hexagon::S2_setbit_i:
    case Hexagon::S2_togglebit_i:
    case Hexagon::S6_rol_i_r: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A4_bitspliti: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_asr_i_svw_trun: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_asl_i_vw:
    case Hexagon::S2_asr_i_vw:
    case Hexagon::S2_lsr_i_vw: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::C2_cmpgtui:
    case Hexagon::C4_cmplteui: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(511);
      op <<= 5;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Pd4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::S2_storerinew_pci: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(60);
      op <<= 1;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S2_storeri_pci: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(60);
      op <<= 1;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S2_storerinew_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(60);
      op <<= 1;
      Value |= op;
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S2_storeri_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(60);
      op <<= 1;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::SL1_loadri_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(60);
      op <<= 6;
      Value |= op;
      // op: Rs16
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 4;
      Value |= op;
      // op: Rd16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(15);
      Value |= op;
      break;
    }
    case Hexagon::S4_storeirbf_io:
    case Hexagon::S4_storeirbfnew_io:
    case Hexagon::S4_storeirbt_io:
    case Hexagon::S4_storeirbtnew_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(63);
      op <<= 7;
      Value |= op;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(32)) << 8;
      Value |= (op & UINT64_C(31));
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S2_extractup:
    case Hexagon::S4_extractp: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(63);
      op <<= 8;
      Value |= op;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(56)) << 18;
      Value |= (op & UINT64_C(7)) << 5;
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::C2_bitsclri:
    case Hexagon::C4_nbitsclri: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(63);
      op <<= 8;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Pd4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::S4_clbaddi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(63);
      op <<= 8;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S4_clbpaddi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(63);
      op <<= 8;
      Value |= op;
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_asl_i_p:
    case Hexagon::S2_asr_i_p:
    case Hexagon::S2_asr_i_p_rnd:
    case Hexagon::S2_lsr_i_p:
    case Hexagon::S6_rol_i_p: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(63);
      op <<= 8;
      Value |= op;
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vS32b_new_pi:
    case Hexagon::V6_vS32b_nt_new_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      // op: Os8
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::SL2_loadrb_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      // op: Rs16
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 4;
      Value |= op;
      // op: Rd16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(15);
      Value |= op;
      break;
    }
    case Hexagon::V6_vS32b_srls_pi:
    case Hexagon::V6_zLd_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::V6_vS32Ub_pi:
    case Hexagon::V6_vS32b_nt_pi:
    case Hexagon::V6_vS32b_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      // op: Vs32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_loadalignb_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1536)) << 16;
      Value |= (op & UINT64_C(511)) << 5;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Ryy32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S4_vrcrotate: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(2)) << 12;
      Value |= (op & UINT64_C(1)) << 5;
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::L4_loadalignb_ur:
    case Hexagon::L4_loadalignh_ur: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(2)) << 12;
      Value |= (op & UINT64_C(1)) << 7;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(60)) << 6;
      Value |= (op & UINT64_C(3)) << 5;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Ryy32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S4_pstorerbnewf_rr:
    case Hexagon::S4_pstorerbnewfnew_rr:
    case Hexagon::S4_pstorerbnewt_rr:
    case Hexagon::S4_pstorerbnewtnew_rr:
    case Hexagon::S4_pstorerhnewf_rr:
    case Hexagon::S4_pstorerhnewfnew_rr:
    case Hexagon::S4_pstorerhnewt_rr:
    case Hexagon::S4_pstorerhnewtnew_rr:
    case Hexagon::S4_pstorerinewf_rr:
    case Hexagon::S4_pstorerinewfnew_rr:
    case Hexagon::S4_pstorerinewt_rr:
    case Hexagon::S4_pstorerinewtnew_rr: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(2)) << 12;
      Value |= (op & UINT64_C(1)) << 7;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Ru32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(7);
      Value |= op;
      break;
    }
    case Hexagon::S4_pstorerbf_rr:
    case Hexagon::S4_pstorerbfnew_rr:
    case Hexagon::S4_pstorerbt_rr:
    case Hexagon::S4_pstorerbtnew_rr:
    case Hexagon::S4_pstorerff_rr:
    case Hexagon::S4_pstorerffnew_rr:
    case Hexagon::S4_pstorerft_rr:
    case Hexagon::S4_pstorerftnew_rr:
    case Hexagon::S4_pstorerhf_rr:
    case Hexagon::S4_pstorerhfnew_rr:
    case Hexagon::S4_pstorerht_rr:
    case Hexagon::S4_pstorerhtnew_rr:
    case Hexagon::S4_pstorerif_rr:
    case Hexagon::S4_pstorerifnew_rr:
    case Hexagon::S4_pstorerit_rr:
    case Hexagon::S4_pstoreritnew_rr: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(2)) << 12;
      Value |= (op & UINT64_C(1)) << 7;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Ru32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S4_pstorerdf_rr:
    case Hexagon::S4_pstorerdfnew_rr:
    case Hexagon::S4_pstorerdt_rr:
    case Hexagon::S4_pstorerdtnew_rr: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(2)) << 12;
      Value |= (op & UINT64_C(1)) << 7;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Ru32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::L4_loadrb_rr:
    case Hexagon::L4_loadrh_rr:
    case Hexagon::L4_loadri_rr:
    case Hexagon::L4_loadrub_rr:
    case Hexagon::L4_loadruh_rr: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(2)) << 12;
      Value |= (op & UINT64_C(1)) << 7;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::L4_loadrd_rr: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(2)) << 12;
      Value |= (op & UINT64_C(1)) << 7;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::L2_loadalignh_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(3072)) << 15;
      Value |= (op & UINT64_C(1022)) << 4;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Ryy32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S4_addaddi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(48)) << 17;
      Value |= (op & UINT64_C(8)) << 10;
      Value |= (op & UINT64_C(7)) << 5;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Ru32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::M4_mpyri_addr: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(48)) << 17;
      Value |= (op & UINT64_C(8)) << 10;
      Value |= (op & UINT64_C(7)) << 5;
      // op: Ru32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::S4_or_andi:
    case Hexagon::S4_or_ori: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(512)) << 12;
      Value |= (op & UINT64_C(511)) << 5;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S4_or_andix: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(512)) << 12;
      Value |= (op & UINT64_C(511)) << 5;
      // op: Ru32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::V6_vL32b_cur_npred_ai:
    case Hexagon::V6_vL32b_cur_pred_ai:
    case Hexagon::V6_vL32b_npred_ai:
    case Hexagon::V6_vL32b_nt_cur_npred_ai:
    case Hexagon::V6_vL32b_nt_cur_pred_ai:
    case Hexagon::V6_vL32b_nt_npred_ai:
    case Hexagon::V6_vL32b_nt_pred_ai:
    case Hexagon::V6_vL32b_nt_tmp_npred_ai:
    case Hexagon::V6_vL32b_nt_tmp_pred_ai:
    case Hexagon::V6_vL32b_pred_ai:
    case Hexagon::V6_vL32b_tmp_npred_ai:
    case Hexagon::V6_vL32b_tmp_pred_ai: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(8)) << 10;
      Value |= (op & UINT64_C(7)) << 8;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 11;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_tableidxb:
    case Hexagon::S2_tableidxd:
    case Hexagon::S2_tableidxh:
    case Hexagon::S2_tableidxw: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(8)) << 18;
      Value |= (op & UINT64_C(7)) << 5;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(63);
      op <<= 8;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vrmpybusi:
    case Hexagon::V6_vrmpyubi:
    case Hexagon::V6_vrsadubi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 5;
      Value |= op;
      // op: Vuu32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_pstorerdf_pi:
    case Hexagon::S2_pstorerdfnew_pi:
    case Hexagon::S2_pstorerdt_pi:
    case Hexagon::S2_pstorerdtnew_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(120);
      Value |= op;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_loadrd_pci: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(120);
      op <<= 2;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_loadrd_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(120);
      op <<= 2;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_ploadrhf_io:
    case Hexagon::L2_ploadrhfnew_io:
    case Hexagon::L2_ploadrht_io:
    case Hexagon::L2_ploadrhtnew_io:
    case Hexagon::L2_ploadruhf_io:
    case Hexagon::L2_ploadruhfnew_io:
    case Hexagon::L2_ploadruht_io:
    case Hexagon::L2_ploadruhtnew_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(126);
      op <<= 4;
      Value |= op;
      // op: Pt4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 11;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_pstorerbnewf_pi:
    case Hexagon::S2_pstorerbnewfnew_pi:
    case Hexagon::S2_pstorerbnewt_pi:
    case Hexagon::S2_pstorerbnewtnew_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 3;
      Value |= op;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S2_pstorerbf_pi:
    case Hexagon::S2_pstorerbfnew_pi:
    case Hexagon::S2_pstorerbt_pi:
    case Hexagon::S2_pstorerbtnew_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 3;
      Value |= op;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_loadrb_pci:
    case Hexagon::L2_loadrub_pci: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 5;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_loadrb_pi:
    case Hexagon::L2_loadrub_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 5;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_ploadrif_io:
    case Hexagon::L2_ploadrifnew_io:
    case Hexagon::L2_ploadrit_io:
    case Hexagon::L2_ploadritnew_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(252);
      op <<= 3;
      Value |= op;
      // op: Pt4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 11;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A2_paddif:
    case Hexagon::A2_paddifnew:
    case Hexagon::A2_paddit:
    case Hexagon::A2_padditnew:
    case Hexagon::C2_muxir: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(255);
      op <<= 5;
      Value |= op;
      // op: Pu4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 21;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::M2_accii:
    case Hexagon::M2_macsin:
    case Hexagon::M2_macsip:
    case Hexagon::M2_naccii: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(255);
      op <<= 5;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_pstorerhnewf_pi:
    case Hexagon::S2_pstorerhnewfnew_pi:
    case Hexagon::S2_pstorerhnewt_pi:
    case Hexagon::S2_pstorerhnewtnew_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(30);
      op <<= 2;
      Value |= op;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S2_pstorerff_pi:
    case Hexagon::S2_pstorerffnew_pi:
    case Hexagon::S2_pstorerft_pi:
    case Hexagon::S2_pstorerftnew_pi:
    case Hexagon::S2_pstorerhf_pi:
    case Hexagon::S2_pstorerhfnew_pi:
    case Hexagon::S2_pstorerht_pi:
    case Hexagon::S2_pstorerhtnew_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(30);
      op <<= 2;
      Value |= op;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_loadbsw2_pci:
    case Hexagon::L2_loadbzw2_pci:
    case Hexagon::L2_loadrh_pci:
    case Hexagon::L2_loadruh_pci: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(30);
      op <<= 4;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_loadbsw2_pi:
    case Hexagon::L2_loadbzw2_pi:
    case Hexagon::L2_loadrh_pi:
    case Hexagon::L2_loadruh_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(30);
      op <<= 4;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S2_insert: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(24)) << 18;
      Value |= (op & UINT64_C(7)) << 5;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_asl_i_r_acc:
    case Hexagon::S2_asl_i_r_and:
    case Hexagon::S2_asl_i_r_nac:
    case Hexagon::S2_asl_i_r_or:
    case Hexagon::S2_asl_i_r_xacc:
    case Hexagon::S2_asr_i_r_acc:
    case Hexagon::S2_asr_i_r_and:
    case Hexagon::S2_asr_i_r_nac:
    case Hexagon::S2_asr_i_r_or:
    case Hexagon::S2_lsr_i_r_acc:
    case Hexagon::S2_lsr_i_r_and:
    case Hexagon::S2_lsr_i_r_nac:
    case Hexagon::S2_lsr_i_r_or:
    case Hexagon::S2_lsr_i_r_xacc:
    case Hexagon::S6_rol_i_r_acc:
    case Hexagon::S6_rol_i_r_and:
    case Hexagon::S6_rol_i_r_nac:
    case Hexagon::S6_rol_i_r_or:
    case Hexagon::S6_rol_i_r_xacc: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::L2_ploadrdf_io:
    case Hexagon::L2_ploadrdfnew_io:
    case Hexagon::L2_ploadrdt_io:
    case Hexagon::L2_ploadrdtnew_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(504);
      op <<= 2;
      Value |= op;
      // op: Pt4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 11;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_pstorerinewf_pi:
    case Hexagon::S2_pstorerinewfnew_pi:
    case Hexagon::S2_pstorerinewt_pi:
    case Hexagon::S2_pstorerinewtnew_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(60);
      op <<= 1;
      Value |= op;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S2_pstorerif_pi:
    case Hexagon::S2_pstorerifnew_pi:
    case Hexagon::S2_pstorerit_pi:
    case Hexagon::S2_pstoreritnew_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(60);
      op <<= 1;
      Value |= op;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_loadri_pci: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(60);
      op <<= 3;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_loadbsw4_pci:
    case Hexagon::L2_loadbzw4_pci: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(60);
      op <<= 3;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_loadri_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(60);
      op <<= 3;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_loadbsw4_pi:
    case Hexagon::L2_loadbzw4_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(60);
      op <<= 3;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_ploadrbf_io:
    case Hexagon::L2_ploadrbfnew_io:
    case Hexagon::L2_ploadrbt_io:
    case Hexagon::L2_ploadrbtnew_io:
    case Hexagon::L2_ploadrubf_io:
    case Hexagon::L2_ploadrubfnew_io:
    case Hexagon::L2_ploadrubt_io:
    case Hexagon::L2_ploadrubtnew_io: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(63);
      op <<= 5;
      Value |= op;
      // op: Pt4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 11;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_insertp: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(63);
      op <<= 8;
      Value |= op;
      // op: II
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(56)) << 18;
      Value |= (op & UINT64_C(7)) << 5;
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rxx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_asl_i_p_acc:
    case Hexagon::S2_asl_i_p_and:
    case Hexagon::S2_asl_i_p_nac:
    case Hexagon::S2_asl_i_p_or:
    case Hexagon::S2_asl_i_p_xacc:
    case Hexagon::S2_asr_i_p_acc:
    case Hexagon::S2_asr_i_p_and:
    case Hexagon::S2_asr_i_p_nac:
    case Hexagon::S2_asr_i_p_or:
    case Hexagon::S2_lsr_i_p_acc:
    case Hexagon::S2_lsr_i_p_and:
    case Hexagon::S2_lsr_i_p_nac:
    case Hexagon::S2_lsr_i_p_or:
    case Hexagon::S2_lsr_i_p_xacc:
    case Hexagon::S6_rol_i_p_acc:
    case Hexagon::S6_rol_i_p_and:
    case Hexagon::S6_rol_i_p_nac:
    case Hexagon::S6_rol_i_p_or:
    case Hexagon::S6_rol_i_p_xacc: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(63);
      op <<= 8;
      Value |= op;
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rxx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_vspliceib: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 5;
      Value |= op;
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_addasl_rrri: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 5;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_valignib: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 5;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_valignbi:
    case Hexagon::V6_vlalignbi:
    case Hexagon::V6_vlutvvbi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 5;
      Value |= op;
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vlutvwhi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 5;
      Value |= op;
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vS32b_new_npred_pi:
    case Hexagon::V6_vS32b_new_pred_pi:
    case Hexagon::V6_vS32b_nt_new_npred_pi:
    case Hexagon::V6_vS32b_nt_new_pred_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 11;
      Value |= op;
      // op: Os8
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(7);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::V6_zLd_pred_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 11;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::V6_vS32Ub_npred_pi:
    case Hexagon::V6_vS32Ub_pred_pi:
    case Hexagon::V6_vS32b_npred_pi:
    case Hexagon::V6_vS32b_nt_npred_pi:
    case Hexagon::V6_vS32b_nt_pred_pi:
    case Hexagon::V6_vS32b_pred_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 11;
      Value |= op;
      // op: Vs32
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::V6_vS32b_nqpred_pi:
    case Hexagon::V6_vS32b_nt_nqpred_pi:
    case Hexagon::V6_vS32b_nt_qpred_pi:
    case Hexagon::V6_vS32b_qpred_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      // op: Qv4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 11;
      Value |= op;
      // op: Vs32
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::V6_vL32Ub_pi:
    case Hexagon::V6_vL32b_cur_pi:
    case Hexagon::V6_vL32b_nt_cur_pi:
    case Hexagon::V6_vL32b_nt_pi:
    case Hexagon::V6_vL32b_nt_tmp_pi:
    case Hexagon::V6_vL32b_pi:
    case Hexagon::V6_vL32b_tmp_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      // op: Vd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S4_vrcrotate_acc: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(2)) << 12;
      Value |= (op & UINT64_C(1)) << 5;
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rxx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::L4_ploadrbf_rr:
    case Hexagon::L4_ploadrbfnew_rr:
    case Hexagon::L4_ploadrbt_rr:
    case Hexagon::L4_ploadrbtnew_rr:
    case Hexagon::L4_ploadrhf_rr:
    case Hexagon::L4_ploadrhfnew_rr:
    case Hexagon::L4_ploadrht_rr:
    case Hexagon::L4_ploadrhtnew_rr:
    case Hexagon::L4_ploadrif_rr:
    case Hexagon::L4_ploadrifnew_rr:
    case Hexagon::L4_ploadrit_rr:
    case Hexagon::L4_ploadritnew_rr:
    case Hexagon::L4_ploadrubf_rr:
    case Hexagon::L4_ploadrubfnew_rr:
    case Hexagon::L4_ploadrubt_rr:
    case Hexagon::L4_ploadrubtnew_rr:
    case Hexagon::L4_ploadruhf_rr:
    case Hexagon::L4_ploadruhfnew_rr:
    case Hexagon::L4_ploadruht_rr:
    case Hexagon::L4_ploadruhtnew_rr: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(2)) << 12;
      Value |= (op & UINT64_C(1)) << 7;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::L4_ploadrdf_rr:
    case Hexagon::L4_ploadrdfnew_rr:
    case Hexagon::L4_ploadrdt_rr:
    case Hexagon::L4_ploadrdtnew_rr: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(2)) << 12;
      Value |= (op & UINT64_C(1)) << 7;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vrmpybusi_acc:
    case Hexagon::V6_vrmpyubi_acc:
    case Hexagon::V6_vrsadubi_acc: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 5;
      Value |= op;
      // op: Vuu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vxx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::L2_ploadrdf_pi:
    case Hexagon::L2_ploadrdfnew_pi:
    case Hexagon::L2_ploadrdt_pi:
    case Hexagon::L2_ploadrdtnew_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(120);
      op <<= 2;
      Value |= op;
      // op: Pt4
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 9;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_loadalignb_pci: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 5;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Ryy32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_ploadrbf_pi:
    case Hexagon::L2_ploadrbfnew_pi:
    case Hexagon::L2_ploadrbt_pi:
    case Hexagon::L2_ploadrbtnew_pi:
    case Hexagon::L2_ploadrubf_pi:
    case Hexagon::L2_ploadrubfnew_pi:
    case Hexagon::L2_ploadrubt_pi:
    case Hexagon::L2_ploadrubtnew_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 5;
      Value |= op;
      // op: Pt4
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 9;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_loadalignb_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 5;
      Value |= op;
      // op: Ryy32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_loadalignh_pci: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(30);
      op <<= 4;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Ryy32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_ploadrhf_pi:
    case Hexagon::L2_ploadrhfnew_pi:
    case Hexagon::L2_ploadrht_pi:
    case Hexagon::L2_ploadrhtnew_pi:
    case Hexagon::L2_ploadruhf_pi:
    case Hexagon::L2_ploadruhfnew_pi:
    case Hexagon::L2_ploadruht_pi:
    case Hexagon::L2_ploadruhtnew_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(30);
      op <<= 4;
      Value |= op;
      // op: Pt4
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 9;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_loadalignh_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(30);
      op <<= 4;
      Value |= op;
      // op: Ryy32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_ploadrif_pi:
    case Hexagon::L2_ploadrifnew_pi:
    case Hexagon::L2_ploadrit_pi:
    case Hexagon::L2_ploadritnew_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(60);
      op <<= 3;
      Value |= op;
      // op: Pt4
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 9;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::V6_vlutvvb_oracci: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 5;
      Value |= op;
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vlutvwh_oracci: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 5;
      Value |= op;
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vxx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vL32b_cur_npred_pi:
    case Hexagon::V6_vL32b_cur_pred_pi:
    case Hexagon::V6_vL32b_npred_pi:
    case Hexagon::V6_vL32b_nt_cur_npred_pi:
    case Hexagon::V6_vL32b_nt_cur_pred_pi:
    case Hexagon::V6_vL32b_nt_npred_pi:
    case Hexagon::V6_vL32b_nt_pred_pi:
    case Hexagon::V6_vL32b_nt_tmp_npred_pi:
    case Hexagon::V6_vL32b_nt_tmp_pred_pi:
    case Hexagon::V6_vL32b_pred_pi:
    case Hexagon::V6_vL32b_tmp_npred_pi:
    case Hexagon::V6_vL32b_tmp_pred_pi: {
      // op: Ii
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 11;
      Value |= op;
      // op: Vd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S2_storerbnew_pbr:
    case Hexagon::S2_storerbnew_pcr:
    case Hexagon::S2_storerbnew_pr:
    case Hexagon::S2_storerhnew_pbr:
    case Hexagon::S2_storerhnew_pcr:
    case Hexagon::S2_storerhnew_pr:
    case Hexagon::S2_storerinew_pbr:
    case Hexagon::S2_storerinew_pcr:
    case Hexagon::S2_storerinew_pr: {
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Nt8
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::V6_vS32b_new_ppu:
    case Hexagon::V6_vS32b_nt_new_ppu: {
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Os8
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S2_storerb_pbr:
    case Hexagon::S2_storerb_pcr:
    case Hexagon::S2_storerb_pr:
    case Hexagon::S2_storerf_pbr:
    case Hexagon::S2_storerf_pcr:
    case Hexagon::S2_storerf_pr:
    case Hexagon::S2_storerh_pbr:
    case Hexagon::S2_storerh_pcr:
    case Hexagon::S2_storerh_pr:
    case Hexagon::S2_storeri_pbr:
    case Hexagon::S2_storeri_pcr:
    case Hexagon::S2_storeri_pr: {
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::S2_storerd_pbr:
    case Hexagon::S2_storerd_pcr:
    case Hexagon::S2_storerd_pr: {
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::V6_vS32b_srls_ppu:
    case Hexagon::V6_zLd_ppu: {
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::V6_vS32Ub_ppu:
    case Hexagon::V6_vS32b_nt_ppu:
    case Hexagon::V6_vS32b_ppu: {
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Vs32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_loadbsw2_pbr:
    case Hexagon::L2_loadbsw2_pcr:
    case Hexagon::L2_loadbsw2_pr:
    case Hexagon::L2_loadbzw2_pbr:
    case Hexagon::L2_loadbzw2_pcr:
    case Hexagon::L2_loadbzw2_pr:
    case Hexagon::L2_loadrb_pbr:
    case Hexagon::L2_loadrb_pcr:
    case Hexagon::L2_loadrb_pr:
    case Hexagon::L2_loadrh_pbr:
    case Hexagon::L2_loadrh_pcr:
    case Hexagon::L2_loadrh_pr:
    case Hexagon::L2_loadri_pbr:
    case Hexagon::L2_loadri_pcr:
    case Hexagon::L2_loadri_pr:
    case Hexagon::L2_loadrub_pbr:
    case Hexagon::L2_loadrub_pcr:
    case Hexagon::L2_loadrub_pr:
    case Hexagon::L2_loadruh_pbr:
    case Hexagon::L2_loadruh_pcr:
    case Hexagon::L2_loadruh_pr: {
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_loadbsw4_pbr:
    case Hexagon::L2_loadbsw4_pcr:
    case Hexagon::L2_loadbsw4_pr:
    case Hexagon::L2_loadbzw4_pbr:
    case Hexagon::L2_loadbzw4_pcr:
    case Hexagon::L2_loadbzw4_pr:
    case Hexagon::L2_loadrd_pbr:
    case Hexagon::L2_loadrd_pcr:
    case Hexagon::L2_loadrd_pr: {
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::V6_vL32Ub_ppu:
    case Hexagon::V6_vL32b_cur_ppu:
    case Hexagon::V6_vL32b_nt_cur_ppu:
    case Hexagon::V6_vL32b_nt_ppu:
    case Hexagon::V6_vL32b_nt_tmp_ppu:
    case Hexagon::V6_vL32b_ppu:
    case Hexagon::V6_vL32b_tmp_ppu: {
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Vd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L2_loadalignb_pbr:
    case Hexagon::L2_loadalignb_pcr:
    case Hexagon::L2_loadalignb_pr:
    case Hexagon::L2_loadalignh_pbr:
    case Hexagon::L2_loadalignh_pcr:
    case Hexagon::L2_loadalignh_pr: {
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Ryy32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::C2_all8:
    case Hexagon::C2_any8:
    case Hexagon::C2_not: {
      // op: Ps4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 16;
      Value |= op;
      // op: Pd4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::C2_xor:
    case Hexagon::C4_fastcorner9:
    case Hexagon::C4_fastcorner9_not: {
      // op: Ps4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 16;
      Value |= op;
      // op: Pt4
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 8;
      Value |= op;
      // op: Pd4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::C4_and_and:
    case Hexagon::C4_and_andn:
    case Hexagon::C4_and_or:
    case Hexagon::C4_and_orn:
    case Hexagon::C4_or_and:
    case Hexagon::C4_or_andn:
    case Hexagon::C4_or_or:
    case Hexagon::C4_or_orn: {
      // op: Ps4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 16;
      Value |= op;
      // op: Pt4
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 8;
      Value |= op;
      // op: Pu4
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 6;
      Value |= op;
      // op: Pd4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::C2_vitpack: {
      // op: Ps4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 16;
      Value |= op;
      // op: Pt4
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 8;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::C2_tfrpr: {
      // op: Ps4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vcmov:
    case Hexagon::V6_vncmov: {
      // op: Ps4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vccombine:
    case Hexagon::V6_vnccombine: {
      // op: Ps4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::C2_and:
    case Hexagon::C2_andn:
    case Hexagon::C2_or:
    case Hexagon::C2_orn: {
      // op: Pt4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 8;
      Value |= op;
      // op: Ps4
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 16;
      Value |= op;
      // op: Pd4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::C2_mask: {
      // op: Pt4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 8;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::J2_callrf:
    case Hexagon::J2_callrt:
    case Hexagon::J2_jumprf:
    case Hexagon::J2_jumprfnew:
    case Hexagon::J2_jumprfnewpt:
    case Hexagon::J2_jumprfpt:
    case Hexagon::J2_jumprt:
    case Hexagon::J2_jumprtnew:
    case Hexagon::J2_jumprtnewpt:
    case Hexagon::J2_jumprtpt: {
      // op: Pu4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 8;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::A2_paddf:
    case Hexagon::A2_paddfnew:
    case Hexagon::A2_paddt:
    case Hexagon::A2_paddtnew:
    case Hexagon::A2_pandf:
    case Hexagon::A2_pandfnew:
    case Hexagon::A2_pandt:
    case Hexagon::A2_pandtnew:
    case Hexagon::A2_porf:
    case Hexagon::A2_porfnew:
    case Hexagon::A2_port:
    case Hexagon::A2_portnew:
    case Hexagon::A2_pxorf:
    case Hexagon::A2_pxorfnew:
    case Hexagon::A2_pxort:
    case Hexagon::A2_pxortnew:
    case Hexagon::C2_mux: {
      // op: Pu4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::C2_ccombinewf:
    case Hexagon::C2_ccombinewnewf:
    case Hexagon::C2_ccombinewnewt:
    case Hexagon::C2_ccombinewt: {
      // op: Pu4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::C2_vmux: {
      // op: Pu4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A2_psubf:
    case Hexagon::A2_psubfnew:
    case Hexagon::A2_psubt:
    case Hexagon::A2_psubtnew: {
      // op: Pu4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A4_paslhf:
    case Hexagon::A4_paslhfnew:
    case Hexagon::A4_paslht:
    case Hexagon::A4_paslhtnew:
    case Hexagon::A4_pasrhf:
    case Hexagon::A4_pasrhfnew:
    case Hexagon::A4_pasrht:
    case Hexagon::A4_pasrhtnew:
    case Hexagon::A4_psxtbf:
    case Hexagon::A4_psxtbfnew:
    case Hexagon::A4_psxtbt:
    case Hexagon::A4_psxtbtnew:
    case Hexagon::A4_psxthf:
    case Hexagon::A4_psxthfnew:
    case Hexagon::A4_psxtht:
    case Hexagon::A4_psxthtnew:
    case Hexagon::A4_pzxtbf:
    case Hexagon::A4_pzxtbfnew:
    case Hexagon::A4_pzxtbt:
    case Hexagon::A4_pzxtbtnew:
    case Hexagon::A4_pzxthf:
    case Hexagon::A4_pzxthfnew:
    case Hexagon::A4_pzxtht:
    case Hexagon::A4_pzxthtnew: {
      // op: Pu4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 8;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vS32b_new_npred_ppu:
    case Hexagon::V6_vS32b_new_pred_ppu:
    case Hexagon::V6_vS32b_nt_new_npred_ppu:
    case Hexagon::V6_vS32b_nt_new_pred_ppu: {
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 11;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Os8
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(7);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::V6_zLd_pred_ppu: {
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 11;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::V6_vS32Ub_npred_ppu:
    case Hexagon::V6_vS32Ub_pred_ppu:
    case Hexagon::V6_vS32b_npred_ppu:
    case Hexagon::V6_vS32b_nt_npred_ppu:
    case Hexagon::V6_vS32b_nt_pred_ppu:
    case Hexagon::V6_vS32b_pred_ppu: {
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 11;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Vs32
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::L4_return_f:
    case Hexagon::L4_return_fnew_pnt:
    case Hexagon::L4_return_fnew_pt:
    case Hexagon::L4_return_t:
    case Hexagon::L4_return_tnew_pnt:
    case Hexagon::L4_return_tnew_pt: {
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 8;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vL32b_cur_npred_ppu:
    case Hexagon::V6_vL32b_cur_pred_ppu:
    case Hexagon::V6_vL32b_npred_ppu:
    case Hexagon::V6_vL32b_nt_cur_npred_ppu:
    case Hexagon::V6_vL32b_nt_cur_pred_ppu:
    case Hexagon::V6_vL32b_nt_npred_ppu:
    case Hexagon::V6_vL32b_nt_pred_ppu:
    case Hexagon::V6_vL32b_nt_tmp_npred_ppu:
    case Hexagon::V6_vL32b_nt_tmp_pred_ppu:
    case Hexagon::V6_vL32b_pred_ppu:
    case Hexagon::V6_vL32b_tmp_npred_ppu:
    case Hexagon::V6_vL32b_tmp_pred_ppu: {
      // op: Pv4
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 11;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Vd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::V6_vgathermhq:
    case Hexagon::V6_vgathermwq: {
      // op: Qs4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vscattermhq:
    case Hexagon::V6_vscattermwq: {
      // op: Qs4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vw32
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vgathermhwq: {
      // op: Qs4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Vvv32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vscattermhwq: {
      // op: Qs4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Vvv32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vw32
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_pred_not: {
      // op: Qs4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 8;
      Value |= op;
      // op: Qd4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::V6_pred_and:
    case Hexagon::V6_pred_and_n:
    case Hexagon::V6_pred_or:
    case Hexagon::V6_pred_or_n:
    case Hexagon::V6_pred_xor:
    case Hexagon::V6_shuffeqh:
    case Hexagon::V6_shuffeqw: {
      // op: Qs4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 8;
      Value |= op;
      // op: Qt4
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 22;
      Value |= op;
      // op: Qd4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::V6_vmux: {
      // op: Qt4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vswap: {
      // op: Qt4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vandnqrt:
    case Hexagon::V6_vandqrt: {
      // op: Qu4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 8;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vandnqrt_acc:
    case Hexagon::V6_vandqrt_acc: {
      // op: Qu4
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 8;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vhistq:
    case Hexagon::V6_vwhist128q:
    case Hexagon::V6_vwhist256q:
    case Hexagon::V6_vwhist256q_sat: {
      // op: Qv4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 22;
      Value |= op;
      break;
    }
    case Hexagon::V6_vS32b_nqpred_ppu:
    case Hexagon::V6_vS32b_nt_nqpred_ppu:
    case Hexagon::V6_vS32b_nt_qpred_ppu:
    case Hexagon::V6_vS32b_qpred_ppu: {
      // op: Qv4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 11;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Vs32
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::V6_vprefixqb:
    case Hexagon::V6_vprefixqh:
    case Hexagon::V6_vprefixqw: {
      // op: Qv4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 22;
      Value |= op;
      // op: Vd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vandvnqv:
    case Hexagon::V6_vandvqv: {
      // op: Qv4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 22;
      Value |= op;
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vaddbnq:
    case Hexagon::V6_vaddbq:
    case Hexagon::V6_vaddhnq:
    case Hexagon::V6_vaddhq:
    case Hexagon::V6_vaddwnq:
    case Hexagon::V6_vaddwq:
    case Hexagon::V6_vsubbnq:
    case Hexagon::V6_vsubbq:
    case Hexagon::V6_vsubhnq:
    case Hexagon::V6_vsubhq:
    case Hexagon::V6_vsubwnq:
    case Hexagon::V6_vsubwq: {
      // op: Qv4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 22;
      Value |= op;
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::SA1_clrf:
    case Hexagon::SA1_clrfnew:
    case Hexagon::SA1_clrt:
    case Hexagon::SA1_clrtnew:
    case Hexagon::SA1_setin1: {
      // op: Rd16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(15);
      Value |= op;
      break;
    }
    case Hexagon::PS_callr_nr: {
      // op: Rs
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::SA1_and1:
    case Hexagon::SA1_dec:
    case Hexagon::SA1_inc:
    case Hexagon::SA1_sxtb:
    case Hexagon::SA1_sxth:
    case Hexagon::SA1_tfr:
    case Hexagon::SA1_zxtb:
    case Hexagon::SA1_zxth: {
      // op: Rs16
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 4;
      Value |= op;
      // op: Rd16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(15);
      Value |= op;
      break;
    }
    case Hexagon::SA1_combinerz:
    case Hexagon::SA1_combinezr: {
      // op: Rs16
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 4;
      Value |= op;
      // op: Rdd8
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(7);
      Value |= op;
      break;
    }
    case Hexagon::SA1_addrx: {
      // op: Rs16
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(15);
      op <<= 4;
      Value |= op;
      // op: Rx16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(15);
      Value |= op;
      break;
    }
    case Hexagon::J2_callr:
    case Hexagon::J2_jumpr:
    case Hexagon::J4_hintjumpr:
    case Hexagon::Y2_dccleana:
    case Hexagon::Y2_dccleaninva:
    case Hexagon::Y2_dcinva:
    case Hexagon::Y2_dczeroa:
    case Hexagon::Y2_icinva:
    case Hexagon::Y2_wait:
    case Hexagon::Y4_trace: {
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::Y4_l2fetch: {
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::L6_memcpy: {
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      break;
    }
    case Hexagon::Y5_l2fetch: {
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::A2_tfrrcr: {
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Cd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::G4_tfrgrcr: {
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Gd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::C2_tfrrp: {
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Pd4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::A2_abs:
    case Hexagon::A2_abssat:
    case Hexagon::A2_aslh:
    case Hexagon::A2_asrh:
    case Hexagon::A2_negsat:
    case Hexagon::A2_satb:
    case Hexagon::A2_sath:
    case Hexagon::A2_satub:
    case Hexagon::A2_satuh:
    case Hexagon::A2_swiz:
    case Hexagon::A2_sxtb:
    case Hexagon::A2_sxth:
    case Hexagon::A2_tfr:
    case Hexagon::A2_zxth:
    case Hexagon::F2_conv_sf2uw:
    case Hexagon::F2_conv_sf2uw_chop:
    case Hexagon::F2_conv_sf2w:
    case Hexagon::F2_conv_sf2w_chop:
    case Hexagon::F2_conv_uw2sf:
    case Hexagon::F2_conv_w2sf:
    case Hexagon::F2_sffixupr:
    case Hexagon::L2_loadw_locked:
    case Hexagon::S2_brev:
    case Hexagon::S2_cl0:
    case Hexagon::S2_cl1:
    case Hexagon::S2_clb:
    case Hexagon::S2_clbnorm:
    case Hexagon::S2_ct0:
    case Hexagon::S2_ct1:
    case Hexagon::S2_svsathb:
    case Hexagon::S2_svsathub:
    case Hexagon::S2_vsplatrb: {
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A2_sxtw:
    case Hexagon::F2_conv_sf2d:
    case Hexagon::F2_conv_sf2d_chop:
    case Hexagon::F2_conv_sf2df:
    case Hexagon::F2_conv_sf2ud:
    case Hexagon::F2_conv_sf2ud_chop:
    case Hexagon::F2_conv_uw2df:
    case Hexagon::F2_conv_w2df:
    case Hexagon::L2_deallocframe:
    case Hexagon::L4_loadd_locked:
    case Hexagon::L4_return:
    case Hexagon::S2_vsplatrh:
    case Hexagon::S2_vsxtbh:
    case Hexagon::S2_vsxthw:
    case Hexagon::S2_vzxtbh:
    case Hexagon::S2_vzxthw:
    case Hexagon::S6_vsplatrbp: {
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A4_cmpbeq:
    case Hexagon::A4_cmpbgt:
    case Hexagon::A4_cmpbgtu:
    case Hexagon::A4_cmpheq:
    case Hexagon::A4_cmphgt:
    case Hexagon::A4_cmphgtu:
    case Hexagon::C2_bitsclr:
    case Hexagon::C2_bitsset:
    case Hexagon::C2_cmpeq:
    case Hexagon::C2_cmpgt:
    case Hexagon::C2_cmpgtu:
    case Hexagon::C4_cmplte:
    case Hexagon::C4_cmplteu:
    case Hexagon::C4_cmpneq:
    case Hexagon::C4_nbitsclr:
    case Hexagon::C4_nbitsset:
    case Hexagon::F2_sfcmpeq:
    case Hexagon::F2_sfcmpge:
    case Hexagon::F2_sfcmpgt:
    case Hexagon::F2_sfcmpuo:
    case Hexagon::S2_storew_locked:
    case Hexagon::S2_tstbit_r:
    case Hexagon::S4_ntstbit_r: {
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Pd4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::A2_add:
    case Hexagon::A2_addsat:
    case Hexagon::A2_and:
    case Hexagon::A2_max:
    case Hexagon::A2_maxu:
    case Hexagon::A2_or:
    case Hexagon::A2_svaddh:
    case Hexagon::A2_svaddhs:
    case Hexagon::A2_svadduhs:
    case Hexagon::A2_svavgh:
    case Hexagon::A2_svavghs:
    case Hexagon::A2_xor:
    case Hexagon::A4_cround_rr:
    case Hexagon::A4_modwrapu:
    case Hexagon::A4_rcmpeq:
    case Hexagon::A4_rcmpneq:
    case Hexagon::A4_round_rr:
    case Hexagon::A4_round_rr_sat:
    case Hexagon::F2_sfadd:
    case Hexagon::F2_sffixupd:
    case Hexagon::F2_sffixupn:
    case Hexagon::F2_sfmax:
    case Hexagon::F2_sfmin:
    case Hexagon::F2_sfmpy:
    case Hexagon::F2_sfsub:
    case Hexagon::M2_cmpyrs_s0:
    case Hexagon::M2_cmpyrs_s1:
    case Hexagon::M2_cmpyrsc_s0:
    case Hexagon::M2_cmpyrsc_s1:
    case Hexagon::M2_dpmpyss_rnd_s0:
    case Hexagon::M2_hmmpyh_rs1:
    case Hexagon::M2_hmmpyh_s1:
    case Hexagon::M2_hmmpyl_rs1:
    case Hexagon::M2_hmmpyl_s1:
    case Hexagon::M2_mpy_hh_s0:
    case Hexagon::M2_mpy_hh_s1:
    case Hexagon::M2_mpy_hl_s0:
    case Hexagon::M2_mpy_hl_s1:
    case Hexagon::M2_mpy_lh_s0:
    case Hexagon::M2_mpy_lh_s1:
    case Hexagon::M2_mpy_ll_s0:
    case Hexagon::M2_mpy_ll_s1:
    case Hexagon::M2_mpy_rnd_hh_s0:
    case Hexagon::M2_mpy_rnd_hh_s1:
    case Hexagon::M2_mpy_rnd_hl_s0:
    case Hexagon::M2_mpy_rnd_hl_s1:
    case Hexagon::M2_mpy_rnd_lh_s0:
    case Hexagon::M2_mpy_rnd_lh_s1:
    case Hexagon::M2_mpy_rnd_ll_s0:
    case Hexagon::M2_mpy_rnd_ll_s1:
    case Hexagon::M2_mpy_sat_hh_s0:
    case Hexagon::M2_mpy_sat_hh_s1:
    case Hexagon::M2_mpy_sat_hl_s0:
    case Hexagon::M2_mpy_sat_hl_s1:
    case Hexagon::M2_mpy_sat_lh_s0:
    case Hexagon::M2_mpy_sat_lh_s1:
    case Hexagon::M2_mpy_sat_ll_s0:
    case Hexagon::M2_mpy_sat_ll_s1:
    case Hexagon::M2_mpy_sat_rnd_hh_s0:
    case Hexagon::M2_mpy_sat_rnd_hh_s1:
    case Hexagon::M2_mpy_sat_rnd_hl_s0:
    case Hexagon::M2_mpy_sat_rnd_hl_s1:
    case Hexagon::M2_mpy_sat_rnd_lh_s0:
    case Hexagon::M2_mpy_sat_rnd_lh_s1:
    case Hexagon::M2_mpy_sat_rnd_ll_s0:
    case Hexagon::M2_mpy_sat_rnd_ll_s1:
    case Hexagon::M2_mpy_up:
    case Hexagon::M2_mpy_up_s1:
    case Hexagon::M2_mpy_up_s1_sat:
    case Hexagon::M2_mpyi:
    case Hexagon::M2_mpysu_up:
    case Hexagon::M2_mpyu_hh_s0:
    case Hexagon::M2_mpyu_hh_s1:
    case Hexagon::M2_mpyu_hl_s0:
    case Hexagon::M2_mpyu_hl_s1:
    case Hexagon::M2_mpyu_lh_s0:
    case Hexagon::M2_mpyu_lh_s1:
    case Hexagon::M2_mpyu_ll_s0:
    case Hexagon::M2_mpyu_ll_s1:
    case Hexagon::M2_mpyu_up:
    case Hexagon::M2_vmpy2s_s0pack:
    case Hexagon::M2_vmpy2s_s1pack:
    case Hexagon::S2_asl_r_r:
    case Hexagon::S2_asl_r_r_sat:
    case Hexagon::S2_asr_r_r:
    case Hexagon::S2_asr_r_r_sat:
    case Hexagon::S2_clrbit_r:
    case Hexagon::S2_lsl_r_r:
    case Hexagon::S2_lsr_r_r:
    case Hexagon::S2_setbit_r:
    case Hexagon::S2_togglebit_r:
    case Hexagon::S4_parity:
    case Hexagon::dep_A2_addsat: {
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A2_combinew:
    case Hexagon::A4_bitsplit:
    case Hexagon::M2_cmpyi_s0:
    case Hexagon::M2_cmpyr_s0:
    case Hexagon::M2_cmpys_s0:
    case Hexagon::M2_cmpys_s1:
    case Hexagon::M2_cmpysc_s0:
    case Hexagon::M2_cmpysc_s1:
    case Hexagon::M2_dpmpyss_s0:
    case Hexagon::M2_dpmpyuu_s0:
    case Hexagon::M2_mpyd_hh_s0:
    case Hexagon::M2_mpyd_hh_s1:
    case Hexagon::M2_mpyd_hl_s0:
    case Hexagon::M2_mpyd_hl_s1:
    case Hexagon::M2_mpyd_lh_s0:
    case Hexagon::M2_mpyd_lh_s1:
    case Hexagon::M2_mpyd_ll_s0:
    case Hexagon::M2_mpyd_ll_s1:
    case Hexagon::M2_mpyd_rnd_hh_s0:
    case Hexagon::M2_mpyd_rnd_hh_s1:
    case Hexagon::M2_mpyd_rnd_hl_s0:
    case Hexagon::M2_mpyd_rnd_hl_s1:
    case Hexagon::M2_mpyd_rnd_lh_s0:
    case Hexagon::M2_mpyd_rnd_lh_s1:
    case Hexagon::M2_mpyd_rnd_ll_s0:
    case Hexagon::M2_mpyd_rnd_ll_s1:
    case Hexagon::M2_mpyud_hh_s0:
    case Hexagon::M2_mpyud_hh_s1:
    case Hexagon::M2_mpyud_hl_s0:
    case Hexagon::M2_mpyud_hl_s1:
    case Hexagon::M2_mpyud_lh_s0:
    case Hexagon::M2_mpyud_lh_s1:
    case Hexagon::M2_mpyud_ll_s0:
    case Hexagon::M2_mpyud_ll_s1:
    case Hexagon::M2_vmpy2s_s0:
    case Hexagon::M2_vmpy2s_s1:
    case Hexagon::M2_vmpy2su_s0:
    case Hexagon::M2_vmpy2su_s1:
    case Hexagon::M4_pmpyw:
    case Hexagon::M4_vpmpyh:
    case Hexagon::M5_vmpybsu:
    case Hexagon::M5_vmpybuu:
    case Hexagon::S2_packhl:
    case Hexagon::dep_S2_packhl: {
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S4_stored_locked: {
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Pd4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::S2_extractu_rp:
    case Hexagon::S4_extract_rp: {
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::F2_sfinvsqrta: {
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Pe4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      break;
    }
    case Hexagon::F2_sffma_sc: {
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Pu4
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::F2_sfrecipa: {
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Pe4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      break;
    }
    case Hexagon::F2_sffma:
    case Hexagon::F2_sffma_lib:
    case Hexagon::F2_sffms:
    case Hexagon::F2_sffms_lib:
    case Hexagon::M2_acci:
    case Hexagon::M2_maci:
    case Hexagon::M2_mnaci:
    case Hexagon::M2_mpy_acc_hh_s0:
    case Hexagon::M2_mpy_acc_hh_s1:
    case Hexagon::M2_mpy_acc_hl_s0:
    case Hexagon::M2_mpy_acc_hl_s1:
    case Hexagon::M2_mpy_acc_lh_s0:
    case Hexagon::M2_mpy_acc_lh_s1:
    case Hexagon::M2_mpy_acc_ll_s0:
    case Hexagon::M2_mpy_acc_ll_s1:
    case Hexagon::M2_mpy_acc_sat_hh_s0:
    case Hexagon::M2_mpy_acc_sat_hh_s1:
    case Hexagon::M2_mpy_acc_sat_hl_s0:
    case Hexagon::M2_mpy_acc_sat_hl_s1:
    case Hexagon::M2_mpy_acc_sat_lh_s0:
    case Hexagon::M2_mpy_acc_sat_lh_s1:
    case Hexagon::M2_mpy_acc_sat_ll_s0:
    case Hexagon::M2_mpy_acc_sat_ll_s1:
    case Hexagon::M2_mpy_nac_hh_s0:
    case Hexagon::M2_mpy_nac_hh_s1:
    case Hexagon::M2_mpy_nac_hl_s0:
    case Hexagon::M2_mpy_nac_hl_s1:
    case Hexagon::M2_mpy_nac_lh_s0:
    case Hexagon::M2_mpy_nac_lh_s1:
    case Hexagon::M2_mpy_nac_ll_s0:
    case Hexagon::M2_mpy_nac_ll_s1:
    case Hexagon::M2_mpy_nac_sat_hh_s0:
    case Hexagon::M2_mpy_nac_sat_hh_s1:
    case Hexagon::M2_mpy_nac_sat_hl_s0:
    case Hexagon::M2_mpy_nac_sat_hl_s1:
    case Hexagon::M2_mpy_nac_sat_lh_s0:
    case Hexagon::M2_mpy_nac_sat_lh_s1:
    case Hexagon::M2_mpy_nac_sat_ll_s0:
    case Hexagon::M2_mpy_nac_sat_ll_s1:
    case Hexagon::M2_mpyu_acc_hh_s0:
    case Hexagon::M2_mpyu_acc_hh_s1:
    case Hexagon::M2_mpyu_acc_hl_s0:
    case Hexagon::M2_mpyu_acc_hl_s1:
    case Hexagon::M2_mpyu_acc_lh_s0:
    case Hexagon::M2_mpyu_acc_lh_s1:
    case Hexagon::M2_mpyu_acc_ll_s0:
    case Hexagon::M2_mpyu_acc_ll_s1:
    case Hexagon::M2_mpyu_nac_hh_s0:
    case Hexagon::M2_mpyu_nac_hh_s1:
    case Hexagon::M2_mpyu_nac_hl_s0:
    case Hexagon::M2_mpyu_nac_hl_s1:
    case Hexagon::M2_mpyu_nac_lh_s0:
    case Hexagon::M2_mpyu_nac_lh_s1:
    case Hexagon::M2_mpyu_nac_ll_s0:
    case Hexagon::M2_mpyu_nac_ll_s1:
    case Hexagon::M2_nacci:
    case Hexagon::M2_xor_xacc:
    case Hexagon::M4_and_and:
    case Hexagon::M4_and_andn:
    case Hexagon::M4_and_or:
    case Hexagon::M4_and_xor:
    case Hexagon::M4_mac_up_s1_sat:
    case Hexagon::M4_nac_up_s1_sat:
    case Hexagon::M4_or_and:
    case Hexagon::M4_or_andn:
    case Hexagon::M4_or_or:
    case Hexagon::M4_or_xor:
    case Hexagon::M4_xor_and:
    case Hexagon::M4_xor_andn:
    case Hexagon::M4_xor_or:
    case Hexagon::S2_asl_r_r_acc:
    case Hexagon::S2_asl_r_r_and:
    case Hexagon::S2_asl_r_r_nac:
    case Hexagon::S2_asl_r_r_or:
    case Hexagon::S2_asr_r_r_acc:
    case Hexagon::S2_asr_r_r_and:
    case Hexagon::S2_asr_r_r_nac:
    case Hexagon::S2_asr_r_r_or:
    case Hexagon::S2_lsl_r_r_acc:
    case Hexagon::S2_lsl_r_r_and:
    case Hexagon::S2_lsl_r_r_nac:
    case Hexagon::S2_lsl_r_r_or:
    case Hexagon::S2_lsr_r_r_acc:
    case Hexagon::S2_lsr_r_r_and:
    case Hexagon::S2_lsr_r_r_nac:
    case Hexagon::S2_lsr_r_r_or: {
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::M2_cmaci_s0:
    case Hexagon::M2_cmacr_s0:
    case Hexagon::M2_cmacs_s0:
    case Hexagon::M2_cmacs_s1:
    case Hexagon::M2_cmacsc_s0:
    case Hexagon::M2_cmacsc_s1:
    case Hexagon::M2_cnacs_s0:
    case Hexagon::M2_cnacs_s1:
    case Hexagon::M2_cnacsc_s0:
    case Hexagon::M2_cnacsc_s1:
    case Hexagon::M2_dpmpyss_acc_s0:
    case Hexagon::M2_dpmpyss_nac_s0:
    case Hexagon::M2_dpmpyuu_acc_s0:
    case Hexagon::M2_dpmpyuu_nac_s0:
    case Hexagon::M2_mpyd_acc_hh_s0:
    case Hexagon::M2_mpyd_acc_hh_s1:
    case Hexagon::M2_mpyd_acc_hl_s0:
    case Hexagon::M2_mpyd_acc_hl_s1:
    case Hexagon::M2_mpyd_acc_lh_s0:
    case Hexagon::M2_mpyd_acc_lh_s1:
    case Hexagon::M2_mpyd_acc_ll_s0:
    case Hexagon::M2_mpyd_acc_ll_s1:
    case Hexagon::M2_mpyd_nac_hh_s0:
    case Hexagon::M2_mpyd_nac_hh_s1:
    case Hexagon::M2_mpyd_nac_hl_s0:
    case Hexagon::M2_mpyd_nac_hl_s1:
    case Hexagon::M2_mpyd_nac_lh_s0:
    case Hexagon::M2_mpyd_nac_lh_s1:
    case Hexagon::M2_mpyd_nac_ll_s0:
    case Hexagon::M2_mpyd_nac_ll_s1:
    case Hexagon::M2_mpyud_acc_hh_s0:
    case Hexagon::M2_mpyud_acc_hh_s1:
    case Hexagon::M2_mpyud_acc_hl_s0:
    case Hexagon::M2_mpyud_acc_hl_s1:
    case Hexagon::M2_mpyud_acc_lh_s0:
    case Hexagon::M2_mpyud_acc_lh_s1:
    case Hexagon::M2_mpyud_acc_ll_s0:
    case Hexagon::M2_mpyud_acc_ll_s1:
    case Hexagon::M2_mpyud_nac_hh_s0:
    case Hexagon::M2_mpyud_nac_hh_s1:
    case Hexagon::M2_mpyud_nac_hl_s0:
    case Hexagon::M2_mpyud_nac_hl_s1:
    case Hexagon::M2_mpyud_nac_lh_s0:
    case Hexagon::M2_mpyud_nac_lh_s1:
    case Hexagon::M2_mpyud_nac_ll_s0:
    case Hexagon::M2_mpyud_nac_ll_s1:
    case Hexagon::M2_vmac2:
    case Hexagon::M2_vmac2s_s0:
    case Hexagon::M2_vmac2s_s1:
    case Hexagon::M2_vmac2su_s0:
    case Hexagon::M2_vmac2su_s1:
    case Hexagon::M4_pmpyw_acc:
    case Hexagon::M4_vpmpyh_acc:
    case Hexagon::M5_vmacbsu:
    case Hexagon::M5_vmacbuu: {
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rxx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_insert_rp: {
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A4_tfrpcp: {
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Cdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::G4_tfrgpcp: {
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Gdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A2_roundsat:
    case Hexagon::A2_sat:
    case Hexagon::F2_conv_d2sf:
    case Hexagon::F2_conv_df2sf:
    case Hexagon::F2_conv_df2uw:
    case Hexagon::F2_conv_df2uw_chop:
    case Hexagon::F2_conv_df2w:
    case Hexagon::F2_conv_df2w_chop:
    case Hexagon::F2_conv_ud2sf:
    case Hexagon::S2_cl0p:
    case Hexagon::S2_cl1p:
    case Hexagon::S2_clbp:
    case Hexagon::S2_ct0p:
    case Hexagon::S2_ct1p:
    case Hexagon::S2_vrndpackwh:
    case Hexagon::S2_vrndpackwhs:
    case Hexagon::S2_vsathb:
    case Hexagon::S2_vsathub:
    case Hexagon::S2_vsatwh:
    case Hexagon::S2_vsatwuh:
    case Hexagon::S2_vtrunehb:
    case Hexagon::S2_vtrunohb:
    case Hexagon::S4_clbpnorm:
    case Hexagon::S5_popcountp: {
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A2_absp:
    case Hexagon::A2_negp:
    case Hexagon::A2_notp:
    case Hexagon::A2_vabsh:
    case Hexagon::A2_vabshsat:
    case Hexagon::A2_vabsw:
    case Hexagon::A2_vabswsat:
    case Hexagon::A2_vconj:
    case Hexagon::F2_conv_d2df:
    case Hexagon::F2_conv_df2d:
    case Hexagon::F2_conv_df2d_chop:
    case Hexagon::F2_conv_df2ud:
    case Hexagon::F2_conv_df2ud_chop:
    case Hexagon::F2_conv_ud2df:
    case Hexagon::S2_brevp:
    case Hexagon::S2_deinterleave:
    case Hexagon::S2_interleave:
    case Hexagon::S2_vsathb_nopack:
    case Hexagon::S2_vsathub_nopack:
    case Hexagon::S2_vsatwh_nopack:
    case Hexagon::S2_vsatwuh_nopack: {
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A4_tlbmatch: {
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Pd4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::M4_cmpyi_wh:
    case Hexagon::M4_cmpyi_whc:
    case Hexagon::M4_cmpyr_wh:
    case Hexagon::M4_cmpyr_whc:
    case Hexagon::S2_asr_r_svw_trun: {
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_asl_r_p:
    case Hexagon::S2_asl_r_vh:
    case Hexagon::S2_asl_r_vw:
    case Hexagon::S2_asr_r_p:
    case Hexagon::S2_asr_r_vh:
    case Hexagon::S2_asr_r_vw:
    case Hexagon::S2_lsl_r_p:
    case Hexagon::S2_lsl_r_vh:
    case Hexagon::S2_lsl_r_vw:
    case Hexagon::S2_lsr_r_p:
    case Hexagon::S2_lsr_r_vh:
    case Hexagon::S2_lsr_r_vw:
    case Hexagon::S2_vcnegh:
    case Hexagon::S2_vcrotate: {
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A2_vcmpbeq:
    case Hexagon::A2_vcmpbgtu:
    case Hexagon::A2_vcmpheq:
    case Hexagon::A2_vcmphgt:
    case Hexagon::A2_vcmphgtu:
    case Hexagon::A2_vcmpweq:
    case Hexagon::A2_vcmpwgt:
    case Hexagon::A2_vcmpwgtu:
    case Hexagon::A4_boundscheck_hi:
    case Hexagon::A4_boundscheck_lo:
    case Hexagon::A4_vcmpbeq_any:
    case Hexagon::A4_vcmpbgt:
    case Hexagon::A6_vcmpbeq_notany:
    case Hexagon::C2_cmpeqp:
    case Hexagon::C2_cmpgtp:
    case Hexagon::C2_cmpgtup:
    case Hexagon::F2_dfcmpeq:
    case Hexagon::F2_dfcmpge:
    case Hexagon::F2_dfcmpgt:
    case Hexagon::F2_dfcmpuo: {
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Pd4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::S2_vsplicerb: {
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Pu4
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A5_vaddhubs:
    case Hexagon::M2_vdmpyrs_s0:
    case Hexagon::M2_vdmpyrs_s1:
    case Hexagon::M2_vraddh:
    case Hexagon::M2_vradduh:
    case Hexagon::M2_vrcmpys_s1rp_h:
    case Hexagon::M2_vrcmpys_s1rp_l:
    case Hexagon::S2_parityp: {
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A2_addp:
    case Hexagon::A2_addpsat:
    case Hexagon::A2_addsph:
    case Hexagon::A2_addspl:
    case Hexagon::A2_andp:
    case Hexagon::A2_maxp:
    case Hexagon::A2_maxup:
    case Hexagon::A2_orp:
    case Hexagon::A2_vaddh:
    case Hexagon::A2_vaddhs:
    case Hexagon::A2_vaddub:
    case Hexagon::A2_vaddubs:
    case Hexagon::A2_vadduhs:
    case Hexagon::A2_vaddw:
    case Hexagon::A2_vaddws:
    case Hexagon::A2_vavgh:
    case Hexagon::A2_vavghcr:
    case Hexagon::A2_vavghr:
    case Hexagon::A2_vavgub:
    case Hexagon::A2_vavgubr:
    case Hexagon::A2_vavguh:
    case Hexagon::A2_vavguhr:
    case Hexagon::A2_vavguw:
    case Hexagon::A2_vavguwr:
    case Hexagon::A2_vavgw:
    case Hexagon::A2_vavgwcr:
    case Hexagon::A2_vavgwr:
    case Hexagon::A2_vraddub:
    case Hexagon::A2_vrsadub:
    case Hexagon::A2_xorp:
    case Hexagon::F2_dfadd:
    case Hexagon::F2_dfsub:
    case Hexagon::M2_mmpyh_rs0:
    case Hexagon::M2_mmpyh_rs1:
    case Hexagon::M2_mmpyh_s0:
    case Hexagon::M2_mmpyh_s1:
    case Hexagon::M2_mmpyl_rs0:
    case Hexagon::M2_mmpyl_rs1:
    case Hexagon::M2_mmpyl_s0:
    case Hexagon::M2_mmpyl_s1:
    case Hexagon::M2_mmpyuh_rs0:
    case Hexagon::M2_mmpyuh_rs1:
    case Hexagon::M2_mmpyuh_s0:
    case Hexagon::M2_mmpyuh_s1:
    case Hexagon::M2_mmpyul_rs0:
    case Hexagon::M2_mmpyul_rs1:
    case Hexagon::M2_mmpyul_s0:
    case Hexagon::M2_mmpyul_s1:
    case Hexagon::M2_vcmpy_s0_sat_i:
    case Hexagon::M2_vcmpy_s0_sat_r:
    case Hexagon::M2_vcmpy_s1_sat_i:
    case Hexagon::M2_vcmpy_s1_sat_r:
    case Hexagon::M2_vdmpys_s0:
    case Hexagon::M2_vdmpys_s1:
    case Hexagon::M2_vmpy2es_s0:
    case Hexagon::M2_vmpy2es_s1:
    case Hexagon::M2_vrcmpyi_s0:
    case Hexagon::M2_vrcmpyi_s0c:
    case Hexagon::M2_vrcmpyr_s0:
    case Hexagon::M2_vrcmpyr_s0c:
    case Hexagon::M2_vrcmpys_s1_h:
    case Hexagon::M2_vrcmpys_s1_l:
    case Hexagon::M2_vrmpy_s0:
    case Hexagon::M4_vrmpyeh_s0:
    case Hexagon::M4_vrmpyeh_s1:
    case Hexagon::M4_vrmpyoh_s0:
    case Hexagon::M4_vrmpyoh_s1:
    case Hexagon::M5_vdmpybsu:
    case Hexagon::M5_vrmpybsu:
    case Hexagon::M5_vrmpybuu:
    case Hexagon::S2_cabacdecbin:
    case Hexagon::S2_extractup_rp:
    case Hexagon::S2_lfsp:
    case Hexagon::S2_shuffeb:
    case Hexagon::S2_shuffeh:
    case Hexagon::S2_vtrunewh:
    case Hexagon::S2_vtrunowh:
    case Hexagon::S4_extractp_rp:
    case Hexagon::S4_vxaddsubh:
    case Hexagon::S4_vxaddsubhr:
    case Hexagon::S4_vxaddsubw:
    case Hexagon::S4_vxsubaddh:
    case Hexagon::S4_vxsubaddhr:
    case Hexagon::S4_vxsubaddw:
    case Hexagon::S6_vtrunehb_ppp:
    case Hexagon::S6_vtrunohb_ppp: {
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_asl_r_p_acc:
    case Hexagon::S2_asl_r_p_and:
    case Hexagon::S2_asl_r_p_nac:
    case Hexagon::S2_asl_r_p_or:
    case Hexagon::S2_asl_r_p_xor:
    case Hexagon::S2_asr_r_p_acc:
    case Hexagon::S2_asr_r_p_and:
    case Hexagon::S2_asr_r_p_nac:
    case Hexagon::S2_asr_r_p_or:
    case Hexagon::S2_asr_r_p_xor:
    case Hexagon::S2_lsl_r_p_acc:
    case Hexagon::S2_lsl_r_p_and:
    case Hexagon::S2_lsl_r_p_nac:
    case Hexagon::S2_lsl_r_p_or:
    case Hexagon::S2_lsl_r_p_xor:
    case Hexagon::S2_lsr_r_p_acc:
    case Hexagon::S2_lsr_r_p_and:
    case Hexagon::S2_lsr_r_p_nac:
    case Hexagon::S2_lsr_r_p_or:
    case Hexagon::S2_lsr_r_p_xor:
    case Hexagon::S2_vrcnegh: {
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rxx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A4_addp_c:
    case Hexagon::A4_subp_c: {
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Px4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      break;
    }
    case Hexagon::A2_vraddub_acc:
    case Hexagon::A2_vrsadub_acc:
    case Hexagon::M2_mmachs_rs0:
    case Hexagon::M2_mmachs_rs1:
    case Hexagon::M2_mmachs_s0:
    case Hexagon::M2_mmachs_s1:
    case Hexagon::M2_mmacls_rs0:
    case Hexagon::M2_mmacls_rs1:
    case Hexagon::M2_mmacls_s0:
    case Hexagon::M2_mmacls_s1:
    case Hexagon::M2_mmacuhs_rs0:
    case Hexagon::M2_mmacuhs_rs1:
    case Hexagon::M2_mmacuhs_s0:
    case Hexagon::M2_mmacuhs_s1:
    case Hexagon::M2_mmaculs_rs0:
    case Hexagon::M2_mmaculs_rs1:
    case Hexagon::M2_mmaculs_s0:
    case Hexagon::M2_mmaculs_s1:
    case Hexagon::M2_vcmac_s0_sat_i:
    case Hexagon::M2_vcmac_s0_sat_r:
    case Hexagon::M2_vdmacs_s0:
    case Hexagon::M2_vdmacs_s1:
    case Hexagon::M2_vmac2es:
    case Hexagon::M2_vmac2es_s0:
    case Hexagon::M2_vmac2es_s1:
    case Hexagon::M2_vrcmaci_s0:
    case Hexagon::M2_vrcmaci_s0c:
    case Hexagon::M2_vrcmacr_s0:
    case Hexagon::M2_vrcmacr_s0c:
    case Hexagon::M2_vrcmpys_acc_s1_h:
    case Hexagon::M2_vrcmpys_acc_s1_l:
    case Hexagon::M2_vrmac_s0:
    case Hexagon::M4_vrmpyeh_acc_s0:
    case Hexagon::M4_vrmpyeh_acc_s1:
    case Hexagon::M4_vrmpyoh_acc_s0:
    case Hexagon::M4_vrmpyoh_acc_s1:
    case Hexagon::M4_xor_xacc:
    case Hexagon::M5_vdmacbsu:
    case Hexagon::M5_vrmacbsu:
    case Hexagon::M5_vrmacbuu:
    case Hexagon::S2_insertp_rp: {
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rxx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A4_vrmaxh:
    case Hexagon::A4_vrmaxuh:
    case Hexagon::A4_vrmaxuw:
    case Hexagon::A4_vrmaxw:
    case Hexagon::A4_vrminh:
    case Hexagon::A4_vrminuh:
    case Hexagon::A4_vrminuw:
    case Hexagon::A4_vrminw: {
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Ru32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rxx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::A5_ACS: {
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rxx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Pe4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      break;
    }
    case Hexagon::V6_vgathermh:
    case Hexagon::V6_vgathermw: {
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vscattermh:
    case Hexagon::V6_vscattermh_add:
    case Hexagon::V6_vscattermw:
    case Hexagon::V6_vscattermw_add: {
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vw32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vgathermhw: {
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Vvv32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vscattermhw:
    case Hexagon::V6_vscattermhw_add: {
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Mu2
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(1);
      op <<= 13;
      Value |= op;
      // op: Vvv32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vw32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_pred_scalar2:
    case Hexagon::V6_pred_scalar2v2: {
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Qd4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::V6_lvsplatb:
    case Hexagon::V6_lvsplath:
    case Hexagon::V6_lvsplatw:
    case Hexagon::V6_zextract: {
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A2_addh_h16_hh:
    case Hexagon::A2_addh_h16_hl:
    case Hexagon::A2_addh_h16_lh:
    case Hexagon::A2_addh_h16_ll:
    case Hexagon::A2_addh_h16_sat_hh:
    case Hexagon::A2_addh_h16_sat_hl:
    case Hexagon::A2_addh_h16_sat_lh:
    case Hexagon::A2_addh_h16_sat_ll:
    case Hexagon::A2_addh_l16_hl:
    case Hexagon::A2_addh_l16_ll:
    case Hexagon::A2_addh_l16_sat_hl:
    case Hexagon::A2_addh_l16_sat_ll:
    case Hexagon::A2_combine_hh:
    case Hexagon::A2_combine_hl:
    case Hexagon::A2_combine_lh:
    case Hexagon::A2_combine_ll:
    case Hexagon::A2_min:
    case Hexagon::A2_minu:
    case Hexagon::A2_sub:
    case Hexagon::A2_subh_h16_hh:
    case Hexagon::A2_subh_h16_hl:
    case Hexagon::A2_subh_h16_lh:
    case Hexagon::A2_subh_h16_ll:
    case Hexagon::A2_subh_h16_sat_hh:
    case Hexagon::A2_subh_h16_sat_hl:
    case Hexagon::A2_subh_h16_sat_lh:
    case Hexagon::A2_subh_h16_sat_ll:
    case Hexagon::A2_subh_l16_hl:
    case Hexagon::A2_subh_l16_ll:
    case Hexagon::A2_subh_l16_sat_hl:
    case Hexagon::A2_subh_l16_sat_ll:
    case Hexagon::A2_subsat:
    case Hexagon::A2_svnavgh:
    case Hexagon::A2_svsubh:
    case Hexagon::A2_svsubhs:
    case Hexagon::A2_svsubuhs:
    case Hexagon::A4_andn:
    case Hexagon::A4_orn:
    case Hexagon::dep_A2_subsat: {
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vinsertwr: {
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::M2_subacc: {
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vdeal:
    case Hexagon::V6_vshuff: {
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vy32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vx32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::S2_valignrb: {
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Pu4
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A2_minp:
    case Hexagon::A2_minup:
    case Hexagon::A2_subp:
    case Hexagon::A2_vmaxb:
    case Hexagon::A2_vmaxh:
    case Hexagon::A2_vmaxub:
    case Hexagon::A2_vmaxuh:
    case Hexagon::A2_vmaxuw:
    case Hexagon::A2_vmaxw:
    case Hexagon::A2_vminb:
    case Hexagon::A2_vminh:
    case Hexagon::A2_vminub:
    case Hexagon::A2_vminuh:
    case Hexagon::A2_vminuw:
    case Hexagon::A2_vminw:
    case Hexagon::A2_vnavgh:
    case Hexagon::A2_vnavghcr:
    case Hexagon::A2_vnavghr:
    case Hexagon::A2_vnavgw:
    case Hexagon::A2_vnavgwcr:
    case Hexagon::A2_vnavgwr:
    case Hexagon::A2_vsubh:
    case Hexagon::A2_vsubhs:
    case Hexagon::A2_vsubub:
    case Hexagon::A2_vsububs:
    case Hexagon::A2_vsubuhs:
    case Hexagon::A2_vsubw:
    case Hexagon::A2_vsubws:
    case Hexagon::A4_andnp:
    case Hexagon::A4_ornp:
    case Hexagon::M2_vabsdiffh:
    case Hexagon::M2_vabsdiffw:
    case Hexagon::M6_vabsdiffb:
    case Hexagon::M6_vabsdiffub:
    case Hexagon::S2_shuffob:
    case Hexagon::S2_shuffoh: {
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::A6_vminub_RdP: {
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rss32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Pe4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      break;
    }
    case Hexagon::M4_mpyrr_addr: {
      // op: Ru32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Ry32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      break;
    }
    case Hexagon::V6_extractw: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rs32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Rd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vandvrt: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Qd4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::V6_vaslh:
    case Hexagon::V6_vaslw:
    case Hexagon::V6_vasrh:
    case Hexagon::V6_vasrw:
    case Hexagon::V6_vdmpybus:
    case Hexagon::V6_vdmpyhb:
    case Hexagon::V6_vdmpyhsat:
    case Hexagon::V6_vdmpyhsusat:
    case Hexagon::V6_vlsrb:
    case Hexagon::V6_vlsrh:
    case Hexagon::V6_vlsrw:
    case Hexagon::V6_vmpyhsrs:
    case Hexagon::V6_vmpyhss:
    case Hexagon::V6_vmpyihb:
    case Hexagon::V6_vmpyiwb:
    case Hexagon::V6_vmpyiwh:
    case Hexagon::V6_vmpyiwub:
    case Hexagon::V6_vmpyuhe:
    case Hexagon::V6_vrmpybus:
    case Hexagon::V6_vrmpyub:
    case Hexagon::V6_vror: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vmpybus:
    case Hexagon::V6_vmpyh:
    case Hexagon::V6_vmpyub:
    case Hexagon::V6_vmpyuh: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vrmpyzbb_rt:
    case Hexagon::V6_vrmpyzbub_rt:
    case Hexagon::V6_vrmpyzcb_rt:
    case Hexagon::V6_vrmpyzcbs_rt:
    case Hexagon::V6_vrmpyznb_rt: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rt8
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 16;
      Value |= op;
      // op: Vdddd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vlut4: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vrmpybub_rtt:
    case Hexagon::V6_vrmpyub_rtt: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vabsb:
    case Hexagon::V6_vabsb_sat:
    case Hexagon::V6_vabsh:
    case Hexagon::V6_vabsh_sat:
    case Hexagon::V6_vabsw:
    case Hexagon::V6_vabsw_sat:
    case Hexagon::V6_vassign:
    case Hexagon::V6_vcl0h:
    case Hexagon::V6_vcl0w:
    case Hexagon::V6_vdealb:
    case Hexagon::V6_vdealh:
    case Hexagon::V6_vnormamth:
    case Hexagon::V6_vnormamtw:
    case Hexagon::V6_vnot:
    case Hexagon::V6_vpopcounth:
    case Hexagon::V6_vshuffb:
    case Hexagon::V6_vshuffh: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vsb:
    case Hexagon::V6_vsh:
    case Hexagon::V6_vunpackb:
    case Hexagon::V6_vunpackh:
    case Hexagon::V6_vunpackub:
    case Hexagon::V6_vunpackuh:
    case Hexagon::V6_vzb:
    case Hexagon::V6_vzh: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_veqb:
    case Hexagon::V6_veqh:
    case Hexagon::V6_veqw:
    case Hexagon::V6_vgtb:
    case Hexagon::V6_vgth:
    case Hexagon::V6_vgtub:
    case Hexagon::V6_vgtuh:
    case Hexagon::V6_vgtuw:
    case Hexagon::V6_vgtw: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Qd4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::V6_vaddcarrysat: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Qs4
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      // op: Vd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vabsdiffh:
    case Hexagon::V6_vabsdiffub:
    case Hexagon::V6_vabsdiffuh:
    case Hexagon::V6_vabsdiffw:
    case Hexagon::V6_vaddb:
    case Hexagon::V6_vaddbsat:
    case Hexagon::V6_vaddclbh:
    case Hexagon::V6_vaddclbw:
    case Hexagon::V6_vaddh:
    case Hexagon::V6_vaddhsat:
    case Hexagon::V6_vaddubsat:
    case Hexagon::V6_vaddububb_sat:
    case Hexagon::V6_vadduhsat:
    case Hexagon::V6_vadduwsat:
    case Hexagon::V6_vaddw:
    case Hexagon::V6_vaddwsat:
    case Hexagon::V6_vand:
    case Hexagon::V6_vaslhv:
    case Hexagon::V6_vaslwv:
    case Hexagon::V6_vasrhv:
    case Hexagon::V6_vasrwv:
    case Hexagon::V6_vavgb:
    case Hexagon::V6_vavgbrnd:
    case Hexagon::V6_vavgh:
    case Hexagon::V6_vavghrnd:
    case Hexagon::V6_vavgub:
    case Hexagon::V6_vavgubrnd:
    case Hexagon::V6_vavguh:
    case Hexagon::V6_vavguhrnd:
    case Hexagon::V6_vavguw:
    case Hexagon::V6_vavguwrnd:
    case Hexagon::V6_vavgw:
    case Hexagon::V6_vavgwrnd:
    case Hexagon::V6_vdealb4w:
    case Hexagon::V6_vdelta:
    case Hexagon::V6_vdmpyhvsat:
    case Hexagon::V6_vlsrhv:
    case Hexagon::V6_vlsrwv:
    case Hexagon::V6_vmaxb:
    case Hexagon::V6_vmaxh:
    case Hexagon::V6_vmaxub:
    case Hexagon::V6_vmaxuh:
    case Hexagon::V6_vmaxw:
    case Hexagon::V6_vminb:
    case Hexagon::V6_vminh:
    case Hexagon::V6_vminub:
    case Hexagon::V6_vminuh:
    case Hexagon::V6_vminw:
    case Hexagon::V6_vmpyewuh:
    case Hexagon::V6_vmpyhvsrs:
    case Hexagon::V6_vmpyieoh:
    case Hexagon::V6_vmpyiewuh:
    case Hexagon::V6_vmpyih:
    case Hexagon::V6_vmpyiowh:
    case Hexagon::V6_vmpyowh:
    case Hexagon::V6_vmpyowh_rnd:
    case Hexagon::V6_vnavgb:
    case Hexagon::V6_vnavgh:
    case Hexagon::V6_vnavgub:
    case Hexagon::V6_vnavgw:
    case Hexagon::V6_vor:
    case Hexagon::V6_vpackeb:
    case Hexagon::V6_vpackeh:
    case Hexagon::V6_vpackhb_sat:
    case Hexagon::V6_vpackhub_sat:
    case Hexagon::V6_vpackob:
    case Hexagon::V6_vpackoh:
    case Hexagon::V6_vpackwh_sat:
    case Hexagon::V6_vpackwuh_sat:
    case Hexagon::V6_vrdelta:
    case Hexagon::V6_vrmpybusv:
    case Hexagon::V6_vrmpybv:
    case Hexagon::V6_vrmpyubv:
    case Hexagon::V6_vrotr:
    case Hexagon::V6_vroundhb:
    case Hexagon::V6_vroundhub:
    case Hexagon::V6_vrounduhub:
    case Hexagon::V6_vrounduwuh:
    case Hexagon::V6_vroundwh:
    case Hexagon::V6_vroundwuh:
    case Hexagon::V6_vsatdw:
    case Hexagon::V6_vsathub:
    case Hexagon::V6_vsatuwuh:
    case Hexagon::V6_vsatwh:
    case Hexagon::V6_vshufeh:
    case Hexagon::V6_vshuffeb:
    case Hexagon::V6_vshuffob:
    case Hexagon::V6_vshufoh:
    case Hexagon::V6_vsubb:
    case Hexagon::V6_vsubbsat:
    case Hexagon::V6_vsubh:
    case Hexagon::V6_vsubhsat:
    case Hexagon::V6_vsububsat:
    case Hexagon::V6_vsubububb_sat:
    case Hexagon::V6_vsubuhsat:
    case Hexagon::V6_vsubuwsat:
    case Hexagon::V6_vsubw:
    case Hexagon::V6_vsubwsat:
    case Hexagon::V6_vxor: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vaddhw:
    case Hexagon::V6_vaddubh:
    case Hexagon::V6_vadduhw:
    case Hexagon::V6_vcombine:
    case Hexagon::V6_vmpybusv:
    case Hexagon::V6_vmpybv:
    case Hexagon::V6_vmpyewuh_64:
    case Hexagon::V6_vmpyhus:
    case Hexagon::V6_vmpyhv:
    case Hexagon::V6_vmpyubv:
    case Hexagon::V6_vmpyuhv:
    case Hexagon::V6_vshufoeb:
    case Hexagon::V6_vshufoeh:
    case Hexagon::V6_vsubhw:
    case Hexagon::V6_vsububh:
    case Hexagon::V6_vsubuhw: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_valignb:
    case Hexagon::V6_vasrhbrndsat:
    case Hexagon::V6_vasrhbsat:
    case Hexagon::V6_vasrhubrndsat:
    case Hexagon::V6_vasrhubsat:
    case Hexagon::V6_vasruhubrndsat:
    case Hexagon::V6_vasruhubsat:
    case Hexagon::V6_vasruwuhrndsat:
    case Hexagon::V6_vasruwuhsat:
    case Hexagon::V6_vasrwh:
    case Hexagon::V6_vasrwhrndsat:
    case Hexagon::V6_vasrwhsat:
    case Hexagon::V6_vasrwuhrndsat:
    case Hexagon::V6_vasrwuhsat:
    case Hexagon::V6_vlalignb:
    case Hexagon::V6_vlutvvb:
    case Hexagon::V6_vlutvvb_nm: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 19;
      Value |= op;
      // op: Rt8
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 16;
      Value |= op;
      // op: Vd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vdealvdd:
    case Hexagon::V6_vlutvwh:
    case Hexagon::V6_vlutvwh_nm:
    case Hexagon::V6_vshuffvdd: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 19;
      Value |= op;
      // op: Rt8
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 16;
      Value |= op;
      // op: Vdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vandvrt_acc: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Qx4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::V6_vaslh_acc:
    case Hexagon::V6_vaslw_acc:
    case Hexagon::V6_vasrh_acc:
    case Hexagon::V6_vasrw_acc:
    case Hexagon::V6_vdmpybus_acc:
    case Hexagon::V6_vdmpyhb_acc:
    case Hexagon::V6_vdmpyhsat_acc:
    case Hexagon::V6_vdmpyhsusat_acc:
    case Hexagon::V6_vmpyihb_acc:
    case Hexagon::V6_vmpyiwb_acc:
    case Hexagon::V6_vmpyiwh_acc:
    case Hexagon::V6_vmpyiwub_acc:
    case Hexagon::V6_vmpyuhe_acc:
    case Hexagon::V6_vrmpybus_acc:
    case Hexagon::V6_vrmpyub_acc: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vmpybus_acc:
    case Hexagon::V6_vmpyh_acc:
    case Hexagon::V6_vmpyhsat_acc:
    case Hexagon::V6_vmpyub_acc:
    case Hexagon::V6_vmpyuh_acc: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vxx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vrmpyzbb_rt_acc:
    case Hexagon::V6_vrmpyzbub_rt_acc:
    case Hexagon::V6_vrmpyzcb_rt_acc:
    case Hexagon::V6_vrmpyzcbs_rt_acc:
    case Hexagon::V6_vrmpyznb_rt_acc: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rt8
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 16;
      Value |= op;
      // op: Vyyyy32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vmpahhsat:
    case Hexagon::V6_vmpauhuhsat:
    case Hexagon::V6_vmpsuhuhsat: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vrmpybub_rtt_acc:
    case Hexagon::V6_vrmpyub_rtt_acc: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rtt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vxx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vrmpyzbb_rx:
    case Hexagon::V6_vrmpyzbub_rx:
    case Hexagon::V6_vrmpyzcb_rx:
    case Hexagon::V6_vrmpyzcbs_rx:
    case Hexagon::V6_vrmpyznb_rx: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vdddd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx8
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::V6_veqb_and:
    case Hexagon::V6_veqb_or:
    case Hexagon::V6_veqb_xor:
    case Hexagon::V6_veqh_and:
    case Hexagon::V6_veqh_or:
    case Hexagon::V6_veqh_xor:
    case Hexagon::V6_veqw_and:
    case Hexagon::V6_veqw_or:
    case Hexagon::V6_veqw_xor:
    case Hexagon::V6_vgtb_and:
    case Hexagon::V6_vgtb_or:
    case Hexagon::V6_vgtb_xor:
    case Hexagon::V6_vgth_and:
    case Hexagon::V6_vgth_or:
    case Hexagon::V6_vgth_xor:
    case Hexagon::V6_vgtub_and:
    case Hexagon::V6_vgtub_or:
    case Hexagon::V6_vgtub_xor:
    case Hexagon::V6_vgtuh_and:
    case Hexagon::V6_vgtuh_or:
    case Hexagon::V6_vgtuh_xor:
    case Hexagon::V6_vgtuw_and:
    case Hexagon::V6_vgtuw_or:
    case Hexagon::V6_vgtuw_xor:
    case Hexagon::V6_vgtw_and:
    case Hexagon::V6_vgtw_or:
    case Hexagon::V6_vgtw_xor: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Qx4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      Value |= op;
      break;
    }
    case Hexagon::V6_vaddcarryo:
    case Hexagon::V6_vsubcarryo: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Qe4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      break;
    }
    case Hexagon::V6_vaddcarry:
    case Hexagon::V6_vsubcarry: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Qx4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 5;
      Value |= op;
      break;
    }
    case Hexagon::V6_vdmpyhvsat_acc:
    case Hexagon::V6_vmpyiewh_acc:
    case Hexagon::V6_vmpyiewuh_acc:
    case Hexagon::V6_vmpyih_acc:
    case Hexagon::V6_vmpyowh_rnd_sacc:
    case Hexagon::V6_vmpyowh_sacc:
    case Hexagon::V6_vrmpybusv_acc:
    case Hexagon::V6_vrmpybv_acc:
    case Hexagon::V6_vrmpyubv_acc: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vaddhw_acc:
    case Hexagon::V6_vaddubh_acc:
    case Hexagon::V6_vadduhw_acc:
    case Hexagon::V6_vasr_into:
    case Hexagon::V6_vmpybusv_acc:
    case Hexagon::V6_vmpybv_acc:
    case Hexagon::V6_vmpyhus_acc:
    case Hexagon::V6_vmpyhv_acc:
    case Hexagon::V6_vmpyowh_64_acc:
    case Hexagon::V6_vmpyubv_acc:
    case Hexagon::V6_vmpyuhv_acc: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vxx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vlutvvb_oracc: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 19;
      Value |= op;
      // op: Rt8
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 16;
      Value |= op;
      // op: Vx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vlutvwh_oracc: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vv32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 19;
      Value |= op;
      // op: Rt8
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 16;
      Value |= op;
      // op: Vxx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vunpackob:
    case Hexagon::V6_vunpackoh: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vxx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vrmpyzbb_rx_acc:
    case Hexagon::V6_vrmpyzbub_rx_acc:
    case Hexagon::V6_vrmpyzcb_rx_acc:
    case Hexagon::V6_vrmpyzcbs_rx_acc:
    case Hexagon::V6_vrmpyznb_rx_acc: {
      // op: Vu32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vyyyy32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      // op: Rx8
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(7);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::V6_vdmpyhisat:
    case Hexagon::V6_vdmpyhsuisat: {
      // op: Vuu32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vdmpybus_dv:
    case Hexagon::V6_vdmpyhb_dv:
    case Hexagon::V6_vdsaduh:
    case Hexagon::V6_vmpabus:
    case Hexagon::V6_vmpabuu:
    case Hexagon::V6_vmpahb:
    case Hexagon::V6_vmpauhb:
    case Hexagon::V6_vtmpyb:
    case Hexagon::V6_vtmpybus:
    case Hexagon::V6_vtmpyhb: {
      // op: Vuu32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vaddb_dv:
    case Hexagon::V6_vaddbsat_dv:
    case Hexagon::V6_vaddh_dv:
    case Hexagon::V6_vaddhsat_dv:
    case Hexagon::V6_vaddubsat_dv:
    case Hexagon::V6_vadduhsat_dv:
    case Hexagon::V6_vadduwsat_dv:
    case Hexagon::V6_vaddw_dv:
    case Hexagon::V6_vaddwsat_dv:
    case Hexagon::V6_vmpabusv:
    case Hexagon::V6_vmpabuuv:
    case Hexagon::V6_vsubb_dv:
    case Hexagon::V6_vsubbsat_dv:
    case Hexagon::V6_vsubh_dv:
    case Hexagon::V6_vsubhsat_dv:
    case Hexagon::V6_vsububsat_dv:
    case Hexagon::V6_vsubuhsat_dv:
    case Hexagon::V6_vsubuwsat_dv:
    case Hexagon::V6_vsubw_dv:
    case Hexagon::V6_vsubwsat_dv: {
      // op: Vuu32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Vvv32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vdd32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vdmpyhisat_acc:
    case Hexagon::V6_vdmpyhsuisat_acc: {
      // op: Vuu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::V6_vdmpybus_dv_acc:
    case Hexagon::V6_vdmpyhb_dv_acc:
    case Hexagon::V6_vdsaduh_acc:
    case Hexagon::V6_vmpabus_acc:
    case Hexagon::V6_vmpabuu_acc:
    case Hexagon::V6_vmpahb_acc:
    case Hexagon::V6_vmpauhb_acc:
    case Hexagon::V6_vtmpyb_acc:
    case Hexagon::V6_vtmpybus_acc:
    case Hexagon::V6_vtmpyhb_acc: {
      // op: Vuu32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 8;
      Value |= op;
      // op: Rt32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: Vxx32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      Value |= op;
      break;
    }
    case Hexagon::CALLProfile:
    case Hexagon::PS_call_stk:
    case Hexagon::RESTORE_DEALLOC_BEFORE_TAILCALL_V4:
    case Hexagon::RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT:
    case Hexagon::RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT_PIC:
    case Hexagon::RESTORE_DEALLOC_BEFORE_TAILCALL_V4_PIC:
    case Hexagon::RESTORE_DEALLOC_RET_JMP_V4:
    case Hexagon::RESTORE_DEALLOC_RET_JMP_V4_EXT:
    case Hexagon::RESTORE_DEALLOC_RET_JMP_V4_EXT_PIC:
    case Hexagon::RESTORE_DEALLOC_RET_JMP_V4_PIC:
    case Hexagon::SAVE_REGISTERS_CALL_V4:
    case Hexagon::SAVE_REGISTERS_CALL_V4STK:
    case Hexagon::SAVE_REGISTERS_CALL_V4STK_EXT:
    case Hexagon::SAVE_REGISTERS_CALL_V4STK_EXT_PIC:
    case Hexagon::SAVE_REGISTERS_CALL_V4STK_PIC:
    case Hexagon::SAVE_REGISTERS_CALL_V4_EXT:
    case Hexagon::SAVE_REGISTERS_CALL_V4_EXT_PIC:
    case Hexagon::SAVE_REGISTERS_CALL_V4_PIC: {
      // op: dst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(16744448)) << 1;
      Value |= (op & UINT64_C(32764)) >> 1;
      break;
    }
    case Hexagon::EH_RETURN_JMPR:
    case Hexagon::PS_jmpret: {
      // op: dst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::HI:
    case Hexagon::LO: {
      // op: dst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      // op: imm_value
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(49152)) << 8;
      Value |= (op & UINT64_C(16383));
      break;
    }
    case Hexagon::J2_loop0iext:
    case Hexagon::J2_loop1iext: {
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(496)) << 4;
      Value |= (op & UINT64_C(12)) << 1;
      // op: src2
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(992)) << 11;
      Value |= (op & UINT64_C(28)) << 3;
      Value |= (op & UINT64_C(3));
      break;
    }
    case Hexagon::J2_loop0rext:
    case Hexagon::J2_loop1rext: {
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(496)) << 4;
      Value |= (op & UINT64_C(12)) << 1;
      // op: src2
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
    case Hexagon::PS_jmpretf:
    case Hexagon::PS_jmpretfnew:
    case Hexagon::PS_jmpretfnewpt:
    case Hexagon::PS_jmprett:
    case Hexagon::PS_jmprettnew:
    case Hexagon::PS_jmprettnewpt: {
      // op: src
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      op &= UINT64_C(3);
      op <<= 8;
      Value |= op;
      // op: dst
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      op &= UINT64_C(31);
      op <<= 16;
      Value |= op;
      break;
    }
  default:
    std::string msg;
    raw_string_ostream Msg(msg);
    Msg << "Not supported instr: " << MI;
    report_fatal_error(Msg.str());
  }
  return Value;
}

#ifdef ENABLE_INSTR_PREDICATE_VERIFIER
#undef ENABLE_INSTR_PREDICATE_VERIFIER
#include <sstream>

// Bits for subtarget features that participate in instruction matching.
enum SubtargetFeatureBits : uint8_t {
  Feature_HasV66Bit = 5,
  Feature_HasV65Bit = 4,
  Feature_HasV62Bit = 3,
  Feature_HasV60Bit = 2,
  Feature_HasV55Bit = 1,
  Feature_HasV5Bit = 0,
  Feature_UseHVX64BBit = 8,
  Feature_UseHVX128BBit = 7,
  Feature_UseHVXBit = 6,
  Feature_UseHVXV60Bit = 9,
  Feature_UseHVXV62Bit = 10,
  Feature_UseHVXV65Bit = 11,
  Feature_UseHVXV66Bit = 12,
  Feature_UseZRegBit = 13,
};

#ifndef NDEBUG
static const char *SubtargetFeatureNames[] = {
  "Feature_HasV5",
  "Feature_HasV55",
  "Feature_HasV60",
  "Feature_HasV62",
  "Feature_HasV65",
  "Feature_HasV66",
  "Feature_UseHVX",
  "Feature_UseHVX128B",
  "Feature_UseHVX64B",
  "Feature_UseHVXV60",
  "Feature_UseHVXV62",
  "Feature_UseHVXV65",
  "Feature_UseHVXV66",
  "Feature_UseZReg",
  nullptr
};

#endif // NDEBUG
FeatureBitset HexagonMCCodeEmitter::
computeAvailableFeatures(const FeatureBitset& FB) const {
  FeatureBitset Features;
  if ((FB[Hexagon::ArchV66]))
    Features.set(Feature_HasV66Bit);
  if ((FB[Hexagon::ArchV65]))
    Features.set(Feature_HasV65Bit);
  if ((FB[Hexagon::ArchV62]))
    Features.set(Feature_HasV62Bit);
  if ((FB[Hexagon::ArchV60]))
    Features.set(Feature_HasV60Bit);
  if ((FB[Hexagon::ArchV55]))
    Features.set(Feature_HasV55Bit);
  if ((FB[Hexagon::ArchV5]))
    Features.set(Feature_HasV5Bit);
  if ((FB[Hexagon::ExtensionHVX64B]))
    Features.set(Feature_UseHVX64BBit);
  if ((FB[Hexagon::ExtensionHVX128B]))
    Features.set(Feature_UseHVX128BBit);
  if ((FB[Hexagon::ExtensionHVXV60]))
    Features.set(Feature_UseHVXBit);
  if ((FB[Hexagon::ExtensionHVXV60]))
    Features.set(Feature_UseHVXV60Bit);
  if ((FB[Hexagon::ExtensionHVXV62]))
    Features.set(Feature_UseHVXV62Bit);
  if ((FB[Hexagon::ExtensionHVXV65]))
    Features.set(Feature_UseHVXV65Bit);
  if ((FB[Hexagon::ExtensionHVXV66]))
    Features.set(Feature_UseHVXV66Bit);
  if ((FB[Hexagon::ExtensionZReg]))
    Features.set(Feature_UseZRegBit);
  return Features;
}

#ifndef NDEBUG
// Feature bitsets.
enum : uint8_t {
  CEFBS_None,
  CEFBS_HasV55,
  CEFBS_HasV60,
  CEFBS_HasV62,
  CEFBS_HasV65,
  CEFBS_HasV66,
  CEFBS_UseHVXV60,
  CEFBS_UseHVXV62,
  CEFBS_UseHVXV65,
  CEFBS_UseHVXV66,
  CEFBS_HasV60_UseHVX,
  CEFBS_UseHVXV66_UseZReg,
};

static constexpr FeatureBitset FeatureBitsets[] = {
  {}, // CEFBS_None
  {Feature_HasV55Bit, },
  {Feature_HasV60Bit, },
  {Feature_HasV62Bit, },
  {Feature_HasV65Bit, },
  {Feature_HasV66Bit, },
  {Feature_UseHVXV60Bit, },
  {Feature_UseHVXV62Bit, },
  {Feature_UseHVXV65Bit, },
  {Feature_UseHVXV66Bit, },
  {Feature_HasV60Bit, Feature_UseHVXBit, },
  {Feature_UseHVXV66Bit, Feature_UseZRegBit, },
};
#endif // NDEBUG

void HexagonMCCodeEmitter::verifyInstructionPredicates(
    const MCInst &Inst, const FeatureBitset &AvailableFeatures) const {
#ifndef NDEBUG
  static uint8_t RequiredFeaturesRefs[] = {
    CEFBS_None, // PHI = 0
    CEFBS_None, // INLINEASM = 1
    CEFBS_None, // INLINEASM_BR = 2
    CEFBS_None, // CFI_INSTRUCTION = 3
    CEFBS_None, // EH_LABEL = 4
    CEFBS_None, // GC_LABEL = 5
    CEFBS_None, // ANNOTATION_LABEL = 6
    CEFBS_None, // KILL = 7
    CEFBS_None, // EXTRACT_SUBREG = 8
    CEFBS_None, // INSERT_SUBREG = 9
    CEFBS_None, // IMPLICIT_DEF = 10
    CEFBS_None, // SUBREG_TO_REG = 11
    CEFBS_None, // COPY_TO_REGCLASS = 12
    CEFBS_None, // DBG_VALUE = 13
    CEFBS_None, // DBG_LABEL = 14
    CEFBS_None, // REG_SEQUENCE = 15
    CEFBS_None, // COPY = 16
    CEFBS_None, // BUNDLE = 17
    CEFBS_None, // LIFETIME_START = 18
    CEFBS_None, // LIFETIME_END = 19
    CEFBS_None, // STACKMAP = 20
    CEFBS_None, // FENTRY_CALL = 21
    CEFBS_None, // PATCHPOINT = 22
    CEFBS_None, // LOAD_STACK_GUARD = 23
    CEFBS_None, // STATEPOINT = 24
    CEFBS_None, // LOCAL_ESCAPE = 25
    CEFBS_None, // FAULTING_OP = 26
    CEFBS_None, // PATCHABLE_OP = 27
    CEFBS_None, // PATCHABLE_FUNCTION_ENTER = 28
    CEFBS_None, // PATCHABLE_RET = 29
    CEFBS_None, // PATCHABLE_FUNCTION_EXIT = 30
    CEFBS_None, // PATCHABLE_TAIL_CALL = 31
    CEFBS_None, // PATCHABLE_EVENT_CALL = 32
    CEFBS_None, // PATCHABLE_TYPED_EVENT_CALL = 33
    CEFBS_None, // ICALL_BRANCH_FUNNEL = 34
    CEFBS_None, // G_ADD = 35
    CEFBS_None, // G_SUB = 36
    CEFBS_None, // G_MUL = 37
    CEFBS_None, // G_SDIV = 38
    CEFBS_None, // G_UDIV = 39
    CEFBS_None, // G_SREM = 40
    CEFBS_None, // G_UREM = 41
    CEFBS_None, // G_AND = 42
    CEFBS_None, // G_OR = 43
    CEFBS_None, // G_XOR = 44
    CEFBS_None, // G_IMPLICIT_DEF = 45
    CEFBS_None, // G_PHI = 46
    CEFBS_None, // G_FRAME_INDEX = 47
    CEFBS_None, // G_GLOBAL_VALUE = 48
    CEFBS_None, // G_EXTRACT = 49
    CEFBS_None, // G_UNMERGE_VALUES = 50
    CEFBS_None, // G_INSERT = 51
    CEFBS_None, // G_MERGE_VALUES = 52
    CEFBS_None, // G_BUILD_VECTOR = 53
    CEFBS_None, // G_BUILD_VECTOR_TRUNC = 54
    CEFBS_None, // G_CONCAT_VECTORS = 55
    CEFBS_None, // G_PTRTOINT = 56
    CEFBS_None, // G_INTTOPTR = 57
    CEFBS_None, // G_BITCAST = 58
    CEFBS_None, // G_INTRINSIC_TRUNC = 59
    CEFBS_None, // G_INTRINSIC_ROUND = 60
    CEFBS_None, // G_LOAD = 61
    CEFBS_None, // G_SEXTLOAD = 62
    CEFBS_None, // G_ZEXTLOAD = 63
    CEFBS_None, // G_INDEXED_LOAD = 64
    CEFBS_None, // G_INDEXED_SEXTLOAD = 65
    CEFBS_None, // G_INDEXED_ZEXTLOAD = 66
    CEFBS_None, // G_STORE = 67
    CEFBS_None, // G_INDEXED_STORE = 68
    CEFBS_None, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 69
    CEFBS_None, // G_ATOMIC_CMPXCHG = 70
    CEFBS_None, // G_ATOMICRMW_XCHG = 71
    CEFBS_None, // G_ATOMICRMW_ADD = 72
    CEFBS_None, // G_ATOMICRMW_SUB = 73
    CEFBS_None, // G_ATOMICRMW_AND = 74
    CEFBS_None, // G_ATOMICRMW_NAND = 75
    CEFBS_None, // G_ATOMICRMW_OR = 76
    CEFBS_None, // G_ATOMICRMW_XOR = 77
    CEFBS_None, // G_ATOMICRMW_MAX = 78
    CEFBS_None, // G_ATOMICRMW_MIN = 79
    CEFBS_None, // G_ATOMICRMW_UMAX = 80
    CEFBS_None, // G_ATOMICRMW_UMIN = 81
    CEFBS_None, // G_ATOMICRMW_FADD = 82
    CEFBS_None, // G_ATOMICRMW_FSUB = 83
    CEFBS_None, // G_FENCE = 84
    CEFBS_None, // G_BRCOND = 85
    CEFBS_None, // G_BRINDIRECT = 86
    CEFBS_None, // G_INTRINSIC = 87
    CEFBS_None, // G_INTRINSIC_W_SIDE_EFFECTS = 88
    CEFBS_None, // G_ANYEXT = 89
    CEFBS_None, // G_TRUNC = 90
    CEFBS_None, // G_CONSTANT = 91
    CEFBS_None, // G_FCONSTANT = 92
    CEFBS_None, // G_VASTART = 93
    CEFBS_None, // G_VAARG = 94
    CEFBS_None, // G_SEXT = 95
    CEFBS_None, // G_SEXT_INREG = 96
    CEFBS_None, // G_ZEXT = 97
    CEFBS_None, // G_SHL = 98
    CEFBS_None, // G_LSHR = 99
    CEFBS_None, // G_ASHR = 100
    CEFBS_None, // G_ICMP = 101
    CEFBS_None, // G_FCMP = 102
    CEFBS_None, // G_SELECT = 103
    CEFBS_None, // G_UADDO = 104
    CEFBS_None, // G_UADDE = 105
    CEFBS_None, // G_USUBO = 106
    CEFBS_None, // G_USUBE = 107
    CEFBS_None, // G_SADDO = 108
    CEFBS_None, // G_SADDE = 109
    CEFBS_None, // G_SSUBO = 110
    CEFBS_None, // G_SSUBE = 111
    CEFBS_None, // G_UMULO = 112
    CEFBS_None, // G_SMULO = 113
    CEFBS_None, // G_UMULH = 114
    CEFBS_None, // G_SMULH = 115
    CEFBS_None, // G_FADD = 116
    CEFBS_None, // G_FSUB = 117
    CEFBS_None, // G_FMUL = 118
    CEFBS_None, // G_FMA = 119
    CEFBS_None, // G_FMAD = 120
    CEFBS_None, // G_FDIV = 121
    CEFBS_None, // G_FREM = 122
    CEFBS_None, // G_FPOW = 123
    CEFBS_None, // G_FEXP = 124
    CEFBS_None, // G_FEXP2 = 125
    CEFBS_None, // G_FLOG = 126
    CEFBS_None, // G_FLOG2 = 127
    CEFBS_None, // G_FLOG10 = 128
    CEFBS_None, // G_FNEG = 129
    CEFBS_None, // G_FPEXT = 130
    CEFBS_None, // G_FPTRUNC = 131
    CEFBS_None, // G_FPTOSI = 132
    CEFBS_None, // G_FPTOUI = 133
    CEFBS_None, // G_SITOFP = 134
    CEFBS_None, // G_UITOFP = 135
    CEFBS_None, // G_FABS = 136
    CEFBS_None, // G_FCOPYSIGN = 137
    CEFBS_None, // G_FCANONICALIZE = 138
    CEFBS_None, // G_FMINNUM = 139
    CEFBS_None, // G_FMAXNUM = 140
    CEFBS_None, // G_FMINNUM_IEEE = 141
    CEFBS_None, // G_FMAXNUM_IEEE = 142
    CEFBS_None, // G_FMINIMUM = 143
    CEFBS_None, // G_FMAXIMUM = 144
    CEFBS_None, // G_GEP = 145
    CEFBS_None, // G_PTR_MASK = 146
    CEFBS_None, // G_SMIN = 147
    CEFBS_None, // G_SMAX = 148
    CEFBS_None, // G_UMIN = 149
    CEFBS_None, // G_UMAX = 150
    CEFBS_None, // G_BR = 151
    CEFBS_None, // G_BRJT = 152
    CEFBS_None, // G_INSERT_VECTOR_ELT = 153
    CEFBS_None, // G_EXTRACT_VECTOR_ELT = 154
    CEFBS_None, // G_SHUFFLE_VECTOR = 155
    CEFBS_None, // G_CTTZ = 156
    CEFBS_None, // G_CTTZ_ZERO_UNDEF = 157
    CEFBS_None, // G_CTLZ = 158
    CEFBS_None, // G_CTLZ_ZERO_UNDEF = 159
    CEFBS_None, // G_CTPOP = 160
    CEFBS_None, // G_BSWAP = 161
    CEFBS_None, // G_BITREVERSE = 162
    CEFBS_None, // G_FCEIL = 163
    CEFBS_None, // G_FCOS = 164
    CEFBS_None, // G_FSIN = 165
    CEFBS_None, // G_FSQRT = 166
    CEFBS_None, // G_FFLOOR = 167
    CEFBS_None, // G_FRINT = 168
    CEFBS_None, // G_FNEARBYINT = 169
    CEFBS_None, // G_ADDRSPACE_CAST = 170
    CEFBS_None, // G_BLOCK_ADDR = 171
    CEFBS_None, // G_JUMP_TABLE = 172
    CEFBS_None, // G_DYN_STACKALLOC = 173
    CEFBS_None, // A2_addsp = 174
    CEFBS_None, // A2_iconst = 175
    CEFBS_None, // A2_neg = 176
    CEFBS_None, // A2_not = 177
    CEFBS_None, // A2_tfrf = 178
    CEFBS_None, // A2_tfrfnew = 179
    CEFBS_None, // A2_tfrp = 180
    CEFBS_None, // A2_tfrpf = 181
    CEFBS_None, // A2_tfrpfnew = 182
    CEFBS_None, // A2_tfrpi = 183
    CEFBS_None, // A2_tfrpt = 184
    CEFBS_None, // A2_tfrptnew = 185
    CEFBS_None, // A2_tfrt = 186
    CEFBS_None, // A2_tfrtnew = 187
    CEFBS_None, // A2_vaddb_map = 188
    CEFBS_None, // A2_vsubb_map = 189
    CEFBS_None, // A2_zxtb = 190
    CEFBS_None, // A4_boundscheck = 191
    CEFBS_None, // ADJCALLSTACKDOWN = 192
    CEFBS_None, // ADJCALLSTACKUP = 193
    CEFBS_None, // C2_cmpgei = 194
    CEFBS_None, // C2_cmpgeui = 195
    CEFBS_None, // C2_cmplt = 196
    CEFBS_None, // C2_cmpltu = 197
    CEFBS_None, // C2_pxfer_map = 198
    CEFBS_None, // DUPLEX_Pseudo = 199
    CEFBS_None, // ENDLOOP0 = 200
    CEFBS_None, // ENDLOOP01 = 201
    CEFBS_None, // ENDLOOP1 = 202
    CEFBS_None, // J2_endloop0 = 203
    CEFBS_None, // J2_endloop01 = 204
    CEFBS_None, // J2_endloop1 = 205
    CEFBS_HasV60, // J2_jumpf_nopred_map = 206
    CEFBS_HasV60, // J2_jumprf_nopred_map = 207
    CEFBS_HasV60, // J2_jumprt_nopred_map = 208
    CEFBS_HasV60, // J2_jumpt_nopred_map = 209
    CEFBS_None, // J2_trap1_noregmap = 210
    CEFBS_None, // L2_loadalignb_zomap = 211
    CEFBS_None, // L2_loadalignh_zomap = 212
    CEFBS_None, // L2_loadbsw2_zomap = 213
    CEFBS_None, // L2_loadbsw4_zomap = 214
    CEFBS_None, // L2_loadbzw2_zomap = 215
    CEFBS_None, // L2_loadbzw4_zomap = 216
    CEFBS_None, // L2_loadrb_zomap = 217
    CEFBS_None, // L2_loadrd_zomap = 218
    CEFBS_None, // L2_loadrh_zomap = 219
    CEFBS_None, // L2_loadri_zomap = 220
    CEFBS_None, // L2_loadrub_zomap = 221
    CEFBS_None, // L2_loadruh_zomap = 222
    CEFBS_None, // L2_ploadrbf_zomap = 223
    CEFBS_None, // L2_ploadrbfnew_zomap = 224
    CEFBS_None, // L2_ploadrbt_zomap = 225
    CEFBS_None, // L2_ploadrbtnew_zomap = 226
    CEFBS_None, // L2_ploadrdf_zomap = 227
    CEFBS_None, // L2_ploadrdfnew_zomap = 228
    CEFBS_None, // L2_ploadrdt_zomap = 229
    CEFBS_None, // L2_ploadrdtnew_zomap = 230
    CEFBS_None, // L2_ploadrhf_zomap = 231
    CEFBS_None, // L2_ploadrhfnew_zomap = 232
    CEFBS_None, // L2_ploadrht_zomap = 233
    CEFBS_None, // L2_ploadrhtnew_zomap = 234
    CEFBS_None, // L2_ploadrif_zomap = 235
    CEFBS_None, // L2_ploadrifnew_zomap = 236
    CEFBS_None, // L2_ploadrit_zomap = 237
    CEFBS_None, // L2_ploadritnew_zomap = 238
    CEFBS_None, // L2_ploadrubf_zomap = 239
    CEFBS_None, // L2_ploadrubfnew_zomap = 240
    CEFBS_None, // L2_ploadrubt_zomap = 241
    CEFBS_None, // L2_ploadrubtnew_zomap = 242
    CEFBS_None, // L2_ploadruhf_zomap = 243
    CEFBS_None, // L2_ploadruhfnew_zomap = 244
    CEFBS_None, // L2_ploadruht_zomap = 245
    CEFBS_None, // L2_ploadruhtnew_zomap = 246
    CEFBS_None, // L4_add_memopb_zomap = 247
    CEFBS_None, // L4_add_memoph_zomap = 248
    CEFBS_None, // L4_add_memopw_zomap = 249
    CEFBS_None, // L4_and_memopb_zomap = 250
    CEFBS_None, // L4_and_memoph_zomap = 251
    CEFBS_None, // L4_and_memopw_zomap = 252
    CEFBS_None, // L4_iadd_memopb_zomap = 253
    CEFBS_None, // L4_iadd_memoph_zomap = 254
    CEFBS_None, // L4_iadd_memopw_zomap = 255
    CEFBS_None, // L4_iand_memopb_zomap = 256
    CEFBS_None, // L4_iand_memoph_zomap = 257
    CEFBS_None, // L4_iand_memopw_zomap = 258
    CEFBS_None, // L4_ior_memopb_zomap = 259
    CEFBS_None, // L4_ior_memoph_zomap = 260
    CEFBS_None, // L4_ior_memopw_zomap = 261
    CEFBS_None, // L4_isub_memopb_zomap = 262
    CEFBS_None, // L4_isub_memoph_zomap = 263
    CEFBS_None, // L4_isub_memopw_zomap = 264
    CEFBS_None, // L4_or_memopb_zomap = 265
    CEFBS_None, // L4_or_memoph_zomap = 266
    CEFBS_None, // L4_or_memopw_zomap = 267
    CEFBS_HasV65, // L4_return_map_to_raw_f = 268
    CEFBS_HasV65, // L4_return_map_to_raw_fnew_pnt = 269
    CEFBS_HasV65, // L4_return_map_to_raw_fnew_pt = 270
    CEFBS_HasV65, // L4_return_map_to_raw_t = 271
    CEFBS_HasV65, // L4_return_map_to_raw_tnew_pnt = 272
    CEFBS_HasV65, // L4_return_map_to_raw_tnew_pt = 273
    CEFBS_None, // L4_sub_memopb_zomap = 274
    CEFBS_None, // L4_sub_memoph_zomap = 275
    CEFBS_None, // L4_sub_memopw_zomap = 276
    CEFBS_HasV65, // L6_deallocframe_map_to_raw = 277
    CEFBS_HasV65, // L6_return_map_to_raw = 278
    CEFBS_None, // LDriw_ctr = 279
    CEFBS_None, // LDriw_pred = 280
    CEFBS_None, // M2_mpysmi = 281
    CEFBS_None, // M2_mpyui = 282
    CEFBS_None, // M2_vrcmpys_acc_s1 = 283
    CEFBS_None, // M2_vrcmpys_s1 = 284
    CEFBS_None, // M2_vrcmpys_s1rp = 285
    CEFBS_None, // PS_aligna = 286
    CEFBS_None, // PS_alloca = 287
    CEFBS_None, // PS_call_nr = 288
    CEFBS_None, // PS_crash = 289
    CEFBS_None, // PS_false = 290
    CEFBS_None, // PS_fi = 291
    CEFBS_None, // PS_fia = 292
    CEFBS_None, // PS_loadrb_pci = 293
    CEFBS_None, // PS_loadrb_pcr = 294
    CEFBS_None, // PS_loadrd_pci = 295
    CEFBS_None, // PS_loadrd_pcr = 296
    CEFBS_None, // PS_loadrh_pci = 297
    CEFBS_None, // PS_loadrh_pcr = 298
    CEFBS_None, // PS_loadri_pci = 299
    CEFBS_None, // PS_loadri_pcr = 300
    CEFBS_None, // PS_loadrub_pci = 301
    CEFBS_None, // PS_loadrub_pcr = 302
    CEFBS_None, // PS_loadruh_pci = 303
    CEFBS_None, // PS_loadruh_pcr = 304
    CEFBS_None, // PS_pselect = 305
    CEFBS_None, // PS_qfalse = 306
    CEFBS_None, // PS_qtrue = 307
    CEFBS_None, // PS_storerb_pci = 308
    CEFBS_None, // PS_storerb_pcr = 309
    CEFBS_None, // PS_storerd_pci = 310
    CEFBS_None, // PS_storerd_pcr = 311
    CEFBS_None, // PS_storerf_pci = 312
    CEFBS_None, // PS_storerf_pcr = 313
    CEFBS_None, // PS_storerh_pci = 314
    CEFBS_None, // PS_storerh_pcr = 315
    CEFBS_None, // PS_storeri_pci = 316
    CEFBS_None, // PS_storeri_pcr = 317
    CEFBS_None, // PS_tailcall_i = 318
    CEFBS_None, // PS_tailcall_r = 319
    CEFBS_None, // PS_true = 320
    CEFBS_None, // PS_vdd0 = 321
    CEFBS_HasV60_UseHVX, // PS_vloadrq_ai = 322
    CEFBS_HasV60_UseHVX, // PS_vloadrw_ai = 323
    CEFBS_HasV60_UseHVX, // PS_vloadrw_nt_ai = 324
    CEFBS_HasV60_UseHVX, // PS_vloadrwu_ai = 325
    CEFBS_None, // PS_vmulw = 326
    CEFBS_None, // PS_vmulw_acc = 327
    CEFBS_HasV60_UseHVX, // PS_vselect = 328
    CEFBS_HasV60_UseHVX, // PS_vstorerq_ai = 329
    CEFBS_HasV60_UseHVX, // PS_vstorerw_ai = 330
    CEFBS_HasV60_UseHVX, // PS_vstorerw_nt_ai = 331
    CEFBS_HasV60_UseHVX, // PS_vstorerwu_ai = 332
    CEFBS_HasV60_UseHVX, // PS_wselect = 333
    CEFBS_None, // S2_asr_i_p_rnd_goodsyntax = 334
    CEFBS_None, // S2_asr_i_r_rnd_goodsyntax = 335
    CEFBS_None, // S2_pstorerbf_zomap = 336
    CEFBS_None, // S2_pstorerbnewf_zomap = 337
    CEFBS_None, // S2_pstorerbnewt_zomap = 338
    CEFBS_None, // S2_pstorerbt_zomap = 339
    CEFBS_None, // S2_pstorerdf_zomap = 340
    CEFBS_None, // S2_pstorerdt_zomap = 341
    CEFBS_None, // S2_pstorerff_zomap = 342
    CEFBS_None, // S2_pstorerft_zomap = 343
    CEFBS_None, // S2_pstorerhf_zomap = 344
    CEFBS_None, // S2_pstorerhnewf_zomap = 345
    CEFBS_None, // S2_pstorerhnewt_zomap = 346
    CEFBS_None, // S2_pstorerht_zomap = 347
    CEFBS_None, // S2_pstorerif_zomap = 348
    CEFBS_None, // S2_pstorerinewf_zomap = 349
    CEFBS_None, // S2_pstorerinewt_zomap = 350
    CEFBS_None, // S2_pstorerit_zomap = 351
    CEFBS_None, // S2_storerb_zomap = 352
    CEFBS_None, // S2_storerbnew_zomap = 353
    CEFBS_None, // S2_storerd_zomap = 354
    CEFBS_None, // S2_storerf_zomap = 355
    CEFBS_None, // S2_storerh_zomap = 356
    CEFBS_None, // S2_storerhnew_zomap = 357
    CEFBS_None, // S2_storeri_zomap = 358
    CEFBS_None, // S2_storerinew_zomap = 359
    CEFBS_None, // S2_tableidxb_goodsyntax = 360
    CEFBS_None, // S2_tableidxd_goodsyntax = 361
    CEFBS_None, // S2_tableidxh_goodsyntax = 362
    CEFBS_None, // S2_tableidxw_goodsyntax = 363
    CEFBS_None, // S4_pstorerbfnew_zomap = 364
    CEFBS_None, // S4_pstorerbnewfnew_zomap = 365
    CEFBS_None, // S4_pstorerbnewtnew_zomap = 366
    CEFBS_None, // S4_pstorerbtnew_zomap = 367
    CEFBS_None, // S4_pstorerdfnew_zomap = 368
    CEFBS_None, // S4_pstorerdtnew_zomap = 369
    CEFBS_None, // S4_pstorerffnew_zomap = 370
    CEFBS_None, // S4_pstorerftnew_zomap = 371
    CEFBS_None, // S4_pstorerhfnew_zomap = 372
    CEFBS_None, // S4_pstorerhnewfnew_zomap = 373
    CEFBS_None, // S4_pstorerhnewtnew_zomap = 374
    CEFBS_None, // S4_pstorerhtnew_zomap = 375
    CEFBS_None, // S4_pstorerifnew_zomap = 376
    CEFBS_None, // S4_pstorerinewfnew_zomap = 377
    CEFBS_None, // S4_pstorerinewtnew_zomap = 378
    CEFBS_None, // S4_pstoreritnew_zomap = 379
    CEFBS_None, // S4_storeirb_zomap = 380
    CEFBS_None, // S4_storeirbf_zomap = 381
    CEFBS_None, // S4_storeirbfnew_zomap = 382
    CEFBS_None, // S4_storeirbt_zomap = 383
    CEFBS_None, // S4_storeirbtnew_zomap = 384
    CEFBS_None, // S4_storeirh_zomap = 385
    CEFBS_None, // S4_storeirhf_zomap = 386
    CEFBS_None, // S4_storeirhfnew_zomap = 387
    CEFBS_None, // S4_storeirht_zomap = 388
    CEFBS_None, // S4_storeirhtnew_zomap = 389
    CEFBS_None, // S4_storeiri_zomap = 390
    CEFBS_None, // S4_storeirif_zomap = 391
    CEFBS_None, // S4_storeirifnew_zomap = 392
    CEFBS_None, // S4_storeirit_zomap = 393
    CEFBS_None, // S4_storeiritnew_zomap = 394
    CEFBS_None, // S5_asrhub_rnd_sat_goodsyntax = 395
    CEFBS_None, // S5_vasrhrnd_goodsyntax = 396
    CEFBS_HasV65, // S6_allocframe_to_raw = 397
    CEFBS_None, // STriw_ctr = 398
    CEFBS_None, // STriw_pred = 399
    CEFBS_UseHVXV60, // V6_MAP_equb = 400
    CEFBS_UseHVXV60, // V6_MAP_equb_and = 401
    CEFBS_UseHVXV60, // V6_MAP_equb_ior = 402
    CEFBS_UseHVXV60, // V6_MAP_equb_xor = 403
    CEFBS_UseHVXV60, // V6_MAP_equh = 404
    CEFBS_UseHVXV60, // V6_MAP_equh_and = 405
    CEFBS_UseHVXV60, // V6_MAP_equh_ior = 406
    CEFBS_UseHVXV60, // V6_MAP_equh_xor = 407
    CEFBS_UseHVXV60, // V6_MAP_equw = 408
    CEFBS_UseHVXV60, // V6_MAP_equw_and = 409
    CEFBS_UseHVXV60, // V6_MAP_equw_ior = 410
    CEFBS_UseHVXV60, // V6_MAP_equw_xor = 411
    CEFBS_UseHVXV60, // V6_extractw_alt = 412
    CEFBS_UseHVXV60, // V6_hi = 413
    CEFBS_UseHVXV60, // V6_ld0 = 414
    CEFBS_UseHVXV62, // V6_ldcnp0 = 415
    CEFBS_UseHVXV62, // V6_ldcnpnt0 = 416
    CEFBS_UseHVXV62, // V6_ldcp0 = 417
    CEFBS_UseHVXV62, // V6_ldcpnt0 = 418
    CEFBS_UseHVXV62, // V6_ldnp0 = 419
    CEFBS_UseHVXV62, // V6_ldnpnt0 = 420
    CEFBS_UseHVXV60, // V6_ldnt0 = 421
    CEFBS_HasV62, // V6_ldntnt0 = 422
    CEFBS_UseHVXV62, // V6_ldp0 = 423
    CEFBS_UseHVXV62, // V6_ldpnt0 = 424
    CEFBS_UseHVXV62, // V6_ldtnp0 = 425
    CEFBS_UseHVXV62, // V6_ldtnpnt0 = 426
    CEFBS_UseHVXV62, // V6_ldtp0 = 427
    CEFBS_UseHVXV62, // V6_ldtpnt0 = 428
    CEFBS_UseHVXV60, // V6_ldu0 = 429
    CEFBS_UseHVXV60, // V6_lo = 430
    CEFBS_UseHVXV60, // V6_st0 = 431
    CEFBS_UseHVXV60, // V6_stn0 = 432
    CEFBS_UseHVXV60, // V6_stnnt0 = 433
    CEFBS_UseHVXV60, // V6_stnp0 = 434
    CEFBS_UseHVXV60, // V6_stnpnt0 = 435
    CEFBS_UseHVXV60, // V6_stnq0 = 436
    CEFBS_UseHVXV60, // V6_stnqnt0 = 437
    CEFBS_UseHVXV60, // V6_stnt0 = 438
    CEFBS_UseHVXV60, // V6_stp0 = 439
    CEFBS_UseHVXV60, // V6_stpnt0 = 440
    CEFBS_UseHVXV60, // V6_stq0 = 441
    CEFBS_UseHVXV60, // V6_stqnt0 = 442
    CEFBS_UseHVXV60, // V6_stu0 = 443
    CEFBS_UseHVXV60, // V6_stunp0 = 444
    CEFBS_UseHVXV60, // V6_stup0 = 445
    CEFBS_UseHVXV65, // V6_vabsb_alt = 446
    CEFBS_UseHVXV65, // V6_vabsb_sat_alt = 447
    CEFBS_UseHVXV60, // V6_vabsdiffh_alt = 448
    CEFBS_UseHVXV60, // V6_vabsdiffub_alt = 449
    CEFBS_UseHVXV60, // V6_vabsdiffuh_alt = 450
    CEFBS_UseHVXV60, // V6_vabsdiffw_alt = 451
    CEFBS_UseHVXV60, // V6_vabsh_alt = 452
    CEFBS_UseHVXV60, // V6_vabsh_sat_alt = 453
    CEFBS_UseHVXV65, // V6_vabsub_alt = 454
    CEFBS_UseHVXV65, // V6_vabsuh_alt = 455
    CEFBS_UseHVXV65, // V6_vabsuw_alt = 456
    CEFBS_UseHVXV60, // V6_vabsw_alt = 457
    CEFBS_UseHVXV60, // V6_vabsw_sat_alt = 458
    CEFBS_UseHVXV60, // V6_vaddb_alt = 459
    CEFBS_UseHVXV60, // V6_vaddb_dv_alt = 460
    CEFBS_UseHVXV60, // V6_vaddbnq_alt = 461
    CEFBS_UseHVXV60, // V6_vaddbq_alt = 462
    CEFBS_UseHVXV62, // V6_vaddbsat_alt = 463
    CEFBS_UseHVXV62, // V6_vaddbsat_dv_alt = 464
    CEFBS_UseHVXV60, // V6_vaddh_alt = 465
    CEFBS_UseHVXV60, // V6_vaddh_dv_alt = 466
    CEFBS_UseHVXV60, // V6_vaddhnq_alt = 467
    CEFBS_UseHVXV60, // V6_vaddhq_alt = 468
    CEFBS_UseHVXV60, // V6_vaddhsat_alt = 469
    CEFBS_UseHVXV60, // V6_vaddhsat_dv_alt = 470
    CEFBS_UseHVXV62, // V6_vaddhw_acc_alt = 471
    CEFBS_UseHVXV60, // V6_vaddhw_alt = 472
    CEFBS_UseHVXV62, // V6_vaddubh_acc_alt = 473
    CEFBS_UseHVXV60, // V6_vaddubh_alt = 474
    CEFBS_UseHVXV60, // V6_vaddubsat_alt = 475
    CEFBS_UseHVXV60, // V6_vaddubsat_dv_alt = 476
    CEFBS_UseHVXV60, // V6_vadduhsat_alt = 477
    CEFBS_UseHVXV60, // V6_vadduhsat_dv_alt = 478
    CEFBS_UseHVXV62, // V6_vadduhw_acc_alt = 479
    CEFBS_UseHVXV60, // V6_vadduhw_alt = 480
    CEFBS_UseHVXV62, // V6_vadduwsat_alt = 481
    CEFBS_UseHVXV62, // V6_vadduwsat_dv_alt = 482
    CEFBS_UseHVXV60, // V6_vaddw_alt = 483
    CEFBS_UseHVXV60, // V6_vaddw_dv_alt = 484
    CEFBS_UseHVXV60, // V6_vaddwnq_alt = 485
    CEFBS_UseHVXV60, // V6_vaddwq_alt = 486
    CEFBS_UseHVXV60, // V6_vaddwsat_alt = 487
    CEFBS_UseHVXV60, // V6_vaddwsat_dv_alt = 488
    CEFBS_UseHVXV62, // V6_vandnqrt_acc_alt = 489
    CEFBS_UseHVXV62, // V6_vandnqrt_alt = 490
    CEFBS_UseHVXV60, // V6_vandqrt_acc_alt = 491
    CEFBS_UseHVXV60, // V6_vandqrt_alt = 492
    CEFBS_UseHVXV60, // V6_vandvrt_acc_alt = 493
    CEFBS_UseHVXV60, // V6_vandvrt_alt = 494
    CEFBS_UseHVXV65, // V6_vaslh_acc_alt = 495
    CEFBS_UseHVXV60, // V6_vaslh_alt = 496
    CEFBS_UseHVXV60, // V6_vaslhv_alt = 497
    CEFBS_UseHVXV60, // V6_vaslw_acc_alt = 498
    CEFBS_UseHVXV60, // V6_vaslw_alt = 499
    CEFBS_UseHVXV60, // V6_vaslwv_alt = 500
    CEFBS_UseHVXV66, // V6_vasr_into_alt = 501
    CEFBS_UseHVXV65, // V6_vasrh_acc_alt = 502
    CEFBS_UseHVXV60, // V6_vasrh_alt = 503
    CEFBS_HasV60, // V6_vasrhbrndsat_alt = 504
    CEFBS_HasV60, // V6_vasrhubrndsat_alt = 505
    CEFBS_HasV60, // V6_vasrhubsat_alt = 506
    CEFBS_UseHVXV60, // V6_vasrhv_alt = 507
    CEFBS_UseHVXV60, // V6_vasrw_acc_alt = 508
    CEFBS_UseHVXV60, // V6_vasrw_alt = 509
    CEFBS_HasV60, // V6_vasrwh_alt = 510
    CEFBS_HasV60, // V6_vasrwhrndsat_alt = 511
    CEFBS_HasV60, // V6_vasrwhsat_alt = 512
    CEFBS_HasV60, // V6_vasrwuhsat_alt = 513
    CEFBS_UseHVXV60, // V6_vasrwv_alt = 514
    CEFBS_UseHVXV60, // V6_vassignp = 515
    CEFBS_UseHVXV65, // V6_vavgb_alt = 516
    CEFBS_UseHVXV65, // V6_vavgbrnd_alt = 517
    CEFBS_UseHVXV60, // V6_vavgh_alt = 518
    CEFBS_UseHVXV60, // V6_vavghrnd_alt = 519
    CEFBS_UseHVXV60, // V6_vavgub_alt = 520
    CEFBS_UseHVXV60, // V6_vavgubrnd_alt = 521
    CEFBS_UseHVXV60, // V6_vavguh_alt = 522
    CEFBS_UseHVXV60, // V6_vavguhrnd_alt = 523
    CEFBS_UseHVXV65, // V6_vavguw_alt = 524
    CEFBS_UseHVXV65, // V6_vavguwrnd_alt = 525
    CEFBS_UseHVXV60, // V6_vavgw_alt = 526
    CEFBS_UseHVXV60, // V6_vavgwrnd_alt = 527
    CEFBS_UseHVXV60, // V6_vcl0h_alt = 528
    CEFBS_UseHVXV60, // V6_vcl0w_alt = 529
    CEFBS_UseHVXV60, // V6_vd0 = 530
    CEFBS_UseHVXV65, // V6_vdd0 = 531
    CEFBS_UseHVXV60, // V6_vdealb4w_alt = 532
    CEFBS_UseHVXV60, // V6_vdealb_alt = 533
    CEFBS_UseHVXV60, // V6_vdealh_alt = 534
    CEFBS_UseHVXV60, // V6_vdmpybus_acc_alt = 535
    CEFBS_UseHVXV60, // V6_vdmpybus_alt = 536
    CEFBS_UseHVXV60, // V6_vdmpybus_dv_acc_alt = 537
    CEFBS_UseHVXV60, // V6_vdmpybus_dv_alt = 538
    CEFBS_UseHVXV60, // V6_vdmpyhb_acc_alt = 539
    CEFBS_UseHVXV60, // V6_vdmpyhb_alt = 540
    CEFBS_UseHVXV60, // V6_vdmpyhb_dv_acc_alt = 541
    CEFBS_UseHVXV60, // V6_vdmpyhb_dv_alt = 542
    CEFBS_UseHVXV60, // V6_vdmpyhisat_acc_alt = 543
    CEFBS_UseHVXV60, // V6_vdmpyhisat_alt = 544
    CEFBS_UseHVXV60, // V6_vdmpyhsat_acc_alt = 545
    CEFBS_UseHVXV60, // V6_vdmpyhsat_alt = 546
    CEFBS_UseHVXV60, // V6_vdmpyhsuisat_acc_alt = 547
    CEFBS_UseHVXV60, // V6_vdmpyhsuisat_alt = 548
    CEFBS_UseHVXV60, // V6_vdmpyhsusat_acc_alt = 549
    CEFBS_UseHVXV60, // V6_vdmpyhsusat_alt = 550
    CEFBS_UseHVXV60, // V6_vdmpyhvsat_acc_alt = 551
    CEFBS_UseHVXV60, // V6_vdmpyhvsat_alt = 552
    CEFBS_UseHVXV60, // V6_vdsaduh_acc_alt = 553
    CEFBS_UseHVXV60, // V6_vdsaduh_alt = 554
    CEFBS_None, // V6_vgathermh_pseudo = 555
    CEFBS_None, // V6_vgathermhq_pseudo = 556
    CEFBS_None, // V6_vgathermhw_pseudo = 557
    CEFBS_None, // V6_vgathermhwq_pseudo = 558
    CEFBS_None, // V6_vgathermw_pseudo = 559
    CEFBS_None, // V6_vgathermwq_pseudo = 560
    CEFBS_UseHVXV60, // V6_vlsrh_alt = 561
    CEFBS_UseHVXV60, // V6_vlsrhv_alt = 562
    CEFBS_UseHVXV60, // V6_vlsrw_alt = 563
    CEFBS_UseHVXV60, // V6_vlsrwv_alt = 564
    CEFBS_UseHVXV62, // V6_vmaxb_alt = 565
    CEFBS_UseHVXV60, // V6_vmaxh_alt = 566
    CEFBS_UseHVXV60, // V6_vmaxub_alt = 567
    CEFBS_UseHVXV60, // V6_vmaxuh_alt = 568
    CEFBS_UseHVXV60, // V6_vmaxw_alt = 569
    CEFBS_UseHVXV62, // V6_vminb_alt = 570
    CEFBS_UseHVXV60, // V6_vminh_alt = 571
    CEFBS_UseHVXV60, // V6_vminub_alt = 572
    CEFBS_UseHVXV60, // V6_vminuh_alt = 573
    CEFBS_UseHVXV60, // V6_vminw_alt = 574
    CEFBS_UseHVXV60, // V6_vmpabus_acc_alt = 575
    CEFBS_UseHVXV60, // V6_vmpabus_alt = 576
    CEFBS_UseHVXV60, // V6_vmpabusv_alt = 577
    CEFBS_UseHVXV65, // V6_vmpabuu_acc_alt = 578
    CEFBS_UseHVXV65, // V6_vmpabuu_alt = 579
    CEFBS_UseHVXV60, // V6_vmpabuuv_alt = 580
    CEFBS_UseHVXV60, // V6_vmpahb_acc_alt = 581
    CEFBS_UseHVXV60, // V6_vmpahb_alt = 582
    CEFBS_UseHVXV62, // V6_vmpauhb_acc_alt = 583
    CEFBS_UseHVXV62, // V6_vmpauhb_alt = 584
    CEFBS_UseHVXV60, // V6_vmpybus_acc_alt = 585
    CEFBS_UseHVXV60, // V6_vmpybus_alt = 586
    CEFBS_UseHVXV60, // V6_vmpybusv_acc_alt = 587
    CEFBS_UseHVXV60, // V6_vmpybusv_alt = 588
    CEFBS_UseHVXV60, // V6_vmpybv_acc_alt = 589
    CEFBS_UseHVXV60, // V6_vmpybv_alt = 590
    CEFBS_UseHVXV60, // V6_vmpyewuh_alt = 591
    CEFBS_UseHVXV65, // V6_vmpyh_acc_alt = 592
    CEFBS_UseHVXV60, // V6_vmpyh_alt = 593
    CEFBS_UseHVXV60, // V6_vmpyhsat_acc_alt = 594
    CEFBS_UseHVXV60, // V6_vmpyhsrs_alt = 595
    CEFBS_UseHVXV60, // V6_vmpyhss_alt = 596
    CEFBS_UseHVXV60, // V6_vmpyhus_acc_alt = 597
    CEFBS_UseHVXV60, // V6_vmpyhus_alt = 598
    CEFBS_UseHVXV60, // V6_vmpyhv_acc_alt = 599
    CEFBS_UseHVXV60, // V6_vmpyhv_alt = 600
    CEFBS_UseHVXV60, // V6_vmpyhvsrs_alt = 601
    CEFBS_UseHVXV60, // V6_vmpyiewh_acc_alt = 602
    CEFBS_UseHVXV60, // V6_vmpyiewuh_acc_alt = 603
    CEFBS_UseHVXV60, // V6_vmpyiewuh_alt = 604
    CEFBS_UseHVXV60, // V6_vmpyih_acc_alt = 605
    CEFBS_UseHVXV60, // V6_vmpyih_alt = 606
    CEFBS_UseHVXV60, // V6_vmpyihb_acc_alt = 607
    CEFBS_UseHVXV60, // V6_vmpyihb_alt = 608
    CEFBS_UseHVXV60, // V6_vmpyiowh_alt = 609
    CEFBS_UseHVXV60, // V6_vmpyiwb_acc_alt = 610
    CEFBS_UseHVXV60, // V6_vmpyiwb_alt = 611
    CEFBS_UseHVXV60, // V6_vmpyiwh_acc_alt = 612
    CEFBS_UseHVXV60, // V6_vmpyiwh_alt = 613
    CEFBS_UseHVXV62, // V6_vmpyiwub_acc_alt = 614
    CEFBS_UseHVXV62, // V6_vmpyiwub_alt = 615
    CEFBS_UseHVXV60, // V6_vmpyowh_alt = 616
    CEFBS_UseHVXV60, // V6_vmpyowh_rnd_alt = 617
    CEFBS_UseHVXV60, // V6_vmpyowh_rnd_sacc_alt = 618
    CEFBS_UseHVXV60, // V6_vmpyowh_sacc_alt = 619
    CEFBS_UseHVXV60, // V6_vmpyub_acc_alt = 620
    CEFBS_UseHVXV60, // V6_vmpyub_alt = 621
    CEFBS_UseHVXV60, // V6_vmpyubv_acc_alt = 622
    CEFBS_UseHVXV60, // V6_vmpyubv_alt = 623
    CEFBS_UseHVXV60, // V6_vmpyuh_acc_alt = 624
    CEFBS_UseHVXV60, // V6_vmpyuh_alt = 625
    CEFBS_UseHVXV60, // V6_vmpyuhv_acc_alt = 626
    CEFBS_UseHVXV60, // V6_vmpyuhv_alt = 627
    CEFBS_UseHVXV65, // V6_vnavgb_alt = 628
    CEFBS_UseHVXV60, // V6_vnavgh_alt = 629
    CEFBS_UseHVXV60, // V6_vnavgub_alt = 630
    CEFBS_UseHVXV60, // V6_vnavgw_alt = 631
    CEFBS_UseHVXV60, // V6_vnormamth_alt = 632
    CEFBS_UseHVXV60, // V6_vnormamtw_alt = 633
    CEFBS_UseHVXV60, // V6_vpackeb_alt = 634
    CEFBS_UseHVXV60, // V6_vpackeh_alt = 635
    CEFBS_UseHVXV60, // V6_vpackhb_sat_alt = 636
    CEFBS_UseHVXV60, // V6_vpackhub_sat_alt = 637
    CEFBS_UseHVXV60, // V6_vpackob_alt = 638
    CEFBS_UseHVXV60, // V6_vpackoh_alt = 639
    CEFBS_UseHVXV60, // V6_vpackwh_sat_alt = 640
    CEFBS_UseHVXV60, // V6_vpackwuh_sat_alt = 641
    CEFBS_UseHVXV60, // V6_vpopcounth_alt = 642
    CEFBS_UseHVXV65, // V6_vrmpybub_rtt_acc_alt = 643
    CEFBS_UseHVXV65, // V6_vrmpybub_rtt_alt = 644
    CEFBS_UseHVXV60, // V6_vrmpybus_acc_alt = 645
    CEFBS_UseHVXV60, // V6_vrmpybus_alt = 646
    CEFBS_UseHVXV60, // V6_vrmpybusi_acc_alt = 647
    CEFBS_UseHVXV60, // V6_vrmpybusi_alt = 648
    CEFBS_UseHVXV60, // V6_vrmpybusv_acc_alt = 649
    CEFBS_UseHVXV60, // V6_vrmpybusv_alt = 650
    CEFBS_UseHVXV60, // V6_vrmpybv_acc_alt = 651
    CEFBS_UseHVXV60, // V6_vrmpybv_alt = 652
    CEFBS_UseHVXV60, // V6_vrmpyub_acc_alt = 653
    CEFBS_UseHVXV60, // V6_vrmpyub_alt = 654
    CEFBS_UseHVXV65, // V6_vrmpyub_rtt_acc_alt = 655
    CEFBS_UseHVXV65, // V6_vrmpyub_rtt_alt = 656
    CEFBS_UseHVXV60, // V6_vrmpyubi_acc_alt = 657
    CEFBS_UseHVXV60, // V6_vrmpyubi_alt = 658
    CEFBS_UseHVXV60, // V6_vrmpyubv_acc_alt = 659
    CEFBS_UseHVXV60, // V6_vrmpyubv_alt = 660
    CEFBS_UseHVXV66, // V6_vrotr_alt = 661
    CEFBS_UseHVXV60, // V6_vroundhb_alt = 662
    CEFBS_UseHVXV60, // V6_vroundhub_alt = 663
    CEFBS_UseHVXV62, // V6_vrounduhub_alt = 664
    CEFBS_UseHVXV62, // V6_vrounduwuh_alt = 665
    CEFBS_UseHVXV60, // V6_vroundwh_alt = 666
    CEFBS_UseHVXV60, // V6_vroundwuh_alt = 667
    CEFBS_UseHVXV60, // V6_vrsadubi_acc_alt = 668
    CEFBS_UseHVXV60, // V6_vrsadubi_alt = 669
    CEFBS_UseHVXV60, // V6_vsathub_alt = 670
    CEFBS_UseHVXV62, // V6_vsatuwuh_alt = 671
    CEFBS_UseHVXV60, // V6_vsatwh_alt = 672
    CEFBS_UseHVXV60, // V6_vsb_alt = 673
    CEFBS_UseHVXV65, // V6_vscattermh_add_alt = 674
    CEFBS_UseHVXV65, // V6_vscattermh_alt = 675
    CEFBS_UseHVXV65, // V6_vscattermhq_alt = 676
    CEFBS_UseHVXV65, // V6_vscattermw_add_alt = 677
    CEFBS_UseHVXV65, // V6_vscattermw_alt = 678
    CEFBS_UseHVXV65, // V6_vscattermwh_add_alt = 679
    CEFBS_UseHVXV65, // V6_vscattermwh_alt = 680
    CEFBS_UseHVXV65, // V6_vscattermwhq_alt = 681
    CEFBS_UseHVXV65, // V6_vscattermwq_alt = 682
    CEFBS_UseHVXV60, // V6_vsh_alt = 683
    CEFBS_UseHVXV60, // V6_vshufeh_alt = 684
    CEFBS_UseHVXV60, // V6_vshuffb_alt = 685
    CEFBS_UseHVXV60, // V6_vshuffeb_alt = 686
    CEFBS_UseHVXV60, // V6_vshuffh_alt = 687
    CEFBS_UseHVXV60, // V6_vshuffob_alt = 688
    CEFBS_UseHVXV60, // V6_vshufoeb_alt = 689
    CEFBS_UseHVXV60, // V6_vshufoeh_alt = 690
    CEFBS_UseHVXV60, // V6_vshufoh_alt = 691
    CEFBS_UseHVXV60, // V6_vsubb_alt = 692
    CEFBS_UseHVXV60, // V6_vsubb_dv_alt = 693
    CEFBS_UseHVXV60, // V6_vsubbnq_alt = 694
    CEFBS_UseHVXV60, // V6_vsubbq_alt = 695
    CEFBS_UseHVXV62, // V6_vsubbsat_alt = 696
    CEFBS_UseHVXV62, // V6_vsubbsat_dv_alt = 697
    CEFBS_UseHVXV60, // V6_vsubh_alt = 698
    CEFBS_UseHVXV60, // V6_vsubh_dv_alt = 699
    CEFBS_UseHVXV60, // V6_vsubhnq_alt = 700
    CEFBS_UseHVXV60, // V6_vsubhq_alt = 701
    CEFBS_UseHVXV60, // V6_vsubhsat_alt = 702
    CEFBS_UseHVXV60, // V6_vsubhsat_dv_alt = 703
    CEFBS_UseHVXV60, // V6_vsubhw_alt = 704
    CEFBS_UseHVXV60, // V6_vsububh_alt = 705
    CEFBS_UseHVXV60, // V6_vsububsat_alt = 706
    CEFBS_UseHVXV60, // V6_vsububsat_dv_alt = 707
    CEFBS_UseHVXV60, // V6_vsubuhsat_alt = 708
    CEFBS_UseHVXV60, // V6_vsubuhsat_dv_alt = 709
    CEFBS_UseHVXV60, // V6_vsubuhw_alt = 710
    CEFBS_UseHVXV62, // V6_vsubuwsat_alt = 711
    CEFBS_UseHVXV62, // V6_vsubuwsat_dv_alt = 712
    CEFBS_UseHVXV60, // V6_vsubw_alt = 713
    CEFBS_UseHVXV60, // V6_vsubw_dv_alt = 714
    CEFBS_UseHVXV60, // V6_vsubwnq_alt = 715
    CEFBS_UseHVXV60, // V6_vsubwq_alt = 716
    CEFBS_UseHVXV60, // V6_vsubwsat_alt = 717
    CEFBS_UseHVXV60, // V6_vsubwsat_dv_alt = 718
    CEFBS_UseHVXV60, // V6_vtmpyb_acc_alt = 719
    CEFBS_UseHVXV60, // V6_vtmpyb_alt = 720
    CEFBS_UseHVXV60, // V6_vtmpybus_acc_alt = 721
    CEFBS_UseHVXV60, // V6_vtmpybus_alt = 722
    CEFBS_UseHVXV60, // V6_vtmpyhb_acc_alt = 723
    CEFBS_UseHVXV60, // V6_vtmpyhb_alt = 724
    CEFBS_UseHVXV60, // V6_vtran2x2_map = 725
    CEFBS_UseHVXV60, // V6_vunpackb_alt = 726
    CEFBS_UseHVXV60, // V6_vunpackh_alt = 727
    CEFBS_UseHVXV60, // V6_vunpackob_alt = 728
    CEFBS_UseHVXV60, // V6_vunpackoh_alt = 729
    CEFBS_UseHVXV60, // V6_vunpackub_alt = 730
    CEFBS_UseHVXV60, // V6_vunpackuh_alt = 731
    CEFBS_UseHVXV60, // V6_vzb_alt = 732
    CEFBS_UseHVXV60, // V6_vzh_alt = 733
    CEFBS_UseHVXV66, // V6_zld0 = 734
    CEFBS_UseHVXV66, // V6_zldp0 = 735
    CEFBS_None, // Y2_dcfetch = 736
    CEFBS_None, // A2_abs = 737
    CEFBS_None, // A2_absp = 738
    CEFBS_None, // A2_abssat = 739
    CEFBS_None, // A2_add = 740
    CEFBS_None, // A2_addh_h16_hh = 741
    CEFBS_None, // A2_addh_h16_hl = 742
    CEFBS_None, // A2_addh_h16_lh = 743
    CEFBS_None, // A2_addh_h16_ll = 744
    CEFBS_None, // A2_addh_h16_sat_hh = 745
    CEFBS_None, // A2_addh_h16_sat_hl = 746
    CEFBS_None, // A2_addh_h16_sat_lh = 747
    CEFBS_None, // A2_addh_h16_sat_ll = 748
    CEFBS_None, // A2_addh_l16_hl = 749
    CEFBS_None, // A2_addh_l16_ll = 750
    CEFBS_None, // A2_addh_l16_sat_hl = 751
    CEFBS_None, // A2_addh_l16_sat_ll = 752
    CEFBS_None, // A2_addi = 753
    CEFBS_None, // A2_addp = 754
    CEFBS_None, // A2_addpsat = 755
    CEFBS_None, // A2_addsat = 756
    CEFBS_None, // A2_addsph = 757
    CEFBS_None, // A2_addspl = 758
    CEFBS_None, // A2_and = 759
    CEFBS_None, // A2_andir = 760
    CEFBS_None, // A2_andp = 761
    CEFBS_None, // A2_aslh = 762
    CEFBS_None, // A2_asrh = 763
    CEFBS_None, // A2_combine_hh = 764
    CEFBS_None, // A2_combine_hl = 765
    CEFBS_None, // A2_combine_lh = 766
    CEFBS_None, // A2_combine_ll = 767
    CEFBS_None, // A2_combineii = 768
    CEFBS_None, // A2_combinew = 769
    CEFBS_None, // A2_max = 770
    CEFBS_None, // A2_maxp = 771
    CEFBS_None, // A2_maxu = 772
    CEFBS_None, // A2_maxup = 773
    CEFBS_None, // A2_min = 774
    CEFBS_None, // A2_minp = 775
    CEFBS_None, // A2_minu = 776
    CEFBS_None, // A2_minup = 777
    CEFBS_None, // A2_negp = 778
    CEFBS_None, // A2_negsat = 779
    CEFBS_None, // A2_nop = 780
    CEFBS_None, // A2_notp = 781
    CEFBS_None, // A2_or = 782
    CEFBS_None, // A2_orir = 783
    CEFBS_None, // A2_orp = 784
    CEFBS_None, // A2_paddf = 785
    CEFBS_None, // A2_paddfnew = 786
    CEFBS_None, // A2_paddif = 787
    CEFBS_None, // A2_paddifnew = 788
    CEFBS_None, // A2_paddit = 789
    CEFBS_None, // A2_padditnew = 790
    CEFBS_None, // A2_paddt = 791
    CEFBS_None, // A2_paddtnew = 792
    CEFBS_None, // A2_pandf = 793
    CEFBS_None, // A2_pandfnew = 794
    CEFBS_None, // A2_pandt = 795
    CEFBS_None, // A2_pandtnew = 796
    CEFBS_None, // A2_porf = 797
    CEFBS_None, // A2_porfnew = 798
    CEFBS_None, // A2_port = 799
    CEFBS_None, // A2_portnew = 800
    CEFBS_None, // A2_psubf = 801
    CEFBS_None, // A2_psubfnew = 802
    CEFBS_None, // A2_psubt = 803
    CEFBS_None, // A2_psubtnew = 804
    CEFBS_None, // A2_pxorf = 805
    CEFBS_None, // A2_pxorfnew = 806
    CEFBS_None, // A2_pxort = 807
    CEFBS_None, // A2_pxortnew = 808
    CEFBS_None, // A2_roundsat = 809
    CEFBS_None, // A2_sat = 810
    CEFBS_None, // A2_satb = 811
    CEFBS_None, // A2_sath = 812
    CEFBS_None, // A2_satub = 813
    CEFBS_None, // A2_satuh = 814
    CEFBS_None, // A2_sub = 815
    CEFBS_None, // A2_subh_h16_hh = 816
    CEFBS_None, // A2_subh_h16_hl = 817
    CEFBS_None, // A2_subh_h16_lh = 818
    CEFBS_None, // A2_subh_h16_ll = 819
    CEFBS_None, // A2_subh_h16_sat_hh = 820
    CEFBS_None, // A2_subh_h16_sat_hl = 821
    CEFBS_None, // A2_subh_h16_sat_lh = 822
    CEFBS_None, // A2_subh_h16_sat_ll = 823
    CEFBS_None, // A2_subh_l16_hl = 824
    CEFBS_None, // A2_subh_l16_ll = 825
    CEFBS_None, // A2_subh_l16_sat_hl = 826
    CEFBS_None, // A2_subh_l16_sat_ll = 827
    CEFBS_None, // A2_subp = 828
    CEFBS_None, // A2_subri = 829
    CEFBS_None, // A2_subsat = 830
    CEFBS_None, // A2_svaddh = 831
    CEFBS_None, // A2_svaddhs = 832
    CEFBS_None, // A2_svadduhs = 833
    CEFBS_None, // A2_svavgh = 834
    CEFBS_None, // A2_svavghs = 835
    CEFBS_None, // A2_svnavgh = 836
    CEFBS_None, // A2_svsubh = 837
    CEFBS_None, // A2_svsubhs = 838
    CEFBS_None, // A2_svsubuhs = 839
    CEFBS_None, // A2_swiz = 840
    CEFBS_None, // A2_sxtb = 841
    CEFBS_None, // A2_sxth = 842
    CEFBS_None, // A2_sxtw = 843
    CEFBS_None, // A2_tfr = 844
    CEFBS_None, // A2_tfrcrr = 845
    CEFBS_None, // A2_tfrih = 846
    CEFBS_None, // A2_tfril = 847
    CEFBS_None, // A2_tfrrcr = 848
    CEFBS_None, // A2_tfrsi = 849
    CEFBS_None, // A2_vabsh = 850
    CEFBS_None, // A2_vabshsat = 851
    CEFBS_None, // A2_vabsw = 852
    CEFBS_None, // A2_vabswsat = 853
    CEFBS_None, // A2_vaddh = 854
    CEFBS_None, // A2_vaddhs = 855
    CEFBS_None, // A2_vaddub = 856
    CEFBS_None, // A2_vaddubs = 857
    CEFBS_None, // A2_vadduhs = 858
    CEFBS_None, // A2_vaddw = 859
    CEFBS_None, // A2_vaddws = 860
    CEFBS_None, // A2_vavgh = 861
    CEFBS_None, // A2_vavghcr = 862
    CEFBS_None, // A2_vavghr = 863
    CEFBS_None, // A2_vavgub = 864
    CEFBS_None, // A2_vavgubr = 865
    CEFBS_None, // A2_vavguh = 866
    CEFBS_None, // A2_vavguhr = 867
    CEFBS_None, // A2_vavguw = 868
    CEFBS_None, // A2_vavguwr = 869
    CEFBS_None, // A2_vavgw = 870
    CEFBS_None, // A2_vavgwcr = 871
    CEFBS_None, // A2_vavgwr = 872
    CEFBS_None, // A2_vcmpbeq = 873
    CEFBS_None, // A2_vcmpbgtu = 874
    CEFBS_None, // A2_vcmpheq = 875
    CEFBS_None, // A2_vcmphgt = 876
    CEFBS_None, // A2_vcmphgtu = 877
    CEFBS_None, // A2_vcmpweq = 878
    CEFBS_None, // A2_vcmpwgt = 879
    CEFBS_None, // A2_vcmpwgtu = 880
    CEFBS_None, // A2_vconj = 881
    CEFBS_None, // A2_vmaxb = 882
    CEFBS_None, // A2_vmaxh = 883
    CEFBS_None, // A2_vmaxub = 884
    CEFBS_None, // A2_vmaxuh = 885
    CEFBS_None, // A2_vmaxuw = 886
    CEFBS_None, // A2_vmaxw = 887
    CEFBS_None, // A2_vminb = 888
    CEFBS_None, // A2_vminh = 889
    CEFBS_None, // A2_vminub = 890
    CEFBS_None, // A2_vminuh = 891
    CEFBS_None, // A2_vminuw = 892
    CEFBS_None, // A2_vminw = 893
    CEFBS_None, // A2_vnavgh = 894
    CEFBS_None, // A2_vnavghcr = 895
    CEFBS_None, // A2_vnavghr = 896
    CEFBS_None, // A2_vnavgw = 897
    CEFBS_None, // A2_vnavgwcr = 898
    CEFBS_None, // A2_vnavgwr = 899
    CEFBS_None, // A2_vraddub = 900
    CEFBS_None, // A2_vraddub_acc = 901
    CEFBS_None, // A2_vrsadub = 902
    CEFBS_None, // A2_vrsadub_acc = 903
    CEFBS_None, // A2_vsubh = 904
    CEFBS_None, // A2_vsubhs = 905
    CEFBS_None, // A2_vsubub = 906
    CEFBS_None, // A2_vsububs = 907
    CEFBS_None, // A2_vsubuhs = 908
    CEFBS_None, // A2_vsubw = 909
    CEFBS_None, // A2_vsubws = 910
    CEFBS_None, // A2_xor = 911
    CEFBS_None, // A2_xorp = 912
    CEFBS_None, // A2_zxth = 913
    CEFBS_None, // A4_addp_c = 914
    CEFBS_None, // A4_andn = 915
    CEFBS_None, // A4_andnp = 916
    CEFBS_None, // A4_bitsplit = 917
    CEFBS_None, // A4_bitspliti = 918
    CEFBS_None, // A4_boundscheck_hi = 919
    CEFBS_None, // A4_boundscheck_lo = 920
    CEFBS_None, // A4_cmpbeq = 921
    CEFBS_None, // A4_cmpbeqi = 922
    CEFBS_None, // A4_cmpbgt = 923
    CEFBS_None, // A4_cmpbgti = 924
    CEFBS_None, // A4_cmpbgtu = 925
    CEFBS_None, // A4_cmpbgtui = 926
    CEFBS_None, // A4_cmpheq = 927
    CEFBS_None, // A4_cmpheqi = 928
    CEFBS_None, // A4_cmphgt = 929
    CEFBS_None, // A4_cmphgti = 930
    CEFBS_None, // A4_cmphgtu = 931
    CEFBS_None, // A4_cmphgtui = 932
    CEFBS_None, // A4_combineii = 933
    CEFBS_None, // A4_combineir = 934
    CEFBS_None, // A4_combineri = 935
    CEFBS_None, // A4_cround_ri = 936
    CEFBS_None, // A4_cround_rr = 937
    CEFBS_None, // A4_ext = 938
    CEFBS_None, // A4_modwrapu = 939
    CEFBS_None, // A4_orn = 940
    CEFBS_None, // A4_ornp = 941
    CEFBS_None, // A4_paslhf = 942
    CEFBS_None, // A4_paslhfnew = 943
    CEFBS_None, // A4_paslht = 944
    CEFBS_None, // A4_paslhtnew = 945
    CEFBS_None, // A4_pasrhf = 946
    CEFBS_None, // A4_pasrhfnew = 947
    CEFBS_None, // A4_pasrht = 948
    CEFBS_None, // A4_pasrhtnew = 949
    CEFBS_None, // A4_psxtbf = 950
    CEFBS_None, // A4_psxtbfnew = 951
    CEFBS_None, // A4_psxtbt = 952
    CEFBS_None, // A4_psxtbtnew = 953
    CEFBS_None, // A4_psxthf = 954
    CEFBS_None, // A4_psxthfnew = 955
    CEFBS_None, // A4_psxtht = 956
    CEFBS_None, // A4_psxthtnew = 957
    CEFBS_None, // A4_pzxtbf = 958
    CEFBS_None, // A4_pzxtbfnew = 959
    CEFBS_None, // A4_pzxtbt = 960
    CEFBS_None, // A4_pzxtbtnew = 961
    CEFBS_None, // A4_pzxthf = 962
    CEFBS_None, // A4_pzxthfnew = 963
    CEFBS_None, // A4_pzxtht = 964
    CEFBS_None, // A4_pzxthtnew = 965
    CEFBS_None, // A4_rcmpeq = 966
    CEFBS_None, // A4_rcmpeqi = 967
    CEFBS_None, // A4_rcmpneq = 968
    CEFBS_None, // A4_rcmpneqi = 969
    CEFBS_None, // A4_round_ri = 970
    CEFBS_None, // A4_round_ri_sat = 971
    CEFBS_None, // A4_round_rr = 972
    CEFBS_None, // A4_round_rr_sat = 973
    CEFBS_None, // A4_subp_c = 974
    CEFBS_None, // A4_tfrcpp = 975
    CEFBS_None, // A4_tfrpcp = 976
    CEFBS_None, // A4_tlbmatch = 977
    CEFBS_None, // A4_vcmpbeq_any = 978
    CEFBS_None, // A4_vcmpbeqi = 979
    CEFBS_None, // A4_vcmpbgt = 980
    CEFBS_None, // A4_vcmpbgti = 981
    CEFBS_None, // A4_vcmpbgtui = 982
    CEFBS_None, // A4_vcmpheqi = 983
    CEFBS_None, // A4_vcmphgti = 984
    CEFBS_None, // A4_vcmphgtui = 985
    CEFBS_None, // A4_vcmpweqi = 986
    CEFBS_None, // A4_vcmpwgti = 987
    CEFBS_None, // A4_vcmpwgtui = 988
    CEFBS_None, // A4_vrmaxh = 989
    CEFBS_None, // A4_vrmaxuh = 990
    CEFBS_None, // A4_vrmaxuw = 991
    CEFBS_None, // A4_vrmaxw = 992
    CEFBS_None, // A4_vrminh = 993
    CEFBS_None, // A4_vrminuh = 994
    CEFBS_None, // A4_vrminuw = 995
    CEFBS_None, // A4_vrminw = 996
    CEFBS_HasV55, // A5_ACS = 997
    CEFBS_None, // A5_vaddhubs = 998
    CEFBS_HasV65, // A6_vcmpbeq_notany = 999
    CEFBS_HasV62, // A6_vminub_RdP = 1000
    CEFBS_None, // C2_all8 = 1001
    CEFBS_None, // C2_and = 1002
    CEFBS_None, // C2_andn = 1003
    CEFBS_None, // C2_any8 = 1004
    CEFBS_None, // C2_bitsclr = 1005
    CEFBS_None, // C2_bitsclri = 1006
    CEFBS_None, // C2_bitsset = 1007
    CEFBS_None, // C2_ccombinewf = 1008
    CEFBS_None, // C2_ccombinewnewf = 1009
    CEFBS_None, // C2_ccombinewnewt = 1010
    CEFBS_None, // C2_ccombinewt = 1011
    CEFBS_None, // C2_cmoveif = 1012
    CEFBS_None, // C2_cmoveit = 1013
    CEFBS_None, // C2_cmovenewif = 1014
    CEFBS_None, // C2_cmovenewit = 1015
    CEFBS_None, // C2_cmpeq = 1016
    CEFBS_None, // C2_cmpeqi = 1017
    CEFBS_None, // C2_cmpeqp = 1018
    CEFBS_None, // C2_cmpgt = 1019
    CEFBS_None, // C2_cmpgti = 1020
    CEFBS_None, // C2_cmpgtp = 1021
    CEFBS_None, // C2_cmpgtu = 1022
    CEFBS_None, // C2_cmpgtui = 1023
    CEFBS_None, // C2_cmpgtup = 1024
    CEFBS_None, // C2_mask = 1025
    CEFBS_None, // C2_mux = 1026
    CEFBS_None, // C2_muxii = 1027
    CEFBS_None, // C2_muxir = 1028
    CEFBS_None, // C2_muxri = 1029
    CEFBS_None, // C2_not = 1030
    CEFBS_None, // C2_or = 1031
    CEFBS_None, // C2_orn = 1032
    CEFBS_None, // C2_tfrpr = 1033
    CEFBS_None, // C2_tfrrp = 1034
    CEFBS_None, // C2_vitpack = 1035
    CEFBS_None, // C2_vmux = 1036
    CEFBS_None, // C2_xor = 1037
    CEFBS_None, // C4_addipc = 1038
    CEFBS_None, // C4_and_and = 1039
    CEFBS_None, // C4_and_andn = 1040
    CEFBS_None, // C4_and_or = 1041
    CEFBS_None, // C4_and_orn = 1042
    CEFBS_None, // C4_cmplte = 1043
    CEFBS_None, // C4_cmpltei = 1044
    CEFBS_None, // C4_cmplteu = 1045
    CEFBS_None, // C4_cmplteui = 1046
    CEFBS_None, // C4_cmpneq = 1047
    CEFBS_None, // C4_cmpneqi = 1048
    CEFBS_None, // C4_fastcorner9 = 1049
    CEFBS_None, // C4_fastcorner9_not = 1050
    CEFBS_None, // C4_nbitsclr = 1051
    CEFBS_None, // C4_nbitsclri = 1052
    CEFBS_None, // C4_nbitsset = 1053
    CEFBS_None, // C4_or_and = 1054
    CEFBS_None, // C4_or_andn = 1055
    CEFBS_None, // C4_or_or = 1056
    CEFBS_None, // C4_or_orn = 1057
    CEFBS_None, // CALLProfile = 1058
    CEFBS_None, // CONST32 = 1059
    CEFBS_None, // CONST64 = 1060
    CEFBS_None, // DuplexIClass0 = 1061
    CEFBS_None, // DuplexIClass1 = 1062
    CEFBS_None, // DuplexIClass2 = 1063
    CEFBS_None, // DuplexIClass3 = 1064
    CEFBS_None, // DuplexIClass4 = 1065
    CEFBS_None, // DuplexIClass5 = 1066
    CEFBS_None, // DuplexIClass6 = 1067
    CEFBS_None, // DuplexIClass7 = 1068
    CEFBS_None, // DuplexIClass8 = 1069
    CEFBS_None, // DuplexIClass9 = 1070
    CEFBS_None, // DuplexIClassA = 1071
    CEFBS_None, // DuplexIClassB = 1072
    CEFBS_None, // DuplexIClassC = 1073
    CEFBS_None, // DuplexIClassD = 1074
    CEFBS_None, // DuplexIClassE = 1075
    CEFBS_None, // DuplexIClassF = 1076
    CEFBS_None, // EH_RETURN_JMPR = 1077
    CEFBS_None, // F2_conv_d2df = 1078
    CEFBS_None, // F2_conv_d2sf = 1079
    CEFBS_None, // F2_conv_df2d = 1080
    CEFBS_None, // F2_conv_df2d_chop = 1081
    CEFBS_None, // F2_conv_df2sf = 1082
    CEFBS_None, // F2_conv_df2ud = 1083
    CEFBS_None, // F2_conv_df2ud_chop = 1084
    CEFBS_None, // F2_conv_df2uw = 1085
    CEFBS_None, // F2_conv_df2uw_chop = 1086
    CEFBS_None, // F2_conv_df2w = 1087
    CEFBS_None, // F2_conv_df2w_chop = 1088
    CEFBS_None, // F2_conv_sf2d = 1089
    CEFBS_None, // F2_conv_sf2d_chop = 1090
    CEFBS_None, // F2_conv_sf2df = 1091
    CEFBS_None, // F2_conv_sf2ud = 1092
    CEFBS_None, // F2_conv_sf2ud_chop = 1093
    CEFBS_None, // F2_conv_sf2uw = 1094
    CEFBS_None, // F2_conv_sf2uw_chop = 1095
    CEFBS_None, // F2_conv_sf2w = 1096
    CEFBS_None, // F2_conv_sf2w_chop = 1097
    CEFBS_None, // F2_conv_ud2df = 1098
    CEFBS_None, // F2_conv_ud2sf = 1099
    CEFBS_None, // F2_conv_uw2df = 1100
    CEFBS_None, // F2_conv_uw2sf = 1101
    CEFBS_None, // F2_conv_w2df = 1102
    CEFBS_None, // F2_conv_w2sf = 1103
    CEFBS_HasV66, // F2_dfadd = 1104
    CEFBS_None, // F2_dfclass = 1105
    CEFBS_None, // F2_dfcmpeq = 1106
    CEFBS_None, // F2_dfcmpge = 1107
    CEFBS_None, // F2_dfcmpgt = 1108
    CEFBS_None, // F2_dfcmpuo = 1109
    CEFBS_None, // F2_dfimm_n = 1110
    CEFBS_None, // F2_dfimm_p = 1111
    CEFBS_HasV66, // F2_dfsub = 1112
    CEFBS_None, // F2_sfadd = 1113
    CEFBS_None, // F2_sfclass = 1114
    CEFBS_None, // F2_sfcmpeq = 1115
    CEFBS_None, // F2_sfcmpge = 1116
    CEFBS_None, // F2_sfcmpgt = 1117
    CEFBS_None, // F2_sfcmpuo = 1118
    CEFBS_None, // F2_sffixupd = 1119
    CEFBS_None, // F2_sffixupn = 1120
    CEFBS_None, // F2_sffixupr = 1121
    CEFBS_None, // F2_sffma = 1122
    CEFBS_None, // F2_sffma_lib = 1123
    CEFBS_None, // F2_sffma_sc = 1124
    CEFBS_None, // F2_sffms = 1125
    CEFBS_None, // F2_sffms_lib = 1126
    CEFBS_None, // F2_sfimm_n = 1127
    CEFBS_None, // F2_sfimm_p = 1128
    CEFBS_None, // F2_sfinvsqrta = 1129
    CEFBS_None, // F2_sfmax = 1130
    CEFBS_None, // F2_sfmin = 1131
    CEFBS_None, // F2_sfmpy = 1132
    CEFBS_None, // F2_sfrecipa = 1133
    CEFBS_None, // F2_sfsub = 1134
    CEFBS_None, // G4_tfrgcpp = 1135
    CEFBS_None, // G4_tfrgcrr = 1136
    CEFBS_None, // G4_tfrgpcp = 1137
    CEFBS_None, // G4_tfrgrcr = 1138
    CEFBS_None, // HI = 1139
    CEFBS_None, // J2_call = 1140
    CEFBS_None, // J2_callf = 1141
    CEFBS_None, // J2_callr = 1142
    CEFBS_None, // J2_callrf = 1143
    CEFBS_None, // J2_callrt = 1144
    CEFBS_None, // J2_callt = 1145
    CEFBS_None, // J2_jump = 1146
    CEFBS_None, // J2_jumpf = 1147
    CEFBS_None, // J2_jumpfnew = 1148
    CEFBS_None, // J2_jumpfnewpt = 1149
    CEFBS_HasV60, // J2_jumpfpt = 1150
    CEFBS_None, // J2_jumpr = 1151
    CEFBS_None, // J2_jumprf = 1152
    CEFBS_None, // J2_jumprfnew = 1153
    CEFBS_None, // J2_jumprfnewpt = 1154
    CEFBS_HasV60, // J2_jumprfpt = 1155
    CEFBS_None, // J2_jumprgtez = 1156
    CEFBS_None, // J2_jumprgtezpt = 1157
    CEFBS_None, // J2_jumprltez = 1158
    CEFBS_None, // J2_jumprltezpt = 1159
    CEFBS_None, // J2_jumprnz = 1160
    CEFBS_None, // J2_jumprnzpt = 1161
    CEFBS_None, // J2_jumprt = 1162
    CEFBS_None, // J2_jumprtnew = 1163
    CEFBS_None, // J2_jumprtnewpt = 1164
    CEFBS_HasV60, // J2_jumprtpt = 1165
    CEFBS_None, // J2_jumprz = 1166
    CEFBS_None, // J2_jumprzpt = 1167
    CEFBS_None, // J2_jumpt = 1168
    CEFBS_None, // J2_jumptnew = 1169
    CEFBS_None, // J2_jumptnewpt = 1170
    CEFBS_HasV60, // J2_jumptpt = 1171
    CEFBS_None, // J2_loop0i = 1172
    CEFBS_None, // J2_loop0iext = 1173
    CEFBS_None, // J2_loop0r = 1174
    CEFBS_None, // J2_loop0rext = 1175
    CEFBS_None, // J2_loop1i = 1176
    CEFBS_None, // J2_loop1iext = 1177
    CEFBS_None, // J2_loop1r = 1178
    CEFBS_None, // J2_loop1rext = 1179
    CEFBS_None, // J2_pause = 1180
    CEFBS_None, // J2_ploop1si = 1181
    CEFBS_None, // J2_ploop1sr = 1182
    CEFBS_None, // J2_ploop2si = 1183
    CEFBS_None, // J2_ploop2sr = 1184
    CEFBS_None, // J2_ploop3si = 1185
    CEFBS_None, // J2_ploop3sr = 1186
    CEFBS_None, // J2_trap0 = 1187
    CEFBS_None, // J2_trap1 = 1188
    CEFBS_None, // J4_cmpeq_f_jumpnv_nt = 1189
    CEFBS_None, // J4_cmpeq_f_jumpnv_t = 1190
    CEFBS_None, // J4_cmpeq_fp0_jump_nt = 1191
    CEFBS_None, // J4_cmpeq_fp0_jump_t = 1192
    CEFBS_None, // J4_cmpeq_fp1_jump_nt = 1193
    CEFBS_None, // J4_cmpeq_fp1_jump_t = 1194
    CEFBS_None, // J4_cmpeq_t_jumpnv_nt = 1195
    CEFBS_None, // J4_cmpeq_t_jumpnv_t = 1196
    CEFBS_None, // J4_cmpeq_tp0_jump_nt = 1197
    CEFBS_None, // J4_cmpeq_tp0_jump_t = 1198
    CEFBS_None, // J4_cmpeq_tp1_jump_nt = 1199
    CEFBS_None, // J4_cmpeq_tp1_jump_t = 1200
    CEFBS_None, // J4_cmpeqi_f_jumpnv_nt = 1201
    CEFBS_None, // J4_cmpeqi_f_jumpnv_t = 1202
    CEFBS_None, // J4_cmpeqi_fp0_jump_nt = 1203
    CEFBS_None, // J4_cmpeqi_fp0_jump_t = 1204
    CEFBS_None, // J4_cmpeqi_fp1_jump_nt = 1205
    CEFBS_None, // J4_cmpeqi_fp1_jump_t = 1206
    CEFBS_None, // J4_cmpeqi_t_jumpnv_nt = 1207
    CEFBS_None, // J4_cmpeqi_t_jumpnv_t = 1208
    CEFBS_None, // J4_cmpeqi_tp0_jump_nt = 1209
    CEFBS_None, // J4_cmpeqi_tp0_jump_t = 1210
    CEFBS_None, // J4_cmpeqi_tp1_jump_nt = 1211
    CEFBS_None, // J4_cmpeqi_tp1_jump_t = 1212
    CEFBS_None, // J4_cmpeqn1_f_jumpnv_nt = 1213
    CEFBS_None, // J4_cmpeqn1_f_jumpnv_t = 1214
    CEFBS_None, // J4_cmpeqn1_fp0_jump_nt = 1215
    CEFBS_None, // J4_cmpeqn1_fp0_jump_t = 1216
    CEFBS_None, // J4_cmpeqn1_fp1_jump_nt = 1217
    CEFBS_None, // J4_cmpeqn1_fp1_jump_t = 1218
    CEFBS_None, // J4_cmpeqn1_t_jumpnv_nt = 1219
    CEFBS_None, // J4_cmpeqn1_t_jumpnv_t = 1220
    CEFBS_None, // J4_cmpeqn1_tp0_jump_nt = 1221
    CEFBS_None, // J4_cmpeqn1_tp0_jump_t = 1222
    CEFBS_None, // J4_cmpeqn1_tp1_jump_nt = 1223
    CEFBS_None, // J4_cmpeqn1_tp1_jump_t = 1224
    CEFBS_None, // J4_cmpgt_f_jumpnv_nt = 1225
    CEFBS_None, // J4_cmpgt_f_jumpnv_t = 1226
    CEFBS_None, // J4_cmpgt_fp0_jump_nt = 1227
    CEFBS_None, // J4_cmpgt_fp0_jump_t = 1228
    CEFBS_None, // J4_cmpgt_fp1_jump_nt = 1229
    CEFBS_None, // J4_cmpgt_fp1_jump_t = 1230
    CEFBS_None, // J4_cmpgt_t_jumpnv_nt = 1231
    CEFBS_None, // J4_cmpgt_t_jumpnv_t = 1232
    CEFBS_None, // J4_cmpgt_tp0_jump_nt = 1233
    CEFBS_None, // J4_cmpgt_tp0_jump_t = 1234
    CEFBS_None, // J4_cmpgt_tp1_jump_nt = 1235
    CEFBS_None, // J4_cmpgt_tp1_jump_t = 1236
    CEFBS_None, // J4_cmpgti_f_jumpnv_nt = 1237
    CEFBS_None, // J4_cmpgti_f_jumpnv_t = 1238
    CEFBS_None, // J4_cmpgti_fp0_jump_nt = 1239
    CEFBS_None, // J4_cmpgti_fp0_jump_t = 1240
    CEFBS_None, // J4_cmpgti_fp1_jump_nt = 1241
    CEFBS_None, // J4_cmpgti_fp1_jump_t = 1242
    CEFBS_None, // J4_cmpgti_t_jumpnv_nt = 1243
    CEFBS_None, // J4_cmpgti_t_jumpnv_t = 1244
    CEFBS_None, // J4_cmpgti_tp0_jump_nt = 1245
    CEFBS_None, // J4_cmpgti_tp0_jump_t = 1246
    CEFBS_None, // J4_cmpgti_tp1_jump_nt = 1247
    CEFBS_None, // J4_cmpgti_tp1_jump_t = 1248
    CEFBS_None, // J4_cmpgtn1_f_jumpnv_nt = 1249
    CEFBS_None, // J4_cmpgtn1_f_jumpnv_t = 1250
    CEFBS_None, // J4_cmpgtn1_fp0_jump_nt = 1251
    CEFBS_None, // J4_cmpgtn1_fp0_jump_t = 1252
    CEFBS_None, // J4_cmpgtn1_fp1_jump_nt = 1253
    CEFBS_None, // J4_cmpgtn1_fp1_jump_t = 1254
    CEFBS_None, // J4_cmpgtn1_t_jumpnv_nt = 1255
    CEFBS_None, // J4_cmpgtn1_t_jumpnv_t = 1256
    CEFBS_None, // J4_cmpgtn1_tp0_jump_nt = 1257
    CEFBS_None, // J4_cmpgtn1_tp0_jump_t = 1258
    CEFBS_None, // J4_cmpgtn1_tp1_jump_nt = 1259
    CEFBS_None, // J4_cmpgtn1_tp1_jump_t = 1260
    CEFBS_None, // J4_cmpgtu_f_jumpnv_nt = 1261
    CEFBS_None, // J4_cmpgtu_f_jumpnv_t = 1262
    CEFBS_None, // J4_cmpgtu_fp0_jump_nt = 1263
    CEFBS_None, // J4_cmpgtu_fp0_jump_t = 1264
    CEFBS_None, // J4_cmpgtu_fp1_jump_nt = 1265
    CEFBS_None, // J4_cmpgtu_fp1_jump_t = 1266
    CEFBS_None, // J4_cmpgtu_t_jumpnv_nt = 1267
    CEFBS_None, // J4_cmpgtu_t_jumpnv_t = 1268
    CEFBS_None, // J4_cmpgtu_tp0_jump_nt = 1269
    CEFBS_None, // J4_cmpgtu_tp0_jump_t = 1270
    CEFBS_None, // J4_cmpgtu_tp1_jump_nt = 1271
    CEFBS_None, // J4_cmpgtu_tp1_jump_t = 1272
    CEFBS_None, // J4_cmpgtui_f_jumpnv_nt = 1273
    CEFBS_None, // J4_cmpgtui_f_jumpnv_t = 1274
    CEFBS_None, // J4_cmpgtui_fp0_jump_nt = 1275
    CEFBS_None, // J4_cmpgtui_fp0_jump_t = 1276
    CEFBS_None, // J4_cmpgtui_fp1_jump_nt = 1277
    CEFBS_None, // J4_cmpgtui_fp1_jump_t = 1278
    CEFBS_None, // J4_cmpgtui_t_jumpnv_nt = 1279
    CEFBS_None, // J4_cmpgtui_t_jumpnv_t = 1280
    CEFBS_None, // J4_cmpgtui_tp0_jump_nt = 1281
    CEFBS_None, // J4_cmpgtui_tp0_jump_t = 1282
    CEFBS_None, // J4_cmpgtui_tp1_jump_nt = 1283
    CEFBS_None, // J4_cmpgtui_tp1_jump_t = 1284
    CEFBS_None, // J4_cmplt_f_jumpnv_nt = 1285
    CEFBS_None, // J4_cmplt_f_jumpnv_t = 1286
    CEFBS_None, // J4_cmplt_t_jumpnv_nt = 1287
    CEFBS_None, // J4_cmplt_t_jumpnv_t = 1288
    CEFBS_None, // J4_cmpltu_f_jumpnv_nt = 1289
    CEFBS_None, // J4_cmpltu_f_jumpnv_t = 1290
    CEFBS_None, // J4_cmpltu_t_jumpnv_nt = 1291
    CEFBS_None, // J4_cmpltu_t_jumpnv_t = 1292
    CEFBS_None, // J4_hintjumpr = 1293
    CEFBS_None, // J4_jumpseti = 1294
    CEFBS_None, // J4_jumpsetr = 1295
    CEFBS_None, // J4_tstbit0_f_jumpnv_nt = 1296
    CEFBS_None, // J4_tstbit0_f_jumpnv_t = 1297
    CEFBS_None, // J4_tstbit0_fp0_jump_nt = 1298
    CEFBS_None, // J4_tstbit0_fp0_jump_t = 1299
    CEFBS_None, // J4_tstbit0_fp1_jump_nt = 1300
    CEFBS_None, // J4_tstbit0_fp1_jump_t = 1301
    CEFBS_None, // J4_tstbit0_t_jumpnv_nt = 1302
    CEFBS_None, // J4_tstbit0_t_jumpnv_t = 1303
    CEFBS_None, // J4_tstbit0_tp0_jump_nt = 1304
    CEFBS_None, // J4_tstbit0_tp0_jump_t = 1305
    CEFBS_None, // J4_tstbit0_tp1_jump_nt = 1306
    CEFBS_None, // J4_tstbit0_tp1_jump_t = 1307
    CEFBS_None, // L2_deallocframe = 1308
    CEFBS_None, // L2_loadalignb_io = 1309
    CEFBS_None, // L2_loadalignb_pbr = 1310
    CEFBS_None, // L2_loadalignb_pci = 1311
    CEFBS_None, // L2_loadalignb_pcr = 1312
    CEFBS_None, // L2_loadalignb_pi = 1313
    CEFBS_None, // L2_loadalignb_pr = 1314
    CEFBS_None, // L2_loadalignh_io = 1315
    CEFBS_None, // L2_loadalignh_pbr = 1316
    CEFBS_None, // L2_loadalignh_pci = 1317
    CEFBS_None, // L2_loadalignh_pcr = 1318
    CEFBS_None, // L2_loadalignh_pi = 1319
    CEFBS_None, // L2_loadalignh_pr = 1320
    CEFBS_None, // L2_loadbsw2_io = 1321
    CEFBS_None, // L2_loadbsw2_pbr = 1322
    CEFBS_None, // L2_loadbsw2_pci = 1323
    CEFBS_None, // L2_loadbsw2_pcr = 1324
    CEFBS_None, // L2_loadbsw2_pi = 1325
    CEFBS_None, // L2_loadbsw2_pr = 1326
    CEFBS_None, // L2_loadbsw4_io = 1327
    CEFBS_None, // L2_loadbsw4_pbr = 1328
    CEFBS_None, // L2_loadbsw4_pci = 1329
    CEFBS_None, // L2_loadbsw4_pcr = 1330
    CEFBS_None, // L2_loadbsw4_pi = 1331
    CEFBS_None, // L2_loadbsw4_pr = 1332
    CEFBS_None, // L2_loadbzw2_io = 1333
    CEFBS_None, // L2_loadbzw2_pbr = 1334
    CEFBS_None, // L2_loadbzw2_pci = 1335
    CEFBS_None, // L2_loadbzw2_pcr = 1336
    CEFBS_None, // L2_loadbzw2_pi = 1337
    CEFBS_None, // L2_loadbzw2_pr = 1338
    CEFBS_None, // L2_loadbzw4_io = 1339
    CEFBS_None, // L2_loadbzw4_pbr = 1340
    CEFBS_None, // L2_loadbzw4_pci = 1341
    CEFBS_None, // L2_loadbzw4_pcr = 1342
    CEFBS_None, // L2_loadbzw4_pi = 1343
    CEFBS_None, // L2_loadbzw4_pr = 1344
    CEFBS_None, // L2_loadrb_io = 1345
    CEFBS_None, // L2_loadrb_pbr = 1346
    CEFBS_None, // L2_loadrb_pci = 1347
    CEFBS_None, // L2_loadrb_pcr = 1348
    CEFBS_None, // L2_loadrb_pi = 1349
    CEFBS_None, // L2_loadrb_pr = 1350
    CEFBS_None, // L2_loadrbgp = 1351
    CEFBS_None, // L2_loadrd_io = 1352
    CEFBS_None, // L2_loadrd_pbr = 1353
    CEFBS_None, // L2_loadrd_pci = 1354
    CEFBS_None, // L2_loadrd_pcr = 1355
    CEFBS_None, // L2_loadrd_pi = 1356
    CEFBS_None, // L2_loadrd_pr = 1357
    CEFBS_None, // L2_loadrdgp = 1358
    CEFBS_None, // L2_loadrh_io = 1359
    CEFBS_None, // L2_loadrh_pbr = 1360
    CEFBS_None, // L2_loadrh_pci = 1361
    CEFBS_None, // L2_loadrh_pcr = 1362
    CEFBS_None, // L2_loadrh_pi = 1363
    CEFBS_None, // L2_loadrh_pr = 1364
    CEFBS_None, // L2_loadrhgp = 1365
    CEFBS_None, // L2_loadri_io = 1366
    CEFBS_None, // L2_loadri_pbr = 1367
    CEFBS_None, // L2_loadri_pci = 1368
    CEFBS_None, // L2_loadri_pcr = 1369
    CEFBS_None, // L2_loadri_pi = 1370
    CEFBS_None, // L2_loadri_pr = 1371
    CEFBS_None, // L2_loadrigp = 1372
    CEFBS_None, // L2_loadrub_io = 1373
    CEFBS_None, // L2_loadrub_pbr = 1374
    CEFBS_None, // L2_loadrub_pci = 1375
    CEFBS_None, // L2_loadrub_pcr = 1376
    CEFBS_None, // L2_loadrub_pi = 1377
    CEFBS_None, // L2_loadrub_pr = 1378
    CEFBS_None, // L2_loadrubgp = 1379
    CEFBS_None, // L2_loadruh_io = 1380
    CEFBS_None, // L2_loadruh_pbr = 1381
    CEFBS_None, // L2_loadruh_pci = 1382
    CEFBS_None, // L2_loadruh_pcr = 1383
    CEFBS_None, // L2_loadruh_pi = 1384
    CEFBS_None, // L2_loadruh_pr = 1385
    CEFBS_None, // L2_loadruhgp = 1386
    CEFBS_None, // L2_loadw_locked = 1387
    CEFBS_None, // L2_ploadrbf_io = 1388
    CEFBS_None, // L2_ploadrbf_pi = 1389
    CEFBS_None, // L2_ploadrbfnew_io = 1390
    CEFBS_None, // L2_ploadrbfnew_pi = 1391
    CEFBS_None, // L2_ploadrbt_io = 1392
    CEFBS_None, // L2_ploadrbt_pi = 1393
    CEFBS_None, // L2_ploadrbtnew_io = 1394
    CEFBS_None, // L2_ploadrbtnew_pi = 1395
    CEFBS_None, // L2_ploadrdf_io = 1396
    CEFBS_None, // L2_ploadrdf_pi = 1397
    CEFBS_None, // L2_ploadrdfnew_io = 1398
    CEFBS_None, // L2_ploadrdfnew_pi = 1399
    CEFBS_None, // L2_ploadrdt_io = 1400
    CEFBS_None, // L2_ploadrdt_pi = 1401
    CEFBS_None, // L2_ploadrdtnew_io = 1402
    CEFBS_None, // L2_ploadrdtnew_pi = 1403
    CEFBS_None, // L2_ploadrhf_io = 1404
    CEFBS_None, // L2_ploadrhf_pi = 1405
    CEFBS_None, // L2_ploadrhfnew_io = 1406
    CEFBS_None, // L2_ploadrhfnew_pi = 1407
    CEFBS_None, // L2_ploadrht_io = 1408
    CEFBS_None, // L2_ploadrht_pi = 1409
    CEFBS_None, // L2_ploadrhtnew_io = 1410
    CEFBS_None, // L2_ploadrhtnew_pi = 1411
    CEFBS_None, // L2_ploadrif_io = 1412
    CEFBS_None, // L2_ploadrif_pi = 1413
    CEFBS_None, // L2_ploadrifnew_io = 1414
    CEFBS_None, // L2_ploadrifnew_pi = 1415
    CEFBS_None, // L2_ploadrit_io = 1416
    CEFBS_None, // L2_ploadrit_pi = 1417
    CEFBS_None, // L2_ploadritnew_io = 1418
    CEFBS_None, // L2_ploadritnew_pi = 1419
    CEFBS_None, // L2_ploadrubf_io = 1420
    CEFBS_None, // L2_ploadrubf_pi = 1421
    CEFBS_None, // L2_ploadrubfnew_io = 1422
    CEFBS_None, // L2_ploadrubfnew_pi = 1423
    CEFBS_None, // L2_ploadrubt_io = 1424
    CEFBS_None, // L2_ploadrubt_pi = 1425
    CEFBS_None, // L2_ploadrubtnew_io = 1426
    CEFBS_None, // L2_ploadrubtnew_pi = 1427
    CEFBS_None, // L2_ploadruhf_io = 1428
    CEFBS_None, // L2_ploadruhf_pi = 1429
    CEFBS_None, // L2_ploadruhfnew_io = 1430
    CEFBS_None, // L2_ploadruhfnew_pi = 1431
    CEFBS_None, // L2_ploadruht_io = 1432
    CEFBS_None, // L2_ploadruht_pi = 1433
    CEFBS_None, // L2_ploadruhtnew_io = 1434
    CEFBS_None, // L2_ploadruhtnew_pi = 1435
    CEFBS_None, // L4_add_memopb_io = 1436
    CEFBS_None, // L4_add_memoph_io = 1437
    CEFBS_None, // L4_add_memopw_io = 1438
    CEFBS_None, // L4_and_memopb_io = 1439
    CEFBS_None, // L4_and_memoph_io = 1440
    CEFBS_None, // L4_and_memopw_io = 1441
    CEFBS_None, // L4_iadd_memopb_io = 1442
    CEFBS_None, // L4_iadd_memoph_io = 1443
    CEFBS_None, // L4_iadd_memopw_io = 1444
    CEFBS_None, // L4_iand_memopb_io = 1445
    CEFBS_None, // L4_iand_memoph_io = 1446
    CEFBS_None, // L4_iand_memopw_io = 1447
    CEFBS_None, // L4_ior_memopb_io = 1448
    CEFBS_None, // L4_ior_memoph_io = 1449
    CEFBS_None, // L4_ior_memopw_io = 1450
    CEFBS_None, // L4_isub_memopb_io = 1451
    CEFBS_None, // L4_isub_memoph_io = 1452
    CEFBS_None, // L4_isub_memopw_io = 1453
    CEFBS_None, // L4_loadalignb_ap = 1454
    CEFBS_None, // L4_loadalignb_ur = 1455
    CEFBS_None, // L4_loadalignh_ap = 1456
    CEFBS_None, // L4_loadalignh_ur = 1457
    CEFBS_None, // L4_loadbsw2_ap = 1458
    CEFBS_None, // L4_loadbsw2_ur = 1459
    CEFBS_None, // L4_loadbsw4_ap = 1460
    CEFBS_None, // L4_loadbsw4_ur = 1461
    CEFBS_None, // L4_loadbzw2_ap = 1462
    CEFBS_None, // L4_loadbzw2_ur = 1463
    CEFBS_None, // L4_loadbzw4_ap = 1464
    CEFBS_None, // L4_loadbzw4_ur = 1465
    CEFBS_None, // L4_loadd_locked = 1466
    CEFBS_None, // L4_loadrb_ap = 1467
    CEFBS_None, // L4_loadrb_rr = 1468
    CEFBS_None, // L4_loadrb_ur = 1469
    CEFBS_None, // L4_loadrd_ap = 1470
    CEFBS_None, // L4_loadrd_rr = 1471
    CEFBS_None, // L4_loadrd_ur = 1472
    CEFBS_None, // L4_loadrh_ap = 1473
    CEFBS_None, // L4_loadrh_rr = 1474
    CEFBS_None, // L4_loadrh_ur = 1475
    CEFBS_None, // L4_loadri_ap = 1476
    CEFBS_None, // L4_loadri_rr = 1477
    CEFBS_None, // L4_loadri_ur = 1478
    CEFBS_None, // L4_loadrub_ap = 1479
    CEFBS_None, // L4_loadrub_rr = 1480
    CEFBS_None, // L4_loadrub_ur = 1481
    CEFBS_None, // L4_loadruh_ap = 1482
    CEFBS_None, // L4_loadruh_rr = 1483
    CEFBS_None, // L4_loadruh_ur = 1484
    CEFBS_None, // L4_or_memopb_io = 1485
    CEFBS_None, // L4_or_memoph_io = 1486
    CEFBS_None, // L4_or_memopw_io = 1487
    CEFBS_None, // L4_ploadrbf_abs = 1488
    CEFBS_None, // L4_ploadrbf_rr = 1489
    CEFBS_None, // L4_ploadrbfnew_abs = 1490
    CEFBS_None, // L4_ploadrbfnew_rr = 1491
    CEFBS_None, // L4_ploadrbt_abs = 1492
    CEFBS_None, // L4_ploadrbt_rr = 1493
    CEFBS_None, // L4_ploadrbtnew_abs = 1494
    CEFBS_None, // L4_ploadrbtnew_rr = 1495
    CEFBS_None, // L4_ploadrdf_abs = 1496
    CEFBS_None, // L4_ploadrdf_rr = 1497
    CEFBS_None, // L4_ploadrdfnew_abs = 1498
    CEFBS_None, // L4_ploadrdfnew_rr = 1499
    CEFBS_None, // L4_ploadrdt_abs = 1500
    CEFBS_None, // L4_ploadrdt_rr = 1501
    CEFBS_None, // L4_ploadrdtnew_abs = 1502
    CEFBS_None, // L4_ploadrdtnew_rr = 1503
    CEFBS_None, // L4_ploadrhf_abs = 1504
    CEFBS_None, // L4_ploadrhf_rr = 1505
    CEFBS_None, // L4_ploadrhfnew_abs = 1506
    CEFBS_None, // L4_ploadrhfnew_rr = 1507
    CEFBS_None, // L4_ploadrht_abs = 1508
    CEFBS_None, // L4_ploadrht_rr = 1509
    CEFBS_None, // L4_ploadrhtnew_abs = 1510
    CEFBS_None, // L4_ploadrhtnew_rr = 1511
    CEFBS_None, // L4_ploadrif_abs = 1512
    CEFBS_None, // L4_ploadrif_rr = 1513
    CEFBS_None, // L4_ploadrifnew_abs = 1514
    CEFBS_None, // L4_ploadrifnew_rr = 1515
    CEFBS_None, // L4_ploadrit_abs = 1516
    CEFBS_None, // L4_ploadrit_rr = 1517
    CEFBS_None, // L4_ploadritnew_abs = 1518
    CEFBS_None, // L4_ploadritnew_rr = 1519
    CEFBS_None, // L4_ploadrubf_abs = 1520
    CEFBS_None, // L4_ploadrubf_rr = 1521
    CEFBS_None, // L4_ploadrubfnew_abs = 1522
    CEFBS_None, // L4_ploadrubfnew_rr = 1523
    CEFBS_None, // L4_ploadrubt_abs = 1524
    CEFBS_None, // L4_ploadrubt_rr = 1525
    CEFBS_None, // L4_ploadrubtnew_abs = 1526
    CEFBS_None, // L4_ploadrubtnew_rr = 1527
    CEFBS_None, // L4_ploadruhf_abs = 1528
    CEFBS_None, // L4_ploadruhf_rr = 1529
    CEFBS_None, // L4_ploadruhfnew_abs = 1530
    CEFBS_None, // L4_ploadruhfnew_rr = 1531
    CEFBS_None, // L4_ploadruht_abs = 1532
    CEFBS_None, // L4_ploadruht_rr = 1533
    CEFBS_None, // L4_ploadruhtnew_abs = 1534
    CEFBS_None, // L4_ploadruhtnew_rr = 1535
    CEFBS_None, // L4_return = 1536
    CEFBS_None, // L4_return_f = 1537
    CEFBS_None, // L4_return_fnew_pnt = 1538
    CEFBS_None, // L4_return_fnew_pt = 1539
    CEFBS_None, // L4_return_t = 1540
    CEFBS_None, // L4_return_tnew_pnt = 1541
    CEFBS_None, // L4_return_tnew_pt = 1542
    CEFBS_None, // L4_sub_memopb_io = 1543
    CEFBS_None, // L4_sub_memoph_io = 1544
    CEFBS_None, // L4_sub_memopw_io = 1545
    CEFBS_HasV66, // L6_memcpy = 1546
    CEFBS_None, // LO = 1547
    CEFBS_None, // M2_acci = 1548
    CEFBS_None, // M2_accii = 1549
    CEFBS_None, // M2_cmaci_s0 = 1550
    CEFBS_None, // M2_cmacr_s0 = 1551
    CEFBS_None, // M2_cmacs_s0 = 1552
    CEFBS_None, // M2_cmacs_s1 = 1553
    CEFBS_None, // M2_cmacsc_s0 = 1554
    CEFBS_None, // M2_cmacsc_s1 = 1555
    CEFBS_None, // M2_cmpyi_s0 = 1556
    CEFBS_None, // M2_cmpyr_s0 = 1557
    CEFBS_None, // M2_cmpyrs_s0 = 1558
    CEFBS_None, // M2_cmpyrs_s1 = 1559
    CEFBS_None, // M2_cmpyrsc_s0 = 1560
    CEFBS_None, // M2_cmpyrsc_s1 = 1561
    CEFBS_None, // M2_cmpys_s0 = 1562
    CEFBS_None, // M2_cmpys_s1 = 1563
    CEFBS_None, // M2_cmpysc_s0 = 1564
    CEFBS_None, // M2_cmpysc_s1 = 1565
    CEFBS_None, // M2_cnacs_s0 = 1566
    CEFBS_None, // M2_cnacs_s1 = 1567
    CEFBS_None, // M2_cnacsc_s0 = 1568
    CEFBS_None, // M2_cnacsc_s1 = 1569
    CEFBS_None, // M2_dpmpyss_acc_s0 = 1570
    CEFBS_None, // M2_dpmpyss_nac_s0 = 1571
    CEFBS_None, // M2_dpmpyss_rnd_s0 = 1572
    CEFBS_None, // M2_dpmpyss_s0 = 1573
    CEFBS_None, // M2_dpmpyuu_acc_s0 = 1574
    CEFBS_None, // M2_dpmpyuu_nac_s0 = 1575
    CEFBS_None, // M2_dpmpyuu_s0 = 1576
    CEFBS_None, // M2_hmmpyh_rs1 = 1577
    CEFBS_None, // M2_hmmpyh_s1 = 1578
    CEFBS_None, // M2_hmmpyl_rs1 = 1579
    CEFBS_None, // M2_hmmpyl_s1 = 1580
    CEFBS_None, // M2_maci = 1581
    CEFBS_None, // M2_macsin = 1582
    CEFBS_None, // M2_macsip = 1583
    CEFBS_None, // M2_mmachs_rs0 = 1584
    CEFBS_None, // M2_mmachs_rs1 = 1585
    CEFBS_None, // M2_mmachs_s0 = 1586
    CEFBS_None, // M2_mmachs_s1 = 1587
    CEFBS_None, // M2_mmacls_rs0 = 1588
    CEFBS_None, // M2_mmacls_rs1 = 1589
    CEFBS_None, // M2_mmacls_s0 = 1590
    CEFBS_None, // M2_mmacls_s1 = 1591
    CEFBS_None, // M2_mmacuhs_rs0 = 1592
    CEFBS_None, // M2_mmacuhs_rs1 = 1593
    CEFBS_None, // M2_mmacuhs_s0 = 1594
    CEFBS_None, // M2_mmacuhs_s1 = 1595
    CEFBS_None, // M2_mmaculs_rs0 = 1596
    CEFBS_None, // M2_mmaculs_rs1 = 1597
    CEFBS_None, // M2_mmaculs_s0 = 1598
    CEFBS_None, // M2_mmaculs_s1 = 1599
    CEFBS_None, // M2_mmpyh_rs0 = 1600
    CEFBS_None, // M2_mmpyh_rs1 = 1601
    CEFBS_None, // M2_mmpyh_s0 = 1602
    CEFBS_None, // M2_mmpyh_s1 = 1603
    CEFBS_None, // M2_mmpyl_rs0 = 1604
    CEFBS_None, // M2_mmpyl_rs1 = 1605
    CEFBS_None, // M2_mmpyl_s0 = 1606
    CEFBS_None, // M2_mmpyl_s1 = 1607
    CEFBS_None, // M2_mmpyuh_rs0 = 1608
    CEFBS_None, // M2_mmpyuh_rs1 = 1609
    CEFBS_None, // M2_mmpyuh_s0 = 1610
    CEFBS_None, // M2_mmpyuh_s1 = 1611
    CEFBS_None, // M2_mmpyul_rs0 = 1612
    CEFBS_None, // M2_mmpyul_rs1 = 1613
    CEFBS_None, // M2_mmpyul_s0 = 1614
    CEFBS_None, // M2_mmpyul_s1 = 1615
    CEFBS_HasV66, // M2_mnaci = 1616
    CEFBS_None, // M2_mpy_acc_hh_s0 = 1617
    CEFBS_None, // M2_mpy_acc_hh_s1 = 1618
    CEFBS_None, // M2_mpy_acc_hl_s0 = 1619
    CEFBS_None, // M2_mpy_acc_hl_s1 = 1620
    CEFBS_None, // M2_mpy_acc_lh_s0 = 1621
    CEFBS_None, // M2_mpy_acc_lh_s1 = 1622
    CEFBS_None, // M2_mpy_acc_ll_s0 = 1623
    CEFBS_None, // M2_mpy_acc_ll_s1 = 1624
    CEFBS_None, // M2_mpy_acc_sat_hh_s0 = 1625
    CEFBS_None, // M2_mpy_acc_sat_hh_s1 = 1626
    CEFBS_None, // M2_mpy_acc_sat_hl_s0 = 1627
    CEFBS_None, // M2_mpy_acc_sat_hl_s1 = 1628
    CEFBS_None, // M2_mpy_acc_sat_lh_s0 = 1629
    CEFBS_None, // M2_mpy_acc_sat_lh_s1 = 1630
    CEFBS_None, // M2_mpy_acc_sat_ll_s0 = 1631
    CEFBS_None, // M2_mpy_acc_sat_ll_s1 = 1632
    CEFBS_None, // M2_mpy_hh_s0 = 1633
    CEFBS_None, // M2_mpy_hh_s1 = 1634
    CEFBS_None, // M2_mpy_hl_s0 = 1635
    CEFBS_None, // M2_mpy_hl_s1 = 1636
    CEFBS_None, // M2_mpy_lh_s0 = 1637
    CEFBS_None, // M2_mpy_lh_s1 = 1638
    CEFBS_None, // M2_mpy_ll_s0 = 1639
    CEFBS_None, // M2_mpy_ll_s1 = 1640
    CEFBS_None, // M2_mpy_nac_hh_s0 = 1641
    CEFBS_None, // M2_mpy_nac_hh_s1 = 1642
    CEFBS_None, // M2_mpy_nac_hl_s0 = 1643
    CEFBS_None, // M2_mpy_nac_hl_s1 = 1644
    CEFBS_None, // M2_mpy_nac_lh_s0 = 1645
    CEFBS_None, // M2_mpy_nac_lh_s1 = 1646
    CEFBS_None, // M2_mpy_nac_ll_s0 = 1647
    CEFBS_None, // M2_mpy_nac_ll_s1 = 1648
    CEFBS_None, // M2_mpy_nac_sat_hh_s0 = 1649
    CEFBS_None, // M2_mpy_nac_sat_hh_s1 = 1650
    CEFBS_None, // M2_mpy_nac_sat_hl_s0 = 1651
    CEFBS_None, // M2_mpy_nac_sat_hl_s1 = 1652
    CEFBS_None, // M2_mpy_nac_sat_lh_s0 = 1653
    CEFBS_None, // M2_mpy_nac_sat_lh_s1 = 1654
    CEFBS_None, // M2_mpy_nac_sat_ll_s0 = 1655
    CEFBS_None, // M2_mpy_nac_sat_ll_s1 = 1656
    CEFBS_None, // M2_mpy_rnd_hh_s0 = 1657
    CEFBS_None, // M2_mpy_rnd_hh_s1 = 1658
    CEFBS_None, // M2_mpy_rnd_hl_s0 = 1659
    CEFBS_None, // M2_mpy_rnd_hl_s1 = 1660
    CEFBS_None, // M2_mpy_rnd_lh_s0 = 1661
    CEFBS_None, // M2_mpy_rnd_lh_s1 = 1662
    CEFBS_None, // M2_mpy_rnd_ll_s0 = 1663
    CEFBS_None, // M2_mpy_rnd_ll_s1 = 1664
    CEFBS_None, // M2_mpy_sat_hh_s0 = 1665
    CEFBS_None, // M2_mpy_sat_hh_s1 = 1666
    CEFBS_None, // M2_mpy_sat_hl_s0 = 1667
    CEFBS_None, // M2_mpy_sat_hl_s1 = 1668
    CEFBS_None, // M2_mpy_sat_lh_s0 = 1669
    CEFBS_None, // M2_mpy_sat_lh_s1 = 1670
    CEFBS_None, // M2_mpy_sat_ll_s0 = 1671
    CEFBS_None, // M2_mpy_sat_ll_s1 = 1672
    CEFBS_None, // M2_mpy_sat_rnd_hh_s0 = 1673
    CEFBS_None, // M2_mpy_sat_rnd_hh_s1 = 1674
    CEFBS_None, // M2_mpy_sat_rnd_hl_s0 = 1675
    CEFBS_None, // M2_mpy_sat_rnd_hl_s1 = 1676
    CEFBS_None, // M2_mpy_sat_rnd_lh_s0 = 1677
    CEFBS_None, // M2_mpy_sat_rnd_lh_s1 = 1678
    CEFBS_None, // M2_mpy_sat_rnd_ll_s0 = 1679
    CEFBS_None, // M2_mpy_sat_rnd_ll_s1 = 1680
    CEFBS_None, // M2_mpy_up = 1681
    CEFBS_None, // M2_mpy_up_s1 = 1682
    CEFBS_None, // M2_mpy_up_s1_sat = 1683
    CEFBS_None, // M2_mpyd_acc_hh_s0 = 1684
    CEFBS_None, // M2_mpyd_acc_hh_s1 = 1685
    CEFBS_None, // M2_mpyd_acc_hl_s0 = 1686
    CEFBS_None, // M2_mpyd_acc_hl_s1 = 1687
    CEFBS_None, // M2_mpyd_acc_lh_s0 = 1688
    CEFBS_None, // M2_mpyd_acc_lh_s1 = 1689
    CEFBS_None, // M2_mpyd_acc_ll_s0 = 1690
    CEFBS_None, // M2_mpyd_acc_ll_s1 = 1691
    CEFBS_None, // M2_mpyd_hh_s0 = 1692
    CEFBS_None, // M2_mpyd_hh_s1 = 1693
    CEFBS_None, // M2_mpyd_hl_s0 = 1694
    CEFBS_None, // M2_mpyd_hl_s1 = 1695
    CEFBS_None, // M2_mpyd_lh_s0 = 1696
    CEFBS_None, // M2_mpyd_lh_s1 = 1697
    CEFBS_None, // M2_mpyd_ll_s0 = 1698
    CEFBS_None, // M2_mpyd_ll_s1 = 1699
    CEFBS_None, // M2_mpyd_nac_hh_s0 = 1700
    CEFBS_None, // M2_mpyd_nac_hh_s1 = 1701
    CEFBS_None, // M2_mpyd_nac_hl_s0 = 1702
    CEFBS_None, // M2_mpyd_nac_hl_s1 = 1703
    CEFBS_None, // M2_mpyd_nac_lh_s0 = 1704
    CEFBS_None, // M2_mpyd_nac_lh_s1 = 1705
    CEFBS_None, // M2_mpyd_nac_ll_s0 = 1706
    CEFBS_None, // M2_mpyd_nac_ll_s1 = 1707
    CEFBS_None, // M2_mpyd_rnd_hh_s0 = 1708
    CEFBS_None, // M2_mpyd_rnd_hh_s1 = 1709
    CEFBS_None, // M2_mpyd_rnd_hl_s0 = 1710
    CEFBS_None, // M2_mpyd_rnd_hl_s1 = 1711
    CEFBS_None, // M2_mpyd_rnd_lh_s0 = 1712
    CEFBS_None, // M2_mpyd_rnd_lh_s1 = 1713
    CEFBS_None, // M2_mpyd_rnd_ll_s0 = 1714
    CEFBS_None, // M2_mpyd_rnd_ll_s1 = 1715
    CEFBS_None, // M2_mpyi = 1716
    CEFBS_None, // M2_mpysin = 1717
    CEFBS_None, // M2_mpysip = 1718
    CEFBS_None, // M2_mpysu_up = 1719
    CEFBS_None, // M2_mpyu_acc_hh_s0 = 1720
    CEFBS_None, // M2_mpyu_acc_hh_s1 = 1721
    CEFBS_None, // M2_mpyu_acc_hl_s0 = 1722
    CEFBS_None, // M2_mpyu_acc_hl_s1 = 1723
    CEFBS_None, // M2_mpyu_acc_lh_s0 = 1724
    CEFBS_None, // M2_mpyu_acc_lh_s1 = 1725
    CEFBS_None, // M2_mpyu_acc_ll_s0 = 1726
    CEFBS_None, // M2_mpyu_acc_ll_s1 = 1727
    CEFBS_None, // M2_mpyu_hh_s0 = 1728
    CEFBS_None, // M2_mpyu_hh_s1 = 1729
    CEFBS_None, // M2_mpyu_hl_s0 = 1730
    CEFBS_None, // M2_mpyu_hl_s1 = 1731
    CEFBS_None, // M2_mpyu_lh_s0 = 1732
    CEFBS_None, // M2_mpyu_lh_s1 = 1733
    CEFBS_None, // M2_mpyu_ll_s0 = 1734
    CEFBS_None, // M2_mpyu_ll_s1 = 1735
    CEFBS_None, // M2_mpyu_nac_hh_s0 = 1736
    CEFBS_None, // M2_mpyu_nac_hh_s1 = 1737
    CEFBS_None, // M2_mpyu_nac_hl_s0 = 1738
    CEFBS_None, // M2_mpyu_nac_hl_s1 = 1739
    CEFBS_None, // M2_mpyu_nac_lh_s0 = 1740
    CEFBS_None, // M2_mpyu_nac_lh_s1 = 1741
    CEFBS_None, // M2_mpyu_nac_ll_s0 = 1742
    CEFBS_None, // M2_mpyu_nac_ll_s1 = 1743
    CEFBS_None, // M2_mpyu_up = 1744
    CEFBS_None, // M2_mpyud_acc_hh_s0 = 1745
    CEFBS_None, // M2_mpyud_acc_hh_s1 = 1746
    CEFBS_None, // M2_mpyud_acc_hl_s0 = 1747
    CEFBS_None, // M2_mpyud_acc_hl_s1 = 1748
    CEFBS_None, // M2_mpyud_acc_lh_s0 = 1749
    CEFBS_None, // M2_mpyud_acc_lh_s1 = 1750
    CEFBS_None, // M2_mpyud_acc_ll_s0 = 1751
    CEFBS_None, // M2_mpyud_acc_ll_s1 = 1752
    CEFBS_None, // M2_mpyud_hh_s0 = 1753
    CEFBS_None, // M2_mpyud_hh_s1 = 1754
    CEFBS_None, // M2_mpyud_hl_s0 = 1755
    CEFBS_None, // M2_mpyud_hl_s1 = 1756
    CEFBS_None, // M2_mpyud_lh_s0 = 1757
    CEFBS_None, // M2_mpyud_lh_s1 = 1758
    CEFBS_None, // M2_mpyud_ll_s0 = 1759
    CEFBS_None, // M2_mpyud_ll_s1 = 1760
    CEFBS_None, // M2_mpyud_nac_hh_s0 = 1761
    CEFBS_None, // M2_mpyud_nac_hh_s1 = 1762
    CEFBS_None, // M2_mpyud_nac_hl_s0 = 1763
    CEFBS_None, // M2_mpyud_nac_hl_s1 = 1764
    CEFBS_None, // M2_mpyud_nac_lh_s0 = 1765
    CEFBS_None, // M2_mpyud_nac_lh_s1 = 1766
    CEFBS_None, // M2_mpyud_nac_ll_s0 = 1767
    CEFBS_None, // M2_mpyud_nac_ll_s1 = 1768
    CEFBS_None, // M2_nacci = 1769
    CEFBS_None, // M2_naccii = 1770
    CEFBS_None, // M2_subacc = 1771
    CEFBS_None, // M2_vabsdiffh = 1772
    CEFBS_None, // M2_vabsdiffw = 1773
    CEFBS_None, // M2_vcmac_s0_sat_i = 1774
    CEFBS_None, // M2_vcmac_s0_sat_r = 1775
    CEFBS_None, // M2_vcmpy_s0_sat_i = 1776
    CEFBS_None, // M2_vcmpy_s0_sat_r = 1777
    CEFBS_None, // M2_vcmpy_s1_sat_i = 1778
    CEFBS_None, // M2_vcmpy_s1_sat_r = 1779
    CEFBS_None, // M2_vdmacs_s0 = 1780
    CEFBS_None, // M2_vdmacs_s1 = 1781
    CEFBS_None, // M2_vdmpyrs_s0 = 1782
    CEFBS_None, // M2_vdmpyrs_s1 = 1783
    CEFBS_None, // M2_vdmpys_s0 = 1784
    CEFBS_None, // M2_vdmpys_s1 = 1785
    CEFBS_None, // M2_vmac2 = 1786
    CEFBS_None, // M2_vmac2es = 1787
    CEFBS_None, // M2_vmac2es_s0 = 1788
    CEFBS_None, // M2_vmac2es_s1 = 1789
    CEFBS_None, // M2_vmac2s_s0 = 1790
    CEFBS_None, // M2_vmac2s_s1 = 1791
    CEFBS_None, // M2_vmac2su_s0 = 1792
    CEFBS_None, // M2_vmac2su_s1 = 1793
    CEFBS_None, // M2_vmpy2es_s0 = 1794
    CEFBS_None, // M2_vmpy2es_s1 = 1795
    CEFBS_None, // M2_vmpy2s_s0 = 1796
    CEFBS_None, // M2_vmpy2s_s0pack = 1797
    CEFBS_None, // M2_vmpy2s_s1 = 1798
    CEFBS_None, // M2_vmpy2s_s1pack = 1799
    CEFBS_None, // M2_vmpy2su_s0 = 1800
    CEFBS_None, // M2_vmpy2su_s1 = 1801
    CEFBS_None, // M2_vraddh = 1802
    CEFBS_None, // M2_vradduh = 1803
    CEFBS_None, // M2_vrcmaci_s0 = 1804
    CEFBS_None, // M2_vrcmaci_s0c = 1805
    CEFBS_None, // M2_vrcmacr_s0 = 1806
    CEFBS_None, // M2_vrcmacr_s0c = 1807
    CEFBS_None, // M2_vrcmpyi_s0 = 1808
    CEFBS_None, // M2_vrcmpyi_s0c = 1809
    CEFBS_None, // M2_vrcmpyr_s0 = 1810
    CEFBS_None, // M2_vrcmpyr_s0c = 1811
    CEFBS_None, // M2_vrcmpys_acc_s1_h = 1812
    CEFBS_None, // M2_vrcmpys_acc_s1_l = 1813
    CEFBS_None, // M2_vrcmpys_s1_h = 1814
    CEFBS_None, // M2_vrcmpys_s1_l = 1815
    CEFBS_None, // M2_vrcmpys_s1rp_h = 1816
    CEFBS_None, // M2_vrcmpys_s1rp_l = 1817
    CEFBS_None, // M2_vrmac_s0 = 1818
    CEFBS_None, // M2_vrmpy_s0 = 1819
    CEFBS_None, // M2_xor_xacc = 1820
    CEFBS_None, // M4_and_and = 1821
    CEFBS_None, // M4_and_andn = 1822
    CEFBS_None, // M4_and_or = 1823
    CEFBS_None, // M4_and_xor = 1824
    CEFBS_None, // M4_cmpyi_wh = 1825
    CEFBS_None, // M4_cmpyi_whc = 1826
    CEFBS_None, // M4_cmpyr_wh = 1827
    CEFBS_None, // M4_cmpyr_whc = 1828
    CEFBS_None, // M4_mac_up_s1_sat = 1829
    CEFBS_None, // M4_mpyri_addi = 1830
    CEFBS_None, // M4_mpyri_addr = 1831
    CEFBS_None, // M4_mpyri_addr_u2 = 1832
    CEFBS_None, // M4_mpyrr_addi = 1833
    CEFBS_None, // M4_mpyrr_addr = 1834
    CEFBS_None, // M4_nac_up_s1_sat = 1835
    CEFBS_None, // M4_or_and = 1836
    CEFBS_None, // M4_or_andn = 1837
    CEFBS_None, // M4_or_or = 1838
    CEFBS_None, // M4_or_xor = 1839
    CEFBS_None, // M4_pmpyw = 1840
    CEFBS_None, // M4_pmpyw_acc = 1841
    CEFBS_None, // M4_vpmpyh = 1842
    CEFBS_None, // M4_vpmpyh_acc = 1843
    CEFBS_None, // M4_vrmpyeh_acc_s0 = 1844
    CEFBS_None, // M4_vrmpyeh_acc_s1 = 1845
    CEFBS_None, // M4_vrmpyeh_s0 = 1846
    CEFBS_None, // M4_vrmpyeh_s1 = 1847
    CEFBS_None, // M4_vrmpyoh_acc_s0 = 1848
    CEFBS_None, // M4_vrmpyoh_acc_s1 = 1849
    CEFBS_None, // M4_vrmpyoh_s0 = 1850
    CEFBS_None, // M4_vrmpyoh_s1 = 1851
    CEFBS_None, // M4_xor_and = 1852
    CEFBS_None, // M4_xor_andn = 1853
    CEFBS_None, // M4_xor_or = 1854
    CEFBS_None, // M4_xor_xacc = 1855
    CEFBS_None, // M5_vdmacbsu = 1856
    CEFBS_None, // M5_vdmpybsu = 1857
    CEFBS_None, // M5_vmacbsu = 1858
    CEFBS_None, // M5_vmacbuu = 1859
    CEFBS_None, // M5_vmpybsu = 1860
    CEFBS_None, // M5_vmpybuu = 1861
    CEFBS_None, // M5_vrmacbsu = 1862
    CEFBS_None, // M5_vrmacbuu = 1863
    CEFBS_None, // M5_vrmpybsu = 1864
    CEFBS_None, // M5_vrmpybuu = 1865
    CEFBS_HasV62, // M6_vabsdiffb = 1866
    CEFBS_HasV62, // M6_vabsdiffub = 1867
    CEFBS_None, // PS_call_stk = 1868
    CEFBS_None, // PS_callr_nr = 1869
    CEFBS_None, // PS_jmpret = 1870
    CEFBS_None, // PS_jmpretf = 1871
    CEFBS_None, // PS_jmpretfnew = 1872
    CEFBS_None, // PS_jmpretfnewpt = 1873
    CEFBS_None, // PS_jmprett = 1874
    CEFBS_None, // PS_jmprettnew = 1875
    CEFBS_None, // PS_jmprettnewpt = 1876
    CEFBS_None, // PS_loadrbabs = 1877
    CEFBS_None, // PS_loadrdabs = 1878
    CEFBS_None, // PS_loadrhabs = 1879
    CEFBS_None, // PS_loadriabs = 1880
    CEFBS_None, // PS_loadrubabs = 1881
    CEFBS_None, // PS_loadruhabs = 1882
    CEFBS_None, // PS_storerbabs = 1883
    CEFBS_None, // PS_storerbnewabs = 1884
    CEFBS_None, // PS_storerdabs = 1885
    CEFBS_None, // PS_storerfabs = 1886
    CEFBS_None, // PS_storerhabs = 1887
    CEFBS_None, // PS_storerhnewabs = 1888
    CEFBS_None, // PS_storeriabs = 1889
    CEFBS_None, // PS_storerinewabs = 1890
    CEFBS_None, // RESTORE_DEALLOC_BEFORE_TAILCALL_V4 = 1891
    CEFBS_None, // RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT = 1892
    CEFBS_None, // RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT_PIC = 1893
    CEFBS_None, // RESTORE_DEALLOC_BEFORE_TAILCALL_V4_PIC = 1894
    CEFBS_None, // RESTORE_DEALLOC_RET_JMP_V4 = 1895
    CEFBS_None, // RESTORE_DEALLOC_RET_JMP_V4_EXT = 1896
    CEFBS_None, // RESTORE_DEALLOC_RET_JMP_V4_EXT_PIC = 1897
    CEFBS_None, // RESTORE_DEALLOC_RET_JMP_V4_PIC = 1898
    CEFBS_None, // S2_addasl_rrri = 1899
    CEFBS_None, // S2_allocframe = 1900
    CEFBS_None, // S2_asl_i_p = 1901
    CEFBS_None, // S2_asl_i_p_acc = 1902
    CEFBS_None, // S2_asl_i_p_and = 1903
    CEFBS_None, // S2_asl_i_p_nac = 1904
    CEFBS_None, // S2_asl_i_p_or = 1905
    CEFBS_None, // S2_asl_i_p_xacc = 1906
    CEFBS_None, // S2_asl_i_r = 1907
    CEFBS_None, // S2_asl_i_r_acc = 1908
    CEFBS_None, // S2_asl_i_r_and = 1909
    CEFBS_None, // S2_asl_i_r_nac = 1910
    CEFBS_None, // S2_asl_i_r_or = 1911
    CEFBS_None, // S2_asl_i_r_sat = 1912
    CEFBS_None, // S2_asl_i_r_xacc = 1913
    CEFBS_None, // S2_asl_i_vh = 1914
    CEFBS_None, // S2_asl_i_vw = 1915
    CEFBS_None, // S2_asl_r_p = 1916
    CEFBS_None, // S2_asl_r_p_acc = 1917
    CEFBS_None, // S2_asl_r_p_and = 1918
    CEFBS_None, // S2_asl_r_p_nac = 1919
    CEFBS_None, // S2_asl_r_p_or = 1920
    CEFBS_None, // S2_asl_r_p_xor = 1921
    CEFBS_None, // S2_asl_r_r = 1922
    CEFBS_None, // S2_asl_r_r_acc = 1923
    CEFBS_None, // S2_asl_r_r_and = 1924
    CEFBS_None, // S2_asl_r_r_nac = 1925
    CEFBS_None, // S2_asl_r_r_or = 1926
    CEFBS_None, // S2_asl_r_r_sat = 1927
    CEFBS_None, // S2_asl_r_vh = 1928
    CEFBS_None, // S2_asl_r_vw = 1929
    CEFBS_None, // S2_asr_i_p = 1930
    CEFBS_None, // S2_asr_i_p_acc = 1931
    CEFBS_None, // S2_asr_i_p_and = 1932
    CEFBS_None, // S2_asr_i_p_nac = 1933
    CEFBS_None, // S2_asr_i_p_or = 1934
    CEFBS_None, // S2_asr_i_p_rnd = 1935
    CEFBS_None, // S2_asr_i_r = 1936
    CEFBS_None, // S2_asr_i_r_acc = 1937
    CEFBS_None, // S2_asr_i_r_and = 1938
    CEFBS_None, // S2_asr_i_r_nac = 1939
    CEFBS_None, // S2_asr_i_r_or = 1940
    CEFBS_None, // S2_asr_i_r_rnd = 1941
    CEFBS_None, // S2_asr_i_svw_trun = 1942
    CEFBS_None, // S2_asr_i_vh = 1943
    CEFBS_None, // S2_asr_i_vw = 1944
    CEFBS_None, // S2_asr_r_p = 1945
    CEFBS_None, // S2_asr_r_p_acc = 1946
    CEFBS_None, // S2_asr_r_p_and = 1947
    CEFBS_None, // S2_asr_r_p_nac = 1948
    CEFBS_None, // S2_asr_r_p_or = 1949
    CEFBS_None, // S2_asr_r_p_xor = 1950
    CEFBS_None, // S2_asr_r_r = 1951
    CEFBS_None, // S2_asr_r_r_acc = 1952
    CEFBS_None, // S2_asr_r_r_and = 1953
    CEFBS_None, // S2_asr_r_r_nac = 1954
    CEFBS_None, // S2_asr_r_r_or = 1955
    CEFBS_None, // S2_asr_r_r_sat = 1956
    CEFBS_None, // S2_asr_r_svw_trun = 1957
    CEFBS_None, // S2_asr_r_vh = 1958
    CEFBS_None, // S2_asr_r_vw = 1959
    CEFBS_None, // S2_brev = 1960
    CEFBS_None, // S2_brevp = 1961
    CEFBS_None, // S2_cabacdecbin = 1962
    CEFBS_None, // S2_cl0 = 1963
    CEFBS_None, // S2_cl0p = 1964
    CEFBS_None, // S2_cl1 = 1965
    CEFBS_None, // S2_cl1p = 1966
    CEFBS_None, // S2_clb = 1967
    CEFBS_None, // S2_clbnorm = 1968
    CEFBS_None, // S2_clbp = 1969
    CEFBS_None, // S2_clrbit_i = 1970
    CEFBS_None, // S2_clrbit_r = 1971
    CEFBS_None, // S2_ct0 = 1972
    CEFBS_None, // S2_ct0p = 1973
    CEFBS_None, // S2_ct1 = 1974
    CEFBS_None, // S2_ct1p = 1975
    CEFBS_None, // S2_deinterleave = 1976
    CEFBS_None, // S2_extractu = 1977
    CEFBS_None, // S2_extractu_rp = 1978
    CEFBS_None, // S2_extractup = 1979
    CEFBS_None, // S2_extractup_rp = 1980
    CEFBS_None, // S2_insert = 1981
    CEFBS_None, // S2_insert_rp = 1982
    CEFBS_None, // S2_insertp = 1983
    CEFBS_None, // S2_insertp_rp = 1984
    CEFBS_None, // S2_interleave = 1985
    CEFBS_None, // S2_lfsp = 1986
    CEFBS_None, // S2_lsl_r_p = 1987
    CEFBS_None, // S2_lsl_r_p_acc = 1988
    CEFBS_None, // S2_lsl_r_p_and = 1989
    CEFBS_None, // S2_lsl_r_p_nac = 1990
    CEFBS_None, // S2_lsl_r_p_or = 1991
    CEFBS_None, // S2_lsl_r_p_xor = 1992
    CEFBS_None, // S2_lsl_r_r = 1993
    CEFBS_None, // S2_lsl_r_r_acc = 1994
    CEFBS_None, // S2_lsl_r_r_and = 1995
    CEFBS_None, // S2_lsl_r_r_nac = 1996
    CEFBS_None, // S2_lsl_r_r_or = 1997
    CEFBS_None, // S2_lsl_r_vh = 1998
    CEFBS_None, // S2_lsl_r_vw = 1999
    CEFBS_None, // S2_lsr_i_p = 2000
    CEFBS_None, // S2_lsr_i_p_acc = 2001
    CEFBS_None, // S2_lsr_i_p_and = 2002
    CEFBS_None, // S2_lsr_i_p_nac = 2003
    CEFBS_None, // S2_lsr_i_p_or = 2004
    CEFBS_None, // S2_lsr_i_p_xacc = 2005
    CEFBS_None, // S2_lsr_i_r = 2006
    CEFBS_None, // S2_lsr_i_r_acc = 2007
    CEFBS_None, // S2_lsr_i_r_and = 2008
    CEFBS_None, // S2_lsr_i_r_nac = 2009
    CEFBS_None, // S2_lsr_i_r_or = 2010
    CEFBS_None, // S2_lsr_i_r_xacc = 2011
    CEFBS_None, // S2_lsr_i_vh = 2012
    CEFBS_None, // S2_lsr_i_vw = 2013
    CEFBS_None, // S2_lsr_r_p = 2014
    CEFBS_None, // S2_lsr_r_p_acc = 2015
    CEFBS_None, // S2_lsr_r_p_and = 2016
    CEFBS_None, // S2_lsr_r_p_nac = 2017
    CEFBS_None, // S2_lsr_r_p_or = 2018
    CEFBS_None, // S2_lsr_r_p_xor = 2019
    CEFBS_None, // S2_lsr_r_r = 2020
    CEFBS_None, // S2_lsr_r_r_acc = 2021
    CEFBS_None, // S2_lsr_r_r_and = 2022
    CEFBS_None, // S2_lsr_r_r_nac = 2023
    CEFBS_None, // S2_lsr_r_r_or = 2024
    CEFBS_None, // S2_lsr_r_vh = 2025
    CEFBS_None, // S2_lsr_r_vw = 2026
    CEFBS_HasV66, // S2_mask = 2027
    CEFBS_None, // S2_packhl = 2028
    CEFBS_None, // S2_parityp = 2029
    CEFBS_None, // S2_pstorerbf_io = 2030
    CEFBS_None, // S2_pstorerbf_pi = 2031
    CEFBS_None, // S2_pstorerbfnew_pi = 2032
    CEFBS_None, // S2_pstorerbnewf_io = 2033
    CEFBS_None, // S2_pstorerbnewf_pi = 2034
    CEFBS_None, // S2_pstorerbnewfnew_pi = 2035
    CEFBS_None, // S2_pstorerbnewt_io = 2036
    CEFBS_None, // S2_pstorerbnewt_pi = 2037
    CEFBS_None, // S2_pstorerbnewtnew_pi = 2038
    CEFBS_None, // S2_pstorerbt_io = 2039
    CEFBS_None, // S2_pstorerbt_pi = 2040
    CEFBS_None, // S2_pstorerbtnew_pi = 2041
    CEFBS_None, // S2_pstorerdf_io = 2042
    CEFBS_None, // S2_pstorerdf_pi = 2043
    CEFBS_None, // S2_pstorerdfnew_pi = 2044
    CEFBS_None, // S2_pstorerdt_io = 2045
    CEFBS_None, // S2_pstorerdt_pi = 2046
    CEFBS_None, // S2_pstorerdtnew_pi = 2047
    CEFBS_None, // S2_pstorerff_io = 2048
    CEFBS_None, // S2_pstorerff_pi = 2049
    CEFBS_None, // S2_pstorerffnew_pi = 2050
    CEFBS_None, // S2_pstorerft_io = 2051
    CEFBS_None, // S2_pstorerft_pi = 2052
    CEFBS_None, // S2_pstorerftnew_pi = 2053
    CEFBS_None, // S2_pstorerhf_io = 2054
    CEFBS_None, // S2_pstorerhf_pi = 2055
    CEFBS_None, // S2_pstorerhfnew_pi = 2056
    CEFBS_None, // S2_pstorerhnewf_io = 2057
    CEFBS_None, // S2_pstorerhnewf_pi = 2058
    CEFBS_None, // S2_pstorerhnewfnew_pi = 2059
    CEFBS_None, // S2_pstorerhnewt_io = 2060
    CEFBS_None, // S2_pstorerhnewt_pi = 2061
    CEFBS_None, // S2_pstorerhnewtnew_pi = 2062
    CEFBS_None, // S2_pstorerht_io = 2063
    CEFBS_None, // S2_pstorerht_pi = 2064
    CEFBS_None, // S2_pstorerhtnew_pi = 2065
    CEFBS_None, // S2_pstorerif_io = 2066
    CEFBS_None, // S2_pstorerif_pi = 2067
    CEFBS_None, // S2_pstorerifnew_pi = 2068
    CEFBS_None, // S2_pstorerinewf_io = 2069
    CEFBS_None, // S2_pstorerinewf_pi = 2070
    CEFBS_None, // S2_pstorerinewfnew_pi = 2071
    CEFBS_None, // S2_pstorerinewt_io = 2072
    CEFBS_None, // S2_pstorerinewt_pi = 2073
    CEFBS_None, // S2_pstorerinewtnew_pi = 2074
    CEFBS_None, // S2_pstorerit_io = 2075
    CEFBS_None, // S2_pstorerit_pi = 2076
    CEFBS_None, // S2_pstoreritnew_pi = 2077
    CEFBS_None, // S2_setbit_i = 2078
    CEFBS_None, // S2_setbit_r = 2079
    CEFBS_None, // S2_shuffeb = 2080
    CEFBS_None, // S2_shuffeh = 2081
    CEFBS_None, // S2_shuffob = 2082
    CEFBS_None, // S2_shuffoh = 2083
    CEFBS_None, // S2_storerb_io = 2084
    CEFBS_None, // S2_storerb_pbr = 2085
    CEFBS_None, // S2_storerb_pci = 2086
    CEFBS_None, // S2_storerb_pcr = 2087
    CEFBS_None, // S2_storerb_pi = 2088
    CEFBS_None, // S2_storerb_pr = 2089
    CEFBS_None, // S2_storerbgp = 2090
    CEFBS_None, // S2_storerbnew_io = 2091
    CEFBS_None, // S2_storerbnew_pbr = 2092
    CEFBS_None, // S2_storerbnew_pci = 2093
    CEFBS_None, // S2_storerbnew_pcr = 2094
    CEFBS_None, // S2_storerbnew_pi = 2095
    CEFBS_None, // S2_storerbnew_pr = 2096
    CEFBS_None, // S2_storerbnewgp = 2097
    CEFBS_None, // S2_storerd_io = 2098
    CEFBS_None, // S2_storerd_pbr = 2099
    CEFBS_None, // S2_storerd_pci = 2100
    CEFBS_None, // S2_storerd_pcr = 2101
    CEFBS_None, // S2_storerd_pi = 2102
    CEFBS_None, // S2_storerd_pr = 2103
    CEFBS_None, // S2_storerdgp = 2104
    CEFBS_None, // S2_storerf_io = 2105
    CEFBS_None, // S2_storerf_pbr = 2106
    CEFBS_None, // S2_storerf_pci = 2107
    CEFBS_None, // S2_storerf_pcr = 2108
    CEFBS_None, // S2_storerf_pi = 2109
    CEFBS_None, // S2_storerf_pr = 2110
    CEFBS_None, // S2_storerfgp = 2111
    CEFBS_None, // S2_storerh_io = 2112
    CEFBS_None, // S2_storerh_pbr = 2113
    CEFBS_None, // S2_storerh_pci = 2114
    CEFBS_None, // S2_storerh_pcr = 2115
    CEFBS_None, // S2_storerh_pi = 2116
    CEFBS_None, // S2_storerh_pr = 2117
    CEFBS_None, // S2_storerhgp = 2118
    CEFBS_None, // S2_storerhnew_io = 2119
    CEFBS_None, // S2_storerhnew_pbr = 2120
    CEFBS_None, // S2_storerhnew_pci = 2121
    CEFBS_None, // S2_storerhnew_pcr = 2122
    CEFBS_None, // S2_storerhnew_pi = 2123
    CEFBS_None, // S2_storerhnew_pr = 2124
    CEFBS_None, // S2_storerhnewgp = 2125
    CEFBS_None, // S2_storeri_io = 2126
    CEFBS_None, // S2_storeri_pbr = 2127
    CEFBS_None, // S2_storeri_pci = 2128
    CEFBS_None, // S2_storeri_pcr = 2129
    CEFBS_None, // S2_storeri_pi = 2130
    CEFBS_None, // S2_storeri_pr = 2131
    CEFBS_None, // S2_storerigp = 2132
    CEFBS_None, // S2_storerinew_io = 2133
    CEFBS_None, // S2_storerinew_pbr = 2134
    CEFBS_None, // S2_storerinew_pci = 2135
    CEFBS_None, // S2_storerinew_pcr = 2136
    CEFBS_None, // S2_storerinew_pi = 2137
    CEFBS_None, // S2_storerinew_pr = 2138
    CEFBS_None, // S2_storerinewgp = 2139
    CEFBS_None, // S2_storew_locked = 2140
    CEFBS_None, // S2_svsathb = 2141
    CEFBS_None, // S2_svsathub = 2142
    CEFBS_None, // S2_tableidxb = 2143
    CEFBS_None, // S2_tableidxd = 2144
    CEFBS_None, // S2_tableidxh = 2145
    CEFBS_None, // S2_tableidxw = 2146
    CEFBS_None, // S2_togglebit_i = 2147
    CEFBS_None, // S2_togglebit_r = 2148
    CEFBS_None, // S2_tstbit_i = 2149
    CEFBS_None, // S2_tstbit_r = 2150
    CEFBS_None, // S2_valignib = 2151
    CEFBS_None, // S2_valignrb = 2152
    CEFBS_None, // S2_vcnegh = 2153
    CEFBS_None, // S2_vcrotate = 2154
    CEFBS_None, // S2_vrcnegh = 2155
    CEFBS_None, // S2_vrndpackwh = 2156
    CEFBS_None, // S2_vrndpackwhs = 2157
    CEFBS_None, // S2_vsathb = 2158
    CEFBS_None, // S2_vsathb_nopack = 2159
    CEFBS_None, // S2_vsathub = 2160
    CEFBS_None, // S2_vsathub_nopack = 2161
    CEFBS_None, // S2_vsatwh = 2162
    CEFBS_None, // S2_vsatwh_nopack = 2163
    CEFBS_None, // S2_vsatwuh = 2164
    CEFBS_None, // S2_vsatwuh_nopack = 2165
    CEFBS_None, // S2_vsplatrb = 2166
    CEFBS_None, // S2_vsplatrh = 2167
    CEFBS_None, // S2_vspliceib = 2168
    CEFBS_None, // S2_vsplicerb = 2169
    CEFBS_None, // S2_vsxtbh = 2170
    CEFBS_None, // S2_vsxthw = 2171
    CEFBS_None, // S2_vtrunehb = 2172
    CEFBS_None, // S2_vtrunewh = 2173
    CEFBS_None, // S2_vtrunohb = 2174
    CEFBS_None, // S2_vtrunowh = 2175
    CEFBS_None, // S2_vzxtbh = 2176
    CEFBS_None, // S2_vzxthw = 2177
    CEFBS_None, // S4_addaddi = 2178
    CEFBS_None, // S4_addi_asl_ri = 2179
    CEFBS_None, // S4_addi_lsr_ri = 2180
    CEFBS_None, // S4_andi_asl_ri = 2181
    CEFBS_None, // S4_andi_lsr_ri = 2182
    CEFBS_None, // S4_clbaddi = 2183
    CEFBS_None, // S4_clbpaddi = 2184
    CEFBS_None, // S4_clbpnorm = 2185
    CEFBS_None, // S4_extract = 2186
    CEFBS_None, // S4_extract_rp = 2187
    CEFBS_None, // S4_extractp = 2188
    CEFBS_None, // S4_extractp_rp = 2189
    CEFBS_None, // S4_lsli = 2190
    CEFBS_None, // S4_ntstbit_i = 2191
    CEFBS_None, // S4_ntstbit_r = 2192
    CEFBS_None, // S4_or_andi = 2193
    CEFBS_None, // S4_or_andix = 2194
    CEFBS_None, // S4_or_ori = 2195
    CEFBS_None, // S4_ori_asl_ri = 2196
    CEFBS_None, // S4_ori_lsr_ri = 2197
    CEFBS_None, // S4_parity = 2198
    CEFBS_None, // S4_pstorerbf_abs = 2199
    CEFBS_None, // S4_pstorerbf_rr = 2200
    CEFBS_None, // S4_pstorerbfnew_abs = 2201
    CEFBS_None, // S4_pstorerbfnew_io = 2202
    CEFBS_None, // S4_pstorerbfnew_rr = 2203
    CEFBS_None, // S4_pstorerbnewf_abs = 2204
    CEFBS_None, // S4_pstorerbnewf_rr = 2205
    CEFBS_None, // S4_pstorerbnewfnew_abs = 2206
    CEFBS_None, // S4_pstorerbnewfnew_io = 2207
    CEFBS_None, // S4_pstorerbnewfnew_rr = 2208
    CEFBS_None, // S4_pstorerbnewt_abs = 2209
    CEFBS_None, // S4_pstorerbnewt_rr = 2210
    CEFBS_None, // S4_pstorerbnewtnew_abs = 2211
    CEFBS_None, // S4_pstorerbnewtnew_io = 2212
    CEFBS_None, // S4_pstorerbnewtnew_rr = 2213
    CEFBS_None, // S4_pstorerbt_abs = 2214
    CEFBS_None, // S4_pstorerbt_rr = 2215
    CEFBS_None, // S4_pstorerbtnew_abs = 2216
    CEFBS_None, // S4_pstorerbtnew_io = 2217
    CEFBS_None, // S4_pstorerbtnew_rr = 2218
    CEFBS_None, // S4_pstorerdf_abs = 2219
    CEFBS_None, // S4_pstorerdf_rr = 2220
    CEFBS_None, // S4_pstorerdfnew_abs = 2221
    CEFBS_None, // S4_pstorerdfnew_io = 2222
    CEFBS_None, // S4_pstorerdfnew_rr = 2223
    CEFBS_None, // S4_pstorerdt_abs = 2224
    CEFBS_None, // S4_pstorerdt_rr = 2225
    CEFBS_None, // S4_pstorerdtnew_abs = 2226
    CEFBS_None, // S4_pstorerdtnew_io = 2227
    CEFBS_None, // S4_pstorerdtnew_rr = 2228
    CEFBS_None, // S4_pstorerff_abs = 2229
    CEFBS_None, // S4_pstorerff_rr = 2230
    CEFBS_None, // S4_pstorerffnew_abs = 2231
    CEFBS_None, // S4_pstorerffnew_io = 2232
    CEFBS_None, // S4_pstorerffnew_rr = 2233
    CEFBS_None, // S4_pstorerft_abs = 2234
    CEFBS_None, // S4_pstorerft_rr = 2235
    CEFBS_None, // S4_pstorerftnew_abs = 2236
    CEFBS_None, // S4_pstorerftnew_io = 2237
    CEFBS_None, // S4_pstorerftnew_rr = 2238
    CEFBS_None, // S4_pstorerhf_abs = 2239
    CEFBS_None, // S4_pstorerhf_rr = 2240
    CEFBS_None, // S4_pstorerhfnew_abs = 2241
    CEFBS_None, // S4_pstorerhfnew_io = 2242
    CEFBS_None, // S4_pstorerhfnew_rr = 2243
    CEFBS_None, // S4_pstorerhnewf_abs = 2244
    CEFBS_None, // S4_pstorerhnewf_rr = 2245
    CEFBS_None, // S4_pstorerhnewfnew_abs = 2246
    CEFBS_None, // S4_pstorerhnewfnew_io = 2247
    CEFBS_None, // S4_pstorerhnewfnew_rr = 2248
    CEFBS_None, // S4_pstorerhnewt_abs = 2249
    CEFBS_None, // S4_pstorerhnewt_rr = 2250
    CEFBS_None, // S4_pstorerhnewtnew_abs = 2251
    CEFBS_None, // S4_pstorerhnewtnew_io = 2252
    CEFBS_None, // S4_pstorerhnewtnew_rr = 2253
    CEFBS_None, // S4_pstorerht_abs = 2254
    CEFBS_None, // S4_pstorerht_rr = 2255
    CEFBS_None, // S4_pstorerhtnew_abs = 2256
    CEFBS_None, // S4_pstorerhtnew_io = 2257
    CEFBS_None, // S4_pstorerhtnew_rr = 2258
    CEFBS_None, // S4_pstorerif_abs = 2259
    CEFBS_None, // S4_pstorerif_rr = 2260
    CEFBS_None, // S4_pstorerifnew_abs = 2261
    CEFBS_None, // S4_pstorerifnew_io = 2262
    CEFBS_None, // S4_pstorerifnew_rr = 2263
    CEFBS_None, // S4_pstorerinewf_abs = 2264
    CEFBS_None, // S4_pstorerinewf_rr = 2265
    CEFBS_None, // S4_pstorerinewfnew_abs = 2266
    CEFBS_None, // S4_pstorerinewfnew_io = 2267
    CEFBS_None, // S4_pstorerinewfnew_rr = 2268
    CEFBS_None, // S4_pstorerinewt_abs = 2269
    CEFBS_None, // S4_pstorerinewt_rr = 2270
    CEFBS_None, // S4_pstorerinewtnew_abs = 2271
    CEFBS_None, // S4_pstorerinewtnew_io = 2272
    CEFBS_None, // S4_pstorerinewtnew_rr = 2273
    CEFBS_None, // S4_pstorerit_abs = 2274
    CEFBS_None, // S4_pstorerit_rr = 2275
    CEFBS_None, // S4_pstoreritnew_abs = 2276
    CEFBS_None, // S4_pstoreritnew_io = 2277
    CEFBS_None, // S4_pstoreritnew_rr = 2278
    CEFBS_None, // S4_stored_locked = 2279
    CEFBS_None, // S4_storeirb_io = 2280
    CEFBS_None, // S4_storeirbf_io = 2281
    CEFBS_None, // S4_storeirbfnew_io = 2282
    CEFBS_None, // S4_storeirbt_io = 2283
    CEFBS_None, // S4_storeirbtnew_io = 2284
    CEFBS_None, // S4_storeirh_io = 2285
    CEFBS_None, // S4_storeirhf_io = 2286
    CEFBS_None, // S4_storeirhfnew_io = 2287
    CEFBS_None, // S4_storeirht_io = 2288
    CEFBS_None, // S4_storeirhtnew_io = 2289
    CEFBS_None, // S4_storeiri_io = 2290
    CEFBS_None, // S4_storeirif_io = 2291
    CEFBS_None, // S4_storeirifnew_io = 2292
    CEFBS_None, // S4_storeirit_io = 2293
    CEFBS_None, // S4_storeiritnew_io = 2294
    CEFBS_None, // S4_storerb_ap = 2295
    CEFBS_None, // S4_storerb_rr = 2296
    CEFBS_None, // S4_storerb_ur = 2297
    CEFBS_None, // S4_storerbnew_ap = 2298
    CEFBS_None, // S4_storerbnew_rr = 2299
    CEFBS_None, // S4_storerbnew_ur = 2300
    CEFBS_None, // S4_storerd_ap = 2301
    CEFBS_None, // S4_storerd_rr = 2302
    CEFBS_None, // S4_storerd_ur = 2303
    CEFBS_None, // S4_storerf_ap = 2304
    CEFBS_None, // S4_storerf_rr = 2305
    CEFBS_None, // S4_storerf_ur = 2306
    CEFBS_None, // S4_storerh_ap = 2307
    CEFBS_None, // S4_storerh_rr = 2308
    CEFBS_None, // S4_storerh_ur = 2309
    CEFBS_None, // S4_storerhnew_ap = 2310
    CEFBS_None, // S4_storerhnew_rr = 2311
    CEFBS_None, // S4_storerhnew_ur = 2312
    CEFBS_None, // S4_storeri_ap = 2313
    CEFBS_None, // S4_storeri_rr = 2314
    CEFBS_None, // S4_storeri_ur = 2315
    CEFBS_None, // S4_storerinew_ap = 2316
    CEFBS_None, // S4_storerinew_rr = 2317
    CEFBS_None, // S4_storerinew_ur = 2318
    CEFBS_None, // S4_subaddi = 2319
    CEFBS_None, // S4_subi_asl_ri = 2320
    CEFBS_None, // S4_subi_lsr_ri = 2321
    CEFBS_None, // S4_vrcrotate = 2322
    CEFBS_None, // S4_vrcrotate_acc = 2323
    CEFBS_None, // S4_vxaddsubh = 2324
    CEFBS_None, // S4_vxaddsubhr = 2325
    CEFBS_None, // S4_vxaddsubw = 2326
    CEFBS_None, // S4_vxsubaddh = 2327
    CEFBS_None, // S4_vxsubaddhr = 2328
    CEFBS_None, // S4_vxsubaddw = 2329
    CEFBS_None, // S5_asrhub_rnd_sat = 2330
    CEFBS_None, // S5_asrhub_sat = 2331
    CEFBS_None, // S5_popcountp = 2332
    CEFBS_None, // S5_vasrhrnd = 2333
    CEFBS_HasV60, // S6_rol_i_p = 2334
    CEFBS_HasV60, // S6_rol_i_p_acc = 2335
    CEFBS_HasV60, // S6_rol_i_p_and = 2336
    CEFBS_HasV60, // S6_rol_i_p_nac = 2337
    CEFBS_HasV60, // S6_rol_i_p_or = 2338
    CEFBS_HasV60, // S6_rol_i_p_xacc = 2339
    CEFBS_HasV60, // S6_rol_i_r = 2340
    CEFBS_HasV60, // S6_rol_i_r_acc = 2341
    CEFBS_HasV60, // S6_rol_i_r_and = 2342
    CEFBS_HasV60, // S6_rol_i_r_nac = 2343
    CEFBS_HasV60, // S6_rol_i_r_or = 2344
    CEFBS_HasV60, // S6_rol_i_r_xacc = 2345
    CEFBS_HasV62, // S6_vsplatrbp = 2346
    CEFBS_HasV62, // S6_vtrunehb_ppp = 2347
    CEFBS_HasV62, // S6_vtrunohb_ppp = 2348
    CEFBS_None, // SA1_addi = 2349
    CEFBS_None, // SA1_addrx = 2350
    CEFBS_None, // SA1_addsp = 2351
    CEFBS_None, // SA1_and1 = 2352
    CEFBS_None, // SA1_clrf = 2353
    CEFBS_None, // SA1_clrfnew = 2354
    CEFBS_None, // SA1_clrt = 2355
    CEFBS_None, // SA1_clrtnew = 2356
    CEFBS_None, // SA1_cmpeqi = 2357
    CEFBS_None, // SA1_combine0i = 2358
    CEFBS_None, // SA1_combine1i = 2359
    CEFBS_None, // SA1_combine2i = 2360
    CEFBS_None, // SA1_combine3i = 2361
    CEFBS_None, // SA1_combinerz = 2362
    CEFBS_None, // SA1_combinezr = 2363
    CEFBS_None, // SA1_dec = 2364
    CEFBS_None, // SA1_inc = 2365
    CEFBS_None, // SA1_seti = 2366
    CEFBS_None, // SA1_setin1 = 2367
    CEFBS_None, // SA1_sxtb = 2368
    CEFBS_None, // SA1_sxth = 2369
    CEFBS_None, // SA1_tfr = 2370
    CEFBS_None, // SA1_zxtb = 2371
    CEFBS_None, // SA1_zxth = 2372
    CEFBS_None, // SAVE_REGISTERS_CALL_V4 = 2373
    CEFBS_None, // SAVE_REGISTERS_CALL_V4STK = 2374
    CEFBS_None, // SAVE_REGISTERS_CALL_V4STK_EXT = 2375
    CEFBS_None, // SAVE_REGISTERS_CALL_V4STK_EXT_PIC = 2376
    CEFBS_None, // SAVE_REGISTERS_CALL_V4STK_PIC = 2377
    CEFBS_None, // SAVE_REGISTERS_CALL_V4_EXT = 2378
    CEFBS_None, // SAVE_REGISTERS_CALL_V4_EXT_PIC = 2379
    CEFBS_None, // SAVE_REGISTERS_CALL_V4_PIC = 2380
    CEFBS_None, // SL1_loadri_io = 2381
    CEFBS_None, // SL1_loadrub_io = 2382
    CEFBS_None, // SL2_deallocframe = 2383
    CEFBS_None, // SL2_jumpr31 = 2384
    CEFBS_None, // SL2_jumpr31_f = 2385
    CEFBS_None, // SL2_jumpr31_fnew = 2386
    CEFBS_None, // SL2_jumpr31_t = 2387
    CEFBS_None, // SL2_jumpr31_tnew = 2388
    CEFBS_None, // SL2_loadrb_io = 2389
    CEFBS_None, // SL2_loadrd_sp = 2390
    CEFBS_None, // SL2_loadrh_io = 2391
    CEFBS_None, // SL2_loadri_sp = 2392
    CEFBS_None, // SL2_loadruh_io = 2393
    CEFBS_None, // SL2_return = 2394
    CEFBS_None, // SL2_return_f = 2395
    CEFBS_None, // SL2_return_fnew = 2396
    CEFBS_None, // SL2_return_t = 2397
    CEFBS_None, // SL2_return_tnew = 2398
    CEFBS_None, // SS1_storeb_io = 2399
    CEFBS_None, // SS1_storew_io = 2400
    CEFBS_None, // SS2_allocframe = 2401
    CEFBS_None, // SS2_storebi0 = 2402
    CEFBS_None, // SS2_storebi1 = 2403
    CEFBS_None, // SS2_stored_sp = 2404
    CEFBS_None, // SS2_storeh_io = 2405
    CEFBS_None, // SS2_storew_sp = 2406
    CEFBS_None, // SS2_storewi0 = 2407
    CEFBS_None, // SS2_storewi1 = 2408
    CEFBS_None, // TFRI64_V2_ext = 2409
    CEFBS_None, // TFRI64_V4 = 2410
    CEFBS_UseHVXV60, // V6_extractw = 2411
    CEFBS_UseHVXV62, // V6_lvsplatb = 2412
    CEFBS_UseHVXV62, // V6_lvsplath = 2413
    CEFBS_UseHVXV60, // V6_lvsplatw = 2414
    CEFBS_UseHVXV60, // V6_pred_and = 2415
    CEFBS_UseHVXV60, // V6_pred_and_n = 2416
    CEFBS_UseHVXV60, // V6_pred_not = 2417
    CEFBS_UseHVXV60, // V6_pred_or = 2418
    CEFBS_UseHVXV60, // V6_pred_or_n = 2419
    CEFBS_UseHVXV60, // V6_pred_scalar2 = 2420
    CEFBS_UseHVXV62, // V6_pred_scalar2v2 = 2421
    CEFBS_UseHVXV60, // V6_pred_xor = 2422
    CEFBS_UseHVXV62, // V6_shuffeqh = 2423
    CEFBS_UseHVXV62, // V6_shuffeqw = 2424
    CEFBS_UseHVXV60, // V6_vL32Ub_ai = 2425
    CEFBS_UseHVXV60, // V6_vL32Ub_pi = 2426
    CEFBS_UseHVXV60, // V6_vL32Ub_ppu = 2427
    CEFBS_UseHVXV60, // V6_vL32b_ai = 2428
    CEFBS_UseHVXV60, // V6_vL32b_cur_ai = 2429
    CEFBS_UseHVXV62, // V6_vL32b_cur_npred_ai = 2430
    CEFBS_UseHVXV62, // V6_vL32b_cur_npred_pi = 2431
    CEFBS_UseHVXV62, // V6_vL32b_cur_npred_ppu = 2432
    CEFBS_UseHVXV60, // V6_vL32b_cur_pi = 2433
    CEFBS_UseHVXV60, // V6_vL32b_cur_ppu = 2434
    CEFBS_UseHVXV62, // V6_vL32b_cur_pred_ai = 2435
    CEFBS_UseHVXV62, // V6_vL32b_cur_pred_pi = 2436
    CEFBS_UseHVXV62, // V6_vL32b_cur_pred_ppu = 2437
    CEFBS_UseHVXV62, // V6_vL32b_npred_ai = 2438
    CEFBS_UseHVXV62, // V6_vL32b_npred_pi = 2439
    CEFBS_UseHVXV62, // V6_vL32b_npred_ppu = 2440
    CEFBS_UseHVXV60, // V6_vL32b_nt_ai = 2441
    CEFBS_UseHVXV60, // V6_vL32b_nt_cur_ai = 2442
    CEFBS_UseHVXV62, // V6_vL32b_nt_cur_npred_ai = 2443
    CEFBS_UseHVXV62, // V6_vL32b_nt_cur_npred_pi = 2444
    CEFBS_UseHVXV62, // V6_vL32b_nt_cur_npred_ppu = 2445
    CEFBS_UseHVXV60, // V6_vL32b_nt_cur_pi = 2446
    CEFBS_UseHVXV60, // V6_vL32b_nt_cur_ppu = 2447
    CEFBS_UseHVXV62, // V6_vL32b_nt_cur_pred_ai = 2448
    CEFBS_UseHVXV62, // V6_vL32b_nt_cur_pred_pi = 2449
    CEFBS_UseHVXV62, // V6_vL32b_nt_cur_pred_ppu = 2450
    CEFBS_UseHVXV62, // V6_vL32b_nt_npred_ai = 2451
    CEFBS_UseHVXV62, // V6_vL32b_nt_npred_pi = 2452
    CEFBS_UseHVXV62, // V6_vL32b_nt_npred_ppu = 2453
    CEFBS_UseHVXV60, // V6_vL32b_nt_pi = 2454
    CEFBS_UseHVXV60, // V6_vL32b_nt_ppu = 2455
    CEFBS_UseHVXV62, // V6_vL32b_nt_pred_ai = 2456
    CEFBS_UseHVXV62, // V6_vL32b_nt_pred_pi = 2457
    CEFBS_UseHVXV62, // V6_vL32b_nt_pred_ppu = 2458
    CEFBS_UseHVXV60, // V6_vL32b_nt_tmp_ai = 2459
    CEFBS_UseHVXV62, // V6_vL32b_nt_tmp_npred_ai = 2460
    CEFBS_UseHVXV62, // V6_vL32b_nt_tmp_npred_pi = 2461
    CEFBS_UseHVXV62, // V6_vL32b_nt_tmp_npred_ppu = 2462
    CEFBS_UseHVXV60, // V6_vL32b_nt_tmp_pi = 2463
    CEFBS_UseHVXV60, // V6_vL32b_nt_tmp_ppu = 2464
    CEFBS_UseHVXV62, // V6_vL32b_nt_tmp_pred_ai = 2465
    CEFBS_UseHVXV62, // V6_vL32b_nt_tmp_pred_pi = 2466
    CEFBS_UseHVXV62, // V6_vL32b_nt_tmp_pred_ppu = 2467
    CEFBS_UseHVXV60, // V6_vL32b_pi = 2468
    CEFBS_UseHVXV60, // V6_vL32b_ppu = 2469
    CEFBS_UseHVXV62, // V6_vL32b_pred_ai = 2470
    CEFBS_UseHVXV62, // V6_vL32b_pred_pi = 2471
    CEFBS_UseHVXV62, // V6_vL32b_pred_ppu = 2472
    CEFBS_UseHVXV60, // V6_vL32b_tmp_ai = 2473
    CEFBS_UseHVXV62, // V6_vL32b_tmp_npred_ai = 2474
    CEFBS_UseHVXV62, // V6_vL32b_tmp_npred_pi = 2475
    CEFBS_UseHVXV62, // V6_vL32b_tmp_npred_ppu = 2476
    CEFBS_UseHVXV60, // V6_vL32b_tmp_pi = 2477
    CEFBS_UseHVXV60, // V6_vL32b_tmp_ppu = 2478
    CEFBS_UseHVXV62, // V6_vL32b_tmp_pred_ai = 2479
    CEFBS_UseHVXV62, // V6_vL32b_tmp_pred_pi = 2480
    CEFBS_UseHVXV62, // V6_vL32b_tmp_pred_ppu = 2481
    CEFBS_UseHVXV60, // V6_vS32Ub_ai = 2482
    CEFBS_UseHVXV60, // V6_vS32Ub_npred_ai = 2483
    CEFBS_UseHVXV60, // V6_vS32Ub_npred_pi = 2484
    CEFBS_UseHVXV60, // V6_vS32Ub_npred_ppu = 2485
    CEFBS_UseHVXV60, // V6_vS32Ub_pi = 2486
    CEFBS_UseHVXV60, // V6_vS32Ub_ppu = 2487
    CEFBS_UseHVXV60, // V6_vS32Ub_pred_ai = 2488
    CEFBS_UseHVXV60, // V6_vS32Ub_pred_pi = 2489
    CEFBS_UseHVXV60, // V6_vS32Ub_pred_ppu = 2490
    CEFBS_UseHVXV60, // V6_vS32b_ai = 2491
    CEFBS_UseHVXV60, // V6_vS32b_new_ai = 2492
    CEFBS_UseHVXV60, // V6_vS32b_new_npred_ai = 2493
    CEFBS_UseHVXV60, // V6_vS32b_new_npred_pi = 2494
    CEFBS_UseHVXV60, // V6_vS32b_new_npred_ppu = 2495
    CEFBS_UseHVXV60, // V6_vS32b_new_pi = 2496
    CEFBS_UseHVXV60, // V6_vS32b_new_ppu = 2497
    CEFBS_UseHVXV60, // V6_vS32b_new_pred_ai = 2498
    CEFBS_UseHVXV60, // V6_vS32b_new_pred_pi = 2499
    CEFBS_UseHVXV60, // V6_vS32b_new_pred_ppu = 2500
    CEFBS_UseHVXV60, // V6_vS32b_npred_ai = 2501
    CEFBS_UseHVXV60, // V6_vS32b_npred_pi = 2502
    CEFBS_UseHVXV60, // V6_vS32b_npred_ppu = 2503
    CEFBS_UseHVXV60, // V6_vS32b_nqpred_ai = 2504
    CEFBS_UseHVXV60, // V6_vS32b_nqpred_pi = 2505
    CEFBS_UseHVXV60, // V6_vS32b_nqpred_ppu = 2506
    CEFBS_UseHVXV60, // V6_vS32b_nt_ai = 2507
    CEFBS_UseHVXV60, // V6_vS32b_nt_new_ai = 2508
    CEFBS_UseHVXV60, // V6_vS32b_nt_new_npred_ai = 2509
    CEFBS_UseHVXV60, // V6_vS32b_nt_new_npred_pi = 2510
    CEFBS_UseHVXV60, // V6_vS32b_nt_new_npred_ppu = 2511
    CEFBS_UseHVXV60, // V6_vS32b_nt_new_pi = 2512
    CEFBS_UseHVXV60, // V6_vS32b_nt_new_ppu = 2513
    CEFBS_UseHVXV60, // V6_vS32b_nt_new_pred_ai = 2514
    CEFBS_UseHVXV60, // V6_vS32b_nt_new_pred_pi = 2515
    CEFBS_UseHVXV60, // V6_vS32b_nt_new_pred_ppu = 2516
    CEFBS_UseHVXV60, // V6_vS32b_nt_npred_ai = 2517
    CEFBS_UseHVXV60, // V6_vS32b_nt_npred_pi = 2518
    CEFBS_UseHVXV60, // V6_vS32b_nt_npred_ppu = 2519
    CEFBS_UseHVXV60, // V6_vS32b_nt_nqpred_ai = 2520
    CEFBS_UseHVXV60, // V6_vS32b_nt_nqpred_pi = 2521
    CEFBS_UseHVXV60, // V6_vS32b_nt_nqpred_ppu = 2522
    CEFBS_UseHVXV60, // V6_vS32b_nt_pi = 2523
    CEFBS_UseHVXV60, // V6_vS32b_nt_ppu = 2524
    CEFBS_UseHVXV60, // V6_vS32b_nt_pred_ai = 2525
    CEFBS_UseHVXV60, // V6_vS32b_nt_pred_pi = 2526
    CEFBS_UseHVXV60, // V6_vS32b_nt_pred_ppu = 2527
    CEFBS_UseHVXV60, // V6_vS32b_nt_qpred_ai = 2528
    CEFBS_UseHVXV60, // V6_vS32b_nt_qpred_pi = 2529
    CEFBS_UseHVXV60, // V6_vS32b_nt_qpred_ppu = 2530
    CEFBS_UseHVXV60, // V6_vS32b_pi = 2531
    CEFBS_UseHVXV60, // V6_vS32b_ppu = 2532
    CEFBS_UseHVXV60, // V6_vS32b_pred_ai = 2533
    CEFBS_UseHVXV60, // V6_vS32b_pred_pi = 2534
    CEFBS_UseHVXV60, // V6_vS32b_pred_ppu = 2535
    CEFBS_UseHVXV60, // V6_vS32b_qpred_ai = 2536
    CEFBS_UseHVXV60, // V6_vS32b_qpred_pi = 2537
    CEFBS_UseHVXV60, // V6_vS32b_qpred_ppu = 2538
    CEFBS_UseHVXV65, // V6_vS32b_srls_ai = 2539
    CEFBS_UseHVXV65, // V6_vS32b_srls_pi = 2540
    CEFBS_UseHVXV65, // V6_vS32b_srls_ppu = 2541
    CEFBS_UseHVXV65, // V6_vabsb = 2542
    CEFBS_UseHVXV65, // V6_vabsb_sat = 2543
    CEFBS_UseHVXV60, // V6_vabsdiffh = 2544
    CEFBS_UseHVXV60, // V6_vabsdiffub = 2545
    CEFBS_UseHVXV60, // V6_vabsdiffuh = 2546
    CEFBS_UseHVXV60, // V6_vabsdiffw = 2547
    CEFBS_UseHVXV60, // V6_vabsh = 2548
    CEFBS_UseHVXV60, // V6_vabsh_sat = 2549
    CEFBS_UseHVXV60, // V6_vabsw = 2550
    CEFBS_UseHVXV60, // V6_vabsw_sat = 2551
    CEFBS_UseHVXV60, // V6_vaddb = 2552
    CEFBS_UseHVXV60, // V6_vaddb_dv = 2553
    CEFBS_UseHVXV60, // V6_vaddbnq = 2554
    CEFBS_UseHVXV60, // V6_vaddbq = 2555
    CEFBS_UseHVXV62, // V6_vaddbsat = 2556
    CEFBS_UseHVXV62, // V6_vaddbsat_dv = 2557
    CEFBS_UseHVXV62, // V6_vaddcarry = 2558
    CEFBS_UseHVXV66, // V6_vaddcarryo = 2559
    CEFBS_UseHVXV66, // V6_vaddcarrysat = 2560
    CEFBS_UseHVXV62, // V6_vaddclbh = 2561
    CEFBS_UseHVXV62, // V6_vaddclbw = 2562
    CEFBS_UseHVXV60, // V6_vaddh = 2563
    CEFBS_UseHVXV60, // V6_vaddh_dv = 2564
    CEFBS_UseHVXV60, // V6_vaddhnq = 2565
    CEFBS_UseHVXV60, // V6_vaddhq = 2566
    CEFBS_UseHVXV60, // V6_vaddhsat = 2567
    CEFBS_UseHVXV60, // V6_vaddhsat_dv = 2568
    CEFBS_UseHVXV60, // V6_vaddhw = 2569
    CEFBS_UseHVXV62, // V6_vaddhw_acc = 2570
    CEFBS_UseHVXV60, // V6_vaddubh = 2571
    CEFBS_UseHVXV62, // V6_vaddubh_acc = 2572
    CEFBS_UseHVXV60, // V6_vaddubsat = 2573
    CEFBS_UseHVXV60, // V6_vaddubsat_dv = 2574
    CEFBS_UseHVXV62, // V6_vaddububb_sat = 2575
    CEFBS_UseHVXV60, // V6_vadduhsat = 2576
    CEFBS_UseHVXV60, // V6_vadduhsat_dv = 2577
    CEFBS_UseHVXV60, // V6_vadduhw = 2578
    CEFBS_UseHVXV62, // V6_vadduhw_acc = 2579
    CEFBS_UseHVXV62, // V6_vadduwsat = 2580
    CEFBS_UseHVXV62, // V6_vadduwsat_dv = 2581
    CEFBS_UseHVXV60, // V6_vaddw = 2582
    CEFBS_UseHVXV60, // V6_vaddw_dv = 2583
    CEFBS_UseHVXV60, // V6_vaddwnq = 2584
    CEFBS_UseHVXV60, // V6_vaddwq = 2585
    CEFBS_UseHVXV60, // V6_vaddwsat = 2586
    CEFBS_UseHVXV60, // V6_vaddwsat_dv = 2587
    CEFBS_UseHVXV60, // V6_valignb = 2588
    CEFBS_UseHVXV60, // V6_valignbi = 2589
    CEFBS_UseHVXV60, // V6_vand = 2590
    CEFBS_UseHVXV62, // V6_vandnqrt = 2591
    CEFBS_UseHVXV62, // V6_vandnqrt_acc = 2592
    CEFBS_UseHVXV60, // V6_vandqrt = 2593
    CEFBS_UseHVXV60, // V6_vandqrt_acc = 2594
    CEFBS_UseHVXV62, // V6_vandvnqv = 2595
    CEFBS_UseHVXV62, // V6_vandvqv = 2596
    CEFBS_UseHVXV60, // V6_vandvrt = 2597
    CEFBS_UseHVXV60, // V6_vandvrt_acc = 2598
    CEFBS_UseHVXV60, // V6_vaslh = 2599
    CEFBS_UseHVXV65, // V6_vaslh_acc = 2600
    CEFBS_UseHVXV60, // V6_vaslhv = 2601
    CEFBS_UseHVXV60, // V6_vaslw = 2602
    CEFBS_UseHVXV60, // V6_vaslw_acc = 2603
    CEFBS_UseHVXV60, // V6_vaslwv = 2604
    CEFBS_UseHVXV66, // V6_vasr_into = 2605
    CEFBS_UseHVXV60, // V6_vasrh = 2606
    CEFBS_UseHVXV65, // V6_vasrh_acc = 2607
    CEFBS_UseHVXV60, // V6_vasrhbrndsat = 2608
    CEFBS_UseHVXV62, // V6_vasrhbsat = 2609
    CEFBS_UseHVXV60, // V6_vasrhubrndsat = 2610
    CEFBS_UseHVXV60, // V6_vasrhubsat = 2611
    CEFBS_UseHVXV60, // V6_vasrhv = 2612
    CEFBS_UseHVXV65, // V6_vasruhubrndsat = 2613
    CEFBS_UseHVXV65, // V6_vasruhubsat = 2614
    CEFBS_UseHVXV62, // V6_vasruwuhrndsat = 2615
    CEFBS_UseHVXV65, // V6_vasruwuhsat = 2616
    CEFBS_UseHVXV60, // V6_vasrw = 2617
    CEFBS_UseHVXV60, // V6_vasrw_acc = 2618
    CEFBS_UseHVXV60, // V6_vasrwh = 2619
    CEFBS_UseHVXV60, // V6_vasrwhrndsat = 2620
    CEFBS_UseHVXV60, // V6_vasrwhsat = 2621
    CEFBS_UseHVXV62, // V6_vasrwuhrndsat = 2622
    CEFBS_UseHVXV60, // V6_vasrwuhsat = 2623
    CEFBS_UseHVXV60, // V6_vasrwv = 2624
    CEFBS_UseHVXV60, // V6_vassign = 2625
    CEFBS_UseHVXV65, // V6_vavgb = 2626
    CEFBS_UseHVXV65, // V6_vavgbrnd = 2627
    CEFBS_UseHVXV60, // V6_vavgh = 2628
    CEFBS_UseHVXV60, // V6_vavghrnd = 2629
    CEFBS_UseHVXV60, // V6_vavgub = 2630
    CEFBS_UseHVXV60, // V6_vavgubrnd = 2631
    CEFBS_UseHVXV60, // V6_vavguh = 2632
    CEFBS_UseHVXV60, // V6_vavguhrnd = 2633
    CEFBS_UseHVXV65, // V6_vavguw = 2634
    CEFBS_UseHVXV65, // V6_vavguwrnd = 2635
    CEFBS_UseHVXV60, // V6_vavgw = 2636
    CEFBS_UseHVXV60, // V6_vavgwrnd = 2637
    CEFBS_UseHVXV60, // V6_vccombine = 2638
    CEFBS_UseHVXV60, // V6_vcl0h = 2639
    CEFBS_UseHVXV60, // V6_vcl0w = 2640
    CEFBS_UseHVXV60, // V6_vcmov = 2641
    CEFBS_UseHVXV60, // V6_vcombine = 2642
    CEFBS_UseHVXV60, // V6_vdeal = 2643
    CEFBS_UseHVXV60, // V6_vdealb = 2644
    CEFBS_UseHVXV60, // V6_vdealb4w = 2645
    CEFBS_UseHVXV60, // V6_vdealh = 2646
    CEFBS_UseHVXV60, // V6_vdealvdd = 2647
    CEFBS_UseHVXV60, // V6_vdelta = 2648
    CEFBS_UseHVXV60, // V6_vdmpybus = 2649
    CEFBS_UseHVXV60, // V6_vdmpybus_acc = 2650
    CEFBS_UseHVXV60, // V6_vdmpybus_dv = 2651
    CEFBS_UseHVXV60, // V6_vdmpybus_dv_acc = 2652
    CEFBS_UseHVXV60, // V6_vdmpyhb = 2653
    CEFBS_UseHVXV60, // V6_vdmpyhb_acc = 2654
    CEFBS_UseHVXV60, // V6_vdmpyhb_dv = 2655
    CEFBS_UseHVXV60, // V6_vdmpyhb_dv_acc = 2656
    CEFBS_UseHVXV60, // V6_vdmpyhisat = 2657
    CEFBS_UseHVXV60, // V6_vdmpyhisat_acc = 2658
    CEFBS_UseHVXV60, // V6_vdmpyhsat = 2659
    CEFBS_UseHVXV60, // V6_vdmpyhsat_acc = 2660
    CEFBS_UseHVXV60, // V6_vdmpyhsuisat = 2661
    CEFBS_UseHVXV60, // V6_vdmpyhsuisat_acc = 2662
    CEFBS_UseHVXV60, // V6_vdmpyhsusat = 2663
    CEFBS_UseHVXV60, // V6_vdmpyhsusat_acc = 2664
    CEFBS_UseHVXV60, // V6_vdmpyhvsat = 2665
    CEFBS_UseHVXV60, // V6_vdmpyhvsat_acc = 2666
    CEFBS_UseHVXV60, // V6_vdsaduh = 2667
    CEFBS_UseHVXV60, // V6_vdsaduh_acc = 2668
    CEFBS_UseHVXV60, // V6_veqb = 2669
    CEFBS_UseHVXV60, // V6_veqb_and = 2670
    CEFBS_UseHVXV60, // V6_veqb_or = 2671
    CEFBS_UseHVXV60, // V6_veqb_xor = 2672
    CEFBS_UseHVXV60, // V6_veqh = 2673
    CEFBS_UseHVXV60, // V6_veqh_and = 2674
    CEFBS_UseHVXV60, // V6_veqh_or = 2675
    CEFBS_UseHVXV60, // V6_veqh_xor = 2676
    CEFBS_UseHVXV60, // V6_veqw = 2677
    CEFBS_UseHVXV60, // V6_veqw_and = 2678
    CEFBS_UseHVXV60, // V6_veqw_or = 2679
    CEFBS_UseHVXV60, // V6_veqw_xor = 2680
    CEFBS_UseHVXV65, // V6_vgathermh = 2681
    CEFBS_UseHVXV65, // V6_vgathermhq = 2682
    CEFBS_UseHVXV65, // V6_vgathermhw = 2683
    CEFBS_UseHVXV65, // V6_vgathermhwq = 2684
    CEFBS_UseHVXV65, // V6_vgathermw = 2685
    CEFBS_UseHVXV65, // V6_vgathermwq = 2686
    CEFBS_UseHVXV60, // V6_vgtb = 2687
    CEFBS_UseHVXV60, // V6_vgtb_and = 2688
    CEFBS_UseHVXV60, // V6_vgtb_or = 2689
    CEFBS_UseHVXV60, // V6_vgtb_xor = 2690
    CEFBS_UseHVXV60, // V6_vgth = 2691
    CEFBS_UseHVXV60, // V6_vgth_and = 2692
    CEFBS_UseHVXV60, // V6_vgth_or = 2693
    CEFBS_UseHVXV60, // V6_vgth_xor = 2694
    CEFBS_UseHVXV60, // V6_vgtub = 2695
    CEFBS_UseHVXV60, // V6_vgtub_and = 2696
    CEFBS_UseHVXV60, // V6_vgtub_or = 2697
    CEFBS_UseHVXV60, // V6_vgtub_xor = 2698
    CEFBS_UseHVXV60, // V6_vgtuh = 2699
    CEFBS_UseHVXV60, // V6_vgtuh_and = 2700
    CEFBS_UseHVXV60, // V6_vgtuh_or = 2701
    CEFBS_UseHVXV60, // V6_vgtuh_xor = 2702
    CEFBS_UseHVXV60, // V6_vgtuw = 2703
    CEFBS_UseHVXV60, // V6_vgtuw_and = 2704
    CEFBS_UseHVXV60, // V6_vgtuw_or = 2705
    CEFBS_UseHVXV60, // V6_vgtuw_xor = 2706
    CEFBS_UseHVXV60, // V6_vgtw = 2707
    CEFBS_UseHVXV60, // V6_vgtw_and = 2708
    CEFBS_UseHVXV60, // V6_vgtw_or = 2709
    CEFBS_UseHVXV60, // V6_vgtw_xor = 2710
    CEFBS_UseHVXV60, // V6_vhist = 2711
    CEFBS_UseHVXV60, // V6_vhistq = 2712
    CEFBS_UseHVXV60, // V6_vinsertwr = 2713
    CEFBS_UseHVXV60, // V6_vlalignb = 2714
    CEFBS_UseHVXV60, // V6_vlalignbi = 2715
    CEFBS_UseHVXV62, // V6_vlsrb = 2716
    CEFBS_UseHVXV60, // V6_vlsrh = 2717
    CEFBS_UseHVXV60, // V6_vlsrhv = 2718
    CEFBS_UseHVXV60, // V6_vlsrw = 2719
    CEFBS_UseHVXV60, // V6_vlsrwv = 2720
    CEFBS_UseHVXV65, // V6_vlut4 = 2721
    CEFBS_UseHVXV60, // V6_vlutvvb = 2722
    CEFBS_UseHVXV62, // V6_vlutvvb_nm = 2723
    CEFBS_UseHVXV60, // V6_vlutvvb_oracc = 2724
    CEFBS_UseHVXV62, // V6_vlutvvb_oracci = 2725
    CEFBS_UseHVXV62, // V6_vlutvvbi = 2726
    CEFBS_UseHVXV60, // V6_vlutvwh = 2727
    CEFBS_UseHVXV62, // V6_vlutvwh_nm = 2728
    CEFBS_UseHVXV60, // V6_vlutvwh_oracc = 2729
    CEFBS_UseHVXV62, // V6_vlutvwh_oracci = 2730
    CEFBS_UseHVXV62, // V6_vlutvwhi = 2731
    CEFBS_UseHVXV62, // V6_vmaxb = 2732
    CEFBS_UseHVXV60, // V6_vmaxh = 2733
    CEFBS_UseHVXV60, // V6_vmaxub = 2734
    CEFBS_UseHVXV60, // V6_vmaxuh = 2735
    CEFBS_UseHVXV60, // V6_vmaxw = 2736
    CEFBS_UseHVXV62, // V6_vminb = 2737
    CEFBS_UseHVXV60, // V6_vminh = 2738
    CEFBS_UseHVXV60, // V6_vminub = 2739
    CEFBS_UseHVXV60, // V6_vminuh = 2740
    CEFBS_UseHVXV60, // V6_vminw = 2741
    CEFBS_UseHVXV60, // V6_vmpabus = 2742
    CEFBS_UseHVXV60, // V6_vmpabus_acc = 2743
    CEFBS_UseHVXV60, // V6_vmpabusv = 2744
    CEFBS_UseHVXV65, // V6_vmpabuu = 2745
    CEFBS_UseHVXV65, // V6_vmpabuu_acc = 2746
    CEFBS_UseHVXV60, // V6_vmpabuuv = 2747
    CEFBS_UseHVXV60, // V6_vmpahb = 2748
    CEFBS_UseHVXV60, // V6_vmpahb_acc = 2749
    CEFBS_UseHVXV65, // V6_vmpahhsat = 2750
    CEFBS_UseHVXV62, // V6_vmpauhb = 2751
    CEFBS_UseHVXV62, // V6_vmpauhb_acc = 2752
    CEFBS_UseHVXV65, // V6_vmpauhuhsat = 2753
    CEFBS_UseHVXV65, // V6_vmpsuhuhsat = 2754
    CEFBS_UseHVXV60, // V6_vmpybus = 2755
    CEFBS_UseHVXV60, // V6_vmpybus_acc = 2756
    CEFBS_UseHVXV60, // V6_vmpybusv = 2757
    CEFBS_UseHVXV60, // V6_vmpybusv_acc = 2758
    CEFBS_UseHVXV60, // V6_vmpybv = 2759
    CEFBS_UseHVXV60, // V6_vmpybv_acc = 2760
    CEFBS_UseHVXV60, // V6_vmpyewuh = 2761
    CEFBS_UseHVXV62, // V6_vmpyewuh_64 = 2762
    CEFBS_UseHVXV60, // V6_vmpyh = 2763
    CEFBS_UseHVXV65, // V6_vmpyh_acc = 2764
    CEFBS_UseHVXV60, // V6_vmpyhsat_acc = 2765
    CEFBS_UseHVXV60, // V6_vmpyhsrs = 2766
    CEFBS_UseHVXV60, // V6_vmpyhss = 2767
    CEFBS_UseHVXV60, // V6_vmpyhus = 2768
    CEFBS_UseHVXV60, // V6_vmpyhus_acc = 2769
    CEFBS_UseHVXV60, // V6_vmpyhv = 2770
    CEFBS_UseHVXV60, // V6_vmpyhv_acc = 2771
    CEFBS_UseHVXV60, // V6_vmpyhvsrs = 2772
    CEFBS_UseHVXV60, // V6_vmpyieoh = 2773
    CEFBS_UseHVXV60, // V6_vmpyiewh_acc = 2774
    CEFBS_UseHVXV60, // V6_vmpyiewuh = 2775
    CEFBS_UseHVXV60, // V6_vmpyiewuh_acc = 2776
    CEFBS_UseHVXV60, // V6_vmpyih = 2777
    CEFBS_UseHVXV60, // V6_vmpyih_acc = 2778
    CEFBS_UseHVXV60, // V6_vmpyihb = 2779
    CEFBS_UseHVXV60, // V6_vmpyihb_acc = 2780
    CEFBS_UseHVXV60, // V6_vmpyiowh = 2781
    CEFBS_UseHVXV60, // V6_vmpyiwb = 2782
    CEFBS_UseHVXV60, // V6_vmpyiwb_acc = 2783
    CEFBS_UseHVXV60, // V6_vmpyiwh = 2784
    CEFBS_UseHVXV60, // V6_vmpyiwh_acc = 2785
    CEFBS_UseHVXV62, // V6_vmpyiwub = 2786
    CEFBS_UseHVXV62, // V6_vmpyiwub_acc = 2787
    CEFBS_UseHVXV60, // V6_vmpyowh = 2788
    CEFBS_UseHVXV62, // V6_vmpyowh_64_acc = 2789
    CEFBS_UseHVXV60, // V6_vmpyowh_rnd = 2790
    CEFBS_UseHVXV60, // V6_vmpyowh_rnd_sacc = 2791
    CEFBS_UseHVXV60, // V6_vmpyowh_sacc = 2792
    CEFBS_UseHVXV60, // V6_vmpyub = 2793
    CEFBS_UseHVXV60, // V6_vmpyub_acc = 2794
    CEFBS_UseHVXV60, // V6_vmpyubv = 2795
    CEFBS_UseHVXV60, // V6_vmpyubv_acc = 2796
    CEFBS_UseHVXV60, // V6_vmpyuh = 2797
    CEFBS_UseHVXV60, // V6_vmpyuh_acc = 2798
    CEFBS_UseHVXV65, // V6_vmpyuhe = 2799
    CEFBS_UseHVXV65, // V6_vmpyuhe_acc = 2800
    CEFBS_UseHVXV60, // V6_vmpyuhv = 2801
    CEFBS_UseHVXV60, // V6_vmpyuhv_acc = 2802
    CEFBS_UseHVXV60, // V6_vmux = 2803
    CEFBS_UseHVXV65, // V6_vnavgb = 2804
    CEFBS_UseHVXV60, // V6_vnavgh = 2805
    CEFBS_UseHVXV60, // V6_vnavgub = 2806
    CEFBS_UseHVXV60, // V6_vnavgw = 2807
    CEFBS_UseHVXV60, // V6_vnccombine = 2808
    CEFBS_UseHVXV60, // V6_vncmov = 2809
    CEFBS_UseHVXV60, // V6_vnormamth = 2810
    CEFBS_UseHVXV60, // V6_vnormamtw = 2811
    CEFBS_UseHVXV60, // V6_vnot = 2812
    CEFBS_UseHVXV60, // V6_vor = 2813
    CEFBS_UseHVXV60, // V6_vpackeb = 2814
    CEFBS_UseHVXV60, // V6_vpackeh = 2815
    CEFBS_UseHVXV60, // V6_vpackhb_sat = 2816
    CEFBS_UseHVXV60, // V6_vpackhub_sat = 2817
    CEFBS_UseHVXV60, // V6_vpackob = 2818
    CEFBS_UseHVXV60, // V6_vpackoh = 2819
    CEFBS_UseHVXV60, // V6_vpackwh_sat = 2820
    CEFBS_UseHVXV60, // V6_vpackwuh_sat = 2821
    CEFBS_UseHVXV60, // V6_vpopcounth = 2822
    CEFBS_UseHVXV65, // V6_vprefixqb = 2823
    CEFBS_UseHVXV65, // V6_vprefixqh = 2824
    CEFBS_UseHVXV65, // V6_vprefixqw = 2825
    CEFBS_UseHVXV60, // V6_vrdelta = 2826
    CEFBS_UseHVXV65, // V6_vrmpybub_rtt = 2827
    CEFBS_UseHVXV65, // V6_vrmpybub_rtt_acc = 2828
    CEFBS_UseHVXV60, // V6_vrmpybus = 2829
    CEFBS_UseHVXV60, // V6_vrmpybus_acc = 2830
    CEFBS_UseHVXV60, // V6_vrmpybusi = 2831
    CEFBS_UseHVXV60, // V6_vrmpybusi_acc = 2832
    CEFBS_UseHVXV60, // V6_vrmpybusv = 2833
    CEFBS_UseHVXV60, // V6_vrmpybusv_acc = 2834
    CEFBS_UseHVXV60, // V6_vrmpybv = 2835
    CEFBS_UseHVXV60, // V6_vrmpybv_acc = 2836
    CEFBS_UseHVXV60, // V6_vrmpyub = 2837
    CEFBS_UseHVXV60, // V6_vrmpyub_acc = 2838
    CEFBS_UseHVXV65, // V6_vrmpyub_rtt = 2839
    CEFBS_UseHVXV65, // V6_vrmpyub_rtt_acc = 2840
    CEFBS_UseHVXV60, // V6_vrmpyubi = 2841
    CEFBS_UseHVXV60, // V6_vrmpyubi_acc = 2842
    CEFBS_UseHVXV60, // V6_vrmpyubv = 2843
    CEFBS_UseHVXV60, // V6_vrmpyubv_acc = 2844
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbb_rt = 2845
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbb_rt_acc = 2846
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbb_rx = 2847
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbb_rx_acc = 2848
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbub_rt = 2849
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbub_rt_acc = 2850
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbub_rx = 2851
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbub_rx_acc = 2852
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcb_rt = 2853
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcb_rt_acc = 2854
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcb_rx = 2855
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcb_rx_acc = 2856
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcbs_rt = 2857
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcbs_rt_acc = 2858
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcbs_rx = 2859
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcbs_rx_acc = 2860
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyznb_rt = 2861
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyznb_rt_acc = 2862
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyznb_rx = 2863
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyznb_rx_acc = 2864
    CEFBS_UseHVXV60, // V6_vror = 2865
    CEFBS_UseHVXV66, // V6_vrotr = 2866
    CEFBS_UseHVXV60, // V6_vroundhb = 2867
    CEFBS_UseHVXV60, // V6_vroundhub = 2868
    CEFBS_UseHVXV62, // V6_vrounduhub = 2869
    CEFBS_UseHVXV62, // V6_vrounduwuh = 2870
    CEFBS_UseHVXV60, // V6_vroundwh = 2871
    CEFBS_UseHVXV60, // V6_vroundwuh = 2872
    CEFBS_UseHVXV60, // V6_vrsadubi = 2873
    CEFBS_UseHVXV60, // V6_vrsadubi_acc = 2874
    CEFBS_UseHVXV66, // V6_vsatdw = 2875
    CEFBS_UseHVXV60, // V6_vsathub = 2876
    CEFBS_UseHVXV62, // V6_vsatuwuh = 2877
    CEFBS_UseHVXV60, // V6_vsatwh = 2878
    CEFBS_UseHVXV60, // V6_vsb = 2879
    CEFBS_UseHVXV65, // V6_vscattermh = 2880
    CEFBS_UseHVXV65, // V6_vscattermh_add = 2881
    CEFBS_UseHVXV65, // V6_vscattermhq = 2882
    CEFBS_UseHVXV65, // V6_vscattermhw = 2883
    CEFBS_UseHVXV65, // V6_vscattermhw_add = 2884
    CEFBS_UseHVXV65, // V6_vscattermhwq = 2885
    CEFBS_UseHVXV65, // V6_vscattermw = 2886
    CEFBS_UseHVXV65, // V6_vscattermw_add = 2887
    CEFBS_UseHVXV65, // V6_vscattermwq = 2888
    CEFBS_UseHVXV60, // V6_vsh = 2889
    CEFBS_UseHVXV60, // V6_vshufeh = 2890
    CEFBS_UseHVXV60, // V6_vshuff = 2891
    CEFBS_UseHVXV60, // V6_vshuffb = 2892
    CEFBS_UseHVXV60, // V6_vshuffeb = 2893
    CEFBS_UseHVXV60, // V6_vshuffh = 2894
    CEFBS_UseHVXV60, // V6_vshuffob = 2895
    CEFBS_UseHVXV60, // V6_vshuffvdd = 2896
    CEFBS_UseHVXV60, // V6_vshufoeb = 2897
    CEFBS_UseHVXV60, // V6_vshufoeh = 2898
    CEFBS_UseHVXV60, // V6_vshufoh = 2899
    CEFBS_UseHVXV60, // V6_vsubb = 2900
    CEFBS_UseHVXV60, // V6_vsubb_dv = 2901
    CEFBS_UseHVXV60, // V6_vsubbnq = 2902
    CEFBS_UseHVXV60, // V6_vsubbq = 2903
    CEFBS_UseHVXV62, // V6_vsubbsat = 2904
    CEFBS_UseHVXV62, // V6_vsubbsat_dv = 2905
    CEFBS_UseHVXV62, // V6_vsubcarry = 2906
    CEFBS_UseHVXV66, // V6_vsubcarryo = 2907
    CEFBS_UseHVXV60, // V6_vsubh = 2908
    CEFBS_UseHVXV60, // V6_vsubh_dv = 2909
    CEFBS_UseHVXV60, // V6_vsubhnq = 2910
    CEFBS_UseHVXV60, // V6_vsubhq = 2911
    CEFBS_UseHVXV60, // V6_vsubhsat = 2912
    CEFBS_UseHVXV60, // V6_vsubhsat_dv = 2913
    CEFBS_UseHVXV60, // V6_vsubhw = 2914
    CEFBS_UseHVXV60, // V6_vsububh = 2915
    CEFBS_UseHVXV60, // V6_vsububsat = 2916
    CEFBS_UseHVXV60, // V6_vsububsat_dv = 2917
    CEFBS_UseHVXV62, // V6_vsubububb_sat = 2918
    CEFBS_UseHVXV60, // V6_vsubuhsat = 2919
    CEFBS_UseHVXV60, // V6_vsubuhsat_dv = 2920
    CEFBS_UseHVXV60, // V6_vsubuhw = 2921
    CEFBS_UseHVXV62, // V6_vsubuwsat = 2922
    CEFBS_UseHVXV62, // V6_vsubuwsat_dv = 2923
    CEFBS_UseHVXV60, // V6_vsubw = 2924
    CEFBS_UseHVXV60, // V6_vsubw_dv = 2925
    CEFBS_UseHVXV60, // V6_vsubwnq = 2926
    CEFBS_UseHVXV60, // V6_vsubwq = 2927
    CEFBS_UseHVXV60, // V6_vsubwsat = 2928
    CEFBS_UseHVXV60, // V6_vsubwsat_dv = 2929
    CEFBS_UseHVXV60, // V6_vswap = 2930
    CEFBS_UseHVXV60, // V6_vtmpyb = 2931
    CEFBS_UseHVXV60, // V6_vtmpyb_acc = 2932
    CEFBS_UseHVXV60, // V6_vtmpybus = 2933
    CEFBS_UseHVXV60, // V6_vtmpybus_acc = 2934
    CEFBS_UseHVXV60, // V6_vtmpyhb = 2935
    CEFBS_UseHVXV60, // V6_vtmpyhb_acc = 2936
    CEFBS_UseHVXV60, // V6_vunpackb = 2937
    CEFBS_UseHVXV60, // V6_vunpackh = 2938
    CEFBS_UseHVXV60, // V6_vunpackob = 2939
    CEFBS_UseHVXV60, // V6_vunpackoh = 2940
    CEFBS_UseHVXV60, // V6_vunpackub = 2941
    CEFBS_UseHVXV60, // V6_vunpackuh = 2942
    CEFBS_UseHVXV62, // V6_vwhist128 = 2943
    CEFBS_UseHVXV62, // V6_vwhist128m = 2944
    CEFBS_UseHVXV62, // V6_vwhist128q = 2945
    CEFBS_UseHVXV62, // V6_vwhist128qm = 2946
    CEFBS_UseHVXV62, // V6_vwhist256 = 2947
    CEFBS_UseHVXV62, // V6_vwhist256_sat = 2948
    CEFBS_UseHVXV62, // V6_vwhist256q = 2949
    CEFBS_UseHVXV62, // V6_vwhist256q_sat = 2950
    CEFBS_UseHVXV60, // V6_vxor = 2951
    CEFBS_UseHVXV60, // V6_vzb = 2952
    CEFBS_UseHVXV60, // V6_vzh = 2953
    CEFBS_UseHVXV66_UseZReg, // V6_zLd_ai = 2954
    CEFBS_UseHVXV66_UseZReg, // V6_zLd_pi = 2955
    CEFBS_UseHVXV66_UseZReg, // V6_zLd_ppu = 2956
    CEFBS_UseHVXV66_UseZReg, // V6_zLd_pred_ai = 2957
    CEFBS_UseHVXV66_UseZReg, // V6_zLd_pred_pi = 2958
    CEFBS_UseHVXV66_UseZReg, // V6_zLd_pred_ppu = 2959
    CEFBS_UseHVXV66_UseZReg, // V6_zextract = 2960
    CEFBS_None, // Y2_barrier = 2961
    CEFBS_None, // Y2_break = 2962
    CEFBS_None, // Y2_dccleana = 2963
    CEFBS_None, // Y2_dccleaninva = 2964
    CEFBS_None, // Y2_dcfetchbo = 2965
    CEFBS_None, // Y2_dcinva = 2966
    CEFBS_None, // Y2_dczeroa = 2967
    CEFBS_None, // Y2_icinva = 2968
    CEFBS_None, // Y2_isync = 2969
    CEFBS_None, // Y2_syncht = 2970
    CEFBS_HasV65, // Y2_wait = 2971
    CEFBS_None, // Y4_l2fetch = 2972
    CEFBS_None, // Y4_trace = 2973
    CEFBS_None, // Y5_l2fetch = 2974
    CEFBS_None, // dep_A2_addsat = 2975
    CEFBS_None, // dep_A2_subsat = 2976
    CEFBS_None, // dep_S2_packhl = 2977
  };

  assert(Inst.getOpcode() < 2978);
  const FeatureBitset &RequiredFeatures = FeatureBitsets[RequiredFeaturesRefs[Inst.getOpcode()]];
  FeatureBitset MissingFeatures =
      (AvailableFeatures & RequiredFeatures) ^
      RequiredFeatures;
  if (MissingFeatures.any()) {
    std::ostringstream Msg;
    Msg << "Attempting to emit " << MCII.getName(Inst.getOpcode()).str()
        << " instruction but the ";
    for (unsigned i = 0, e = MissingFeatures.size(); i != e; ++i)
      if (MissingFeatures.test(i))
        Msg << SubtargetFeatureNames[i] << " ";
    Msg << "predicate(s) are not met";
    report_fatal_error(Msg.str());
  }
#else
// Silence unused variable warning on targets that don't use MCII for other purposes (e.g. BPF).
(void)MCII;
#endif // NDEBUG
}
#endif