|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
include/llvm/ADT/IntervalMap.h 167 return x < a;
182 return a < b;
include/llvm/ADT/STLExtras.h 963 return lhs.first < rhs.first;
include/llvm/CodeGen/LiveInterval.h 171 assert(S < E && "Cannot create empty or backwards segment");
176 return start <= I && I < end;
181 assert((S < E) && "Backwards interval?");
182 return (start <= S && S < end) && (start < E && E <= end);
182 return (start <= S && S < end) && (start < E && E <= end);
511 endIndex() < End.getBoundaryIndex();
579 if (Indexes->getNextNonNullIndex(S.start).getBaseIndex() <
593 return thisIndex < otherIndex;
602 return Begin <= Idx && Idx < End;
631 return V < S.end;
887 return V < S.start;
891 return S.start < V;
include/llvm/CodeGen/SlotIndexes.h 497 [=](const IdxMBBPair &IM) { return IM.first < To; });
528 index < getMBBEndIdx(J->second) &&
lib/CodeGen/CalcSpillWeights.cpp 214 if (localSplitArtifact && ((si < *start) || (si > *end)))
lib/CodeGen/InterferenceCache.cpp 141 if (!PrevPos.isValid() || Start < PrevPos) {
175 if (!BI->First.isValid() || StartI < BI->First)
188 if (!BI->First.isValid() || StartI < BI->First)
197 i != e && RegMaskSlots[i] < Limit; ++i)
lib/CodeGen/LiveDebugVariables.cpp 733 if (Segment->end < Stop) {
750 if (I.valid() && I.start() < Stop)
756 if (Start < Stop)
908 if (PrevEnd && I.start() < PrevEnd) {
919 if (RStart < IStop)
942 if (PrevEnd && I.start() < PrevEnd)
1040 if (LocMapI.value().locNo() == OldLocNo && LII->start < LocMapI.stop()) {
1054 if (LStart < LII->start)
1063 if (LStart < LocMapI.start()) {
1076 if (LII->end < LocMapI.stop()) {
1291 StopIdx = (MBBEndIdx < StopIdx) ? MBBEndIdx : StopIdx;
lib/CodeGen/LiveInterval.cpp 130 if (I->end < Use)
146 if (I->end < Use) {
331 if (Pos < (*PrevI).end)
360 if (Pos < I[Mid].end) {
415 if (i->start < j->start) {
418 } else if (j->start < i->start) {
465 if (J->start < I->end) {
482 while (J->end < I->start);
489 assert(Start < End && "Invalid range");
505 while (I->end < O.end) {
1064 assert(I->start < I->end);
1164 if (A.end < B.start)
lib/CodeGen/LiveIntervalUnion.cpp 145 while (LRI->start < LiveUnionI.stop() && LRI->end > LiveUnionI.start()) {
171 if (LRI->start < LiveUnionI.stop())
lib/CodeGen/LiveIntervals.cpp 514 if ((I == LI.begin() || std::prev(I)->end < Def) && !VNI->isPHIDef()) {
632 if (LRQ.endPoint() < MBBEnd) {
664 if (LRQ.endPoint() < MBBEnd) {
914 while (*SlotI < LiveI->end) {
932 while (*SlotI < LiveI->start)
1414 if (InstSlot > LastUse && InstSlot < OldIdx)
1422 assert(Before < OldIdx && "Expected upwards move");
1465 OldIndex < getMBBEndIdx(MI.getParent()) &&
1493 if (LII != LR.end() && LII->start < endIdx)
lib/CodeGen/MachineScheduler.cpp 1753 assert(std::prev(GlobalSegment)->start < LocalLI->beginIndex() &&
lib/CodeGen/RegAllocGreedy.cpp 1217 } else if (Intf.first() < BI.FirstInstr) {
1220 } else if (Intf.first() < BI.LastInstr) {
2181 for (unsigned Gap = 0; IntI.valid() && IntI.start() < StopIdx; ++IntI) {
2183 while (Uses[Gap+1].getBoundaryIndex() < IntI.start())
2208 for (unsigned Gap = 0; I != E && I->start < StopIdx; ++I) {
2209 while (Uses[Gap+1].getBoundaryIndex() < I->start)
lib/CodeGen/RegAllocPBQP.cpp 284 if (E1 < E2)
lib/CodeGen/RegisterCoalescer.cpp 705 if (BI->start > ASeg.start && BI->start < ASeg.end)
1079 if (PVal->def < VNI->def && VNI->def < LIS->getMBBEndIdx(Pred)) {
1079 if (PVal->def < VNI->def && VNI->def < LIS->getMBBEndIdx(Pred)) {
2562 if (OtherVNI->def < VNI->def)
2564 else if (VNI->def < OtherVNI->def && OtherLRQ.valueIn()) {
lib/CodeGen/RegisterPressure.cpp 1232 if (InstSlot >= PriorUseIdx && InstSlot < NextUseIdx) {
1271 return S != nullptr && S->start < Pos.getRegSlot(true) &&
lib/CodeGen/SplitKit.cpp 130 if (!SlotIndex::isEarlierInstr(VNI->def, LIP.second) && VNI->def < MBBEnd)
241 if (LVI->end < Stop)
248 while (UseI != UseE && *UseI < Stop);
250 assert(BI.LastInstr < Stop);
264 while (LVI->end < Stop) {
272 if (LastStop < LVI->start) {
306 if (LVI->start < Stop)
979 DominatedVNIs.insert((*It1)->def < (*It2)->def ? (*It2) : (*It1));
1054 if (!Dom.second.isValid() || VNI->def < Dom.second)
1138 if (AssignI.stop() < End) {
1194 while (BlockStart < End) {
1207 if (End < BlockEnd)
1579 if (!BI.LiveOut || BI.LastInstr < LastSplitPoint) {
1612 assert((!LeaveBefore || LeaveBefore < Stop) && "Interference after block");
1659 assert((!IntvOut || !EnterAfter || EnterAfter < LSP) && "Impossible intf");
1671 if (LeaveBefore && LeaveBefore < LSP) {
1743 if (BI.LastInstr < LSP) {
1767 if (!BI.LiveOut || BI.LastInstr < LSP) {
1811 assert((!EnterAfter || EnterAfter < LSP) && "Bad interference");
1825 if (!EnterAfter || EnterAfter < BI.FirstInstr.getBaseIndex()) {
lib/CodeGen/TwoAddressInstructionPass.cpp 258 if (I != LI.end() && I->start < MBBEndIdx)
878 if (I != LI.end() && I->start < MBBEndIdx)
1068 if (I != LI.end() && I->start < MBBEndIdx)
lib/CodeGen/VirtRegMap.cpp 279 if (!First.isValid() || SR.segments.front().start < First)
334 for (; I != Indexes->MBBIndexEnd() && I->first < Seg.end; ++I) {
lib/Target/AMDGPU/GCNNSAReassign.cpp 310 return LIS->getInstructionIndex(*C.first) < I;
313 LIS->getInstructionIndex(*I->first) < MaxInd; ++I) {
lib/Target/AMDGPU/GCNSchedStrategy.cpp 449 if (Ind->getMBBStartIdx(MBB) < Ind->getMBBStartIdx(*MBB->succ_begin()))
lib/Target/AMDGPU/SIWholeQuadMode.cpp 600 if (Next < FirstIdx)
usr/include/c++/7.4.0/bits/predefined_ops.h 43 { return *__it1 < *__it2; }
65 { return *__it < __val; }
90 { return __val < *__it; }
usr/include/c++/7.4.0/bits/stl_algobase.h 200 if (__b < __a)
224 if (__a < __b)
usr/include/c++/7.4.0/bits/stl_function.h 386 { return __x < __y; }
usr/include/c++/7.4.0/tuple 1379 return bool(std::get<__i>(__t) < std::get<__i>(__u))
1380 || (!bool(std::get<__i>(__u) < std::get<__i>(__t))