|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
include/llvm/CodeGen/MachineInstr.h 1369 if (!MO.isReg() || !MO.isDef() || !MO.isTied())
1382 if (!MO.isReg() || !MO.isUse() || !MO.isTied())
1645 if (MO.isReg() && MO.isTied()) {
lib/CodeGen/MIRPrinter.cpp 849 if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef())
lib/CodeGen/MachineCopyPropagation.cpp 396 if (!MOUse.isReg() || MOUse.isTied() || MOUse.isUndef() || MOUse.isDef() ||
548 if (MO.isTied())
lib/CodeGen/MachineInstr.cpp 223 assert(!Operands[OpNo].isTied() && "Cannot move tied operands");
303 assert(!Operands[i].isTied() && "Cannot move tied operands");
1055 assert(!DefMO.isTied() && "Def is already tied to another use");
1056 assert(!UseMO.isTied() && "Use is already tied to another def");
1077 assert(MO.isTied() && "Operand isn't tied");
1416 int TiedIdx = Operand.isTied() ? int(findTiedOperandIdx(I)) : -1;
1491 if (MO.isReg() && MO.isTied() && !MO.isDef())
lib/CodeGen/MachineOperand.cpp 154 assert((!isReg() || !isTied()) && "Cannot change a tied operand into an imm");
163 assert((!isReg() || !isTied()) && "Cannot change a tied operand into an imm");
173 assert((!isReg() || !isTied()) &&
186 assert((!isReg() || !isTied()) &&
198 assert((!isReg() || !isTied()) &&
208 assert((!isReg() || !isTied()) &&
219 assert((!isReg() || !isTied()) &&
798 if (ShouldPrintRegisterTies && isTied() && !isDef())
lib/CodeGen/MachineVerifier.cpp 1625 else if (!MO->isTied())
1637 } else if (MO->isReg() && MO->isTied())
1654 if (MO->isTied()) {
1659 if (!OtherMO.isTied())
2219 if (MODef.isTied() || MODef.isImplicit() || MODef.isInternalRead() ||
2233 MO0.isDebug() || MO0.isTied())
lib/CodeGen/RegAllocFast.cpp 895 if (MO.isEarlyClobber() || (MO.isUse() && MO.isTied()) ||
926 if (!MO.isTied()) continue;
1145 if (!MO.isDef() && !MO.isTied()) continue;
lib/CodeGen/RegAllocGreedy.cpp 2514 if (MO.isTied())
lib/CodeGen/RenameIndependentSubregs.cpp 247 if (MO.isTied() && Reg != VReg) {
lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp 693 ActiveChains[MO.getReg()]->setKill(MI, Idx, /*Immutable=*/MO.isTied());
lib/Target/AMDGPU/SIFormMemoryClauses.cpp 222 if (MO.isTied())
lib/Target/AMDGPU/SIInstrInfo.cpp 3371 if (!Dst.isReg() || !Dst.isTied()) {
lib/Target/AMDGPU/SIPeepholeSDWA.cpp 1127 assert(Dst && Dst->isTied());
lib/Target/AMDGPU/SIShrinkInstructions.cpp 280 if (MI.getOperand(i).isReg() && MI.getOperand(i).isTied() &&
lib/Target/ARM/ARMBaseInstrInfo.cpp 2199 if (MO.isTied())
lib/Target/Hexagon/HexagonBitSimplify.cpp 944 return Op.getSubReg() != NewSub && Op.isTied();
lib/Target/Hexagon/HexagonExpandCondsets.cpp 503 if (!Op.isTied())
511 if (Op.isTied())
lib/Target/Hexagon/RDFCopy.cpp 171 if (Op.isTied())
lib/Target/Lanai/LanaiInstrInfo.cpp 479 if (MO.isTied())
lib/Target/SystemZ/SystemZShortenInst.cpp 69 !MI.getOperand(0).isTied())