reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/ARM/ARMGenGlobalISel.inc

  759     return ARM::isBitFieldInvertedMask(MO.getCImm()->getZExtValue());

include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h

  253         Value = State.MIs[InsnID]->getOperand(1).getCImm()->getSExtValue();
  277         Value = State.MIs[InsnID]->getOperand(1).getCImm()->getValue();
  643       if (!MO.isCImm() || !MO.getCImm()->equalsInt(Value)) {
  911             State.MIs[OldInsnID]->getOperand(1).getCImm()->getSExtValue());

include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h

   85             DstReg, CstVal.getCImm()->getValue().sext(DstTy.getSizeInBits()));
  126             DstReg, CstVal.getCImm()->getValue().zext(DstTy.getSizeInBits()));
  176             DstReg, CstVal.getCImm()->getValue().trunc(DstTy.getSizeInBits()));

lib/CodeGen/AsmPrinter/AsmPrinter.cpp

  876     MI->getOperand(0).getCImm()->getValue().print(OS, false /*isSigned*/);

lib/CodeGen/AsmPrinter/DwarfDebug.cpp

  249     return DbgValueLoc(Expr, MI->getOperand(0).getCImm());

lib/CodeGen/GlobalISel/CSEInfo.cpp

  352     ID.AddPointer(MO.getCImm());

lib/CodeGen/GlobalISel/LegalizerHelper.cpp

  630     const APInt &Val = MI.getOperand(1).getCImm()->getValue();
 1678     const APInt &Val = SrcMO.getCImm()->getValue().sext(WideTy.getSizeInBits());
 3161         MI, KShiftAmt->getOperand(1).getCImm()->getValue(), HalfTy, ShiftAmtTy);

lib/CodeGen/GlobalISel/Utils.cpp

  237                                  : CstVal.getCImm()->getValue();

lib/CodeGen/LiveDebugValues.cpp

  240         Loc.CImm = MI.getOperand(0).getCImm();

lib/CodeGen/MachineOperand.cpp

  286     return getCImm() == Other.getCImm();
  286     return getCImm() == Other.getCImm();
  351     return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getCImm());
  809     getCImm()->printAsOperand(OS, /*PrintType=*/true, MST);

lib/CodeGen/MachineVerifier.cpp

  989       const ConstantInt *CI = MI->getOperand(1).getCImm();

lib/Target/AArch64/AArch64InstructionSelector.cpp

 1289       IsZero = I.getOperand(1).getCImm()->getZExtValue() == 0;
 1568       uint64_t Val = I.getOperand(1).getCImm()->getZExtValue();
 4023     Immed = Root.getCImm()->getZExtValue();
 4362   if (!RHSOp1.isCImm() || RHSOp1.getCImm()->getBitWidth() > 64)
 4364   RHSC = RHSOp1.getCImm()->getSExtValue();
 4408       int64_t RHSC = (int64_t)RHSDef->getOperand(1).getCImm()->getZExtValue();
 4647   uint64_t CstVal = I.getOperand(1).getCImm()->getZExtValue();
 4655   uint64_t CstVal = I.getOperand(1).getCImm()->getZExtValue();

lib/Target/AArch64/AArch64LegalizerInfo.cpp

  673   unsigned Amount = CstMI->getOperand(1).getCImm()->getZExtValue();

lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp

  813       Offset = Op.getCImm()->getZExtValue();
 1407     ImmOp.ChangeToImmediate(ImmOp.getCImm()->getZExtValue());
 1494       GEPInfo.Imm = OpDef->getOperand(1).getCImm()->getSExtValue();
 2051             RHSDef->getOperand(1).getCImm()->getSExtValue();
 2153         RHSDef->getOperand(1).getCImm()->getSExtValue();

lib/Target/ARM/ARMInstructionSelector.cpp

  968       if (!Val.getCImm()->isZero()) {

lib/Target/Hexagon/HexagonBitSimplify.cpp

 2632       return !Op.getCImm()->isZero();
 2644       return Op.getCImm()->isZero();

lib/Target/Mips/MipsInstructionSelector.cpp

  405         APInt OffsetValue = Offset->getOperand(1).getCImm()->getValue();
  471                              I.getOperand(1).getCImm()->getValue(), B))

lib/Target/X86/X86InstructionSelector.cpp

  646     Val = I.getOperand(1).getCImm()->getZExtValue();

unittests/CodeGen/MachineOperandTest.cpp

   96   ASSERT_TRUE(MO.getCImm() == CImm);
   97   ASSERT_TRUE(MO.getCImm()->getValue() == Int);