reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

include/llvm/CodeGen/GlobalISel/RegBankSelect.h

  292              DstOrSplit->pred_size() == 1 && DstOrSplit->succ_size() == 1 &&
  304       return Src.succ_size() > 1 && DstOrSplit->pred_size() > 1;

include/llvm/CodeGen/MachineRegionInfo.h

   45     return BB->succ_size();

lib/CodeGen/BranchFolding.cpp

  668       (!AfterPlacement || MBB1->succ_size() == 1)) {
  699       if (MBB->succ_size() != 0 && !MBB->canFallThrough())
  716       (MBB1->succ_size() == 1 || !AfterPlacement) &&
  821   const BasicBlock *BB = (SuccBB && MBB->succ_size() == 1) ?
 1224   SmallVector<BlockFrequency, 2> EdgeFreqLs(TailMBB.succ_size());
 1237     if (TailMBB.succ_size() <= 1)
 1249   if (TailMBB.succ_size() <= 1)
 1386     if (PredBB->succ_size() == 1)
 1476         PrevBB.succ_size() == 1 &&

lib/CodeGen/EarlyIfConversion.cpp

  435   if (Head->succ_size() != 2)
  444   if (Succ0->pred_size() != 1 || Succ0->succ_size() != 1)
  452     if (Succ1->pred_size() != 1 || Succ1->succ_size() != 1 ||

lib/CodeGen/GlobalISel/IRTranslator.cpp

 2379   assert(EntryBB->succ_size() == 1 &&

lib/CodeGen/GlobalISel/RegBankSelect.cpp

  932   assert(Src.succ_size() > 1 && DstOrSplit->pred_size() > 1 &&

lib/CodeGen/MIRPrinter.cpp

  572   if (MBB.succ_size() <= 1)
  600   if (GuessedSuccs.size() != MBB.succ_size())

lib/CodeGen/MachineBasicBlock.cpp

 1331     return BranchProbability(1, succ_size());

lib/CodeGen/MachineBlockPlacement.cpp

  693   if (BB.succ_size() != Successors.size())
  713   if (BB->succ_size() == 1)
  896   if (BB->succ_size() != 2 || ViableSuccs.size() != 2)
 1174     if (BB.succ_size() != 2)
 1261   if (BB->succ_size() == 2) {
 1791   if (Pred->succ_size() != 2)
 1974                       << Pred->succ_size() << " successors, ";
 1976     if (Pred->succ_size() > 2)
 1980     if (Pred->succ_size() == 2) {
 2006          (*BestPred->pred_begin())->succ_size() == 1 &&
 2320       if (Pred->succ_size() == 1)
 2391       if (TailBB->succ_size() == 1)
 2394       else if (TailBB->succ_size() == 2) {
 3145         (MBB.succ_size() > 1) ? NumCondBranches : NumUncondBranches;
 3147         (MBB.succ_size() > 1) ? CondBranchTakenFreq : UncondBranchTakenFreq;

lib/CodeGen/MachineLICM.cpp

  704     if (BB->succ_size() >= 25)

lib/CodeGen/MachineSink.cpp

  355   if (MBB.succ_size() <= 1 || MBB.empty()) return false;

lib/CodeGen/MachineVerifier.cpp

  595     if (MInfo.Succs.size() != MBB.succ_size())
  686       } else if (MBB->succ_size() == LandingPadSuccs.size()) {
  690       } else if (MBB->succ_size() != 1+LandingPadSuccs.size()) {
  710       if (MBB->succ_size() != 1+LandingPadSuccs.size() &&
  711           (MBB->succ_size() != 1 || LandingPadSuccs.size() != 1 ||
  735       } else if (MBB->succ_size() == 1) {
  743       } else if (MBB->succ_size() != 2) {
  763       if (MBB->succ_size() == 1) {
  771       } else if (MBB->succ_size() != 2) {

lib/CodeGen/PHIElimination.cpp

  578       if (PreMBB->succ_size() == 1)

lib/CodeGen/RegisterCoalescer.cpp

  387   if (MBB->pred_size() != 1 || MBB->succ_size() != 1)
 1102   if (CopyLeftBB && CopyLeftBB->succ_size() > 1)
 3449   unsigned cl = LHS->MBB->pred_size() + LHS->MBB->succ_size();
 3450   unsigned cr = RHS->MBB->pred_size() + RHS->MBB->succ_size();

lib/CodeGen/TailDuplicator.cpp

  663   if (TailBB->succ_size() != 1)
  684     if (PredBB->succ_size() > 1)
  761       assert(PredBB->succ_size() <= 1);
  775   if (PredBB->succ_size() > 1)
  882   if (PrevBB->succ_size() == 1 &&
  957     if (PredBB->succ_size() != 1)

lib/Target/AArch64/AArch64ConditionalCompares.cpp

  442   if (Head->succ_size() != 2)
  452   if (Succ0->pred_size() != 1 || Succ0->succ_size() != 2)

lib/Target/AArch64/AArch64RedundantCopyElimination.cpp

  287   if (PredMBB->succ_size() != 2)

lib/Target/AArch64/AArch64SpeculationHardening.cpp

  210   assert(MBB.succ_size() == 2);

lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp

  627     if (ExitMBB->succ_size() == 0) {
 1254   if (Entry->succ_size() != 2) {
 1265     } else if ((Current->succ_size() == 1) &&
 1281   if (MBB->succ_size() == 1) {
 1334       if (CI->getMBBMRT()->getMBB()->succ_size() > 1) {
 1710     if (MFI.succ_size() == 0) {
 1798   unsigned SuccSize = StartMBB->succ_size();

lib/Target/AMDGPU/AMDILCFGStructurizer.cpp

  393   while (SrcMBB && SrcMBB->succ_size() == 1) {
  400   if (SrcMBB && SrcMBB->succ_size()==0)
  565   assert(MBB->succ_size() == 2);
  644   bool IsReturn = (MBB->succ_size() == 0);
  741     assert(MBB->succ_size() <= 2);
  835     if (EntryMBB->succ_size() == 0) {
  923   if (MBB->succ_size() != 1)
  937   if (MBB->succ_size() != 2)
  959   if (TrueMBB->succ_size() == 1 && FalseMBB->succ_size() == 1
  959   if (TrueMBB->succ_size() == 1 && FalseMBB->succ_size() == 1
  963   } else if (TrueMBB->succ_size() == 1 && *TrueMBB->succ_begin() == FalseMBB) {
  967   } else if (FalseMBB->succ_size() == 1
  975   } else if (FalseMBB->succ_size() == 1
  978   } else if (TrueMBB->succ_size() == 1
 1081   if (Src1MBB->succ_size() == 0) {
 1117                     << ", numSucc=" << TrueMBB->succ_size() << " false = BB"
 1138     DownBlk = (DownBlk->succ_size() == 1) ? (*DownBlk->succ_begin()) : nullptr;
 1196   assert((!TrueMBB || TrueMBB->succ_size() <= 1)
 1197          && (!FalseMBB || FalseMBB->succ_size() <= 1));
 1409     if (LandMBB && TrueMBB->succ_size()!=0)
 1420     if (LandMBB && FalseMBB->succ_size() != 0)
 1512     assert(SrcMBB->succ_size() == 1);
 1610   if (MBB->succ_size() != 2)
 1645   while (MBB->succ_size())
 1666   assert(MBB->succ_size() == 0 && MBB->pred_size() == 0

lib/Target/AMDGPU/GCNSchedStrategy.cpp

  447   if (MBB->succ_size() == 1 && !(*MBB->succ_begin())->empty()) {

lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp

  154     if (It != MBB->end() || MBB->succ_size() != 1)
  374           if (Pred->succ_size() == 1)
  384     if (MBB.succ_size() != 1 || Lead == E || !isEndCF(*Lead, TRI, ST))

lib/Target/ARM/ARMConstantIslandPass.cpp

 1088   if (MBB->pred_size() != 1 || MBB->succ_size() != 1)

lib/Target/ARM/ARMLoadStoreOptimizer.cpp

  565   if (MBB.succ_size() > 0) {

lib/Target/ARM/Thumb1FrameLowering.cpp

  626       assert(MBB.succ_size() == 1);

lib/Target/Hexagon/HexagonBitSimplify.cpp

 3326     if (B.pred_size() != 2 || B.succ_size() != 2)

lib/Target/Hexagon/HexagonCFGOptimizer.cpp

  157         unsigned NumSuccs = MBB->succ_size();
  199               JumpAroundTarget->succ_size() == 1;

lib/Target/Hexagon/HexagonEarlyIfConv.cpp

  231   if (B->succ_size() != 1)
  286   unsigned TNS = TB->succ_size(), FNS = FB->succ_size();
  286   unsigned TNS = TB->succ_size(), FNS = FB->succ_size();
  366   if (B->succ_size() == 0)
  572     if (FP.TrueB && FP.TrueB->succ_size() > 0) {
  577     if (FP.FalseB && FP.FalseB->succ_size() > 0) {
  879   while (FP.SplitB->succ_size() > 0) {
  972   while (B->succ_size() > 0)
 1031   if (FP.SplitB->succ_size() != 1)

lib/Target/Hexagon/HexagonInstrInfo.cpp

 3583     return BranchProbability(1, Src->succ_size());

lib/Target/Hexagon/RDFGraph.cpp

  285   unsigned NS = BB->succ_size();

lib/Target/Mips/MipsConstantIslandPass.cpp

 1001   if (MBB->pred_size() != 1 || MBB->succ_size() != 1)

lib/Target/PowerPC/PPCBranchCoalescing.cpp

  283   if (Cand.BranchBlock->succ_size() != 2) {

lib/Target/PowerPC/PPCMIPeephole.cpp

  946     if (BB.succ_size() == 2 &&
  975     return BB.succ_size() == 1;

lib/Target/PowerPC/PPCReduceCRLogicals.cpp

  147   if (ThisMBB->succ_size() != 2) {

lib/Target/X86/X86CondBrFolding.cpp

  492   if (MBB.succ_size() != 2)

lib/Target/X86/X86ISelLowering.cpp

30166   assert(BB->succ_size() == 1);

lib/Target/X86/X86SpeculativeLoadHardening.cpp

  572     if (MBB.succ_size() <= 1)
  605     if (MBB.succ_size() <= 1)