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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
include/llvm/CodeGen/GlobalISel/RegBankSelect.h 292 DstOrSplit->pred_size() == 1 && DstOrSplit->succ_size() == 1 &&
304 return Src.succ_size() > 1 && DstOrSplit->pred_size() > 1;
lib/CodeGen/AsmPrinter/AsmPrinter.cpp 2914 MBB.pred_size() > 0 && !isBlockOnlyReachableByFallthrough(&MBB);
3021 if (MBB->pred_size() > 1)
lib/CodeGen/BranchFolding.cpp 1123 if (I->pred_size() < 2) continue;
1380 if (SuccBB->pred_size() == 1)
1475 if (PriorCond.empty() && !PriorTBB && MBB->pred_size() == 1 &&
1582 if (!IsEmptyBlock(MBB) && MBB->pred_size() == 1 &&
1693 while(PI != MBB->pred_size()) {
1980 if (TBB->pred_size() > 1 || FBB->pred_size() > 1)
1980 if (TBB->pred_size() > 1 || FBB->pred_size() > 1)
lib/CodeGen/EarlyIfConversion.cpp 441 if (Succ0->pred_size() != 1)
444 if (Succ0->pred_size() != 1 || Succ0->succ_size() != 1)
452 if (Succ1->pred_size() != 1 || Succ1->succ_size() != 1 ||
560 assert(Tail->pred_size() == 2 && "Cannot replace PHIs");
645 bool ExtraPreds = Tail->pred_size() != 2;
lib/CodeGen/GlobalISel/IRTranslator.cpp 2383 assert(NewEntryBB.pred_size() == 1 &&
lib/CodeGen/GlobalISel/RegBankSelect.cpp 932 assert(Src.succ_size() > 1 && DstOrSplit->pred_size() > 1 &&
lib/CodeGen/IfConversion.cpp 655 if (TrueBBI.BB->pred_size() > 1) {
681 if (TrueBBI.BB->pred_size() > 1) {
889 if (TrueBBI.BB->pred_size() > 1 || FalseBBI.BB->pred_size() > 1)
889 if (TrueBBI.BB->pred_size() > 1 || FalseBBI.BB->pred_size() > 1)
979 if (TrueBBI.BB->pred_size() > 1 || FalseBBI.BB->pred_size() > 1)
979 if (TrueBBI.BB->pred_size() > 1 || FalseBBI.BB->pred_size() > 1)
1540 (CvtBBI->CannotBeCopied && CvtMBB.pred_size() > 1)) {
1568 if (CvtMBB.pred_size() > 1) {
1626 (CvtBBI->CannotBeCopied && CvtMBB.pred_size() > 1)) {
1680 if (CvtMBB.pred_size() > 1) {
1730 NextMBB.pred_size() == 1 && !NextBBI->HasFallThrough &&
1773 TrueBBI.BB->pred_size() > 1 || FalseBBI.BB->pred_size() > 1) {
1773 TrueBBI.BB->pred_size() > 1 || FalseBBI.BB->pred_size() > 1) {
2081 unsigned NumPreds = TailBB->pred_size();
lib/CodeGen/ImplicitNullChecks.cpp 499 if (NotNullSucc->pred_size() != 1)
lib/CodeGen/LiveIntervals.cpp 844 if (PHIMBB->pred_size() > 100)
lib/CodeGen/LoopTraversal.cpp 21 MBBInfos[MBBNumber].IncomingProcessed == MBB->pred_size();
lib/CodeGen/MachineBlockPlacement.cpp 1788 if (BottomBlock->pred_size() != 1)
2005 while (BestPred->pred_size() == 1 &&
lib/CodeGen/MachineCSE.cpp 340 if (MBB->pred_size() != 1 || *MBB->pred_begin() != CSMBB)
lib/CodeGen/MachineDominators.cpp 121 assert(PredBB->pred_size() == 1 && "A basic block resulting from a "
lib/CodeGen/MachineLICM.cpp 814 if (BB->pred_size() == 1) {
lib/CodeGen/MachineLoopInfo.cpp 120 if (HB->pred_size() != 2 || HB->hasAddressTaken())
lib/CodeGen/MachineSink.cpp 727 if (MBB->pred_size() != 1)
892 if (SuccToSinkTo->pred_size() > 1) {
1230 if (!SI->livein_empty() && SI->pred_size() == 1)
1303 assert((SuccBB->pred_size() == 1 && *SuccBB->pred_begin() == &CurBB) &&
lib/CodeGen/MachineVerifier.cpp 591 if (MInfo.Preds.size() != MBB.pred_size())
lib/CodeGen/RegisterCoalescer.cpp 387 if (MBB->pred_size() != 1 || MBB->succ_size() != 1)
1035 if (MBB.pred_size() != 2)
3449 unsigned cl = LHS->MBB->pred_size() + LHS->MBB->succ_size();
3450 unsigned cr = RHS->MBB->pred_size() + RHS->MBB->succ_size();
lib/CodeGen/TailDuplicator.cpp 888 TailBB->pred_size() == 1 &&
lib/Target/AArch64/AArch64ConditionalCompares.cpp 448 if (Succ0->pred_size() != 1)
452 if (Succ0->pred_size() != 1 || Succ0->succ_size() != 2)
lib/Target/AArch64/AArch64RedundantCopyElimination.cpp 281 if (MBB->pred_size() != 1)
lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp 1869 CodeBBStart->pred_size() == 1 ? *(CodeBBStart->pred_begin()) : nullptr;
lib/Target/AMDGPU/AMDILCFGStructurizer.cpp 397 if (!AllowSideEntry && SrcMBB->pred_size() > 1)
419 bool MultiplePreds = MBB && (MBB->pred_size() > 1);
425 (BlkSize * (MBB->pred_size() - 1) > CloneInstrThreshold));
927 if (childBlk->pred_size() != 1 || isActiveLoophead(childBlk))
989 ((TrueMBB && TrueMBB->pred_size() > 1)
990 || (FalseMBB && FalseMBB->pred_size() > 1))) {
994 if (TrueMBB && TrueMBB->pred_size() > 1) {
999 if (FalseMBB && FalseMBB->pred_size() > 1) {
1158 << TrueMBB->size() << " numPred = " << TrueMBB->pred_size();
1167 << FalseMBB->size() << " numPred = " << FalseMBB->pred_size();
1176 << LandMBB->size() << " numPred = " << LandMBB->pred_size();
1211 if (!MigrateTrue && TrueMBB && TrueMBB->pred_size() > 1)
1213 if (!MigrateFalse && FalseMBB && FalseMBB->pred_size() > 1)
1303 bool LandBlkHasOtherPred = (LandBlk->pred_size() > 2);
1513 if (SrcMBB->pred_size() > 1) {
1666 assert(MBB->succ_size() == 0 && MBB->pred_size() == 0
lib/Target/AMDGPU/SIInstrInfo.cpp 1775 assert(MBB.pred_size() == 1);
lib/Target/ARM/ARMBaseInstrInfo.cpp 2032 if (TBB.pred_size() != 1 || FBB.pred_size() != 1)
2032 if (TBB.pred_size() != 1 || FBB.pred_size() != 1)
lib/Target/ARM/ARMConstantIslandPass.cpp 1088 if (MBB->pred_size() != 1 || MBB->succ_size() != 1)
lib/Target/ARM/ARMLowOverheadLoops.cpp 231 if (MBB->pred_size() == 1)
lib/Target/Hexagon/HexagonBitSimplify.cpp 3326 if (B.pred_size() != 2 || B.succ_size() != 2)
3345 if ((*SI)->pred_size() == 1)
lib/Target/Hexagon/HexagonCFGOptimizer.cpp 186 if ((NumSuccs == 2) && LayoutSucc && (LayoutSucc->pred_size() == 1)) {
198 JumpAroundTarget->pred_size() == 1 &&
lib/Target/Hexagon/HexagonEarlyIfConv.cpp 285 unsigned TNP = TB->pred_size(), FNP = FB->pred_size();
285 unsigned TNP = TB->pred_size(), FNP = FB->pred_size();
450 if (B->pred_size() < 2)
532 if (TSB->pred_size() != 2)
1035 if (SB->pred_size() != 1)
lib/Target/Hexagon/HexagonHardwareLoops.cpp 1892 if (Header->pred_size() > 2) {
1939 assert(Header->pred_size() == 2);
lib/Target/Hexagon/RDFGraph.cpp 268 unsigned NP = BB->pred_size();
lib/Target/Mips/MipsConstantIslandPass.cpp 1001 if (MBB->pred_size() != 1 || MBB->succ_size() != 1)
lib/Target/PowerPC/PPCEarlyReturn.cpp 153 if (ReturnMBB.pred_size() == 1) {
lib/Target/PowerPC/PPCMIPeephole.cpp 981 unsigned NumPredBBs = MBB.pred_size();
lib/Target/RISCV/RISCVInstrInfo.cpp 380 assert(MBB.pred_size() == 1);
lib/Target/SystemZ/SystemZMachineScheduler.cpp 43 if (MBB->pred_size() == 1)
48 if (MBB->pred_size() == 2 && Loop != nullptr && Loop->getHeader() == MBB) {
lib/Target/WebAssembly/WebAssemblyCFGSort.cpp 249 unsigned N = MBB.pred_size();
lib/Target/X86/X86CondBrFolding.cpp 175 if (PredMBB->pred_size() != 1 || !PredMBBInfo->CmpBrOnly)
400 if (MBB.pred_size() != 1)
lib/Target/X86/X86SpeculativeLoadHardening.cpp 731 (SuccCount == 1 && Succ.pred_size() == 1)