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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
lib/CodeGen/CalcSpillWeights.cpp 213 SlotIndex si = LIS.getInstructionIndex(*mi);
lib/CodeGen/InlineSpiller.cpp 373 SlotIndex Idx = LIS.getInstructionIndex(CopyMI);
453 SlotIndex Idx = LIS.getInstructionIndex(MI);
552 SlotIndex UseIdx = LIS.getInstructionIndex(MI).getRegSlot(true);
766 SlotIndex Idx = LIS.getInstructionIndex(*I).getRegSlot();
860 SlotIndex Idx = LIS.getInstructionIndex(*MI).getRegSlot();
1000 SlotIndex Idx = LIS.getInstructionIndex(*MI).getRegSlot();
1152 SlotIndex Idx = LIS.getInstructionIndex(Spill);
1165 SlotIndex Idx = LIS.getInstructionIndex(Spill);
1179 Idx = LIS.getInstructionIndex(*MI);
1210 SlotIndex PIdx = LIS.getInstructionIndex(*PrevSpill);
1211 SlotIndex CIdx = LIS.getInstructionIndex(*CurrentSpill);
lib/CodeGen/LiveDebugVariables.cpp 699 : LIS->getInstructionIndex(*std::prev(MBBI)).getRegSlot();
789 SlotIndex Idx = LIS.getInstructionIndex(*MI);
903 SlotIndex RStart = LIS.getInstructionIndex(*Range.first);
904 SlotIndex REnd = LIS.getInstructionIndex(*Range.second);
1274 SlotIndex::isEarlierEqualInstr(StopIdx, LIS.getInstructionIndex(*I)))
lib/CodeGen/LiveInterval.cpp 1367 SlotIndex Idx = LIS.getInstructionIndex(*MI);
lib/CodeGen/LiveIntervals.cpp 465 SlotIndex Idx = getInstructionIndex(UseMI).getRegSlot();
564 SlotIndex Idx = getInstructionIndex(*UseMI).getRegSlot();
871 SlotIndex(getInstructionIndex(startInst).getRegSlot()),
873 LiveRange::Segment S(SlotIndex(getInstructionIndex(startInst).getRegSlot()),
1504 SlotIndex instrIdx = getInstructionIndex(MI);
1591 endIdx = getInstructionIndex(*End);
lib/CodeGen/LiveRangeEdit.cpp 151 DefIdx = LIS.getInstructionIndex(*RM.OrigMI);
212 if (!allUsesAvailableAt(DefMI, LIS.getInstructionIndex(*DefMI),
213 LIS.getInstructionIndex(*UseMI)))
246 SlotIndex Idx = LIS.getInstructionIndex(MI).getRegSlot();
263 SlotIndex Idx = LIS.getInstructionIndex(*MI).getRegSlot();
lib/CodeGen/MachineScheduler.cpp 1137 LiveQueryResult LRQ = LI.Query(LIS->getInstructionIndex(*I));
1149 LI.Query(LIS->getInstructionIndex(*SU->getInstr()));
1346 LiveQueryResult LRQ = LI.Query(LIS->getInstructionIndex(*SU->getInstr()));
1405 SlotIndex SlotIdx = LIS->getInstructionIndex(*MI).getRegSlot();
1439 SlotIndex SlotIdx = LIS->getInstructionIndex(*MI).getRegSlot();
1819 RegionBeginIdx = DAG->getLIS()->getInstructionIndex(*FirstPos);
1820 RegionEndIdx = DAG->getLIS()->getInstructionIndex(
lib/CodeGen/MachineVerifier.cpp 1832 SlotIndex Idx = LiveInts->getInstructionIndex(*MI);
1957 SlotIndex UseIdx = LiveInts->getInstructionIndex(*MI);
2069 SlotIndex DefIdx = LiveInts->getInstructionIndex(*MI);
lib/CodeGen/PHIElimination.cpp 531 SlotIndex LastUseIndex = LIS->getInstructionIndex(*KillInst);
lib/CodeGen/RegAllocGreedy.cpp 1286 SlotIndex::isEarlierInstr(LIS->getInstructionIndex(MBB->instr_front()),
lib/CodeGen/RegisterCoalescer.cpp 564 SlotIndex CopyIdx = LIS->getInstructionIndex(*CopyMI).getRegSlot();
769 SlotIndex CopyIdx = LIS->getInstructionIndex(*CopyMI).getRegSlot();
819 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI);
873 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI).getRegSlot(true);
1044 SlotIndex CopyIdx = LIS->getInstructionIndex(CopyMI).getRegSlot(true);
1114 SlotIndex InsPosIdx = LIS->getInstructionIndex(*InsPos).getRegSlot(true);
1216 SlotIndex CopyIdx = LIS->getInstructionIndex(*CopyMI);
1384 SlotIndex CurrIdx = LIS->getInstructionIndex(NewMI);
1410 SlotIndex CurrIdx = LIS->getInstructionIndex(NewMI);
1452 SlotIndex NewMIIdx = LIS->getInstructionIndex(NewMI);
1466 SlotIndex NewMIIdx = LIS->getInstructionIndex(NewMI);
1530 SlotIndex Idx = LIS->getInstructionIndex(*CopyMI);
1591 SlotIndex UseIdx = LIS->getInstructionIndex(MI);
1665 SlotIndex UseIdx = LIS->getInstructionIndex(MI).getRegSlot(true);
1691 Reads = DstInt->liveAt(LIS->getInstructionIndex(*UseMI));
1713 : LIS->getInstructionIndex(*UseMI);
1727 dbgs() << LIS->getInstructionIndex(*UseMI) << "\t";
1753 LLVM_DEBUG(dbgs() << LIS->getInstructionIndex(*CopyMI) << '\t' << *CopyMI);
1804 const SlotIndex CopyIdx = LIS->getInstructionIndex(*CopyMI);
2054 SlotIndex CopyRegIdx = LIS->getInstructionIndex(*CopyMI).getRegSlot();
2055 SlotIndex DestRegIdx = LIS->getInstructionIndex(DestMI).getRegSlot();
lib/CodeGen/RegisterPressure.cpp 315 return LIS->getInstructionIndex(*IdxPos).getRegSlot();
581 SlotIndex SlotIdx = LIS.getInstructionIndex(MI);
799 SlotIdx = LIS->getInstructionIndex(*CurrPos).getRegSlot();
865 SlotIdx = LIS->getInstructionIndex(*CurrPos).getRegSlot();
885 SlotIndex SlotIdx = LIS->getInstructionIndex(*CurrPos).getRegSlot();
1046 SlotIdx = LIS->getInstructionIndex(*MI).getRegSlot();
1231 SlotIndex InstSlot = LIS->getInstructionIndex(*MI).getRegSlot();
1287 SlotIdx = LIS->getInstructionIndex(*MI).getRegSlot();
lib/CodeGen/RenameIndependentSubregs.cpp 188 SlotIndex Pos = LIS->getInstructionIndex(*MO.getParent());
222 SlotIndex Pos = LIS->getInstructionIndex(*MI);
354 SlotIndex Pos = LIS->getInstructionIndex(*MO.getParent());
359 SlotIndex Pos = LIS->getInstructionIndex(*MO.getParent()).getDeadSlot();
lib/CodeGen/ScheduleDAGInstrs.cpp 815 SlotIndex SlotIdx = LIS->getInstructionIndex(MI);
lib/CodeGen/SplitKit.cpp 94 LIP.first = LIS.getInstructionIndex(*FirstTerm);
105 LIP.second = LIS.getInstructionIndex(*I);
178 UseSlots.push_back(LIS.getInstructionIndex(*MO.getParent()).getRegSlot());
883 SlotIndex Kill = LIS.getInstructionIndex(*MBBI).getRegSlot();
1330 SlotIndex Idx = LIS.getInstructionIndex(*MI);
lib/CodeGen/SplitKit.h 86 Res = LIS.getInstructionIndex(*MII);
lib/CodeGen/TwoAddressInstructionPass.cpp 443 SlotIndex useIdx = LIS->getInstructionIndex(*MI);
1584 LIS->getInstructionIndex(*MI).getRegSlot(IsEarlyClobber);
1643 SlotIndex MIIdx = LIS->getInstructionIndex(*MI);
lib/CodeGen/VirtRegMap.cpp 358 SlotIndex BaseIndex = LIS->getInstructionIndex(MI);
472 SlotIndex MIIndex = LIS->getInstructionIndex(MI);
lib/Target/AArch64/AArch64PBQPRegAlloc.cpp 322 SlotIndex SI = LIs.getInstructionIndex(MI);
lib/Target/AMDGPU/GCNIterativeScheduler.cpp 73 OS << LIS->getInstructionIndex(*I);
80 OS << LIS->getInstructionIndex(*I);
85 if (LIS) OS << LIS->getInstructionIndex(*End) << '\t';
399 auto SlotIdx = LIS->getInstructionIndex(*MI).getRegSlot();
lib/Target/AMDGPU/GCNNSAReassign.cpp 310 return LIS->getInstructionIndex(*C.first) < I;
313 LIS->getInstructionIndex(*I->first) < MaxInd; ++I) {
lib/Target/AMDGPU/GCNRegPressure.cpp 225 auto SI = LIS.getInstructionIndex(*MO.getParent()).getBaseIndex();
374 SlotIndex SI = LIS.getInstructionIndex(*NextMI).getBaseIndex();
474 const auto &SI = LIS.getInstructionIndex(*LastTrackedMI).getBaseIndex();
lib/Target/AMDGPU/GCNRegPressure.h 242 return getLiveRegs(LIS.getInstructionIndex(MI).getDeadSlot(), LIS,
248 return getLiveRegs(LIS.getInstructionIndex(MI).getBaseIndex(), LIS,
lib/Target/AMDGPU/GCNSchedStrategy.cpp 417 SlotIndex SlotIdx = LIS->getInstructionIndex(*MI).getRegSlot();
lib/Target/AMDGPU/SIMachineScheduler.cpp 318 SlotIndex InstSlot = LIS->getInstructionIndex(*MI).getRegSlot();
380 isDefBetween(Reg, LIS->getInstructionIndex(*BeginBlock).getRegSlot(),
381 LIS->getInstructionIndex(*EndBlock).getRegSlot(), MRI,
lib/Target/AMDGPU/SIRegisterInfo.cpp 1869 SlotIndex UseIdx = LIS->getInstructionIndex(Use);
lib/Target/AMDGPU/SIWholeQuadMode.cpp 287 const VNInfo *Value = LR.Query(LIS->getInstructionIndex(MI)).valueIn();
586 SlotIndex FirstIdx = First != MBBE ? LIS->getInstructionIndex(*First)
589 Last != MBBE ? LIS->getInstructionIndex(*Last) : LIS->getMBBEndIdx(&MBB);
lib/Target/PowerPC/PPCVSXFMAMutate.cpp 108 SlotIndex FMAIdx = LIS->getInstructionIndex(MI);
lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp 94 SlotIndex FromIdx = LIS.getInstructionIndex(MI).getRegSlot();
109 SlotIndex WhereIdx = LIS.getInstructionIndex(*Where);
lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp 100 LIS.removeVRegDefAt(LI, LIS.getInstructionIndex(*MI).getRegSlot());
lib/Target/WebAssembly/WebAssemblyRegStackify.cpp 278 LIS.getInstructionIndex(*Insert)))
296 LI.getVNInfoAt(LIS.getInstructionIndex(*Def).getRegSlot());
299 const auto &Result = LI.Query(LIS.getInstructionIndex(*I.getParent()));
409 VNInfo *OneUseVNI = LI.getVNInfoBefore(LIS.getInstructionIndex(*OneUseInst));
416 VNInfo *UseVNI = LI.getVNInfoBefore(LIS.getInstructionIndex(*UseInst));
511 LI.removeSegment(LIS.getInstructionIndex(*Def).getRegSlot(),
512 LIS.getInstructionIndex(*Op.getParent()).getRegSlot(),
554 IsDead = !LI.liveAt(LIS.getInstructionIndex(Def).getDeadSlot());
561 SlotIndex Idx = LIS.getInstructionIndex(Def).getRegSlot();
620 SlotIndex DefIdx = LIS.getInstructionIndex(*Def).getRegSlot();