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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc10227 { 14 /* add */, ARM::tADDi8, Convert__Reg1_2__CCOut1_0__Tie0_1_1__Imm0_2551_3__CondCode2_1, AMFBS_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_Imm0_255 }, },
11351 { 1600 /* sub */, ARM::tADDi8, Convert__Reg1_2__CCOut1_0__Tie0_3_3__ThumbModImmNeg8_2551_3__CondCode2_1, AMFBS_IsThumb_UseNegativeImmediates, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_ThumbModImmNeg8_255 }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc 925 /* 1888*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::tADDi8), 0,
5210 /* 10559*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::tADDi8), 0,
37667 /* 83012*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::tADDi8), 0,
gen/lib/Target/ARM/ARMGenFastISel.inc 6484 return fastEmitInst_ri(ARM::tADDi8, &ARM::tGPRRegClass, Op0, Op0IsKill, imm1);
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc 7088 case ARM::tADDi8:
lib/Target/ARM/ARMBaseInstrInfo.cpp 627 case ARM::tADDi8: // ADD (immediate) T2
2327 {ARM::tADDSi8, ARM::tADDi8},
2817 (OI->getOpcode() == ARM::tADDi3 || OI->getOpcode() == ARM::tADDi8 ||
2838 case ARM::tADDi8:
lib/Target/ARM/ARMFeatures.h 30 case ARM::tADDi8:
lib/Target/ARM/ARMISelDAGToDAG.cpp 3420 unsigned Opc = (Addend < 1<<3) ? ARM::tADDi3 : ARM::tADDi8;
lib/Target/ARM/ARMISelLowering.cpp 9944 BuildMI(*BB, Pos, dl, TII->get(ARM::tADDi8), AddrOut)
9986 BuildMI(*BB, Pos, dl, TII->get(ARM::tADDi8), AddrOut)
lib/Target/ARM/ARMLoadStoreOptimizer.cpp 518 } else if ((Opc == ARM::tSUBi8 || Opc == ARM::tADDi8) &&
703 isThumb1 ? ARM::tADDi8 : ARM::ADDri;
729 (BaseOpc == ARM::tADDi8 || BaseOpc == ARM::tSUBi8)) {
1186 case ARM::tADDi8: Scale = 4; CheckCPSRDef = true; break;
lib/Target/ARM/AsmParser/ARMAsmParser.cpp 9770 case ARM::tADDi8:
9805 ARM::tADDi8 : ARM::tSUBi8);
lib/Target/ARM/Thumb2SizeReduction.cpp 84 { ARM::t2ADDri, ARM::tADDi3, ARM::tADDi8, 3, 8, 1, 1, 0,0, 0,1,0 },
86 { ARM::t2ADDSri,ARM::tADDi3, ARM::tADDi8, 3, 8, 1, 1, 2,2, 0,1,0 },
lib/Target/ARM/ThumbRegisterInfo.cpp 251 ExtraOpc = isSub ? ARM::tSUBi8 : ARM::tADDi8;