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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc11352 { 1600 /* sub */, ARM::t2SUBrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, AMFBS_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_rGPR }, },
11363 { 1600 /* sub */, ARM::t2SUBrr, Convert__Reg1_3__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, AMFBS_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_rGPR }, },
11367 { 1600 /* sub */, ARM::t2SUBrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, AMFBS_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_rGPR }, },
11376 { 1600 /* sub */, ARM::t2SUBrr, Convert__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, AMFBS_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_GPRnopc, MCK_rGPR }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc 5324 /* 10837*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SUBrr), 0,
33364 /* 73432*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::t2SUBrr), 0,
gen/lib/Target/ARM/ARMGenFastISel.inc 4703 return fastEmitInst_rr(ARM::t2SUBrr, &ARM::GPRnopcRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/ARM/ARMGenGlobalISel.inc 3699 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::t2SUBrr,
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc16018 case ARM::t2SUBrr: {
lib/Target/ARM/ARMBaseInstrInfo.cpp 2343 {ARM::t2SUBSrr, ARM::t2SUBrr},
2772 (OI->getOpcode() == ARM::SUBrr || OI->getOpcode() == ARM::t2SUBrr) &&
2872 case ARM::t2SUBrr:
3108 bool IsSub = Opc == ARM::SUBrr || Opc == ARM::t2SUBrr ||
3245 case ARM::t2SUBrr:
3282 case ARM::t2SUBrr:
3283 if (UseOpc == ARM::t2SUBrr && Commute)
lib/Target/ARM/ARMFastISel.cpp 1767 Opc = isThumb2 ? ARM::t2SUBrr : ARM::SUBrr;
lib/Target/ARM/ARMFrameLowering.cpp 556 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2SUBrr), ARM::SP)
lib/Target/ARM/ARMISelLowering.cpp10318 BuildMI(*MBB, MI, DL, TII.get(ARM::t2SUBrr), ARM::SP)
lib/Target/ARM/AsmParser/ARMAsmParser.cpp 7716 case ARM::t2SUBrr:
lib/Target/ARM/Disassembler/ARMDisassembler.cpp 600 case ARM::t2SUBrr:
lib/Target/ARM/Thumb2InstrInfo.cpp 270 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2SUBrr), DestReg)
lib/Target/ARM/Thumb2SizeReduction.cpp 119 { ARM::t2SUBrr, ARM::tSUBrr, 0, 0, 0, 1, 0, 0,0, 0,0,0 },