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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Declarations
include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h 583 const RegisterBank *getRegBank(Register Reg, const MachineRegisterInfo &MRI,
References
include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h 577 RBI.getRegBank(MO.getReg(), MRI, TRI)) {
lib/CodeGen/GlobalISel/RegBankSelect.cpp 120 const RegisterBank *CurRegBank = RBI->getRegBank(Reg, *MRI, *TRI);
243 const RegisterBank *CurRegBank = RBI->getRegBank(MO.getReg(), *MRI, *TRI);
lib/CodeGen/GlobalISel/RegisterBankInfo.cpp 190 const RegisterBank *AltRegBank = getRegBank(Reg, MRI, TRI);
235 const RegisterBank *AltRegBank = getRegBank(Reg, MRI, TRI);
lib/Target/AArch64/AArch64InstructionSelector.cpp 429 const RegisterBank *OpBank = RBI.getRegBank(MO.getReg(), MRI, TRI);
622 const RegisterBank &DstRegBank = *RBI.getRegBank(DstReg, MRI, TRI);
623 const RegisterBank &SrcRegBank = *RBI.getRegBank(SrcReg, MRI, TRI);
648 const RegisterBank &DstRegBank = *RBI.getRegBank(DstReg, MRI, TRI);
649 const RegisterBank &SrcRegBank = *RBI.getRegBank(SrcReg, MRI, TRI);
834 bool IsFP = (RBI.getRegBank(I.getOperand(0).getReg(), MRI, TRI)->getID() !=
983 const RegisterBank &RB = *RBI.getRegBank(LHS, MRI, TRI);
1267 if (RBI.getRegBank(StoreSrcReg, MRI, TRI) ==
1268 RBI.getRegBank(DefDstReg, MRI, TRI))
1497 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI);
1595 const RegisterBank &SrcRB = *RBI.getRegBank(SrcReg, MRI, TRI);
1596 const RegisterBank &DstRB = *RBI.getRegBank(DstReg, MRI, TRI);
1746 const RegisterBank &PtrRB = *RBI.getRegBank(PtrReg, MRI, TRI);
1755 const RegisterBank &RB = *RBI.getRegBank(ValReg, MRI, TRI);
1828 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI);
1872 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI);
1949 const RegisterBank &DstRB = *RBI.getRegBank(DstReg, MRI, TRI);
1950 const RegisterBank &SrcRB = *RBI.getRegBank(SrcReg, MRI, TRI);
2017 const RegisterBank &RBDst = *RBI.getRegBank(DstReg, MRI, TRI);
2024 const RegisterBank &RBSrc = *RBI.getRegBank(SrcReg, MRI, TRI);
2071 assert((*RBI.getRegBank(DefReg, MRI, TRI)).getID() ==
2087 RBI.getRegBank(SrcReg, MRI, TRI)->getID() == AArch64::GPRRegBankID) {
2283 const RegisterBank &DstRB = *RBI.getRegBank(DstReg, MRI, TRI);
2651 const RegisterBank &VecRB = *RBI.getRegBank(SrcReg, MRI, TRI);
2715 const RegisterBank &RB = *RBI.getRegBank(I.getOperand(1).getReg(), MRI, TRI);
2823 const RegisterBank &VecRB = *RBI.getRegBank(VecReg, MRI, TRI);
2881 if (RBI.getRegBank(DstReg, MRI, TRI)->getID() != AArch64::FPRRegBankID) {
2894 const RegisterBank &DstRB = *RBI.getRegBank(DstReg, MRI, TRI);
2922 *RBI.getRegBank(I.getOperand(0).getReg(), MRI, TRI);
2940 if (RBI.getRegBank(I.getOperand(0).getReg(), MRI, TRI)->getID() !=
2942 RBI.getRegBank(I.getOperand(1).getReg(), MRI, TRI)->getID() !=
3301 const RegisterBank &FPRBank = *RBI.getRegBank(Op1, MRI, TRI);
3599 const RegisterBank *ScalarRB = RBI.getRegBank(ScalarReg, MRI, TRI);
3799 const RegisterBank &EltRB = *RBI.getRegBank(EltReg, MRI, TRI);
3823 getMinClassForRegBank(*RBI.getRegBank(DemoteVec, MRI, TRI), VecSize);
3859 const RegisterBank &RB = *RBI.getRegBank(I.getOperand(1).getReg(), MRI, TRI);
3888 getMinClassForRegBank(*RBI.getRegBank(DstVec, MRI, TRI), DstSize);
3983 if (RBI.getRegBank(SrcReg, MRI, TRI)->getID() != AArch64::FPRRegBankID) {
3992 if (RBI.getRegBank(DstReg, MRI, TRI)->getID() != AArch64::FPRRegBankID)
lib/Target/AArch64/AArch64RegisterBankInfo.cpp 475 return getRegBank(MI.getOperand(0).getReg(), MRI, TRI) ==
573 const RegisterBank *DstRB = getRegBank(DstReg, MRI, TRI);
574 const RegisterBank *SrcRB = getRegBank(SrcReg, MRI, TRI);
750 if (getRegBank(VReg, MRI, TRI) == &AArch64::FPRRegBank ||
794 if (getRegBank(MI.getOperand(2).getReg(), MRI, TRI) == &AArch64::FPRRegBank)
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp 269 const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI);
305 const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI);
471 const RegisterBank *DstBank = RBI.getRegBank(DstReg, *MRI, TRI);
513 const RegisterBank *SrcBank = RBI.getRegBank(SrcReg, *MRI, TRI);
579 const RegisterBank *DstBank = RBI.getRegBank(DstReg, *MRI, TRI);
585 const RegisterBank *Src0Bank = RBI.getRegBank(Src0Reg, *MRI, TRI);
586 const RegisterBank *Src1Bank = RBI.getRegBank(Src1Reg, *MRI, TRI);
1173 const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI);
1174 const RegisterBank *SrcRB = RBI.getRegBank(SrcReg, *MRI, TRI);
1232 const RegisterBank *SrcBank = RBI.getRegBank(SrcReg, *MRI, TRI);
1497 const RegisterBank *OpBank = RBI.getRegBank(GEPOp.getReg(), MRI, TRI);
1602 const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI);
1621 const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI);
1622 const RegisterBank *SrcRB = RBI.getRegBank(SrcReg, *MRI, TRI);
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp 611 const RegisterBank *Bank = getRegBank(Reg, *MRI, *TRI);
688 const RegisterBank *DefBank = getRegBank(Def.getReg(), MRI, *TRI);
967 const RegisterBank *OpBank = getRegBank(Reg, MRI, *TRI);
1002 const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI);
1054 const RegisterBank *PtrBank = getRegBank(PtrReg, MRI, *TRI);
1442 const RegisterBank *DstBank = getRegBank(DstReg, MRI, *TRI);
1463 const RegisterBank *DstBank = getRegBank(DstReg, MRI, *TRI);
1500 const RegisterBank *SrcBank = getRegBank(SrcReg, MRI, *TRI);
1602 const RegisterBank *DstBank = getRegBank(DstReg, MRI, *TRI);
1612 const RegisterBank *BankLo = getRegBank(Lo, MRI, *TRI);
1613 const RegisterBank *BankHi = getRegBank(Hi, MRI, *TRI);
1694 const RegisterBank *SrcBank = getRegBank(SrcReg, MRI, *TRI);
1759 const RegisterBank *DstBank = getRegBank(DstReg, MRI, *TRI);
1760 const RegisterBank *SrcBank = getRegBank(SrcReg, MRI, *TRI);
1761 const RegisterBank *InsSrcBank = getRegBank(InsReg, MRI, *TRI);
1910 if (const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI)) {
2046 const RegisterBank *PtrBank = getRegBank(PtrReg, MRI, *TRI);
2076 const RegisterBank *Bank = getRegBank(Reg, MRI, TRI);
2148 const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI);
2200 = getRegBank(MI.getOperand(0).getReg(), MRI, *TRI);
2432 const RegisterBank *SrcBank = getRegBank(Src, MRI, *TRI);
lib/Target/ARM/ARMInstructionSelector.cpp 188 const RegisterBank *RegBank = RBI.getRegBank(Reg, MRI, TRI);
242 RBI.getRegBank(VReg0, MRI, TRI)->getID() == ARM::FPRRegBankID &&
247 RBI.getRegBank(VReg1, MRI, TRI)->getID() == ARM::GPRRegBankID &&
252 RBI.getRegBank(VReg2, MRI, TRI)->getID() == ARM::GPRRegBankID &&
274 RBI.getRegBank(VReg0, MRI, TRI)->getID() == ARM::GPRRegBankID &&
279 RBI.getRegBank(VReg1, MRI, TRI)->getID() == ARM::GPRRegBankID &&
284 RBI.getRegBank(VReg2, MRI, TRI)->getID() == ARM::FPRRegBankID &&
517 if (RBI.getRegBank(Reg, MRI, TRI)->getID() != ExpectedRegBankID) {
917 const auto &SrcRegBank = *RBI.getRegBank(SrcReg, MRI, TRI);
918 const auto &DstRegBank = *RBI.getRegBank(DstReg, MRI, TRI);
1012 const auto &SrcRegBank = *RBI.getRegBank(SrcReg, MRI, TRI);
1013 const auto &DstRegBank = *RBI.getRegBank(DstReg, MRI, TRI);
1085 unsigned RegBank = RBI.getRegBank(Reg, MRI, TRI)->getID();
lib/Target/Mips/MipsInstructionSelector.cpp 93 const RegisterBank *RegBank = RBI.getRegBank(DstReg, MRI, TRI);
169 const unsigned RegBank = RBI.getRegBank(DestReg, MRI, TRI)->getID();
243 (RBI.getRegBank(I.getOperand(0).getReg(), MRI, TRI)->getID() ==
379 *RBI.getRegBank(DestReg, MRI, TRI), RBI);
464 *RBI.getRegBank(I.getOperand(0).getReg(), MRI, TRI),
lib/Target/Mips/MipsRegisterBankInfo.cpp 345 RBI.getRegBank(CopyInst->getOperand(Op).getReg(), MRI, TRI);
lib/Target/X86/X86InstructionSelector.cpp 198 const RegisterBank &RegBank = *RBI.getRegBank(Reg, MRI, TRI);
234 const RegisterBank &DstRegBank = *RBI.getRegBank(DstReg, MRI, TRI);
238 const RegisterBank &SrcRegBank = *RBI.getRegBank(SrcReg, MRI, TRI);
508 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI);
641 if (RBI.getRegBank(DefReg, MRI, TRI)->getID() != X86::GPRRegBankID)
717 const RegisterBank &DstRB = *RBI.getRegBank(DstReg, MRI, TRI);
718 const RegisterBank &SrcRB = *RBI.getRegBank(SrcReg, MRI, TRI);
806 const RegisterBank &DstRB = *RBI.getRegBank(DstReg, MRI, TRI);
807 const RegisterBank &SrcRB = *RBI.getRegBank(SrcReg, MRI, TRI);
892 const RegisterBank &DstRB = *RBI.getRegBank(DstReg, MRI, TRI);
893 const RegisterBank &SrcRB = *RBI.getRegBank(SrcReg, MRI, TRI);
1030 *getRegClass(LLT::scalar(8), *RBI.getRegBank(ResultReg, MRI, TRI)), MRI);
1367 const RegisterBank &RegBank = *RBI.getRegBank(DstReg, MRI, TRI);
1436 const RegisterBank &RegBank = *RBI.getRegBank(DstReg, MRI, TRI);
1534 const RegisterBank *RegRB = RBI.getRegBank(DstReg, MRI, TRI);