reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AMDGPU/AMDGPUGenGlobalISel.inc
  344     return isInt<16>(Imm);
gen/lib/Target/Lanai/LanaiGenDAGISel.inc
 1482     return (Imm < 0) && (isInt<16>(Imm));
gen/lib/Target/Mips/MipsGenDAGISel.inc
30164  return isInt<16>(N->getSExtValue()); 
30171   return isInt<17>(N->getSExtValue()) && isInt<16>(N->getSExtValue() + 1);
30412   return !isInt<16>(Val) && isInt<32>(Val) && !(Val & 0xffff);
30420   return isUInt<16>(N->getZExtValue()) && !isInt<16>(N->getSExtValue());
gen/lib/Target/SystemZ/SystemZGenDAGISel.inc
30050   return isInt<16>(N->getSExtValue());
30077   return isInt<16>(-N->getSExtValue());
include/llvm/ADT/PointerEmbeddedInt.h
   64     assert((std::is_signed<IntT>::value ? isInt<Bits>(I) : isUInt<Bits>(I)) &&
include/llvm/Support/MathExtras.h
  355   return isInt<N + S>(x) && (x % (UINT64_C(1) << S) == 0);
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
 2834       && isInt<16>(IMMOffset->getZExtValue())) {
 2842              && isInt<16>(IMMOffset->getZExtValue())) {
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
 6433   return isImm() && (isInt<16>(getImm()) || isUInt<16>(getImm()));
lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
  116     if (Ctx && !isInt<16>(BrImm))
lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
   53   if (isInt<16>(Imm) || isUInt<16>(Imm))
lib/Target/AMDGPU/R600ISelLowering.cpp
  909   assert(isInt<16>(ByteOffset));
lib/Target/AMDGPU/SIInstrInfo.cpp
 2865     if (isInt<16>(Imm) || isUInt<16>(Imm)) {
 3561         if (!isInt<16>(Imm)) {
lib/Target/AMDGPU/SIShrinkInstructions.cpp
  129   return isInt<16>(Src.getImm()) &&
  143   if (isInt<16>(Src.getImm())) {
lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
 1204   if (isInt<16>(Literal) || isUInt<16>(Literal)) {
lib/Target/BPF/BPFISelDAGToDAG.cpp
  115     if (isInt<16>(CN->getSExtValue())) {
  144   if (isInt<16>(CN->getSExtValue())) {
lib/Target/Hexagon/HexagonConstExtenders.cpp
 1721     int32_t D = isInt<16>(Diff) ? Diff : (Diff > 0 ? 32767 : -32768);
lib/Target/Hexagon/HexagonCopyToCombine.cpp
  176     return !Op.isImm() || !isInt<N>(Op.getImm());
lib/Target/Hexagon/HexagonGenInsert.cpp
  673     return isInt<16>(V);
lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
 1584     return V > 0 && isInt<16>(V);
lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
  293       return isInt<16>(static_cast<int32_t>(Value));
lib/Target/Lanai/LanaiISelDAGToDAG.cpp
  129       if (isInt<16>(CN->getSExtValue())) {
  173       if ((RiMode && isInt<16>(CN->getSExtValue())) ||
  228       if (isInt<16>(CN->getSExtValue()))
lib/Target/Lanai/LanaiISelLowering.cpp
  298       if (isInt<16>(C->getSExtValue())) {
lib/Target/Lanai/LanaiMemAluCombiner.cpp
  315            (!IsSpls && isInt<16>(Op2.getImm())))) ||
lib/Target/Lanai/LanaiRegisterInfo.cpp
  171       !isInt<16>(Offset)) {
  186     if (!isInt<16>(Offset)) {
lib/Target/Lanai/LanaiTargetTransformInfo.h
   56     if (isInt<16>(Imm.getSExtValue()))
lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp
  230     assert(isInt<SizeInBits>(OffsetOp.getImm()) && "Constant value truncated");
lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp
  201     assert(isInt<16>(Op2.getImm()) &&
lib/Target/Mips/AsmParser/MipsAsmParser.cpp
 1263     return isConstantImm() ? isInt<Bits>(getConstantImm()) : isImm();
 1271     return isConstantImm() ? (isInt<Bits>(getConstantImm()) ||
 2463     if (isInt<16>(Inst.getOperand(2).getImm())) {
 2469     if (isInt<16>(Inst.getOperand(2).getImm())) {
 2481       if (isInt<16>(ImmValue))
 2655   if (isInt<16>(ImmValue)) {
 4250   bool IsLargeOffset = !(isInt<16>(OffsetValue + 1) && isInt<16>(OffsetValue));
 4250   bool IsLargeOffset = !(isInt<16>(OffsetValue + 1) && isInt<16>(OffsetValue));
 4300   bool IsLargeOffset = !(isInt<16>(OffsetValue + 1) && isInt<16>(OffsetValue));
 4300   bool IsLargeOffset = !(isInt<16>(OffsetValue + 1) && isInt<16>(OffsetValue));
 4347   bool IsLargeOffset = !(isInt<16>(OffsetValue + 3) && isInt<16>(OffsetValue));
 4347   bool IsLargeOffset = !(isInt<16>(OffsetValue + 3) && isInt<16>(OffsetValue));
 4449   if (isInt<16>(ImmValue)) {
 5070   if (!isInt<16>(FirstOffset.getImm()) || !isInt<16>(NextOffset))
 5070   if (!isInt<16>(FirstOffset.getImm()) || !isInt<16>(NextOffset))
 5117   if (!isInt<16>(FirstOffset.getImm()) || !isInt<16>(NextOffset))
 5117   if (!isInt<16>(FirstOffset.getImm()) || !isInt<16>(NextOffset))
lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
   81     if (!isInt<16>(Value)) {
  150     if (!isInt<16>(Value)) {
lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
  306   if (isInt<16>(Offset)) {
  373   if (isInt<16>(Offset)) {
lib/Target/Mips/Mips16ISelDAGToDAG.cpp
  125     if (isInt<16>(CN->getSExtValue())) {
lib/Target/Mips/Mips16ISelLowering.cpp
  735            (ImmSigned && isInt<16>(imm)))
  749   else if (isInt<16>(Imm))
lib/Target/Mips/Mips16InstrInfo.cpp
  236     if (isInt<16>(-Remainder))
  262     if (isInt<16>(Remainder))
  316   if (isInt<16>(Amount))  // need to change to addiu sp, ....and isInt<16>
  488     return isInt<16>(Amount);
  491       return isInt<16>(Amount);
lib/Target/Mips/MipsAnalyzeImmediate.cpp
  100   if (!isInt<16>(ShiftedImm))
lib/Target/Mips/MipsFastISel.cpp
  368   if (isInt<16>(Imm)) {
 2115   if (!isInt<16>(Addr.getOffset())) {
lib/Target/Mips/MipsISelLowering.cpp
 4038       if (isInt<16>(Val)) {
lib/Target/Mips/MipsSEFrameLowering.cpp
  542       assert(isInt<16>(MFI.getMaxAlignment()) &&
  849   return isInt<16>(MFI.getMaxCallFrameSize() + getStackAlignment()) &&
lib/Target/Mips/MipsSEInstrInfo.cpp
  590   if (isInt<16>(Amount)) {
lib/Target/Mips/MipsSERegisterInfo.cpp
  216     if (OffsetBitSize < 16 && isInt<16>(Offset) &&
  236     } else if (!isInt<16>(Offset)) {
lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
  348         return isInt<16>(getImmS16Context());
  354                                    (Kind == Immediate && isInt<16>(getImm()) &&
  357                                     (Kind == Immediate && isInt<16>(getImm()) &&
  389                                  (Kind == Immediate && isInt<16>(getImm()) &&
lib/Target/PowerPC/PPCBranchSelector.cpp
  324         if (isInt<16>(BranchSize)) {
lib/Target/PowerPC/PPCFastISel.cpp
  428   if (!isInt<16>(Addr.Offset))
  848       if ((IsZExt && isUInt<16>(Imm)) || (!IsZExt && isInt<16>(Imm)))
 1309     if (isInt<16>(Imm)) {
 2119   if (isInt<16>(Imm))
 2222   if (isInt<16>(Imm)) {
lib/Target/PowerPC/PPCFrameLowering.cpp
  710   bool IsLargeFrame = !isInt<16>(NegFrameSize);
  912     assert(isPowerOf2_32(MaxAlign) && isInt<16>(MaxAlign) &&
  917   bool isLargeFrame = !isInt<16>(NegFrameSize);
 1491   bool isLargeFrame = !isInt<16>(FrameSize);
 1619   if (MustSaveLR && RBReg == SPReg && isInt<16>(LROffset+SPAdd)) {
 1704       if (CallerAllocatedAmt && isInt<16>(CallerAllocatedAmt)) {
 2106       hasNonRISpills(MF) || (hasSpills(MF) && !isInt<16>(StackSize))) {
 2326       if (isInt<16>(CalleeAmt)) {
lib/Target/PowerPC/PPCISelDAGToDAG.cpp
  819   if (isInt<16>(Imm)) {
  923   if (isInt<16>(Imm)) {
 1097     if (isInt<16>(SextImm))
 3693         if (isInt<16>((int)Imm))
 3737         if (isInt<16>(Imm))
 5512     if (!isInt<16>(True) || !isInt<16>(False))
 5512     if (!isInt<16>(True) || !isInt<16>(False))
 6526         if (!isInt<16>(Offset))
lib/Target/PowerPC/PPCISelLowering.cpp
14421       if (isInt<16>(Value))
14449       if (isInt<16>(-Value))
14903   return isInt<16>(Imm) || isUInt<16>(Imm);
14907   return isInt<16>(Imm) || isUInt<16>(Imm);
15202       return isInt<16>(NegConstant);
lib/Target/PowerPC/PPCInstrInfo.cpp
 2744   if (isInt<16>(OffsetAddi + OffsetImm))
 2873     if (isInt<16>(Addend + SExtImm)) {
 2943     if (isInt<16>(Result)) {
lib/Target/PowerPC/PPCRegisterInfo.cpp
  531   if (MaxAlign < TargetAlign && isInt<16>(FrameSize)) {
 1080                             isInt<16>(Offset);
 1100   if (isInt<16>(Offset))
 1281          (isInt<16>(Offset) && (Offset % offsetMinAlign(*MI)) == 0);
lib/Target/PowerPC/PPCTargetTransformInfo.cpp
   72     if (isInt<16>(Imm.getSExtValue()))
  105     if ((Idx == 1) && Imm.getBitWidth() <= 64 && isInt<16>(Imm.getSExtValue()))
  180     if (isInt<16>(Imm.getSExtValue()))
lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp
   75   assert(isInt<N>(Value) && "Invalid simm argument");
lib/Target/SystemZ/SystemZFrameLowering.cpp
  321     if (isInt<16>(NumBytes))
lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
  537     if (!isInt<16>(Disp))
 1548          isInt<16>(cast<ConstantSDNode>(Op1)->getSExtValue()) &&
 1550            isInt<16>(cast<ConstantSDNode>(Op0)->getSExtValue())))) {
lib/Target/SystemZ/SystemZISelLowering.cpp
  700     if (isInt<16>(SignedValue)) {
  855               (isInt<16>(C->getSExtValue()) || isUInt<16>(C->getZExtValue())))
 1033       if (isInt<16>(C->getSExtValue()))
 1174         if (isInt<16>(C->getSExtValue()))
 2110         isInt<16>(ConstOp1->getSExtValue()))
 3411     if (!isInt<16>(Value))
lib/Target/SystemZ/SystemZInstrInfo.cpp
 1737   if (isInt<16>(Value))
lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
   94       if (isInt<16>(Imm.getSExtValue()))
tools/lld/COFF/Chunks.cpp
  287   if (!isInt<16>(v))
tools/lld/COFF/Writer.cpp
  356       return isInt<16>(diff);
tools/lld/ELF/Arch/PPC64.cpp
  933     return isInt<16>(offset);