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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AVR/AVRGenDAGISel.inc 1760 return CurDAG->getTargetConstant(Log2_32(uint8_t(N->getZExtValue())),
1767 return CurDAG->getTargetConstant(Log2_32(uint8_t(~N->getZExtValue())),
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc72560 int32_t L = Log2_32(VecSize);
72981 return CurDAG->getTargetConstant(Log2_32(NV), SDLoc(N), MVT::i32);
72988 return CurDAG->getTargetConstant(Log2_32(NV), SDLoc(N), MVT::i32);
72995 return CurDAG->getTargetConstant(Log2_32(NV), SDLoc(N), MVT::i32);
73002 return CurDAG->getTargetConstant(Log2_32(V), SDLoc(N), MVT::i32);
73009 return CurDAG->getTargetConstant(Log2_32(V), SDLoc(N), MVT::i32);
73016 return CurDAG->getTargetConstant(Log2_32(V), SDLoc(N), MVT::i32);
include/llvm/CodeGen/BasicTTIImpl.h 1600 unsigned NumReduxLevels = Log2_32(NumVecElts);
1651 unsigned NumReduxLevels = Log2_32(NumVecElts);
include/llvm/MC/LaneBitmask.h 79 return Log2_32(Mask);
include/llvm/MC/MCSymbol.h 356 unsigned Log2Align = Log2_32(Align) + 1;
include/llvm/MC/MCSymbolMachO.h 119 unsigned Log2Size = Log2_32(Align);
lib/Analysis/TargetTransformInfo.cpp 1043 if (matchPairwiseReductionAtLevel(RdxStart, 0, Log2_32(NumVecElems)) ==
lib/Analysis/ValueTracking.cpp 1490 unsigned LowBits = Log2_32(PossibleLZ)+1;
1501 unsigned LowBits = Log2_32(PossibleTZ)+1;
1510 unsigned LowBits = Log2_32(BitsPossiblySet)+1;
lib/Bitcode/Writer/BitcodeWriter.cpp 1222 unsigned MaxEncAlignment = Log2_32(MaxAlignment)+1;
1275 Vals.push_back(Log2_32(GV.getAlignment())+1);
1320 Vals.push_back(Log2_32(F.getAlignment())+1);
2916 unsigned AlignRecord = Log2_32(AI.getAlignment()) + 1;
2917 assert(Log2_32(Value::MaximumAlignment) + 1 < 1 << 5 &&
2937 Vals.push_back(Log2_32(cast<LoadInst>(I).getAlignment())+1);
2951 Vals.push_back(Log2_32(cast<StoreInst>(I).getAlignment())+1);
lib/CodeGen/MachineOperand.cpp 1022 : PtrInfo(ptrinfo), Size(s), FlagVals(f), BaseAlignLog2(Log2_32(a) + 1),
1056 BaseAlignLog2 = Log2_32(MMO->getBaseAlignment()) + 1;
lib/CodeGen/SelectionDAG/DAGCombiner.cpp 7848 N1C->getAPIntValue() == Log2_32(OpSizeInBits)) {
10631 if (Known.getBitWidth() - Known.countMinLeadingZeros() <= Log2_32(Size)) {
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 559 unsigned LogStWidth = Log2_32(StWidth);
773 unsigned LogSrcWidth = Log2_32(SrcWidth);
3455 DAG.getConstant(llvm::Log2_32(EntrySize), dl, Index.getValueType()));
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp 1924 APInt HighBitMask = APInt::getHighBitsSet(ShBits, ShBits - Log2_32(NVTBits));
lib/CodeGen/SelectionDAG/SelectionDAG.cpp 2899 unsigned LowBits = Log2_32(PossibleTZ) + 1;
2908 unsigned LowBits = Log2_32(PossibleLZ) + 1;
2916 Known.Zero.setBitsFrom(Log2_32(PossibleOnes) + 1);
9074 unsigned Stages = Log2_32(Op.getValueType().getVectorNumElements());
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 221 (NumParts & (NumParts - 1)) ? 1 << Log2_32(NumParts) : NumParts;
582 unsigned RoundParts = 1 << Log2_32(NumParts);
5355 countPopulation(Val) + Log2_32(Val) < 7) {
lib/CodeGen/SelectionDAG/TargetLowering.cpp 2607 Known.Zero.setLowBits(Log2_32(Align));
3091 ShAmt == Log2_32(N0.getValueSizeInBits())) {
6784 Log2_32(NElts));
6872 unsigned Log2b = Log2_32(VT.getSizeInBits());
lib/IR/DataLayout.cpp 876 return Log2_32(getPreferredAlignment(GV));
lib/MC/MCAsmStreamer.cpp 778 OS << ',' << Log2_32(ByteAlignment);
802 OS << ',' << Log2_32(ByteAlignment);
822 OS << ',' << Log2_32(ByteAlign);
850 OS << ',' << Log2_32(ByteAlignment);
875 if (ByteAlignment > 1) OS << ", " << Log2_32(ByteAlignment);
1130 OS << Log2_32(ByteAlignment);
1154 OS << Log2_32(ByteAlignment);
lib/MC/MachObjectWriter.cpp 246 W.write<uint32_t>(Log2_32(Section.getAlignment()));
lib/MC/WasmObjectWriter.cpp 1241 Segment.Alignment = Log2_32(Section.getAlignment());
lib/MC/XCOFFObjectWriter.cpp 635 unsigned Log2Align = Log2_32(Align);
lib/ObjectYAML/COFFEmitter.cpp 100 Sec.Header.Characteristics |= (Log2_32(Sec.Alignment) + 1) << 20;
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 736 unsigned Scale = Log2_32(Size);
752 unsigned Scale = Log2_32(Size);
814 unsigned Scale = Log2_32(Size);
855 RHSC < (0x1000 << Log2_32(Size)))
907 unsigned LegalShiftVal = Log2_32(Size);
1037 unsigned Scale = Log2_32(Size);
lib/Target/AArch64/AArch64ISelLowering.cpp 8486 if (ShiftAmount == Log2_32(LoadBytes))
lib/Target/AArch64/AArch64InstructionSelector.cpp 1772 const unsigned Scale = Log2_32(Size);
2643 unsigned EltIdx = Log2_32(SrcEltSize / 8);
2644 unsigned NumEltsIdx = Log2_32(NumElts / 2);
4184 int64_t LegalShiftVal = Log2_32(SizeInBytes);
4247 ImmVal = Log2_32(ImmVal);
4367 if ((RHSC & (Size - 1)) == 0 && RHSC >= 0 && RHSC < (0x1000 << Log2_32(Size)))
4409 unsigned Scale = Log2_32(Size);
lib/Target/AArch64/AArch64TargetTransformInfo.cpp 762 UP.MaxCount = 1 << Log2_32(MaxStridedLoads / StridedLoads);
lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp 1098 bool MatchShift = getShiftExtendAmount() == Log2_32(ShiftWidth / 8);
1156 getShiftExtendAmount() == Log2_32(ExtWidth / 8))
1282 (getShiftExtendAmount() == Log2_32(Width / 8) ||
1291 (getShiftExtendAmount() == Log2_32(Width / 8) ||
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 1021 O << " #" << Log2_32(Width / 8);
lib/Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp 62 Log2Size = Log2_32(1);
65 Log2Size = Log2_32(2);
68 Log2Size = Log2_32(4);
73 Log2Size = Log2_32(8);
83 Log2Size = Log2_32(4);
98 Log2Size = Log2_32(4);
118 Log2Size = Log2_32(4);
lib/Target/AMDGPU/AMDGPUISelLowering.cpp 3225 (Known.getBitWidth() - Known.countMinLeadingZeros() <= Log2_32(Size))) {
4513 Known.Zero.setLowBits(Log2_32(Align));
lib/Target/AMDGPU/AMDGPUSubtarget.h 452 return Log2_32(WavefrontSize);
lib/Target/AMDGPU/SIISelLowering.cpp 4843 SDValue ScaleFactor = DAG.getConstant(Log2_32(EltSize), SL, MVT::i32);
4886 SDValue ScaleFactor = DAG.getConstant(Log2_32(EltSize), SL, MVT::i32);
lib/Target/AMDGPU/SIInstrInfo.cpp 5890 uint64_t EltSizeValue = Log2_32(ST.getMaxPrivateElementSize()) - 1;
lib/Target/ARM/ARMConstantIslandPass.cpp 528 unsigned LogAlign = Log2_32(Align);
lib/Target/ARM/ARMISelDAGToDAG.cpp 668 unsigned ShAmt = Log2_32(RHSC);
3070 unsigned ShImm = Log2_32(RHSV-1);
3089 unsigned ShImm = Log2_32(RHSV+1);
lib/Target/ARM/ARMISelLowering.cpp11860 DAG.getConstant(Log2_32(MulAmt - 1), DL,
11867 DAG.getConstant(Log2_32(MulAmt + 1), DL,
11880 DAG.getConstant(Log2_32(MulAmtAbs + 1), DL,
11888 DAG.getConstant(Log2_32(MulAmtAbs - 1), DL,
lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp 72 Log2Size = llvm::Log2_32(1);
75 Log2Size = llvm::Log2_32(2);
78 Log2Size = llvm::Log2_32(4);
81 Log2Size = llvm::Log2_32(8);
100 Log2Size = llvm::Log2_32(4);
107 Log2Size = llvm::Log2_32(4);
lib/Target/BPF/BPFSelectionDAGInfo.cpp 30 unsigned StoresNumEstimate = alignTo(CopyLen, Align) >> Log2_32(Align);
lib/Target/Hexagon/HexagonConstExtenders.cpp 1078 unsigned L = Log2_32(A);
1118 unsigned L = Log2_32(A);
lib/Target/Hexagon/HexagonHardwareLoops.cpp 971 unsigned Shift = Log2_32(IVBump);
lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp 1152 unsigned LogHw = Log2_32(HwLen);
1679 assert(isPowerOf2_32(VecLen) && Log2_32(VecLen) <= 8);
1680 unsigned LogLen = Log2_32(VecLen);
1681 unsigned HwLog = Log2_32(HwLen);
1796 Perm[Log2_32(X)] = Log2_32(I)-1;
1796 Perm[Log2_32(X)] = Log2_32(I)-1;
lib/Target/Hexagon/HexagonISelLowering.cpp 3076 if (!isInt<11>(AM.BaseOffs >> Log2_32(A)))
lib/Target/Hexagon/HexagonISelLoweringHVX.cpp 289 unsigned L = Log2_32(ElemWidth/8);
lib/Target/Hexagon/HexagonInstrInfo.cpp 2701 return isInt<4>(Offset >> Log2_32(VectorSize));
lib/Target/Hexagon/RDFGraph.h 378 : NodesPerBlock(NPB), BitsPerIndex(Log2_32(NPB)),
lib/Target/Mips/MipsConstantIslandPass.cpp 564 unsigned LogAlign = Log2_32(Align);
lib/Target/Mips/MipsInstructionSelector.cpp 321 .addImm(Log2_32(EntrySize));
lib/Target/PowerPC/PPCFrameLowering.cpp 1065 .addImm(64 - Log2_32(MaxAlign));
1070 .addImm(32 - Log2_32(MaxAlign))
lib/Target/SystemZ/SystemZTargetTransformInfo.cpp 557 return (Log2_32(Bits1) - Log2_32(Bits0));
557 return (Log2_32(Bits1) - Log2_32(Bits0));
559 return (Log2_32(Bits0) - Log2_32(Bits1));
559 return (Log2_32(Bits0) - Log2_32(Bits1));
lib/Target/X86/X86CallFrameOptimization.cpp 246 Log2SlotSize = Log2_32(SlotSize);
lib/Target/X86/X86ISelLowering.cpp36008 unsigned Stages = Log2_32(VT.getVectorNumElements());
36367 unsigned ReductionSteps = Log2_32(VecVT.getVectorNumElements());
39493 unsigned Log2b = Log2_32(VT.getSizeInBits());
42090 APInt DemandedMask = APInt::getLowBitsSet(BitWidth, Log2_32(BitWidth));
lib/Target/X86/X86SpeculativeLoadHardening.cpp 2244 unsigned RegIdx = Log2_32(RegBytes);
2294 unsigned SubRegImm = SubRegImms[Log2_32(Bytes)];
2307 unsigned OrOpCode = OrOpCodes[Log2_32(Bytes)];
lib/Target/XCore/XCoreInstrInfo.cpp 422 int N = Log2_32(val) + 1;
434 int N = Log2_32(Value) + 1;
lib/Transforms/InstCombine/InstCombineShifts.cpp 985 if (II && isPowerOf2_32(BitWidth) && Log2_32(BitWidth) == ShAmt &&
lib/Transforms/Scalar/LoopStrengthReduce.cpp 3657 Depth + 1 + (Log2_32(AddOps.size()) >> 2));
lib/Transforms/Scalar/SimpleLoopUnswitch.cpp 2490 UnswitchedClones += Log2_32(NonExitingSuccessors);
2509 if (ClonesPower > Log2_32(UnswitchThreshold) ||
lib/Transforms/Utils/LoopUnrollRuntime.cpp 646 if (Log2_32(Count) > BEWidth) {
tools/clang/lib/CodeGen/CGExpr.cpp 2801 TypeInfo = (llvm::Log2_32(getContext().getTypeSize(T)) << 1) |
tools/clang/lib/CodeGen/CGObjCGNU.cpp 1858 llvm::Log2_32(Context.getTypeAlignInChars(ivarTy).getQuantity());
tools/clang/lib/CodeGen/CGObjCMac.cpp 6834 Align = llvm::Log2_32(Align);
tools/clang/lib/Frontend/Rewrite/RewriteModernObjC.cpp 6821 Align = llvm::Log2_32(Align);
tools/lld/COFF/Chunks.cpp 872 uint8_t p2Align = llvm::Log2_32(c->getAlignment());
tools/lld/COFF/Chunks.h 73 p2Align = llvm::Log2_32(align);
tools/lld/lib/ReaderWriter/MachO/MachONormalizedFileBinaryWriter.cpp 654 sout->align = llvm::Log2_32(sin.alignment);
724 sect->align = llvm::Log2_32(section->alignment);
tools/llvm-lipo/llvm-lipo.cpp 336 if (Log2_32(AlignmentValue) > MachOUniversalBinary::MaxSectionAlignment)
342 Log2_32(AlignmentValue));
utils/TableGen/AsmWriterEmitter.cpp 395 unsigned TableSize = std::min(1 << Log2_32(BytesNeeded), 4);
utils/TableGen/X86RecognizableInstr.cpp 357 encoding = (OperandEncoding)(encoding + Log2_32(CD8_Scale));