reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Overridden By

lib/Target/AMDGPU/R600InstrInfo.cpp

  862 bool R600InstrInfo::isPredicated(const MachineInstr &MI) const {

lib/Target/ARM/ARMBaseInstrInfo.cpp

  482 bool ARMBaseInstrInfo::isPredicated(const MachineInstr &MI) const {

lib/Target/Hexagon/HexagonInstrInfo.cpp

 1555 bool HexagonInstrInfo::isPredicated(const MachineInstr &MI) const {

lib/Target/PowerPC/PPCInstrInfo.cpp

 1415 bool PPCInstrInfo::isPredicated(const MachineInstr &MI) const {

References

lib/CodeGen/AggressiveAntiDepBreaker.cpp

  389     if (MI.isCall() || MI.hasExtraDefRegAllocReq() || TII->isPredicated(MI) ||
  467                  TII->isPredicated(MI) || MI.isInlineAsm();

lib/CodeGen/BranchFolding.cpp

 1940   if (!PI->isSafeToMove(nullptr, DontMoveAcrossStore) || TII->isPredicated(*PI))
 2008     if (TII->isPredicated(*TIB))

lib/CodeGen/CriticalAntiDepBreaker.cpp

  183       MI.isCall() || MI.hasExtraSrcRegAllocReq() || TII->isPredicated(MI);
  258   if (!TII->isPredicated(MI)) {
  604     if (MI.isCall() || MI.hasExtraDefRegAllocReq() || TII->isPredicated(MI))

lib/CodeGen/EarlyIfConversion.cpp

  325     if (!TII->isPredicable(*I) || TII->isPredicated(*I)) {

lib/CodeGen/IfConversion.cpp

 1103     bool isPredicated = TII->isPredicated(MI);
 1985     bool BB1Predicated = BBI1T != MBB1.end() && TII->isPredicated(*BBI1T);
 1986     bool BB2NonPredicated = BBI2T != MBB2.end() && !TII->isPredicated(*BBI2T);
 2077     if (TI != BBI.BB->end() && TII->isPredicated(*TI))
 2135     if (I.isDebugInstr() || TII->isPredicated(I))
 2195     if (!TII->isPredicated(I) && !MI->isDebugInstr()) {
 2249   if (FromTI != FromMBB.end() && !TII->isPredicated(*FromTI))

lib/CodeGen/MachineBasicBlock.cpp

  847     return (empty() || !back().isBarrier() || TII->isPredicated(back()))

lib/CodeGen/MachineVerifier.cpp

  698           !TII->isPredicated(MBB->back())) {
  840   if (MI->isTerminator() && !TII->isPredicated(*MI)) {

lib/CodeGen/TargetInstrInfo.cpp

  317   return !isPredicated(MI);

lib/CodeGen/TargetSchedule.cpp

  306   if (!DepMI->readsRegister(Reg, TRI) && TII->isPredicated(*DepMI))

lib/Target/ARC/ARCInstrInfo.cpp

  181   while (isPredicated(*I) || I->isTerminator() || I->isDebugValue()) {
  213       CantAnalyze = !isPredicated(*I);
  221     if (!isPredicated(*I) && (isUncondBranchOpcode(I->getOpcode()) ||

lib/Target/Hexagon/RDFGraph.cpp

  600   return TII.isPredicated(In);

lib/Target/MSP430/MSP430InstrInfo.cpp

  172   return !isPredicated(MI);

lib/Target/X86/X86InstrInfo.cpp

 2389   return !isPredicated(MI);