reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/MIRParser/MIRParser.cpp
  555     RegInfo.addLiveIn(Reg, VReg);
lib/CodeGen/MachineFunction.cpp
  601   MRI.addLiveIn(PReg, VReg);
lib/Target/AArch64/AArch64CallLowering.cpp
  113     MIRBuilder.getMRI()->addLiveIn(PhysReg);
lib/Target/AMDGPU/AMDGPUCallLowering.cpp
  415     MRI.addLiveIn(InputPtrReg, VReg);
lib/Target/AMDGPU/AMDGPUISelLowering.cpp
 4097     MRI.addLiveIn(Reg, VReg);
lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
 1783   MRI.addLiveIn(Reg, NewReg);
lib/Target/AMDGPU/SIFrameLowering.cpp
  213   MRI.addLiveIn(FlatScratchInitReg);
  451   MRI.addLiveIn(PreloadedScratchWaveOffsetReg);
  456     MRI.addLiveIn(PreloadedPrivateBufferReg);
  573     MF.getRegInfo().addLiveIn(GitPtrLo);
  643         MF.getRegInfo().addLiveIn(MFI->getImplicitBufferPtrUserSGPR());
lib/Target/ARC/ARCISelLowering.cpp
  494         RegInfo.addLiveIn(VA.getLocReg(), VReg);
  539         RegInfo.addLiveIn(ArgRegs[i], VReg);
lib/Target/ARM/ARMCallLowering.cpp
  409     MIRBuilder.getMRI()->addLiveIn(PhysReg);
lib/Target/BPF/BPFISelLowering.cpp
  241         RegInfo.addLiveIn(VA.getLocReg(), VReg);
lib/Target/Hexagon/HexagonISelLowering.cpp
  759       MRI.addLiveIn(VA.getLocReg(), VReg);
lib/Target/Lanai/LanaiISelLowering.cpp
  464         RegInfo.addLiveIn(VA.getLocReg(), VReg);
lib/Target/MSP430/MSP430ISelLowering.cpp
  639         RegInfo.addLiveIn(VA.getLocReg(), VReg);
lib/Target/Mips/MipsCallLowering.cpp
  109     MIRBuilder.getMRI()->addLiveIn(PhysReg);
lib/Target/Mips/MipsISelLowering.cpp
 1259   MF.getRegInfo().addLiveIn(PReg, VReg);
lib/Target/Mips/MipsMachineFunction.cpp
   81     MF.getRegInfo().addLiveIn(Mips::T9_64);
  109   MF.getRegInfo().addLiveIn(Mips::T9);
  144   MF.getRegInfo().addLiveIn(Mips::V0);
lib/Target/RISCV/RISCVISelLowering.cpp
 1711   RegInfo.addLiveIn(VA.getLocReg(), VReg);
 1789   RegInfo.addLiveIn(VA.getLocReg(), LoVReg);
 1801     RegInfo.addLiveIn(VA.getLocReg() + 1, HiVReg);
 1984       RegInfo.addLiveIn(ArgRegs[I], Reg);
lib/Target/Sparc/SparcISelLowering.cpp
  421         MF.getRegInfo().addLiveIn(VA.getLocReg(), VRegHi);
  449       MF.getRegInfo().addLiveIn(VA.getLocReg(), VReg);
  556       MF.getRegInfo().addLiveIn(*CurArgReg, VReg);
lib/Target/SystemZ/SystemZISelLowering.cpp
 1355       MRI.addLiveIn(VA.getLocReg(), VReg);
lib/Target/WebAssembly/WebAssemblyFastISel.cpp
  720   MRI.addLiveIn(WebAssembly::ARGUMENTS);
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
  901   MF.getRegInfo().addLiveIn(WebAssembly::ARGUMENTS);
lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
  903     MF.getRegInfo().addLiveIn(WebAssembly::VALUE_STACK);
lib/Target/X86/X86CallLowering.cpp
  307     MIRBuilder.getMRI()->addLiveIn(PhysReg);
lib/Target/XCore/XCoreISelLowering.cpp
 1313         RegInfo.addLiveIn(VA.getLocReg(), VReg);
 1364         RegInfo.addLiveIn(ArgRegs[i], VReg);
tools/llvm-exegesis/lib/Assembler.cpp
  191     MF.getRegInfo().addLiveIn(Reg);