reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

include/llvm/CodeGen/MachineBasicBlock.h

  949     It++;

lib/CodeGen/DeadMachineInstructionElim.cpp

  125       MachineInstr *MI = &*MII++;

lib/CodeGen/FinalizeISel.cpp

   56       MachineInstr &MI = *MBBI++;

lib/CodeGen/GlobalISel/RegBankSelect.cpp

  688       MachineInstr &MI = *MII++;

lib/CodeGen/MIRCanonicalizerPass.cpp

  427     MachineInstr &MI = *MII++;

lib/CodeGen/MachineCombiner.cpp

  511     auto &MI = *BlockIter++;

lib/CodeGen/MachineOutliner.cpp

  766     for (MachineBasicBlock::iterator Et = MBB.end(); It != Et; It++) {

lib/CodeGen/MachineTraceMetrics.cpp

  830     for (; Start != End; Start++)

lib/CodeGen/ModuloSchedule.cpp

 1222       MachineInstr &MI = *I++;
 1312     (I++)->eraseFromParent();

lib/CodeGen/OptimizePHIs.cpp

  170     MachineInstr *MI = &*MII++;

lib/CodeGen/SelectionDAG/FastISel.cpp

 2308       FuncInfo.PHINodesToUpdate.push_back(std::make_pair(&*MBBI++, Reg));

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

 9992               std::make_pair(&*MBBI++, Reg + i));

lib/CodeGen/TailDuplicator.cpp

  904         MachineInstr *MI = &*I++;
  912         MachineInstr *MI = &*I++;
  967       MachineInstr *MI = &*I++;

lib/CodeGen/TargetInstrInfo.cpp

  144     auto MI = Tail++;

lib/CodeGen/TwoAddressInstructionPass.cpp

  998       auto CopyMI = MBBI++;

lib/CodeGen/UnreachableBlockElim.cpp

  141           start++;
  199           phi++->eraseFromParent();

lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp

  381     MachineInstr &MI = *I++;

lib/Target/AArch64/AArch64InstrInfo.cpp

 5688   It++;
 5694   It++;

lib/Target/AArch64/AArch64SpeculationHardening.cpp

  291   for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); I++) {

lib/Target/AMDGPU/GCNDPPCombine.cpp

  567       auto &MI = *I++;

lib/Target/AMDGPU/GCNRegPressure.cpp

  403   LastTrackedMI = &*NextMI++;

lib/Target/AMDGPU/R600ClauseMergePass.cpp

  102   I++;
  105       I++;
  108     MachineInstr &MI = *I++;
  195       MachineInstr &MI = *I++;

lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp

  414     I++;
  440         I++;
  546         I++;

lib/Target/AMDGPU/R600EmitClauseMarkers.cpp

  277         I++;

lib/Target/AMDGPU/SIFixSGPRCopies.cpp

  566         B++;

lib/Target/AMDGPU/SIISelLowering.cpp

 3683     for (auto I = BB->begin(); I != &MI; I++) {

lib/Target/AMDGPU/SIInstrInfo.cpp

 4442   MachineBasicBlock::iterator J = I++;
 6548     InsPt++;

lib/Target/ARM/A15SDOptimizer.cpp

  513   InsertPt++;

lib/Target/ARM/ARMFrameLowering.cpp

  454     GPRCS1Push = LastPush = MBBI++;
  479     GPRCS2Push = LastPush = MBBI++;
  503       LastPush = MBBI++;
  857       MBBI++;
  861         MBBI++;
  869     if (AFI->getGPRCalleeSavedArea2Size()) MBBI++;
  870     if (AFI->getGPRCalleeSavedArea1Size()) MBBI++;

lib/Target/ARM/MLxExpansionPass.cpp

  334     MachineInstr *MI = &*MII++;

lib/Target/ARM/Thumb1FrameLowering.cpp

  336       MBBI++;
  338       MBBI++;
  732     MBBI++;

lib/Target/AVR/AVRRegisterInfo.cpp

  124   II++;
  164     II++; // Skip over the FRMIDX (and now MOVW) instruction.

lib/Target/Hexagon/BitTracker.cpp

 1067       const MachineInstr &PI = *It++;
 1081       const MachineInstr &MI = *It++;

lib/Target/Hexagon/HexagonCopyToCombine.cpp

  489       MachineInstr &I1 = *MI++;

lib/Target/Lanai/LanaiFrameLowering.cpp

   72       MachineInstr &MI = *MBBI++;

lib/Target/Lanai/LanaiMemAluCombiner.cpp

  393             BB->erase(MBBIter++);

lib/Target/Mips/MipsSEFrameLowering.cpp

  109       Expanded |= expandInstr(MBB, I++);

lib/Target/NVPTX/NVPTXPeephole.cpp

  137       auto &MI = *BlockIter++;

lib/Target/PowerPC/PPCBranchCoalescing.cpp

  400   for (MachineBasicBlock::iterator Iter = MI; Iter != ME; Iter++) {

lib/Target/PowerPC/PPCFrameLowering.cpp

  943         StackUpdateLoc++;

lib/Target/PowerPC/PPCInstrInfo.cpp

 2329   It++;
 2492   It++;
 2604     for (auto It = ++Start; It != End; It++)
 3523   It++;

lib/Target/PowerPC/PPCPreEmitPeephole.cpp

  230         for (It++; It != Er; It++) {
  230         for (It++; It != Er; It++) {
  254           for (; It != Er; It++) {

lib/Target/PowerPC/PPCRegisterInfo.cpp

  752   for (Ins = MI; Ins != MBB.rend(); Ins++) {

lib/Target/RISCV/RISCVInstrInfo.cpp

  251        J++) {

lib/Target/SystemZ/SystemZElimCompare.cpp

  436     MachineInstr &MI = *MBBI++;
  472     MachineInstr &MI = *MBBI++;

lib/Target/SystemZ/SystemZMachineScheduler.cpp

  109        I != SinglePredMBB->end(); I++) {

lib/Target/SystemZ/SystemZRegisterInfo.cpp

  386   MEE++;

lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp

  207     MachineInstr &MI = *I++;
  229       MachineInstr &MI = *I++;

lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp

   67       MachineInstr *MI = &*MII++;

lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp

   97     MachineInstr *MI = &*MII++;

lib/Target/WebAssembly/WebAssemblyPrepareForLiveIntervals.cpp

  116     MachineInstr &MI = *MII++;

lib/Target/X86/X86CallFrameOptimization.cpp

  364   MachineBasicBlock::iterator FrameSetup = I++;
  397       Context.SPCopy = &*J++;

lib/Target/X86/X86CmovConversion.cpp

  709     auto &MI = *MIIt++;

lib/Target/X86/X86FloatingPoint.cpp

 1358   MBB->remove(&*I++);

lib/Target/X86/X86OptimizeLEAs.cpp

  498     MachineInstr &MI = *I++;