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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenDAGISel.inc114629 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
114727 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc78732 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
79042 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/AMDGPU/R600GenDAGISel.inc12332 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
12473 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/ARC/ARCGenDAGISel.inc 1096 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
1142 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/ARM/ARMGenDAGISel.inc54275 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
54315 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/AVR/AVRGenDAGISel.inc 1589 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
1613 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/BPF/BPFGenDAGISel.inc 1932 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
1987 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc72290 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
72327 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/Lanai/LanaiGenDAGISel.inc 1347 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
1418 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/MSP430/MSP430GenDAGISel.inc 4791 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
4807 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/Mips/MipsGenDAGISel.inc29985 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
30072 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/PowerPC/PPCGenDAGISel.inc44098 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
44333 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/RISCV/RISCVGenDAGISel.inc13828 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
13919 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/Sparc/SparcGenDAGISel.inc 3428 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
3499 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/SystemZ/SystemZGenDAGISel.inc29821 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
29868 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/WebAssembly/WebAssemblyGenDAGISel.inc21261 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
21331 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/X86/X86GenDAGISel.inc253573 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
253606 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
gen/lib/Target/XCore/XCoreGenDAGISel.inc 2309 if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
2369 if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false;
include/llvm/CodeGen/BasicTTIImpl.h 177 return ISD::UNINDEXED;
include/llvm/CodeGen/SelectionDAGNodes.h 2220 bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; }
2223 bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
2594 Ld->getAddressingMode() == ISD::UNINDEXED;
2624 cast<LoadSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
2632 St->getAddressingMode() == ISD::UNINDEXED;
2648 cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
lib/CodeGen/SelectionDAG/DAGCombiner.cpp13538 ISD::MemIndexedMode AM = ISD::UNINDEXED;
13770 ISD::MemIndexedMode AM = ISD::UNINDEXED;
13856 assert(AM != ISD::UNINDEXED);
lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp 362 ISD::UNINDEXED, N->getExtensionType(),
1554 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset,
1559 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset,
lib/CodeGen/SelectionDAG/SelectionDAG.cpp 6739 bool Indexed = AM != ISD::UNINDEXED;
6773 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
6780 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
6791 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, PtrInfo,
6799 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
6851 dl.getIROrder(), VTs, ISD::UNINDEXED, false, VT, MMO));
6859 ISD::UNINDEXED, false, VT, MMO);
6918 dl.getIROrder(), VTs, ISD::UNINDEXED, true, SVT, MMO));
6926 ISD::UNINDEXED, true, SVT, MMO);
lib/CodeGen/SelectionDAG/TargetLowering.cpp 6462 assert(LD->getAddressingMode() == ISD::UNINDEXED &&
6617 assert(ST->getAddressingMode() == ISD::UNINDEXED &&
lib/Target/AMDGPU/R600ISelLowering.cpp 1640 ISD::UNINDEXED, Ext, VT, DL, Chain,
lib/Target/AMDGPU/SIISelLowering.cpp 7277 SDValue NewLoad = DAG.getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD,
lib/Target/ARM/ARMISelDAGToDAG.cpp 1472 if (AM == ISD::UNINDEXED)
1578 if (AM == ISD::UNINDEXED)
1629 if (AM == ISD::UNINDEXED)
lib/Target/ARM/ARMISelLowering.cpp13877 DAG.getLoad(ISD::UNINDEXED, NewExtType, NewToVT, DL, Ch, BasePtr, Offset,
13880 DAG.getLoad(ISD::UNINDEXED, NewExtType, NewToVT, DL, Ch, NewPtr, Offset,
lib/Target/Hexagon/HexagonISelDAGToDAG.cpp 451 if (AM != ISD::UNINDEXED) {
560 if (AM != ISD::UNINDEXED) {
lib/Target/X86/X86ISelDAGToDAG.cpp 762 LD->getAddressingMode() != ISD::UNINDEXED ||