reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenDAGISel.inc
103703 /*231882*/  /*SwitchOpcode*/ 16|128,8/*1040*/, TARGET_VAL(ISD::UINT_TO_FP),// ->232926
104859 /*234758*/      /*SwitchOpcode*/ 107, TARGET_VAL(ISD::UINT_TO_FP),// ->234868
gen/lib/Target/AArch64/AArch64GenFastISel.inc
 4293   case ISD::UINT_TO_FP: return fastEmit_ISD_UINT_TO_FP_r(VT, RetVT, Op0, Op0IsKill);
gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc
75231 /*166710*/  /*SwitchOpcode*/ 45|128,1/*173*/, TARGET_VAL(ISD::UINT_TO_FP),// ->166887
gen/lib/Target/AMDGPU/R600GenDAGISel.inc
10156 /* 38746*/  /*SwitchOpcode*/ 13|128,1/*141*/, TARGET_VAL(ISD::UINT_TO_FP),// ->38891
gen/lib/Target/ARM/ARMGenDAGISel.inc
41229 /* 90555*/  /*SwitchOpcode*/ 119|128,4/*631*/, TARGET_VAL(ISD::UINT_TO_FP),// ->91190
gen/lib/Target/ARM/ARMGenFastISel.inc
 2727   case ISD::UINT_TO_FP: return fastEmit_ISD_UINT_TO_FP_r(VT, RetVT, Op0, Op0IsKill);
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc
68367 /*132365*/  /*SwitchOpcode*/ 49, TARGET_VAL(ISD::UINT_TO_FP),// ->132417
gen/lib/Target/Mips/MipsGenDAGISel.inc
29670 /* 56488*/  /*SwitchOpcode*/ 29, TARGET_VAL(ISD::UINT_TO_FP),// ->56520
gen/lib/Target/Mips/MipsGenFastISel.inc
 1210   case ISD::UINT_TO_FP: return fastEmit_ISD_UINT_TO_FP_r(VT, RetVT, Op0, Op0IsKill);
gen/lib/Target/NVPTX/NVPTXGenDAGISel.inc
71096 /*149913*/  /*SwitchOpcode*/ 96|128,1/*224*/, TARGET_VAL(ISD::UINT_TO_FP),// ->150141
gen/lib/Target/PowerPC/PPCGenDAGISel.inc
33409 /* 86518*/  /*SwitchOpcode*/ 13|128,21/*2701*/, TARGET_VAL(ISD::UINT_TO_FP),// ->89223
gen/lib/Target/PowerPC/PPCGenFastISel.inc
 1715   case ISD::UINT_TO_FP: return fastEmit_ISD_UINT_TO_FP_r(VT, RetVT, Op0, Op0IsKill);
gen/lib/Target/RISCV/RISCVGenDAGISel.inc
12694 /* 23647*/  /*SwitchOpcode*/ 42|128,3/*426*/, TARGET_VAL(ISD::UINT_TO_FP),// ->24077
gen/lib/Target/SystemZ/SystemZGenDAGISel.inc
25834 /* 49118*/  /*SwitchOpcode*/ 43|128,1/*171*/, TARGET_VAL(ISD::UINT_TO_FP),// ->49293
gen/lib/Target/WebAssembly/WebAssemblyGenDAGISel.inc
18823 /* 35943*/  /*SwitchOpcode*/ 73, TARGET_VAL(ISD::UINT_TO_FP),// ->36019
gen/lib/Target/WebAssembly/WebAssemblyGenFastISel.inc
  980   case ISD::UINT_TO_FP: return fastEmit_ISD_UINT_TO_FP_r(VT, RetVT, Op0, Op0IsKill);
gen/lib/Target/X86/X86GenDAGISel.inc
74448 /*156957*/  /*SwitchOpcode*/ 57|128,8/*1081*/, TARGET_VAL(ISD::UINT_TO_FP),// ->158042
133026 /*272948*/          /*SwitchOpcode*/ 97|128,1/*225*/, TARGET_VAL(ISD::UINT_TO_FP),// ->273177
139609 /*286633*/          /*SwitchOpcode*/ 97|128,1/*225*/, TARGET_VAL(ISD::UINT_TO_FP),// ->286862
142054 /*291172*/          /*SwitchOpcode*/ 69, TARGET_VAL(ISD::UINT_TO_FP),// ->291244
144093 /*295165*/          /*SwitchOpcode*/ 69, TARGET_VAL(ISD::UINT_TO_FP),// ->295237
151378 /*308806*/          /*SwitchOpcode*/ 77, TARGET_VAL(ISD::UINT_TO_FP),// ->308886
155310 /*316524*/          /*SwitchOpcode*/ 75, TARGET_VAL(ISD::UINT_TO_FP),// ->316602
156899 /*319367*/          /*SwitchOpcode*/ 19, TARGET_VAL(ISD::UINT_TO_FP),// ->319389
158242 /*321895*/          /*SwitchOpcode*/ 18, TARGET_VAL(ISD::UINT_TO_FP),// ->321916
166794 /*338309*/          /*SwitchOpcode*/ 97|128,1/*225*/, TARGET_VAL(ISD::UINT_TO_FP),// ->338538
173092 /*351437*/          /*SwitchOpcode*/ 97|128,1/*225*/, TARGET_VAL(ISD::UINT_TO_FP),// ->351666
175024 /*355068*/          /*SwitchOpcode*/ 69, TARGET_VAL(ISD::UINT_TO_FP),// ->355140
176500 /*358002*/          /*SwitchOpcode*/ 69, TARGET_VAL(ISD::UINT_TO_FP),// ->358074
184336 /*373034*/          /*SwitchOpcode*/ 1|128,1/*129*/, TARGET_VAL(ISD::UINT_TO_FP),// ->373167
185727 /*375587*/          /*SwitchOpcode*/ 19, TARGET_VAL(ISD::UINT_TO_FP),// ->375609
186491 /*377044*/          /*SwitchOpcode*/ 18, TARGET_VAL(ISD::UINT_TO_FP),// ->377065
236505 /*482468*/        /*SwitchOpcode*/ 66, TARGET_VAL(ISD::UINT_TO_FP),// ->482537
238431 /*486656*/          /*SwitchOpcode*/ 35, TARGET_VAL(ISD::UINT_TO_FP),// ->486694
242937 /*495998*/        /*SwitchOpcode*/ 66, TARGET_VAL(ISD::UINT_TO_FP),// ->496067
244949 /*500365*/          /*SwitchOpcode*/ 35, TARGET_VAL(ISD::UINT_TO_FP),// ->500403
gen/lib/Target/X86/X86GenFastISel.inc
 5926   case ISD::UINT_TO_FP: return fastEmit_ISD_UINT_TO_FP_r(VT, RetVT, Op0, Op0IsKill);
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
 1572   case ISD::UINT_TO_FP:         return visitUINT_TO_FP(N);
12816   if (N->getOpcode() == ISD::UINT_TO_FP && N0.getOpcode() == ISD::FP_TO_UINT &&
12842       hasOperation(ISD::UINT_TO_FP, OpVT)) {
12845       return DAG.getNode(ISD::UINT_TO_FP, SDLoc(N), VT, N0);
12898     return DAG.getNode(ISD::UINT_TO_FP, SDLoc(N), VT, N0);
12902   if (!hasOperation(ISD::UINT_TO_FP, OpVT) &&
12935   if (N0.getOpcode() != ISD::UINT_TO_FP && N0.getOpcode() != ISD::SINT_TO_FP)
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
 1007   case ISD::UINT_TO_FP:
 2480     if (TLI.isOperationLegalOrCustom(ISD::UINT_TO_FP, NewInTy)) {
 2481       OpToUse = ISD::UINT_TO_FP;
 2885   case ISD::UINT_TO_FP:
 4125   if (Node->getOpcode() == ISD::UINT_TO_FP ||
 4185   case ISD::UINT_TO_FP:
lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
  103     case ISD::UINT_TO_FP:  R = SoftenFloatRes_XINT_TO_FP(N); break;
 1170   case ISD::UINT_TO_FP: ExpandFloatRes_XINT_TO_FP(N, Lo, Hi); break;
 2096     case ISD::UINT_TO_FP: R = PromoteFloatRes_XINT_TO_FP(N); break;
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
 1190   case ISD::UINT_TO_FP:   Res = PromoteIntOp_UINT_TO_FP(N); break;
 3614   case ISD::UINT_TO_FP:        Res = ExpandIntOp_UINT_TO_FP(N); break;
lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
  464   case ISD::UINT_TO_FP:
  525   case ISD::UINT_TO_FP:
  580   unsigned Opc = Op.getOpcode() == ISD::UINT_TO_FP ? ISD::ZERO_EXTEND :
  788   case ISD::UINT_TO_FP:
lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  102   case ISD::UINT_TO_FP:
  606     case ISD::UINT_TO_FP:
  918   case ISD::UINT_TO_FP:
 2007     case ISD::UINT_TO_FP:
 2841   case ISD::UINT_TO_FP:
 4169   case ISD::UINT_TO_FP:
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
 4037   case ISD::UINT_TO_FP:
 4301     case ISD::UINT_TO_FP:
 4440       case ISD::UINT_TO_FP:
 4491   case ISD::UINT_TO_FP:
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
 3444   setValue(&I, DAG.getNode(ISD::UINT_TO_FP, getCurSDLoc(), DestVT, N));
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
  327   case ISD::UINT_TO_FP:                 return "uint_to_fp";
lib/CodeGen/TargetLoweringBase.cpp
 1622   case UIToFP:         return ISD::UINT_TO_FP;
lib/Target/AArch64/AArch64ISelLowering.cpp
  270   setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom);
  271   setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom);
  272   setOperationAction(ISD::UINT_TO_FP, MVT::i128, Custom);
  593   setTargetDAGCombine(ISD::UINT_TO_FP);
  691     setOperationAction(ISD::UINT_TO_FP, MVT::v1i64, Expand);
  698     setOperationPromotedToType(ISD::UINT_TO_FP, MVT::v4i8, MVT::v4i32);
  702     setOperationPromotedToType(ISD::UINT_TO_FP, MVT::v8i8, MVT::v8i32);
  705     setOperationAction(ISD::UINT_TO_FP, MVT::v2i32, Custom);
  707     setOperationAction(ISD::UINT_TO_FP, MVT::v2i64, Custom);
  711     setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Custom);
  715       setOperationAction(ISD::UINT_TO_FP, MVT::v4i16, Custom);
  717       setOperationAction(ISD::UINT_TO_FP, MVT::v8i16, Custom);
  721       setOperationPromotedToType(ISD::UINT_TO_FP, MVT::v4i16, MVT::v4i32);
  724       setOperationPromotedToType(ISD::UINT_TO_FP, MVT::v8i16, MVT::v8i32);
 3060   case ISD::UINT_TO_FP:
 9647       (Opc != ISD::SINT_TO_FP && Opc != ISD::UINT_TO_FP))
11730   case ISD::UINT_TO_FP:
lib/Target/AArch64/AArch64TargetTransformInfo.cpp
  322     { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 },
  323     { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 },
  324     { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i64, 1 },
  330     { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8,  3 },
  331     { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 3 },
  332     { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i64, 2 },
  337     { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i8,  3 },
  338     { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 },
  343     { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i8,  10 },
  344     { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i16, 4 },
  348     { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i8, 21 },
  354     { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i8,  4 },
  355     { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i16, 4 },
  356     { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
lib/Target/AMDGPU/AMDGPUISelLowering.cpp
  340   setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom);
  377     setOperationAction(ISD::UINT_TO_FP, VT, Expand);
 1152   case ISD::UINT_TO_FP: return LowerUINT_TO_FP(Op, DAG);
 1549   ISD::NodeType ToFp = Sign ? ISD::SINT_TO_FP : ISD::UINT_TO_FP;
 1674     SDValue Cvt_Lo = DAG.getNode(ISD::UINT_TO_FP, DL, MVT::f32, RHS_Lo);
 1675     SDValue Cvt_Hi = DAG.getNode(ISD::UINT_TO_FP, DL, MVT::f32, RHS_Hi);
 2486   SDValue CvtHi = DAG.getNode(Signed ? ISD::SINT_TO_FP : ISD::UINT_TO_FP,
 2489   SDValue CvtLo = DAG.getNode(ISD::UINT_TO_FP, SL, MVT::f64, Lo);
lib/Target/AMDGPU/R600ISelLowering.cpp
 1860       if (Arg.getOpcode() == ISD::UINT_TO_FP && Arg.getValueType() == MVT::f64) {
 1861         return DAG.getNode(ISD::UINT_TO_FP, DL, N->getValueType(0),
lib/Target/AMDGPU/SIISelLowering.cpp
  477     setOperationAction(ISD::UINT_TO_FP, MVT::i16, Promote);
  495     setOperationAction(ISD::UINT_TO_FP, MVT::f16, Promote);
  720   setTargetDAGCombine(ISD::UINT_TO_FP);
 8573   case ISD::UINT_TO_FP:
 8704   if (VT == MVT::f32 && (N0.getOpcode() == ISD::UINT_TO_FP ||
10024   case ISD::UINT_TO_FP:
lib/Target/ARM/ARMISelLowering.cpp
  167     setOperationAction(ISD::UINT_TO_FP, VT, Custom);
  172     setOperationAction(ISD::UINT_TO_FP, VT, Expand);
  289       setOperationAction(ISD::UINT_TO_FP, VT, Expand);
  849     setOperationAction(ISD::UINT_TO_FP, MVT::v4i16, Custom);
  850     setOperationAction(ISD::UINT_TO_FP, MVT::v8i16, Custom);
  961     setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom);
 5414   case ISD::UINT_TO_FP:
 5416     Opc = ISD::UINT_TO_FP;
 9166   case ISD::UINT_TO_FP:    return LowerINT_TO_FP(Op, DAG);
13539       (OpOpcode != ISD::SINT_TO_FP && OpOpcode != ISD::UINT_TO_FP))
lib/Target/ARM/ARMTargetTransformInfo.cpp
  239     { ISD::UINT_TO_FP,  MVT::v4f32, MVT::v4i32, 1 },
  242     { ISD::UINT_TO_FP,  MVT::v2f32, MVT::v2i8, 3 },
  244     { ISD::UINT_TO_FP,  MVT::v2f32, MVT::v2i16, 2 },
  246     { ISD::UINT_TO_FP,  MVT::v2f32, MVT::v2i32, 1 },
  248     { ISD::UINT_TO_FP,  MVT::v4f32, MVT::v4i1, 3 },
  250     { ISD::UINT_TO_FP,  MVT::v4f32, MVT::v4i8, 3 },
  252     { ISD::UINT_TO_FP,  MVT::v4f32, MVT::v4i16, 2 },
  254     { ISD::UINT_TO_FP,  MVT::v8f32, MVT::v8i16, 4 },
  256     { ISD::UINT_TO_FP,  MVT::v8f32, MVT::v8i32, 2 },
  258     { ISD::UINT_TO_FP,  MVT::v16f32, MVT::v16i16, 8 },
  260     { ISD::UINT_TO_FP,  MVT::v16f32, MVT::v16i32, 4 },
  271     { ISD::UINT_TO_FP,  MVT::v2f64, MVT::v2i32, 2 },
  274     { ISD::UINT_TO_FP,  MVT::v2f64, MVT::v2i8, 4 },
  276     { ISD::UINT_TO_FP,  MVT::v2f64, MVT::v2i16, 3 },
  278     { ISD::UINT_TO_FP,  MVT::v2f64, MVT::v2i32, 2 },
  328     { ISD::UINT_TO_FP,  MVT::f32, MVT::i1, 2 },
  330     { ISD::UINT_TO_FP,  MVT::f64, MVT::i1, 2 },
  332     { ISD::UINT_TO_FP,  MVT::f32, MVT::i8, 2 },
  334     { ISD::UINT_TO_FP,  MVT::f64, MVT::i8, 2 },
  336     { ISD::UINT_TO_FP,  MVT::f32, MVT::i16, 2 },
  338     { ISD::UINT_TO_FP,  MVT::f64, MVT::i16, 2 },
  340     { ISD::UINT_TO_FP,  MVT::f32, MVT::i32, 2 },
  342     { ISD::UINT_TO_FP,  MVT::f64, MVT::i32, 2 },
  344     { ISD::UINT_TO_FP,  MVT::f32, MVT::i64, 10 },
  346     { ISD::UINT_TO_FP,  MVT::f64, MVT::i64, 10 }
lib/Target/Hexagon/HexagonISelLowering.cpp
 1539   setOperationAction(ISD::UINT_TO_FP, MVT::i1,  Promote);
 1540   setOperationAction(ISD::UINT_TO_FP, MVT::i8,  Promote);
 1541   setOperationAction(ISD::UINT_TO_FP, MVT::i16, Promote);
lib/Target/Mips/MipsISelLowering.cpp
  411   setOperationAction(ISD::UINT_TO_FP,        MVT::i32,   Expand);
  412   setOperationAction(ISD::UINT_TO_FP,        MVT::i64,   Expand);
lib/Target/Mips/MipsSEISelLowering.cpp
  358     setOperationAction(ISD::UINT_TO_FP, Ty, Legal);
 1871     return DAG.getNode(ISD::UINT_TO_FP, DL, Op->getValueType(0),
lib/Target/PowerPC/PPCISelLowering.cpp
  205       setOperationAction(ISD::UINT_TO_FP, MVT::i1, Promote);
  206       AddPromotedToType(ISD::UINT_TO_FP, MVT::i1,
  210       setOperationAction(ISD::UINT_TO_FP, MVT::i1, Custom);
  377     setOperationAction(ISD::UINT_TO_FP, MVT::i32, Legal);
  384     setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand);
  505     setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand);
  526       setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom);
  532     setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom);
  701     setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Legal);
  835       setOperationAction(ISD::UINT_TO_FP, MVT::v2i64, Legal);
  842       setOperationAction(ISD::UINT_TO_FP, MVT::v2i8, Custom);
  843       setOperationAction(ISD::UINT_TO_FP, MVT::v4i8, Custom);
  844       setOperationAction(ISD::UINT_TO_FP, MVT::v2i16, Custom);
  845       setOperationAction(ISD::UINT_TO_FP, MVT::v4i16, Custom);
 1046     setOperationAction(ISD::UINT_TO_FP, MVT::v4i1, Custom);
 1117     setTargetDAGCombine(ISD::UINT_TO_FP);
 7591         UI->getOpcode() != ISD::UINT_TO_FP)
 7654   assert((Opc == ISD::UINT_TO_FP || Opc == ISD::SINT_TO_FP) &&
 7753                        ? (Op.getOpcode() == ISD::UINT_TO_FP ? PPCISD::FCFIDUS
 7755                        : (Op.getOpcode() == ISD::UINT_TO_FP ? PPCISD::FCFIDU
 7919     Ld = DAG.getMemIntrinsicNode(Op.getOpcode() == ISD::UINT_TO_FP ?
10145   case ISD::UINT_TO_FP:
12974       FirstInput.getOpcode() != ISD::UINT_TO_FP)
12977       N->getOperand(1).getOpcode() != ISD::UINT_TO_FP)
13016           N->getOpcode() == ISD::UINT_TO_FP) &&
13076                        ? (Op.getOpcode() == ISD::UINT_TO_FP ? PPCISD::FCFIDUS
13078                        : (Op.getOpcode() == ISD::UINT_TO_FP ? PPCISD::FCFIDU
13408   case ISD::UINT_TO_FP:
lib/Target/Sparc/SparcISelLowering.cpp
 1516   setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom);
 1518   setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom);
 3025   case ISD::UINT_TO_FP:         return LowerUINT_TO_FP(Op, DAG, *this,
 3372   case ISD::UINT_TO_FP:
lib/Target/SystemZ/SystemZISelLowering.cpp
  252     setOperationAction(ISD::UINT_TO_FP, MVT::i32, Promote);
  253     setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand);
  388     setOperationAction(ISD::UINT_TO_FP, MVT::v2i64, Legal);
  389     setOperationAction(ISD::UINT_TO_FP, MVT::v2f64, Legal);
  404     setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Legal);
  405     setOperationAction(ISD::UINT_TO_FP, MVT::v4f32, Legal);
lib/Target/X86/X86ISelLowering.cpp
  222   setOperationAction(ISD::UINT_TO_FP       , MVT::i1   , Promote);
  223   setOperationAction(ISD::UINT_TO_FP       , MVT::i8   , Promote);
  224   setOperationAction(ISD::UINT_TO_FP       , MVT::i16  , Promote);
  229     setOperationAction(ISD::UINT_TO_FP     , MVT::i64  , Custom);
  232     setOperationAction(ISD::UINT_TO_FP     , MVT::i32  , Custom);
  234     setOperationAction(ISD::UINT_TO_FP     , MVT::i32  , Expand);
  776     setOperationAction(ISD::UINT_TO_FP, VT, Expand);
  823     setOperationAction(ISD::UINT_TO_FP,         MVT::v4i32, Custom);
  960     setOperationAction(ISD::UINT_TO_FP,         MVT::v2i32, Custom);
  963     setOperationAction(ISD::UINT_TO_FP,         MVT::v2f32, Custom);
 1235       setOperationAction(ISD::UINT_TO_FP, MVT::v8i32, Custom);
 1387     setOperationAction(ISD::UINT_TO_FP,         MVT::v16i32, Legal);
 1472       setOperationAction(ISD::UINT_TO_FP, MVT::v8i64, Legal);
 1540     setOperationAction(ISD::UINT_TO_FP,         MVT::v8i32, Legal);
 1541     setOperationAction(ISD::UINT_TO_FP,         MVT::v4i32, Legal);
 1567         setOperationAction(ISD::UINT_TO_FP,     VT, Legal);
 1743       assert(isOperationCustom(ISD::UINT_TO_FP, MVT::v2f32) &&
 1872   setTargetDAGCombine(ISD::UINT_TO_FP);
18331           Op.getOpcode() == ISD::UINT_TO_FP) && "Unexpected opcode!");
18364     case ISD::UINT_TO_FP:
27694   case ISD::UINT_TO_FP:         return LowerUINT_TO_FP(Op, DAG);
28215   case ISD::UINT_TO_FP: {
44713       if (InOpcode == ISD::UINT_TO_FP &&
44933   case ISD::UINT_TO_FP:     return combineUIntToFP(N, DAG, Subtarget);
lib/Target/X86/X86IntrinsicsInfo.h
  923   X86_INTRINSIC_DATA(avx512_uitofp_round, INTR_TYPE_1OP, ISD::UINT_TO_FP, X86ISD::UINT_TO_FP_RND),
lib/Target/X86/X86TargetTransformInfo.cpp
 1309     { ISD::UINT_TO_FP,  MVT::v2f32,  MVT::v2i64,  1 },
 1310     { ISD::UINT_TO_FP,  MVT::v2f64,  MVT::v2i64,  1 },
 1311     { ISD::UINT_TO_FP,  MVT::v4f32,  MVT::v4i64,  1 },
 1312     { ISD::UINT_TO_FP,  MVT::v4f64,  MVT::v4i64,  1 },
 1313     { ISD::UINT_TO_FP,  MVT::v8f32,  MVT::v8i64,  1 },
 1314     { ISD::UINT_TO_FP,  MVT::v8f64,  MVT::v8i64,  1 },
 1367     { ISD::UINT_TO_FP,  MVT::v8f64,  MVT::v8i1,   4 },
 1368     { ISD::UINT_TO_FP,  MVT::v16f32, MVT::v16i1,  3 },
 1369     { ISD::UINT_TO_FP,  MVT::v2f64,  MVT::v2i8,   2 },
 1370     { ISD::UINT_TO_FP,  MVT::v4f64,  MVT::v4i8,   2 },
 1371     { ISD::UINT_TO_FP,  MVT::v8f32,  MVT::v8i8,   2 },
 1372     { ISD::UINT_TO_FP,  MVT::v8f64,  MVT::v8i8,   2 },
 1373     { ISD::UINT_TO_FP,  MVT::v16f32, MVT::v16i8,  2 },
 1374     { ISD::UINT_TO_FP,  MVT::v2f64,  MVT::v2i16,  5 },
 1375     { ISD::UINT_TO_FP,  MVT::v4f64,  MVT::v4i16,  2 },
 1376     { ISD::UINT_TO_FP,  MVT::v8f32,  MVT::v8i16,  2 },
 1377     { ISD::UINT_TO_FP,  MVT::v8f64,  MVT::v8i16,  2 },
 1378     { ISD::UINT_TO_FP,  MVT::v16f32, MVT::v16i16, 2 },
 1379     { ISD::UINT_TO_FP,  MVT::v2f32,  MVT::v2i32,  2 },
 1380     { ISD::UINT_TO_FP,  MVT::v2f64,  MVT::v2i32,  1 },
 1381     { ISD::UINT_TO_FP,  MVT::v4f32,  MVT::v4i32,  1 },
 1382     { ISD::UINT_TO_FP,  MVT::v4f64,  MVT::v4i32,  1 },
 1383     { ISD::UINT_TO_FP,  MVT::v8f32,  MVT::v8i32,  1 },
 1384     { ISD::UINT_TO_FP,  MVT::v8f64,  MVT::v8i32,  1 },
 1385     { ISD::UINT_TO_FP,  MVT::v16f32, MVT::v16i32, 1 },
 1386     { ISD::UINT_TO_FP,  MVT::v2f32,  MVT::v2i64,  5 },
 1387     { ISD::UINT_TO_FP,  MVT::v8f32,  MVT::v8i64, 26 },
 1388     { ISD::UINT_TO_FP,  MVT::v2f64,  MVT::v2i64,  5 },
 1389     { ISD::UINT_TO_FP,  MVT::v4f64,  MVT::v4i64,  5 },
 1390     { ISD::UINT_TO_FP,  MVT::v8f64,  MVT::v8i64,  5 },
 1392     { ISD::UINT_TO_FP,  MVT::f64,    MVT::i64,    1 },
 1435     { ISD::UINT_TO_FP,  MVT::v8f32,  MVT::v8i32,  8 },
 1480     { ISD::UINT_TO_FP,  MVT::v4f32, MVT::v4i1,  7 },
 1481     { ISD::UINT_TO_FP,  MVT::v4f64, MVT::v4i1,  7 },
 1482     { ISD::UINT_TO_FP,  MVT::v8f32, MVT::v8i1,  6 },
 1483     { ISD::UINT_TO_FP,  MVT::v4f32, MVT::v4i8,  2 },
 1484     { ISD::UINT_TO_FP,  MVT::v4f64, MVT::v4i8,  2 },
 1485     { ISD::UINT_TO_FP,  MVT::v8f32, MVT::v8i8,  5 },
 1486     { ISD::UINT_TO_FP,  MVT::v4f32, MVT::v4i16, 2 },
 1487     { ISD::UINT_TO_FP,  MVT::v4f64, MVT::v4i16, 2 },
 1488     { ISD::UINT_TO_FP,  MVT::v8f32, MVT::v8i16, 5 },
 1489     { ISD::UINT_TO_FP,  MVT::v2f64, MVT::v2i32, 6 },
 1490     { ISD::UINT_TO_FP,  MVT::v4f32, MVT::v4i32, 6 },
 1491     { ISD::UINT_TO_FP,  MVT::v4f64, MVT::v4i32, 6 },
 1492     { ISD::UINT_TO_FP,  MVT::v8f32, MVT::v8i32, 9 },
 1493     { ISD::UINT_TO_FP,  MVT::v2f64, MVT::v2i64, 5 },
 1494     { ISD::UINT_TO_FP,  MVT::v4f64, MVT::v4i64, 6 },
 1553     { ISD::UINT_TO_FP,  MVT::f64,    MVT::i64,    4 },
 1570     { ISD::UINT_TO_FP, MVT::v2f64, MVT::v16i8, 16*10 },
 1571     { ISD::UINT_TO_FP, MVT::v4f32, MVT::v16i8, 8 },
 1572     { ISD::UINT_TO_FP, MVT::v4f32, MVT::v8i16, 15 },
 1573     { ISD::UINT_TO_FP, MVT::v2f64, MVT::v8i16, 8*10 },
 1574     { ISD::UINT_TO_FP, MVT::v2f64, MVT::v4i32, 4*10 },
 1575     { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 8 },
 1576     { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i64, 6 },
 1577     { ISD::UINT_TO_FP, MVT::v4f32, MVT::v2i64, 15 },
 1581     { ISD::UINT_TO_FP,  MVT::f64,    MVT::i64,    6 },