reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc

50700 /*109146*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
51202 /*110515*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
51704 /*111884*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
51881 /*112367*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
51903 /*112419*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
52141 /*112990*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
52163 /*113042*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
52401 /*113613*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
52423 /*113665*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
60357 /*132060*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
60542 /*132399*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
60649 /*132594*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
60805 /*132879*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
61050 /*133414*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
61507 /*134511*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
61980 /*135640*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
62228 /*136174*/        OPC_CheckChild2CondCode, ISD::SETUEQ,

gen/lib/Target/AMDGPU/R600GenDAGISel.inc

 5187 /* 21175*/          OPC_CheckCondCode, ISD::SETUEQ,

gen/lib/Target/Hexagon/HexagonGenDAGISel.inc

30348 /* 58608*/          OPC_CheckChild2CondCode, ISD::SETUEQ,
30503 /* 58954*/          OPC_CheckChild2CondCode, ISD::SETUEQ,

gen/lib/Target/Mips/MipsGenDAGISel.inc

17140 /* 32007*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
17224 /* 32163*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
17393 /* 32520*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
17477 /* 32676*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
17987 /* 33688*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
18090 /* 33879*/        OPC_CheckChild2CondCode, ISD::SETUEQ,

gen/lib/Target/NVPTX/NVPTXGenDAGISel.inc

60432 /*127942*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
60446 /*127969*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
60460 /*127996*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
60474 /*128023*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
60488 /*128050*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
60502 /*128077*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
60516 /*128104*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
60530 /*128131*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
60544 /*128158*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
60558 /*128185*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
60572 /*128212*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
60586 /*128239*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
62288 /*131590*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
62312 /*131638*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
62336 /*131686*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
62350 /*131713*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
62364 /*131740*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
62388 /*131788*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
62412 /*131836*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
62426 /*131863*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
64968 /*137150*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
64997 /*137214*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
65026 /*137278*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
65055 /*137342*/      OPC_CheckChild2CondCode, ISD::SETUEQ,
66276 /*140038*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
66460 /*140441*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
66644 /*140844*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
66699 /*140960*/          OPC_CheckChild2CondCode, ISD::SETUEQ,
67083 /*141808*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
67767 /*143275*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
68251 /*144322*/        OPC_CheckChild2CondCode, ISD::SETUEQ,

gen/lib/Target/PowerPC/PPCGenDAGISel.inc

26977 /* 65424*/        OPC_CheckChild2CondCode, ISD::SETUEQ,
27187 /* 65953*/        OPC_CheckChild2CondCode, ISD::SETUEQ,

lib/CodeGen/Analysis.cpp

  212   case FCmpInst::FCMP_UEQ:   return ISD::SETUEQ;
  225     case ISD::SETOEQ: case ISD::SETUEQ: return ISD::SETEQ;

lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

 1686     case ISD::SETUEQ:

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

  422     case ISD::SETUEQ: Result = ISD::SETEQ   ; break;  // SETUGE & SETULE
 1988   case ISD::SETUEQ:
 2078     case ISD::SETUEQ: return getBoolConstant(R==APFloat::cmpUnordered ||

lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

  408     case ISD::SETUEQ:                   return "setueq";

lib/CodeGen/SelectionDAG/TargetLowering.cpp

  342   case ISD::SETUEQ:
 3728           if (Cond == ISD::SETUEQ &&
 3741           if (Cond == ISD::SETUEQ &&

lib/Target/AArch64/AArch64ISelLowering.cpp

 1491   case ISD::SETUEQ:
 1535   case ISD::SETUEQ:
 1566   case ISD::SETUEQ:
 5179       if ((CC == ISD::SETEQ || CC == ISD::SETOEQ || CC == ISD::SETUEQ) &&

lib/Target/AMDGPU/AMDGPUISelLowering.cpp

 1274   case ISD::SETUEQ:

lib/Target/AMDGPU/R600ISelLowering.cpp

  129   setCondCodeAction(ISD::SETUEQ, MVT::f32, Expand);

lib/Target/AMDGPU/SIInsertSkips.cpp

  225     case ISD::SETUEQ:

lib/Target/ARC/ARCISelLowering.cpp

   43   case ISD::SETUEQ:

lib/Target/ARM/ARMISelLowering.cpp

 1830   case ISD::SETUEQ: CondCode = ARMCC::EQ; CondCode2 = ARMCC::VS; break;
 6234     case ISD::SETUEQ: Invert = true; LLVM_FALLTHROUGH;

lib/Target/Lanai/LanaiISelLowering.cpp

  857   case ISD::SETUEQ:

lib/Target/Mips/MipsISelLowering.cpp

  626   case ISD::SETUEQ: return Mips::FCOND_UEQ;

lib/Target/Mips/MipsSEISelLowering.cpp

 1847                         Op->getOperand(2), ISD::SETUEQ);

lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp

  558     case ISD::SETUEQ:

lib/Target/PowerPC/PPCISelDAGToDAG.cpp

 3837   case ISD::SETUEQ:
 3884   case ISD::SETUEQ:
 3961       case ISD::SETUNE: CC = ISD::SETUEQ; Negate = true; break;
 3969       case ISD::SETUEQ:

lib/Target/PowerPC/PPCISelLowering.cpp

  491   setCondCodeAction(ISD::SETUEQ, MVT::f32, Expand);
  492   setCondCodeAction(ISD::SETUEQ, MVT::f64, Expand);
  743     setCondCodeAction(ISD::SETUEQ, MVT::v4f32, Expand);
  782       setCondCodeAction(ISD::SETUEQ, MVT::v2f64, Expand);
  894         setCondCodeAction(ISD::SETUEQ, MVT::f128, Expand);

lib/Target/RISCV/RISCVISelLowering.cpp

  144       ISD::SETOGT, ISD::SETOGE, ISD::SETONE, ISD::SETUEQ, ISD::SETUGT,

lib/Target/Sparc/SparcISelLowering.cpp

 1404   case ISD::SETUEQ: return SPCC::FCC_UE;

lib/Target/SystemZ/SystemZISelLowering.cpp

 1943   CONV(EQ);
 2702   case ISD::SETUEQ:

lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

   88     for (auto CC : {ISD::SETO, ISD::SETUO, ISD::SETUEQ, ISD::SETONE,

lib/Target/X86/X86ISelLowering.cpp

 4740   case ISD::SETUEQ:
20478   case ISD::SETUEQ: SSECC = 8; break;
20662       if (Cond == ISD::SETUEQ) {