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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc50364 /*108234*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
50392 /*108310*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
50866 /*109603*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
50894 /*109679*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
51368 /*110972*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
51396 /*111048*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
60933 /*133128*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
61390 /*134225*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
61850 /*135328*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
gen/lib/Target/AMDGPU/R600GenDAGISel.inc 4245 /* 17423*/ OPC_CheckCondCode, ISD::SETOEQ,
4472 /* 18290*/ OPC_CheckCondCode, ISD::SETOEQ,
4698 /* 19153*/ OPC_CheckCondCode, ISD::SETOEQ,
4842 /* 19777*/ OPC_CheckCondCode, ISD::SETOEQ,
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc30276 /* 58466*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
30431 /* 58812*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
gen/lib/Target/Mips/MipsGenDAGISel.inc17133 /* 31994*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
17217 /* 32150*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
17386 /* 32507*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
17470 /* 32663*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
17952 /* 33623*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
18055 /* 33814*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
gen/lib/Target/NVPTX/NVPTXGenDAGISel.inc61376 /*129790*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
61400 /*129838*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
61424 /*129886*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
61438 /*129913*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
61452 /*129940*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
61476 /*129988*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
61500 /*130036*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
61514 /*130063*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
64272 /*135614*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
64301 /*135678*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
64330 /*135742*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
64359 /*135806*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
66873 /*141358*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
67569 /*142849*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
68161 /*144124*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
gen/lib/Target/PowerPC/PPCGenDAGISel.inc26014 /* 62795*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
26084 /* 62963*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
26370 /* 63779*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
26440 /* 63947*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
26726 /* 64763*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
26901 /* 65240*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
27111 /* 65769*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
gen/lib/Target/RISCV/RISCVGenDAGISel.inc 7187 /* 13377*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
7408 /* 13857*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
gen/lib/Target/WebAssembly/WebAssemblyGenDAGISel.inc 7729 /* 14329*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
7805 /* 14468*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
8105 /* 15025*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
8188 /* 15178*/ OPC_CheckChild2CondCode, ISD::SETOEQ,
lib/CodeGen/Analysis.cpp 204 case FCmpInst::FCMP_OEQ: return ISD::SETOEQ;
225 case ISD::SETOEQ: case ISD::SETUEQ: return ISD::SETEQ;
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 1673 assert(TLI.isCondCodeLegal(ISD::SETOEQ, OpVT)
1675 CC1 = ISD::SETOEQ; CC2 = ISD::SETOEQ; Opc = ISD::AND; break;
1675 CC1 = ISD::SETOEQ; CC2 = ISD::SETOEQ; Opc = ISD::AND; break;
1680 case ISD::SETOEQ:
lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp 1695 LHSHi, RHSHi, ISD::SETOEQ);
lib/CodeGen/SelectionDAG/SelectionDAG.cpp 421 case ISD::SETOEQ: // SETEQ & SETU[LG]E
1980 case ISD::SETOEQ:
2045 case ISD::SETOEQ: return getBoolConstant(R==APFloat::cmpEqual, dl, VT,
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp 399 case ISD::SETOEQ: return "setoeq";
lib/CodeGen/SelectionDAG/TargetLowering.cpp 288 case ISD::SETOEQ:
3725 if (Cond == ISD::SETOEQ &&
3738 if (Cond == ISD::SETOEQ &&
lib/Target/AArch64/AArch64ISelLowering.cpp 1464 case ISD::SETOEQ:
5179 if ((CC == ISD::SETEQ || CC == ISD::SETOEQ || CC == ISD::SETUEQ) &&
lib/Target/AMDGPU/AMDGPUISelLowering.cpp 1270 case ISD::SETOEQ:
lib/Target/AMDGPU/SIISelLowering.cpp 9841 if ((CC == ISD::SETOEQ || CC == ISD::SETONE) && LHS.getOpcode() == ISD::FABS) {
9856 unsigned Mask = CC == ISD::SETOEQ ? IsInfMask : IsFiniteMask;
lib/Target/AMDGPU/SIInsertSkips.cpp 195 case ISD::SETOEQ:
lib/Target/ARM/ARMISelLowering.cpp 1820 case ISD::SETOEQ: CondCode = ARMCC::EQ; break;
5138 if (CC == ISD::SETOEQ)
5269 (CC == ISD::SETEQ || CC == ISD::SETOEQ ||
6220 case ISD::SETOEQ:
lib/Target/Lanai/LanaiISelLowering.cpp 856 case ISD::SETOEQ:
lib/Target/Mips/MipsISelLowering.cpp 608 case ISD::SETOEQ: return Mips::FCOND_OEQ;
lib/Target/Mips/MipsSEISelLowering.cpp 1827 Op->getOperand(2), ISD::SETOEQ);
lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp 542 case ISD::SETOEQ:
lib/Target/PowerPC/PPCISelDAGToDAG.cpp 3843 case ISD::SETOEQ:
3874 case ISD::SETOEQ:
3917 case ISD::SETUNE: CC = ISD::SETOEQ; Negate = true; break;
3925 case ISD::SETOEQ:
lib/Target/Sparc/SparcISelLowering.cpp 1386 case ISD::SETOEQ: return SPCC::FCC_E;
lib/Target/SystemZ/SystemZISelLowering.cpp 1943 CONV(EQ);
2607 case ISD::SETOEQ:
lib/Target/X86/X86ISelLowering.cpp 198 setCondCodeAction(ISD::SETOEQ, MVT::f32, Expand);
199 setCondCodeAction(ISD::SETOEQ, MVT::f64, Expand);
200 setCondCodeAction(ISD::SETOEQ, MVT::f80, Expand);
4758 case ISD::SETOEQ:
20460 case ISD::SETOEQ:
22110 cast<CondCodeSDNode>(Cond.getOperand(2))->get() == ISD::SETOEQ) {