reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
363 bool isNegative() const { return (*this)[BitWidth - 1]; } 375 bool isSignBitSet() const { return (*this)[BitWidth-1]; } 1795 return lg + unsigned((*this)[lg - 1]);lib/Analysis/InstructionSimplify.cpp
1263 if (Op0Known.One[0])
lib/Analysis/TypeBasedAliasAnalysis.cpp185 return CI->getValue()[0]; 249 return CI->getValue()[0];lib/Analysis/ValueTracking.cpp
1006 if (!Known.Zero[0] && !Known.One[0] && 1006 if (!Known.Zero[0] && !Known.One[0] && 2135 if (Known.One[0])lib/CodeGen/SelectionDAG/SelectionDAG.cpp
2263 if (!DemandedElts[i]) 2282 if (!DemandedElts[i]) 2469 if (!DemandedElts[i]) 2499 if (!DemandedElts[i]) 2646 if (DemandedElts[i]) 2668 if (DemandedElts[i]) 2675 if (DemandedElts[i]) { 2940 if (!DemandedElts[i]) 3188 if (DemandedElts[EltIdx]) { 3443 if (!DemandedElts[i]) 3468 if (!DemandedElts[i]) 3515 if (DemandedElts[i]) 3526 if (DemandedElts[i]) { 3772 if (DemandedElts[EltIdx]) { 3909 if (!DemandedElts[i]) 9438 if (!DemandedElts[i])lib/CodeGen/SelectionDAG/TargetLowering.cpp
627 if (DemandedElts[j]) 645 if (DemandedElts[i]) { 709 !DemandedElts[CIdx->getZExtValue()]) 721 if (M < 0 || !DemandedElts[i]) 811 if (!DemandedElts[0]) 850 if (!DemandedElts[Idx]) 955 if (!DemandedElts[i]) 1470 if (Known.Zero[BitWidth - ShAmt - 1] || 1486 if (Known.One[BitWidth - ShAmt - 1]) 1584 if (Known.Zero[ExVTBits - 1]) 1589 if (Known.One[ExVTBits - 1]) { // Input sign bit known set 1870 if (DemandedElts[j]) 1891 if (DemandedElts[i]) { 2051 if (UndefVals[Index]) 2121 if (!DemandedElts[0]) { 2151 if (DemandedElts[i]) 2165 if (DemandedElts[i]) { 2178 if (SrcDemandedElts[i]) { 2179 if (SrcZero[i]) 2181 if (SrcUndef[i]) 2193 if (DemandedElts[i]) 2203 if (DemandedElts[i]) { 2222 if (!DemandedElts[i] && !Ops[i].isUndef()) { 2319 if (!DemandedElts[Idx]) 2381 if (M < 0 || !DemandedElts[i]) 2408 if (!DemandedElts[i] || (M < (int)NumElts && UndefLHS[M]) || 2408 if (!DemandedElts[i] || (M < (int)NumElts && UndefLHS[M]) || 2409 (M >= (int)NumElts && UndefRHS[M - NumElts])) { 2433 if (UndefLHS[M]) 2435 if (ZeroLHS[M]) 2438 if (UndefRHS[M - NumElts]) 2440 if (ZeroRHS[M - NumElts]) 2725 return CVal[0]; 2754 return !CN->getAPIntValue()[0]; 4773 if (magics.a != 0 && !Divisor[0]) {lib/IR/ConstantFold.cpp
1016 if ((*CV)[0])
lib/MCA/HardwareUnits/RegisterFile.cpp329 bool IsZeroMove = ZeroRegisters[RS.getRegisterID()]; 406 if (ZeroRegisters[RS.getRegisterID()]) 479 if (ZeroRegisters[I]) { 483 << ", RenameAs=" << RRI.RenameAs << ", IsZero=" << ZeroRegisters[I]lib/MCA/InstrBuilder.cpp
668 if (Mask[RD.UseIndex]) 701 /* ClearsSuperRegs */ WriteMask[WriteIndex],lib/Support/APInt.cpp
341 if ((*this)[bitPosition]) clearBit(bitPosition); 397 if (subBits[i]) 718 Reversed |= Val[0]; 821 bool isNeg = isSigned ? (*this)[BitWidth-1] : false; 1982 if ((*this)[0]) {lib/Target/ARM/ARMISelLowering.cpp
12560 if (NewFromMask[0] == 0) 14021 if (OrCI[BitInY] == 0)lib/Target/Hexagon/BitTracker.cpp
428 Res[i] = A[i];
lib/Target/SystemZ/SystemZISelLowering.cpp 6234 if (!DemandedElts[OpNo - 1])
lib/Target/X86/Utils/X86ShuffleDecode.cpp310 if (UndefElts[i]) { 356 if (UndefElts[i]) { 503 if (UndefElts[i]) { 525 if (UndefElts[i]) { 564 if (UndefElts[i]) { 578 if (UndefElts[i]) {lib/Target/X86/X86ISelLowering.cpp
5342 if (Zeroable[i]) 5408 if (Undefs[i]) { 5993 if (UndefSrcElts[i]) 6131 if (UndefSrcElts[0]) 6162 if (UndefSrcElts[0]) 6275 if (UndefElts0[M]) 6279 if (UndefElts1[M - NumElts]) 6299 if (UndefElts[i]) 6371 if (DemandedElts[OuterIdx]) 6373 if (DemandedElts[OuterIdx + NumInnerEltsPerLane]) 6392 if (!DemandedElts[Idx]) 6798 if (UndefSrcElts[SrcIdx][M]) 6819 if (KnownUndef[i]) 6821 else if (KnownZero[i]) 6893 if (UndefElts[i]) { 6931 unsigned Ofs = (SelectMask[j] ? NumSizeInBytes : 0); 6932 int Idx = (ZeroMask[j] ? (int)SM_SentinelZero : (i + j + Ofs)); 7874 return (0 <= BaseIdx && BaseIdx < (int)NumElems && LoadMask[BaseIdx] && 7887 if (LoadMask[i]) { 7893 } else if (ZeroMask[i]) { 7946 if (UndefMask[i]) 7948 int Offset = ZeroMask[i] ? NumMaskElts : 0; 8010 if (!LoadMask[i]) 10522 if (Zeroable[i]) 10563 if (Zeroable[i / NumEltBytes]) { 10924 if (Zeroable[i]) 11000 if (Zeroable[i]) { 11707 if (!Zeroable[i + j + (Left ? 0 : (Scale - Shift))]) 11811 if (!Zeroable[Len - 1]) 12131 if (!Zeroable[i]) 12203 if (!Zeroable[i]) 12274 if (i != V2Index && !Zeroable[i]) { 12700 if (Zeroable[i]) { 13920 if (Zeroable[i / Scale]) 15479 ZeroLane[i & 1] &= Zeroable[i]; 16818 if (!Zeroable[j + (Left ? 0 : (Size - Shift))]) 17101 if (OrigMask[i] != SM_SentinelUndef && Zeroable[i]) 19942 if (M->second[CIdx]) 26260 if (!UndefElts[i]) { 31629 if (!DemandedElts[i]) 31766 if (!DemandedElts[i]) 32964 if (SrcUndefElts[SrcMaskIdx]) { 33637 if (KnownUndef1[SrcIdx] || KnownZero1[SrcIdx]) { 33637 if (KnownUndef1[SrcIdx] || KnownZero1[SrcIdx]) { 33665 } else if (KnownUndef0[i] || KnownZero0[i]) { 33665 } else if (KnownUndef0[i] || KnownZero0[i]) { 34666 if (!DemandedElts[i]) 34691 if (DemandedElts[i]) { 34847 if (Known.Zero[BitWidth - ShAmt - 1] || 34853 if (Known.One[BitWidth - ShAmt - 1]) 34905 if (!OriginalDemandedElts[Idx]) 34980 if (KnownSrc.One[SrcBits - 1]) 34982 else if (KnownSrc.Zero[SrcBits - 1]) 35007 !DemandedElts[CIdx->getZExtValue()]) 35035 if (!DemandedElts[i] || ShuffleUndef[i]) 35035 if (!DemandedElts[i] || ShuffleUndef[i]) 36404 if (UndefVecElts[Idx]) 38452 if (UndefElts[SrcIdx]) { 39270 if (UndefElts[i]) 39322 if (UndefElts0[i] || UndefElts1[i]) 39322 if (UndefElts0[i] || UndefElts1[i]) 41480 if (!UndefElts[I] && !EltBits[I].isSignMask())lib/Target/X86/X86ShuffleDecodeConstantPool.cpp
131 if (UndefElts[i]) { 171 if (UndefElts[i]) { 208 if (UndefElts[i]) { 260 if (UndefElts[i]) { 312 if (UndefElts[i]) { 338 if (UndefElts[i]) {lib/Transforms/InstCombine/InstCombineCalls.cpp
2708 if (!C || !C->getValue()[0]) {
lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp567 if (Known.Zero[BitWidth-ShiftAmt-1] || 573 } else if (Known.One[BitWidth-ShiftAmt-1]) { // New bits are known one. 1003 if (!!DemandedElts[OrigLoadIdx]) 1064 if (!!DemandedElts[OrigLoadIdx]) 1120 if (!DemandedElts[i]) { // If not demanded, set to undef. 1240 if (IdxNo >= VWidth || !DemandedElts[IdxNo]) { 1255 if (DemandedElts[i]) { 1283 } else if (!DemandedElts[i]) { 1287 if (LHSUndefElts[MaskVal]) { 1296 if (RHSUndefElts[MaskVal - LHSVWidth]) { 1344 if (UndefElts[i]) 1415 if (DemandedElts[OutIdx]) 1423 if (DemandedElts[InIdx / Ratio]) 1439 if (UndefElts2[OutIdx / Ratio]) 1494 if (!DemandedElts[0]) { 1504 UndefElts = UndefElts[0]; 1513 if (!DemandedElts[0]) { 1533 if (!DemandedElts[0]) { 1544 if (!UndefElts2[0]) 1560 if (!DemandedElts[0]) { 1572 UndefElts |= UndefElts2[0]; 1594 if (!DemandedElts[0]) { 1606 if (!UndefElts2[0] || !UndefElts3[0]) 1606 if (!UndefElts2[0] || !UndefElts3[0]) 1641 if (DemandedElts[Idx])tools/clang/lib/Sema/SemaExpr.cpp
3647 if (!Literal.isUnsigned && ResultVal[IntSize-1] == 0) 3662 if (!Literal.isUnsigned && ResultVal[LongSize-1] == 0) 3695 if (!Literal.isUnsigned && (ResultVal[LongLongSize-1] == 0 ||unittests/ADT/APIntTest.cpp
31 EXPECT_TRUE(Shl[0]); 32 EXPECT_FALSE(Shl[1]); 1612 A1[i]); 1626 A2[i*APInt::APINT_BITS_PER_WORD + j]); 2759 if (V0[Bit] == V1[Bit]) 2759 if (V0[Bit] == V1[Bit])utils/TableGen/CodeGenSchedule.cpp
350 if (OpcodeMasks[OpcodeIdx].first[ProcIndex]) {
utils/TableGen/PredicateExpander.cpp 436 if (!ProcModelMask[I])