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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/ARM/ARMGenAsmMatcher.inc11349 { 1600 /* sub */, ARM::tSUBrr, Convert__Reg1_2__CCOut1_0__Reg1_2__Reg1_3__CondCode2_1, AMFBS_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR }, },
11364 { 1600 /* sub */, ARM::tSUBrr, Convert__Reg1_2__CCOut1_0__Reg1_3__Reg1_4__CondCode2_1, AMFBS_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR, MCK_tGPR }, },
gen/lib/Target/ARM/ARMGenDAGISel.inc 5339 /* 10880*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::tSUBrr), 0,
33355 /* 73409*/ OPC_MorphNodeTo1, TARGET_VAL(ARM::tSUBrr), 0,
gen/lib/Target/ARM/ARMGenFastISel.inc 4706 return fastEmitInst_rr(ARM::tSUBrr, &ARM::tGPRRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/ARM/ARMGenMCCodeEmitter.inc 7163 case ARM::tSUBrr: {
lib/Target/ARM/ARMBaseInstrInfo.cpp 646 case ARM::tSUBrr: // SUB (register) T1
2333 {ARM::tSUBSrr, ARM::tSUBrr},
2781 if (CmpI->getOpcode() == ARM::tCMPr && OI->getOpcode() == ARM::tSUBrr &&
2835 case ARM::tSUBrr:
3110 Opc == ARM::tSUBrr || Opc == ARM::tSUBi3 ||
3112 unsigned OpI = Opc != ARM::tSUBrr ? 1 : 2;
lib/Target/ARM/ARMFeatures.h 50 case ARM::tSUBrr:
lib/Target/ARM/Thumb2SizeReduction.cpp 119 { ARM::t2SUBrr, ARM::tSUBrr, 0, 0, 0, 1, 0, 0,0, 0,0,0 },
121 { ARM::t2SUBSrr,ARM::tSUBrr, 0, 0, 0, 1, 0, 2,0, 0,0,0 },
lib/Target/ARM/ThumbRegisterInfo.cpp 170 int Opc = (isSub) ? ARM::tSUBrr